TW478066B - Method to remove precipitation for tungsten plug manufacture process - Google Patents

Method to remove precipitation for tungsten plug manufacture process Download PDF

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Publication number
TW478066B
TW478066B TW84113808A TW84113808A TW478066B TW 478066 B TW478066 B TW 478066B TW 84113808 A TW84113808 A TW 84113808A TW 84113808 A TW84113808 A TW 84113808A TW 478066 B TW478066 B TW 478066B
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Taiwan
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tungsten
layer
metal
thin
barrier metal
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TW84113808A
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Chinese (zh)
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Jen-Hua Yu
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Taiwan Semiconductor Mfg
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Priority to TW84113808A priority Critical patent/TW478066B/en
Priority to TW84113808D priority patent/TW280941B/en
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Abstract

This invention provides a manufacture method of tungsten plug for integrated circuit. The traditional manufacture method of tungsten plug is to from a contact hole or via hole, deposit a thick layer of tungsten and carry out anisotropic etch back on the tungsten layer using plasma etch technique to form tungsten plug in the contact hole or via hole. However, because the tungsten layer is very thick, long etch back time is required. The surface of tungsten layer at the center of the contact hole or via hole will gradually have dimple during the long etch back process. As the etch back process finishes, tungsten in the contact hole or via hole is etched away greatly and thus the resulted tungsten plug is not complete or flat. The method of the present invention describes a method to eliminate surface dimple of tungsten by depositing a very thin tungsten layer.

Description

478066 經濟部智慧財產局員工消費合作社印製 B7 五、發明說明(/) (一) 技術領域: 本發明係為第84113808號專利申請案號之鎢栓柱製 程之沈澱物的去除方法追加一,本發明追加所揭露的是 關於積體電路(Integrated Circuit ; 1C)之鎢栓柱(Tungsten Plug)的製造方法(Manufactming Method),此方法消拜了 鎢金屬表面凹陷(dimple)之現象。 (二) 發明背景: 母案係有關於一種鎢栓柱製程之沈殿物的去除方 法。傳統製造積體電路之方法是在半導體基板上形成隔 離電性活動區(Active Area)所需的場氧化層層(Field 0xide) ’然後再形成場效電晶體(Field Effect Transistor* ; FET)所述【場效電晶體】包含有閘介電層(Gate478066 Printed B7 by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the Invention (/) (1) Technical Field: The present invention is a method for removing deposits in the tungsten plug column process of Patent Application No. 84113808, with one additional, The present invention additionally discloses a manufacturing method for a tungsten plug (Integrated Circuit; 1C), which eliminates the phenomenon of dimple on the surface of tungsten metal. (II) Background of the Invention: The mother case relates to a method for removing Shen Dianwu from a tungsten stud process. The traditional method of manufacturing integrated circuits is to form a field oxide layer (Field 0xide) required to isolate the active area on the semiconductor substrate, and then form a Field Effect Transistor *; FET. [Field Effect Transistor] includes a gate dielectric layer (Gate

Dielectric)、閘電極(Gate electrode),側壁子(Spacer)與源 極/汲極(Source/Drain)。形成場效電晶體之後,接著形 成【接觸窗】與【介層孔】再進行金屬連線製程(Metal Interconnection),而目前被廣汎應用的金屬連線技術是雙 層金屬連線製程(Double Level Metal Interconnection),其 中弟層至屬連線(First Level Metal Interconnection)跨 過所述【接觸窗】跟場效電晶體(Field Effect Transistor ; -FET)之源極/::及極(source/Drain)作電性接觸,第二層金 屬連線(Second Level Metal Interconnection)則跨過所述 【介層孔】跟所述第一層金屬連線作電性接觸,並且, 所述【攘觸窗】與【介層孔】内都有鎢栓柱。 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) ---------------- (請先閱讀背面之注意事項再填寫本頁)Dielectric), Gate electrode, Spacer and Source / Drain. After the field effect transistor is formed, [contact window] and [via] are formed, and then the metal interconnection process is performed. The currently widely used metal connection technology is the double-layer metal connection process (Double Level Metal Interconnection), where the First Level Metal Interconnection crosses the source / :: and pole (source /) of the [Contact Window] and Field Effect Transistor (-FET) Drain) is used for electrical contact, and the second-level metal connection (Second Level Metal Interconnection) makes electrical contact with the first-level metal connection across the [via] and the [攘 contact There are tungsten studs in the window and the interstitial hole. This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) ---------------- (Please read the precautions on the back before filling this page)

I I n I 訂--------- 478066 A7 ί明說明(d ) 兹說明傳統【雙層金屬連線】積體電路製程所述【第 一層金屬連線】的製程方法如下。首先,在半導體基板2 上形成一層絕緣層4,再利用微影技術與電漿姑刻技術 (Lithography & Plasma Etching)形成接觸窗 5(c〇ntactI I n I Order --------- 478066 A7 明 Description (d) The process method of the [first layer metal connection] described in the traditional [double layer metal connection] integrated circuit manufacturing process is as follows. First, an insulating layer 4 is formed on the semiconductor substrate 2, and then a lithography and plasma etching technology (Lithography & Plasma Etching) is used to form a contact window 5 (c〇ntact

Hole),再以藏鑛技術形成由鈦(Titanium ; Ti)與氮化鈦 (Nitride Titanium ; TiN)構成之障礙金屬層 6(Bafrier Metal),其中,鈦金屬位於氮化鈦之下方,所述障礙金屬 層6跨過所述【接觸窗5】,接著,沉積一層厚度很厚的 鎢金屬8,所述【厚度很厚的鎢金屬8】跨過並填滿所述 【接觸窗5】,如圖一所示,然後,利用電漿蝕刻技術對 所述鎢金屬8進行單向性的回蝕刻(anis〇tr〇pic Etchback),所述【單向性的回蝕刻】終止於所述氮化鈦 之表面,以在所述【接觸窗5】内形成鎢栓柱1〇(Tungsten Plug),如圖二所示,完成所述【鎢栓柱1〇】之後,隨即 濺鍍一層铭矽銅合金(Aluminum/Silicon/Coppei* Alloy), 並利用微影技術電漿蝕刻技術蝕去所述鋁矽銅合金、鈦 與氮化鈦,【第一層金屬連線】於焉完成。 然而’由於所述鎢金屬之厚度相當厚,故需要長時 間回蝕刻,而在長時間的回蝕刻過程中,在所述【攘觸 _ 中央位置之鎢金屬表面會逐漸凹陷(Dimple),等到 〜回蝕刻結束時,【接觸窗5】内之所述【鎢栓柱1〇】表面 遂產生凹P曰13(Dimple),如圖二所示。因此,在進入次 微米技術領域時,尋找一種可以消弭鎢金屬表面凹陷 (Dimple)的方法以應用於多層金屬連線製程(MuW Levd 本紙張尺度適用中國國家標準(CNS)A4規格(210 χ 297公釐) (請先閱讀背面之注意事項再填寫本頁) ▼裝--------訂-------- -·#Hole), and then forming a barrier metal layer 6 (Titanium; Ti) and titanium nitride (Nitride Titanium; TiN) based on Tibetan ore technology, wherein the titanium metal is located below the titanium nitride, said The barrier metal layer 6 crosses the [contact window 5], and then, a thick tungsten metal 8 is deposited, and the [thick tungsten metal 8] crosses and fills the [contact window 5], As shown in FIG. 1, then, the tungsten metal 8 is subjected to unidirectional etchback (anisotropic Etchback) by using a plasma etching technique, and the [unidirectional etchback] ends at the nitrogen The surface of titanium was changed to form a tungsten plug 10 (Tungsten Plug) in the [contact window 5]. As shown in FIG. 2, after completing the tungsten plug 10, a layer of silicon was sputtered. Copper alloy (Aluminum / Silicon / Coppei * Alloy), and the lithography technology plasma etching technology is used to etch away the aluminum-silicon-copper alloy, titanium and titanium nitride, and the [first layer metal connection] is completed in 焉. However, because the thickness of the tungsten metal is quite thick, it takes a long time to etch back, and in the long time etch back process, the surface of the tungsten metal at the center of the contact surface will gradually dimple, wait until ~ At the end of the etch back, the surface of the [tungsten plug 10] in the [contact window 5] has a concave P13 (Dimple), as shown in Figure 2. Therefore, when entering the field of sub-micron technology, find a method that can eliminate the dimple of tungsten metal surface to apply to the multi-layer metal connection process (MuW Levd. This paper applies the Chinese National Standard (CNS) A4 specification (210 χ 297) (Mm) (Please read the notes on the back before filling out this page) ▼ Install -------- Order ---------· #

Mem:mterc〇n崎―,是一個重要的課題。 所述係知技術之傳統【雙層金屬連線】積 體電f程’然母案(專财請案號則遞)利^ 钕刻後’能去除在含有鈦金屬表面形成之沈澱 物的衣,方法。藉著強氧化賴觀缝發生化學反應 以形成公於水之生成物,可絲嫣金相侧 之沈澱物。 (三)發明的簡要說明: 本發明的主要目岐提供—鶴栓㈣程之沈澱物 的去除方法追加-’可消坪鶴金屬表面凹陷(_㈣的方 法,特別是消拜【接觸窗或介層孔】之【鶴栓柱表面凹 陷】的方法。 本追加發明之主要製程方法如下。首先,在半導體 基板上形成一層絕緣層,再利用微影技術與電漿蝕刻技 術形成【接觸窗】(C〇ntact H〇⑹,再以濺鍍技術形成由 欽(Titanium ; Ti)與氮化鈦(Nitride Titanium ; TiN)構成之 障礙金屬層(Barrier Metal),其中,鈦金屬位於氮化鈦之 下方,所述障礙金屬層跨過所述【接觸窗】;接著,沉積 一層厚度很薄的鎢金屬,所述【厚度很薄的鎢金屬】跨 -過並填滿所述【接觸窗】,然後,利用電漿蝕刻技術對所 述【厚度很薄的鎢金屬】進行單向性的回蝕刻,所述【單 向性的回蝕刻】終止於所述氮化鈦之表面,以在所述【接 觸囪】内形成鎢栓柱(TungStenPlug)。由於所述鎢金屬之 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁) ▼裝 * n -I n ·ϋ US n· ϋ 訂-------- -·# 經濟部智慧財產局員工消費合作社印制衣 478066Mem: mtercónzaki-is an important subject. The traditional [double-layer metal connection] of the known technology is the integrated electric process (random case (special financial application number, then)). ^ After the neodymium engraving, it can remove the precipitate formed on the surface containing titanium. Clothing, method. By strong oxidation, Laiguan joints undergo a chemical reaction to form a product that is exposed to water, which can be a precipitate on the metallographic side. (3) Brief description of the invention: The main objective of the present invention is to provide a method for removing sediments from the process of crane plugs-a method to eliminate depressions on the metal surface of the crane (_㈣, especially to eliminate [contact windows or media [Layer hole] method of [cracking the surface of a crane bolt]. The main manufacturing method of this additional invention is as follows. First, an insulating layer is formed on a semiconductor substrate, and then a [contact window] is formed by using lithography technology and plasma etching technology. C〇ntact H〇⑹, and then formed a barrier metal layer (Titanium; Ti) and titanium nitride (Nitride Titanium; TiN) barrier metal layer (Barrier Metal) by sputtering technology, titanium metal is located below the titanium nitride The barrier metal layer crosses the [contact window]; then, a thin layer of tungsten metal is deposited, and the [thin tungsten metal] crosses over and fills the [contact window], and then Using a plasma etching technique to perform unidirectional etchback on the [thin tungsten metal], and the [unidirectional etchback] ends on the surface of the titanium nitride to Tungsten plug (TungStenPlug). As the paper size of the tungsten metal is applicable to Chinese National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling out this page) ▼ 装 * n -I n · ϋ US n · 订 Order ---------· # Intellectual Property Bureau of the Ministry of Economy Employees Cooperatives Printed Clothes 478066

經濟部智慧財產局員工消費合作社印製Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs

'裝--------訂--------- %· (請先閱讀背面之注意事項再填寫本頁) 厚度相當薄’因此’短時間内即可完成回_,在所述 【接觸窗】中央位置之鎢金屬表面因而不會產生凹陷 (Dimple) ’能在【接觸窗】内形成完整並且平坦的鎢栓柱^ 這是本發明之隨倾。完成無凹陷(Dimple 柱後,隨即以傳統標準製程賤鍛一層銘石夕銅合金 (Alrnnimim/Silieon/Copper alloy) ’ 並利用微影技術與電漿 蝕刻技術蝕去所述鋁矽銅合金、鈦與氮化鈦,【第一層金 屬連線】於焉完成。 > (四)圖示的簡要說明: 圖一到圖二是以傳統方法形成鎢栓柱的製程剖面示 意圖,圖二賴六是以本發明之方法形成紐柱的製程 剖面不意圖。 圖一是形成【接觸窗】並沉積一層【障礙金屬層】 和【厚度很厚的鎢金屬】後的製程剖面示意圖; 圖二是利用電漿蝕刻技術對所述【厚度很薄鎢金屬】 進行單向性的回蝕刻,以在所述【接觸窗】内形成鎢栓 柱(Tungsten Plug)後的製程剖面示意圖,所述【嫣栓柱】 中央位置之鎢金屬表面有產生凹陷(dimple); 圖三是沉積一層硼磷二氧化矽(Bor〇_Ph〇sph〇 —TfetraEthylOrthoSilicate,· BPTEOS)並平坦化(Planarized) 所述【蝴磷一氧化石夕】、形成接觸窗(c〇ntactH〇le)後製程 别面示意圖; 圖四是沉積一層【障礙金屬層】和【厚度很薄的鎢 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 478066 A7 五、發明說明(I) 金屬】後的製程剖面示意圖,所述【厚度很薄的鎢金屬】 跨過並填滿所述【接觸窗】; : 圖五是利用電漿蝕刻技術對所述【厚度很薄的鎢金 屬】進行單向性的回蝕刻,以在所述【接觸窗】内形成 完整並且平坦的【鎢拴柱】後的製程剖面示意圖; 圖六是去除所述【硼磷二氧化矽】上表面之【障礙 金屬層】後的製程剖面示意圖。 (請先閱讀背面之注意事項再填寫本頁) -秦裝 經濟部智慧財產局員工消費合作社印製 (五)發明的詳細說明: 以下以形成【第一層金屬連線】為實施例,說明本 發明之方法,但本發明之方法可堆廣應用到第二層金屬 連線(Second Level Metal Interconnection)以上的金屬結構。 首先,以標準製程在矽半導體基板上(Silicon semiconductor Substrate)製造【金氧半場效電晶體】 (MOSFET),所述【金氧半場效電晶體】包含有閘介電層 (Gate Dielectric)、閘電極(Gate electrode),側壁子(Spacer) 與源極/汲極(Source/Drain)等元件,這些元件未顯示於不意圖。 — 接著,在梦半導體基板20上沉積一層硼磷二氧化矽 22(Boro-Phospho TetraEthylOrthoSilicate ; BPTE0S)。所 述【雜粦二氧化石夕22】通常是以化學氣相沉積法(chemical Vapor deposition ; CVD)形成,其反應壓力約 760mtorr, 本紙張尺度適用中國國豕標準(CNS)A4規格(210 χ 297公愛) 訂-------- 478066'Installation -------- Order ---------% · (Please read the precautions on the back before filling in this page) The thickness is quite thin, so' You can complete the return in a short time, The tungsten metal surface at the center of the [contact window] will not cause a dimple ('Dimple') to form a complete and flat tungsten plug in the [contact window]. This is the inclination of the present invention. After the completion of the dimple-free pillar, a layer of Alrnnimim / Silieon / Copper alloy was then forged using the traditional standard process '' and the lithography and plasma etching techniques were used to etch away the aluminum-silicon-copper alloy and titanium [First layer metal connection] with titanium nitride was completed in 焉. (4) Brief description of the diagrams: Figures 1 to 2 are cross-sectional schematic diagrams of the process of forming tungsten studs by traditional methods. It is not intended that the cross section of the process of forming a button by the method of the present invention is shown in the figure. Figure 1 is a schematic cross-sectional view of the process after forming a [contact window] and depositing a [barrier metal layer] and [thick tungsten metal]; Plasma etching technology performs unidirectional etchback on the [thin tungsten metal] to form a cross-sectional schematic diagram of the process after a tungsten plug is formed in the [contact window]. Column] There is a dimple on the surface of the tungsten metal in the center; Figure 3 is a layer of Boro-Phosphate-TfetraEthylOrthoSilicate (· BPTEOS) and Planarized Monoxide Shi Xi]. Schematic diagram of the other aspects of the process after the contact window (c0ntactHole) is formed; Figure 4 is a layer of [barrier metal layer] and [thin tungsten]. The paper dimensions are in accordance with Chinese National Standard (CNS) A4 specifications ( (210 X 297 mm) 478066 A7 V. Schematic cross-sectional view of the process after the description of the invention (I) Metal], the [thin tungsten metal] crosses and fills the [contact window]; Figure 5 is the use of Plasma etching technology performs unidirectional etch-back on the [thin tungsten metal] to form a complete and flat [tungsten bolt] in the [contact window]; FIG. 6 This is a schematic cross-sectional view of the process after removing the [barrier metal layer] on the [Boron Phosphorous Silicon Dioxide] surface. (Please read the precautions on the back before filling this page) (5) Detailed description of the invention: The method of the present invention will be described below with the formation of the [first layer metal connection] as an example, but the method of the present invention can be widely applied to the second layer metal connection (Second Level Metal Connection). Inter connection) above metal structure. First, a [metal oxide half field effect transistor] (MOSFET) is fabricated on a silicon semiconductor substrate using a standard process, and the [metal oxide half field effect transistor] includes a gate dielectric. Gate (Gate Dielectric), gate electrode (Gate electrode), side wall (Spacer) and source / drain (Source / Drain) and other components, these components are not shown inadvertently. — Next, a layer of Boro-Phospho TetraEthylOrthoSilicate (BPTEOS) is deposited on the dream semiconductor substrate 20. [Miscellaneous Dioxide Stone 22] is usually formed by chemical vapor deposition (CVD), and its reaction pressure is about 760mtorr. This paper is in accordance with China National Standard (CNS) A4 (210 χ). 297 public love) Order -------- 478066

經濟部智慧財產局員工消費合作社印製Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs

厚度介於5_到1G_埃之間,完成沉積後並以熱流整 技術(Flow)來平坦化(Planarized)所述【硼磷二氧化矽 22】。然後,利用微影技術電漿蝕刻技術蝕去所述【硼磷 二氧化矽22】以形成接觸窗23(contactHole),如圖四所 示,未來,金屬連線將透過所述【接觸窗23】跟所述【金 氧半場效電晶體】之源極/没極區域作電性接觸。 接著,以濺鍍技術(Sputtering)形成由鈦(Titanium ; Ti) 與氮化鈦(Nitride Titanium ; TiN)構成障礙金屬層 24(barrier Metal),其中,鈦金屬位於氮化鈦之下方,所 述【障礙金屬層24】跨過所述【接觸窗23】,其中,鈦 之厚度約300埃,氮化鈦之厚度約15〇〇埃。接著,沉積 一層厚度很薄的鎢金屬26,所述【厚度很薄的鎢金屬26】 跨過並填滿所述【接觸窗23】,如圖四所示。所述【厚度 很薄的鶴金屬26】一般以化學氣相沉積法(chemical vapor deposition; CVD)將六氟化鎢氣體(Hexafluoride Gas; WF6) 反應而成,其厚度介於2000到3000埃之間,這是本發 明之關鍵步驟,因為傳統方法形成鎢栓柱時,鎢金屬之 厚度介於6000到8000埃之間,厚度非常的厚(如圖一 所示)。 然後,用電漿蝕刻技術對所述【厚度很薄的鎢金屬 -24】進行單向性的回蝕刻,所述【單向性的回蝕刻】終 止於所述【障礙金屬層22】之表面,以在所述【接觸窗 23】内形成鎢栓柱28(TungstenPlug),如圖五所示。由於 所述鎢金屬26之厚度相當薄,因此,在時間内即可完 本紙至^適用中國國家標準(CNS)A4規格(21〇 X 297公愛Γ (請先閱讀背面之注音?事項再填寫本頁) 478066 A7The thickness is between 5 Å and 1 G Angstrom. After the deposition is completed, the [Boron Phosphorous Silicon Dioxide 22] is planarized with a thermal flow rectification technique (Flow). Then, the lithography technology plasma etching technology is used to etch away the [borophosphorus silicon dioxide 22] to form a contact window 23 (contactHole). As shown in FIG. 4, in the future, the metal connection will pass through the [contact window 23] ] Make electrical contact with the source / non-electrode area of the [Gold Oxygen Half Field Effect Transistor]. Next, a barrier metal layer 24 (titanium; Ti) and titanium nitride (Nitride Titanium; TiN) is formed by sputtering, and the titanium metal is located below the titanium nitride. [Barrier metal layer 24] Crosses the contact window 23, wherein the thickness of titanium is about 300 angstroms, and the thickness of titanium nitride is about 15,000 angstroms. Next, a thin layer of tungsten metal 26 is deposited, and the [thin tungsten metal 26] crosses and fills the contact window 23, as shown in FIG. The "thick metal 26" is generally formed by reacting tungsten hexafluoride gas (WF6) by chemical vapor deposition (CVD), and the thickness is between 2000 and 3000 angstroms. In the meantime, this is a key step of the present invention, because when the tungsten plug is formed by the conventional method, the thickness of the tungsten metal is between 6000 and 8000 angstroms, and the thickness is very thick (as shown in Fig. 1). Then, using a plasma etching technique, the [thin-thick tungsten metal-24] is subjected to unidirectional etchback, and the [unidirectional etchback] ends on the surface of the [barrier metal layer 22]. To form a tungsten plug 28 (TungstenPlug) in the [contact window 23], as shown in FIG. Because the thickness of the tungsten metal 26 is quite thin, the paper can be completed in time. ^ Applicable to China National Standard (CNS) A4 specifications (21〇X 297 public love) (Please read the note on the back? Matters before filling (This page) 478066 A7

五、發明說明(^ ) 成回餘刻,在所述【接觸窗23】中央位置之鶴金 因而不會產生凹陷(dimple),能在【接觸窗23】内\ ^面 整並且平坦的【鎢栓柱28】,如圖五所示,這是本 關鍵步驟。接著,去除所述【硼磷二氧化矽丄明之 之【障礙金屬層24】,如圖六所示。 表面 最後,以傳統標準製程隨進行鋁/矽/鋼金屬合金 (Almnmum/Silicon/Copper Alloy)的薄膜濺鍍,並利用二 影技術與電漿蝕刻技術姓去所述【障礙金屬層24】與【二 /石夕/銅金屬合金】,具備無凹陷之【鎢栓柱叫的【第 一層金屬連線】於焉完成。 上述係以最佳實_來_本發明 明,並且,熟知半導體技藝之人士皆能明瞭,適 些微的改變及調整,仍將不失本發明之要義所在,亦不 脫離本發明之精神和範圍。 經濟部智慧財產局員工消費合作社印製 8V. Description of the invention (^) For the rest of the time, the crane gold in the center of the [contact window 23] will not cause a dimple, and can be flat and flat in the [contact window 23]. Tungsten plug 28], as shown in Figure 5, this is the key step. Next, remove the [barrier metal layer 24] of [Boron Phosphorous Silicon Dioxide], as shown in FIG. At the end of the surface, the thin film sputtering of Almnmum / Silicon / Copper Alloy is carried out by the traditional standard process, and the two-barrier technology and plasma etching technology are used to remove the [barrier metal layer 24] and [Second / Shi Xi / Copper Metal Alloy], completed with no depression [Tungsten Bolt called [First Layer Metal Connection]]. The above is based on the best practices of the present invention, and those who are familiar with semiconductor technology can understand that slight changes and adjustments will still not lose the essence of the invention, nor depart from the spirit and scope of the invention. . Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 8

Claims (1)

六、申請專利範圍 •鎢拴柱製程之沈澱物的去除方法追加一,係包含: 在半導體基板上(Semiconductor substrate)形成一層絕 緣層; 形成【洞孔】(Hole),所述【洞孔】介於導電體之間; 形成障礙金屬層(Barrier Metal),所述【障祕金屬層】 跨過所述【洞孔】; 形成一層厚度很薄的鶴金屬(Tungsten),所述【厚度很 薄的鎢金屬】跨過並填滿所述【洞孔】; 利用蝕刻技術對所述【厚度很薄的鎢金屬】進行單向 性的回茲刻(Anisotropic Etchback),所述【單向性的回姓刻】 終止於所述【障礙金屬層】之表面,以在所述【洞孔】内 形成鶴桂:柱(Tungsten Plug); 利用蝕刻技術對所述【障礙金屬層】進行回蝕刻 (Etchback)所述回蝕刻終止於所述【絕緣層】。 2·如申請專利範圍第1項之鎢栓柱製程之沈澱物的去除方法 追加一,其中所述之【半導體基板】含有【電晶體】、【電 阻器】、【電感器】與【電容器】等電子元件。 經濟部智慧財產局員工消費合作社印製 3·如申請專利範圍第丨項之鎢栓柱製程之沈澱物的去除方法 追加一,其中所述之【障礙金屬層】至少含有—層導電層 (Conductor Layer) ° 4.如申請專利範圍第1項之鎢栓柱製程之沈澱物的去除方法 追加一,其中所述之【厚度很薄的鎢金屬】之厚度介於2〇〇〇 至4000埃之間。、 9Sixth, the scope of patent application • The method for removing deposits in the tungsten stud process includes an additional method, which includes: forming a layer of insulation on a semiconductor substrate; forming a [hole] (hole), the [hole] Between the conductors; forming a barrier metal layer (the barrier metal layer) across the [holes]; forming a thin layer of the Tungsten metal, the [thickness is very Thin tungsten metal] straddles and fills the "holes"; Anisotropic Etchback is performed on the [thinly thin tungsten metal] using etching technology, and the [unidirectional Carved back to the last name] Terminated on the surface of the [barrier metal layer] to form a crane laurel: column (Tungsten Plug) in the [hole]; etch back the [barrier metal layer] using an etching technique (Etchback) The etch-back ends at the [insulating layer]. 2. According to the method for removing deposits in the tungsten plug process of item 1 of the scope of the patent application, an additional method is added, in which the [semiconductor substrate] contains [transistor], [resistor], [inductor], and [capacitor] And other electronic components. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. 3. If the method for removing deposits in the tungsten stud process of the patent application item No. 丨 is added, the [barrier metal layer] contains at least a conductive layer (Conductor). Layer) ° 4. According to the method for removing deposits in the tungsten plug process of item 1 of the scope of patent application, an additional one is described, in which the thickness of the [thin tungsten metal] is between 2000 and 4000 angstroms. between. , 9
TW84113808A 1995-12-23 1995-12-23 Method to remove precipitation for tungsten plug manufacture process TW478066B (en)

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