ΙΓ 4443 4 u 經濟部智慧財產局員工消費合作社印製 Α7 Β7 五、發明說明（I ) 技術領域： 本發明是有關於一種於超大型積體電路（ULSI) 之晶片上形成内連線的方法，特別是有關於一種 利用電鑛以形成自動對準銅金屬連線，且不需對 銅金屬進行化學機械研磨的方法。 發明背景 於金屬内連線中，由於銅之阻值低，且具有可 承載咼的電流密度的能力’因此，逐漸取代鋁及 鋁合金來作為金屬化之材質。然而，使用銅時， 常會發生一些問題，例如銅擴散進入半導體基底、 銅對介電層具有低的黏著力 '以及對毯覆s(blanket) 金屬銅難以進行微影飯刻以形成所需的電路結構 等問題。為了避免以習知之蝕刻方法圖案化銅金 屬連線’一種稱為雙層嵌入（duai damascene)的方 法便因應而生。然而，通常於此製程後，會進行 一壤„也屋_邊械研磨（〇1^1?)步驟，以去除多餘的銅金 屬。銅由於其很難進行研磨與化學蝕刻步驟，是 以必須避免進行CMP製程。因此，本發明提出一 種藉由銅電鍍，而於雙層嵌入製程所形成的溝渠 與開口中形成銅金屬連線，且不需對銅金屬進行 化學機械研磨的方法。 於習知技藝中，先依序分別於半導體基底上形 成各層金屬内連線層’再於第一絕緣層上沉積第 一毯覆式金屬層’並藉由一第一罩幕，對金屬層 私紙張尺度適用中困國家棵準（CNS)A4规格（210 * 297公釐） ----^----Γί^裝·-------訂 *----I-- (請先閱讀背面之注意事項再填寫本頁) 4 443 4 〇 經濟部智慧財產局員工消费合作社印製 Α7 Β7 五、發明說明（>) 進行蝕刻’以形成導線。接著’於第一金屬化層 上形成第二絕緣層，續利用一第二光罩，圖案化 第二絕緣層以形成一開口。接著，於開口中填入 金屬’如此即形成金屬柱（metal column)，或稱為 插塞（plug) ’並與第一金屬層作電性連接 於第二 絕緣層與圓柱狀插塞上’形成一第二毯覆式金屬 層，此時’金屬插塞電性連接上層第二金屬層與 下層第一金屬層。其後，以另一罩幕，對第二金 屬層進行圖案化步驟，以形成一組新的導線。之 後可重複進行上述的步驟，以形成所需的半導體 基底。由此觀之’包括微影與蝕刻步驟以形成所 需之内連線結構之金屬層的圖案化步驟，實為半 導體基底製造之重要製程步驟。然而，眾所皆知， 微影與餘刻均為複雜的製程，因此減少其製程是 有必要的’而雙層嵌入製程便具有這樣的優點。 於後續的實施例中將說明本發明之雙層嵌入方法 是如何適用於銅金屬連線之形成。 在單層的雙層嵌入製程中，先於絕緣層中形成 一溝渠’續填入金屬以形成導線。除了形成單一 雙層嵌入之溝渠外，雙層嵌入方法可再增加一個 步驟；即在絕緣層中形成導電開口《接著，於溝 渠與開口所形成的複合結構中填入金屬。此—製 程將視需要而重複上述製程，以便於金屬線與開 口中形成所需的多層内連線。然後，於基底上形 3 本紙張尺度適用中國國家摞準（CNS)A4規格（210 X 297公釐） ---11·^--I Ί---W ^--------訂---------1^— f請先閱讀背面之注意事項再填寫本頁) 五、發明說明（今） 成接觸1¾ ’並使接觸窗中的金屬直接接觸基底的 表面，而插塞開口則形成於金屬層之間。 在運用標準雙層嵌入方法時，於絕緣層20上 經濟部智慧財產局員工消费合作社印製 ί布:層罩幕層3〇，此罩幕層30具有一接觸窗或 "層1¾之開口 35’圖案，將部分絕緣層2〇暴露出 來。接著’沿著此圖案進行非等向性蝕刻，而於 絕緣層的上半部20b上形成開口 35，如圖一 A所 不。絕緣層中開口的深度可藉由控制蝕刻時間來 加以控制。亦即’蝕刻是在預定的時間到了之後 就會被停止，然而，此控制蝕刻時間的方法並不 可靠》習知為了對開口深度有較佳的控制，通常 還是會使用蝕刻終止層。蝕刻終止層通常為一薄 且均勻覆蓋（conformal)的材料，例如氮化矽（SiN4， Sin)、氮氧化矽（Si〇xNy)或是氤化鈦（TiN)之類對蝕 刻劑具有高選擇性的材質。如此’絕緣層2〇中的 開口 35便會停止於蝕刻終止層25，如圖一 A所示。 然後，調整蝕刻劑，以使開口圖案蝕穿蝕刻終止 層，並停止於絕緣層上。於蝕刻之後，圏案化的 罩幕層30便會被移除，續於絕緣層2〇上塗布第 二罩幕層40。第二罩幕層4〇具有對準開口 35之 導線45’開口圖案’以暴露出部分的絕緣層2〇，如 圖一 B所示。在進行非等向性蝕刻開口或溝渠， 以便於絕緣材料之上層形成導線時，於絕緣層上 部的開口形成之後將會繼續蝕刻絕緣材料之下層 4 ΐ紙&尺度適用中國因ϋ準（CNS)A4 ϋϋΐΟ X 297公3| ) ------ 44434〇 Α7 Β7 五、發明說明（f ) 20a。而於蝕刻完畢之後，開口與導線溝渠均會填 入金屬50,續以化學機械研磨法’去除基底表面 上多餘的金屬，如圖一 C所示。 另一種雙層嵌入的製程方法，則是先利用姓刻 終止層25，於絕緣材料20b的上半部，餘刻形成 導線開口或溝渠45’，如圖二a所示。接著，於基 底上形成罩幕層30，並填滿導線溝渠45，之後進 行開口 35’的圖案化，如圖二b所示。然後，開口 圖案將蝕刻轉移至絕緣材料的下半部2〇a,如此即 形成了雙層嵌入結構。同樣的，在触刻步驟完成 之後，將金屬50填入開口與導線開口，續以化學 機械研磨法，來去除基底表面上多餘的金屬材料， 如圖二C所示。 經濟部智慧財產局員工消費合作社印製 於習知技藝中’雖然銅取代其他金屬作為非常 大型積體電路（VLSI)與超大型積體電路（ULSI)中内 連線之材料的構想已受到相當的注目，但實際上 其已經應用於鶴接觸與介層窗插塞的製造上。然 而，熟知該項技藝者均清楚瞭解，於接觸窗插塞 連接基底上的其他層的金屬線的同時，形成接觸 插塞以電性連接金屬線時，通常會殘留於連接其 下方基底上元件的第一層上；換句話說，習知技 藝是分別於其所欲形成的位置，各別形成金屬線 與其電性連接的插塞β而本發明則藉由一改良的 雙層嵌入方法’同時形成銅金屬線與内連線銅金 本張尺度適用中國國家標準（CNS)A4规格⑵挪公爱） ^4434〇 經濟部智慧財產局員工消費合作社印製 A7 B7 五、發明說明（f) 屬插塞。本發明之製程更可進—步改良，藉由電 鍵法進行銅雙層欺入的製程’且無須進行化學機 械研磨之步驟。ΙΓ 4443 4 u Printed by the Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the Invention (I) Technical Field: The present invention relates to a method for forming interconnects on a wafer of a very large integrated circuit (ULSI) In particular, it relates to a method of using electric ore to form an auto-aligned copper-metal connection without the need for chemical mechanical polishing of copper metal. BACKGROUND OF THE INVENTION In metal interconnects, copper has a low resistance value and has the ability to carry a current density of rhenium. Therefore, aluminum and aluminum alloys are gradually replaced as metalized materials. However, when using copper, some problems often occur, such as copper diffusion into the semiconductor substrate, copper has a low adhesion to the dielectric layer ', and it is difficult to lithograph the copper metal blanket to form the required Circuit structure and other issues. In order to avoid patterning copper metal wires by conventional etching methods, a method called duai damascene has been developed. However, usually after this process, a soil _ ya__ side machine grinding (〇1 ^ 1?) Step is performed to remove excess copper metal. Copper is necessary because of its difficulty in grinding and chemical etching steps. The CMP process is avoided. Therefore, the present invention proposes a method for forming a copper metal connection in a trench and an opening formed by a double-layer embedding process by copper electroplating, and does not require chemical mechanical polishing of the copper metal. In the know-how, each layer of metal interconnects is sequentially formed on a semiconductor substrate in sequence, and then a first blanket metal layer is deposited on the first insulating layer. Standards apply to CNS A4 specifications (210 * 297 mm) ---- ^ ---- Γί ^ equipment · ------- order * ---- I-- (please Read the notes on the back before filling this page) 4 443 4 〇 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention (>) Etching to form a wire. Then 'on the first metallization layer A second insulating layer is formed thereon, and a second photomask is further used to pattern the second insulating layer to An opening is formed. Next, fill the opening with a metal 'so that a metal column, or plug' is formed, and is electrically connected with the first metal layer to the second insulating layer and cylindrical A second blanket metal layer is formed on the plug. At this time, the metal plug is electrically connected to the upper second metal layer and the lower first metal layer. Thereafter, another second screen is used to perform the second metal layer. A patterning step to form a new set of wires. The steps described above can then be repeated to form the desired semiconductor substrate. From this perspective, the 'metal including lithography and etching steps to form the desired interconnect structure The patterning step of the layer is an important process step in the manufacture of semiconductor substrates. However, it is well known that lithography and the rest are complex processes, so it is necessary to reduce its process. And the double-layer embedded process has Such advantages. In the following embodiments, it will be explained how the double-layer embedding method of the present invention is applicable to the formation of a copper metal connection. In a single-layer double-layer embedding process, a trench is formed before the insulation layer. Fill the metal to form a wire. In addition to forming a single double-layer embedded trench, the double-layer embedded method can add an additional step; that is, a conductive opening is formed in the insulating layer. Then, the composite structure formed by the trench and the opening is filled. Metal. This—the process will repeat the above process as needed to facilitate the formation of the required multilayer interconnects between the metal wires and the openings. Then, form 3 papers on the substrate. This paper size applies to China National Standard (CNS) A4 specifications ( 210 X 297 mm) --- 11 · ^-I Ί --- W ^ -------- Order --------- 1 ^ — f Please read the notes on the back first (Fill on this page again) 5. Description of the invention (today) The contact is made 1¾ 'and the metal in the contact window directly contacts the surface of the substrate, and the plug opening is formed between the metal layers. When using the standard double-layer embedding method, printed on the insulating layer 20 is the consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs: a layer of curtain layer 30, which has a contact window or an opening of "layer 1¾" 35 'pattern, exposing part of the insulation layer 20. Next, anisotropic etching is performed along this pattern, and an opening 35 is formed in the upper half 20b of the insulating layer, as shown in FIG. 1A. The depth of the openings in the insulating layer can be controlled by controlling the etching time. That is, 'etching is stopped after a predetermined time has elapsed. However, this method of controlling the etching time is not reliable.' It is known that in order to better control the depth of the opening, an etching stop layer is usually used. The etch stop layer is usually a thin and uniformly covered material, such as silicon nitride (SiN4, Sin), silicon oxynitride (SiOxNy), or titanium halide (TiN). Sexual material. Thus, the opening 35 in the 'insulating layer 20 will stop at the etch stop layer 25, as shown in FIG. 1A. Then, the etchant is adjusted so that the opening pattern penetrates the etch stop layer and stops on the insulating layer. After the etching, the masked mask layer 30 is removed, and a second mask layer 40 is coated on the insulating layer 20. The second cover layer 40 has a conductive line 45 'opening pattern' aligned with the opening 35 to expose a part of the insulating layer 20, as shown in Fig. 1B. When openings or trenches are anisotropically etched to facilitate the formation of wires on the upper layer of the insulating material, the lower layers of the insulating material will continue to be etched after the openings in the upper portion of the insulating layer are formed. ) A4 ϋϋΐΟ X 297 公 3 |) ------ 44434〇Α7 B7 5. Description of the invention (f) 20a. After the etching is completed, both the openings and the wire trenches are filled with metal 50, and the chemical mechanical polishing method is used to remove the excess metal on the substrate surface, as shown in FIG. 1C. Another two-layer embedded process method is to first use the last name engraving termination layer 25 to form a wire opening or trench 45 'in the upper half of the insulating material 20b, as shown in Fig. 2a. Next, a mask layer 30 is formed on the substrate, and the wiring trench 45 is filled, and then the opening 35 'is patterned, as shown in Fig. 2b. Then, the opening pattern transfers the etching to the lower half 20a of the insulating material, so that a double-layer embedded structure is formed. Similarly, after the contacting step is completed, the metal 50 is filled into the opening and the wire opening, and the chemical mechanical polishing method is continued to remove excess metal material on the surface of the substrate, as shown in FIG. 2C. The Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs printed in the know-how. Although copper replaces other metals as the material for interconnecting in very large scale integrated circuits (VLSI) and ultra large scale integrated circuits (ULSI), the idea has been quite considerable. Attention, but in fact it has been applied to the manufacture of crane contact and via window plug. However, those skilled in the art are well aware that when a contact window plug is connected to other layers of metal wires on the substrate, a contact plug is formed to electrically connect the metal wires, which usually remains on the components on the substrate below it. In other words, the conventional technique is to form the plug β of the metal wire and its electrical connection respectively at the position where it is intended to be formed, and the present invention uses an improved double-layer embedding method. At the same time, the copper metal wire and the inner copper copper gold scale are applied to the Chinese National Standard (CNS) A4 specification (Norway Love) ^ 4434〇 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Invention Description (f) Is a plug. The process of the present invention can be further improved—the process of copper double-layer bullying by electric bond method 'and does not require the step of chemical mechanical grinding.
Zhao等人於美國第5647787號專利中揭露了一 種利用無電極電鍍金屬的方法選擇性地形成鋼插 塞的技術’其中銅插塞係位於相鄰的介電層及相 鄰的鋁線間。此選擇性的技術包括一接觸取代技 術，以於一阻障金屬層上形成薄的銅活化層，並 允許銅金屬内連線形成於介層窗中，此即為插塞， 而且並不需要進行化學機械研磨、或回蝕刻步驟 來去除多餘的沉積物質。 此外，Shoda等人於美國第5529953號專利中 揭露了一種雙層嵌入結構，其係藉由在不同雙層 嵌入結構之開口部分中之兩層不同的黏著層來 形成鑲入層（stud)與金屬内連線。Venkatraman亦 於美國第5677244號專利中揭露一種形成銅金屬 内連線結構的方法，但其缺點在於需要進行化學 機械研磨步驟。Zhao et al., U.S. Patent No. 5,647,787 discloses a technique for selectively forming a steel plug using an electrodeless metal plating method, wherein a copper plug is located between an adjacent dielectric layer and an adjacent aluminum wire. This selective technique includes a contact replacement technique to form a thin copper activation layer on a barrier metal layer and allow copper metal interconnects to be formed in the interlayer window. This is a plug and does not require A chemical mechanical polishing or etch-back step is performed to remove excess deposited material. In addition, Shoda et al., In U.S. Patent No. 5,552,953, disclose a double-layered embedded structure that forms a stud and a stud layer by two different adhesive layers in the openings of different double-layered embedded structures. Metal interconnects. Venkatraman also discloses a method for forming a copper metal interconnect structure in U.S. Patent No. 5,677,244, but the disadvantage is that it requires a chemical mechanical polishing step.
Gilton等人於美國第5151168號專利中揭露 的是一種利用電鍍銅的方法來形成金屬化積體電 路的技術’其係利用在阻障層上的光阻罩幕，來 進行選擇性的沉積。而Lin等人也在美國第5116463 號專利中揭露如何偵測無電鑛插塞的完成。最後， Chen也於美國第5723387號專利中提出一 本紙張尺度適时關家棵準（CNS〉A4现格⑽x 297公爱-)_ ----5---Η I I I --------u I--I I (請先閱讀背面之注意事項再填寫本頁) 4443 4 〇 經 濟 部 智 慧 財 產 局 員 工 消 费 合 作 社 印 製 Α7 Β7 五、發明說明（ 底上形成銅金屬内連線之自我抑制單元（self contained unit)。此種單元可降低晶片於較不需要 清潔度之濕式製程步驟，與需清潔度高之乾式製 程間的轉換次數。 值得/主意的疋’當熟悉該項技藝者了解鋼為 非常有用之半導體元件的内連線材料與其重要性 時，包括銅的圖案化與形成銅製程等的問題’仍 舊不斷地發生。因此，本發明揭露—種利用電鍍 製程形成自動對準銅金屬連線，且不需要進行化 學機械研磨步驟的方法》 發明之概述 本發明的目的之一就是在提供一種利用電鍍製 程形成自動對準銅金屬連線，且不需要進行化學 機械研磨步驟的方法。 本發明的另一目的就是在提供一種利用電鍍製 程形成自動對準銅接觸，且不需對沉積於接觸窗 中的銅金屬進行化學機械研磨的方法。 本發明的再一目的就是在提供一種利用電鍍製 程形成自動對準銅介層窗插塞，且不需對沉積於 介層窗中的銅金屬進行化學機械研磨的方法。 本發明之上述目的可藉由以下步驟來完成： 提俨一半導體基底，其包括一底部結構，該底部 結構包括一主動區與一被動區；於該基底上形成 一内層介電層（ILD);於該内層介電層上形成一蝕 本紙張尺度適用中固S家標準（CNS)A4規格<210* 297公爱 ! I -Γ ί^裝·! ii — 訂----- I I i s A^i (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 44々34〇 A7 '^ ----—---------- 五、發明說明（;；） 刻終止層；於該蝕刻終止層上形成—内金屬介電 層（IMD);於該内金屬介電層上形成—第一光阻 層·’圖案化該第一光阻層’使其具有一接觸窗圖 案；進行蝕刻製程，將該第一光阻層之開口圖案 轉移到該内層金屬介電層；繼續進行蝕刻製程， 將該開口圖案轉移至該蝕刻終止層；移除該基底 上之第一光阻層；於包括該接觸窗圖案之基底上 形成一第二光阻層；圖案化該第二光阻層，使其 具有一溝渠圖案；進行蝕刻製程，而將該第二光 阻層之溝渠圖案轉移到該内金屬介電層，暴露出 該蝕刻終止層；進一步將該接觸窗圖案由該内金 屬介電層蝕刻轉移至該内層介電層，直到該基底 的底部結構為止’以形成一複合接觸窗與溝渠結 構；移除該第二光阻層；於包括該接觸窗與溝渠 的複合結構之内表面之該基底表面上形成一阻障 層；去除該基底表面上之該阻障層；以及利用電 鍍製程，且不需進行化學機械研磨步驟，選擇性 地沉積銅於該接觸窗與溝渠之複合結構中，以形 成該自我對準銅金屬内連線。 本發明之上述目地亦可藉由第二實施例來完 成β本發明之雙層嵌入銅金屬内連線結構之形成 包括先形成一溝渠，然後再形成一介層窗圖案， 如此即形成了 一介層窗與溝渠之複合結構。接著， 於複合結構中形成一阻障層，以便於其上進行選 8 本紙張尺度適用中画國家標準（CNS>A4规格（210 X 297公釐） I I J Ί I I --1^------I— 訂--------- (請先閱讀背面之注意事項再填寫本頁) 4443 4 〇 經濟部智慧財產局員工消費合作钍印製 Α7 -----B7__ 五、發明說明（T ) 擇性電鑛而沈積銅金屬，因此本發明並不需要對 銅進行化學機械研磨。 為讓本發明之上述目的、特徵和優點能更明 顯易僅’下文特舉一較佳實施例，並配合所附圖 式’作詳細說明’圖式中相似的元件均以相似數 字來表示》 圖式說明： 圖一 A至圖一 C繪示習知一種形成雙層嵌入 結構之方法。 圖二A至圖二C繪示習知另一種形成雙層嵌 入結構之方法。 圖三A繪示依據本發明之實施例，於半導體基 底上形成具有自動對準溝渠與接觸窗之複合雙層 嵌入結構的製造流程剖面圖，其中當於溝渠與接 觸窗中填入金屬時’下方基底中的元件則電性連 接於溝渠中之第一金屬層。 圏三B繪示於圖三A之基底上、且包括本發 明之複合溝渠與開口結構之内壁上形成阻障金屬 層。 圖三C繪示本發明在經過化學機械研磨之後， 由圖三B之基底的上表面上移除阻障層。 圖二D綠不根據本發明之第一實施例，於複合 自動對準溝渠與接觸窗結構中選擇性地電鍍銅。 圖三E繪示依據本發明之實施例，於半導體基 -— _ 9 本紙張尺度適用中國國家標準（CNS)A4现格⑵0 x 297公爱） -----— 1 ---!|4*1.|丨 — —---- (請先閱讀背面之注意事項再填寫本頁) «443 4 〇 經濟部智慧財產局員工消費合作社印製 A7 B7 五、發明說明（f) 底上形成具有自動對準溝渠與接觸窗之複合雙層 饮入結構的製造流程剖面圖，其中當於溝渠與接 觸窗中填入金屬時，下方基底中的元件則可電性 連接於形成於溝渠中之第一金屬層。 圖二F續示根據本發明之第二實施例，於複合 自動對準溝渠與接觸窗結構中選擇性地電鍵銅。 圖三G緣示本發明圖三D與圖三F所形成之 銅接觸與銅介層窗插塞間之空間關係之半導體基 底的剖面圖。 圖號說明： 20、20b :絕緣層 25、125 :蝕刻終止層 30、40 :罩幕層 35、35,：開口 45’ ：導線溝渠 50、170 :金屬 100 :基底 110、120 :源極/汲極 130 :内層介電層（ILD) 140、200、210 :内金屬介電層（IMD) 150、220:複合結構 135 :接觸窗 145、215 :溝渠 160 :氮化鈦層 本紙張尺度適用中囲因家標準（CNS)A4规格<210 X 297公釐） --— 15—---T--1^裝----- - - 訂------I I (請先閲讀背面之注意事項再填寫本頁) 4 443 4 〇 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（（^ 205 :介層窗 發明詳細說明： 請參照圖式，特別是圖三A至圖三G ,其繪示 一種利用電鍍製程形成具有一接觸窗或介層窗之 自動對準複合銅金屬連線，且不需要進行化學機 械研磨步驟的方法。 圖三A繪示利用本發明第一實施例改良之雙層 嵌入製程所形成之複合結構15〇，其中接觸窗135 是依據複合結構150之溝渠145而自我對準形成 的，且延伸至基底1〇〇中源極12〇或13〇之底部 元件結構。之後’開口與溝渠將會填入銅金屬’ 以形成本發明之銅金屬内連線。圖三E繪示利用 本發明第二實施例另一改良之雙層嵌入製程所形 成之複合結構220，其中介層窗205是依據複合結 構220之溝渠215而自我對準形成的。第一實施 例中的接觸窗係形成於基底1 00中元件的底部結 構上，而介層窗則是形成於包括一金屬層，或較 佳為本發明形成於複合結構的溝渠中之銅導線的 底部結構上。不過，對於本發明而言，包括源極1 i 0 與汲極120之底部元件結構並不重要，因此在此 便不詳加敘述，以免模糊了本發明的重點。 囷三A至圖三D繪示本發明之第一實施例， 其係利用雙層嵌入製程所形成。首先，於基底100 之絕緣層中形成一接觸窗圖案。接著，形成兩層 本紙張尺度適用中囷國家標準（CNS)A4规格mo X 297公釐） <請先閱讀背面之注意事項再填寫本頁) ----訂-----1 4 443 4 〇Gilton et al. Disclosed in U.S. Patent No. 5,151,168 is a technique for forming a metallized integrated circuit by using a method of electroplating copper, which uses a photoresist mask on a barrier layer for selective deposition. Lin et al. Also disclosed in US Patent No. 5,116,463 how to detect the completion of plugs without electricity. Finally, Chen also proposed in US Patent No. 5723387 a paper size Guanjia Zhunzhen (CNS> A4 is now ⑽x 297 public love-) _ ---- 5 --- Η III ----- --- u I--II (Please read the notes on the back before filling out this page) 4443 4 〇 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs Α7 Β7 V. Description of the invention (the copper metal interconnects are formed on the bottom Self contained unit. Such a unit can reduce the number of conversions between a wet process step that requires less cleanliness and a dry process that requires a higher degree of cleanliness. It is worthwhile / ideal to be familiar with this. When the artist understands that steel is a very useful interconnect material for semiconductor devices and its importance, problems including patterning of copper and formation of copper processes continue to occur. Therefore, the present invention discloses a method for forming an automatic Method for aligning copper metal wires without requiring a chemical mechanical polishing step "SUMMARY OF THE INVENTION One of the objects of the present invention is to provide an automatic alignment copper metal wire using an electroplating process without A method of performing a chemical mechanical polishing step is required. Another object of the present invention is to provide a method for forming an auto-aligned copper contact by using an electroplating process without performing chemical mechanical polishing on the copper metal deposited in the contact window. Another object of the present invention is to provide a method for forming a self-aligned copper interposer window plug using an electroplating process without the need for chemical mechanical polishing of the copper metal deposited in the interposer window. The above-mentioned object of the present invention can be achieved by The following steps are completed: a semiconductor substrate including a bottom structure, the bottom structure including an active region and a passive region; forming an inner dielectric layer (ILD) on the substrate; and on the inner dielectric layer Form an etched paper. Applicable to China Solid Standard (CNS) A4 specifications < 210 * 297 public love! I -Γ ί ^ 装 ·! Ii — Order ----- II is A ^ i (Please read the back first Please fill out this page again) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 44々34〇A7 '^ ---------------- V. Description of the invention (;;) Terminate immediately Layer; formed on the etch stop layer-internal gold It is a dielectric layer (IMD); formed on the inner metal dielectric layer-a first photoresist layer "'patterning the first photoresist layer' so that it has a contact window pattern; an etching process is performed to the first The opening pattern of the photoresist layer is transferred to the inner metal dielectric layer; the etching process is continued to transfer the opening pattern to the etch stop layer; the first photoresist layer on the substrate is removed; Forming a second photoresist layer on the substrate; patterning the second photoresist layer so that it has a trench pattern; performing an etching process, and transferring the trench pattern of the second photoresist layer to the inner metal dielectric layer, The etch stop layer is exposed; the contact window pattern is further etched and transferred from the inner metal dielectric layer to the inner dielectric layer until the bottom structure of the substrate is formed to form a composite contact window and trench structure; removing the A second photoresist layer; forming a barrier layer on the substrate surface including the inner surface of the composite structure of the contact window and the trench; removing the barrier layer on the substrate surface; and using an electroplating process without the need for Turn into Mechanical polishing step, copper is selectively deposited in the contact window with the composite structure of the trench, to form a self-aligned within the Cu metal line. The above purpose of the present invention can also be completed by the second embodiment. The formation of the double-layer embedded copper metal interconnect structure of the present invention includes forming a trench first, and then forming an interlayer window pattern, so that an interlayer is formed. Composite structure of windows and ditches. Next, a barrier layer is formed in the composite structure so that it can be selected thereon. The paper size is applicable to the national standard of Chinese painting (CNS > A4 specification (210 X 297 mm)) IIJ Ί II --1 ^ ---- --I— Order --------- (Please read the precautions on the back before filling out this page) 4443 4 〇 Consumption Cooperation of Employees of Intellectual Property Bureau, Ministry of Economic Affairs, printed Α7 ----- B7__ V. Description of the invention (T) Selective electric ore deposits copper metal, so the present invention does not require chemical mechanical polishing of copper. In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy, only one of the following is a better one Examples, and in conjunction with the accompanying drawings 'for detailed description', similar elements in the drawings are represented by similar numbers. "Schematic description: Figures 1A to 1C show a conventional method for forming a double-layer embedded structure. Fig. 2A to Fig. 2C show another conventional method for forming a double-layered embedded structure. Fig. 3A shows an embodiment of the present invention, forming a compound double with an automatic alignment trench and a contact window on a semiconductor substrate. Cross-sectional view of the manufacturing process of the multilayer embedded structure, where When the contact window is filled with metal, the components in the underlying substrate are electrically connected to the first metal layer in the trench. Figure 3B is shown on the substrate in Figure 3A and includes the composite trench and opening structure of the present invention. A barrier metal layer is formed on the inner wall. FIG. 3C illustrates that the barrier layer is removed from the upper surface of the substrate of FIG. 3B after the chemical mechanical polishing of the present invention. FIG. 2D green is not according to the first implementation of the present invention For example, copper plating is selectively plated in the composite automatic alignment trench and contact window structure. Figure 3E shows an embodiment of the present invention, which is based on semiconductor substrates. This paper standard is applicable to China National Standard (CNS) A4.格 ⑵0 x 297 公 爱) -----— 1 ---! | 4 * 1. | 丨 —— —---- (Please read the notes on the back before filling this page) «443 4 〇 Ministry of Economy Printed by the Intellectual Property Bureau employee consumer cooperative A7 B7 V. Description of the invention (f) A cross-sectional view of the manufacturing process for forming a composite double-drink structure with automatically aligned trenches and contact windows on the bottom, filled in the trenches and contact windows When metal is inserted, the components in the underlying substrate can be electrically connected to the trenches. In the first metal layer. Figure 2F continues to selectively bond copper in the composite automatic alignment trench and contact window structure according to a second embodiment of the present invention. Fig. 3G is a cross-sectional view of a semiconductor substrate showing the spatial relationship between the copper contact formed in Fig. 3D and Fig. 3F of the present invention and the copper interposer window plug. Description of drawing numbers: 20, 20b: insulation layers 25, 125: etch stop layers 30, 40: mask layers 35, 35 ,: openings 45 ': wire trenches 50, 170: metal 100: substrates 110, 120: source / Drain 130: Inner dielectric layer (ILD) 140, 200, 210: Inner metal dielectric layer (IMD) 150, 220: Composite structure 135: Contact window 145, 215: Trench 160: Titanium nitride layer Zhongli Yinjia Standard (CNS) A4 Specification < 210 X 297 mm) --- 15 ---- T--1 ^ install -------order ---- II (please first Read the notes on the back and fill in this page) 4 443 4 〇A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. 5. Description of the invention ((^ 205: Detailed description of the invention of the mezzanine window: please refer to the drawings, especially the drawings) Figures 3A to 3G illustrate a method for forming an automatically aligned composite copper-metal connection with a contact window or a via window using an electroplating process without the need for a chemical mechanical polishing step. Figure 3A illustrates the use of The composite structure 15 formed by the improved double-layer embedding process of the first embodiment of the present invention, wherein the contact window 135 is based on the trench 145 of the composite structure 150. I aligned the bottom element structure formed and extending to the source electrode 120 or 13 in the substrate 100. Later, the "openings and trenches will be filled with copper metal" to form the copper metal interconnects of the present invention. Figure 3E shows a composite structure 220 formed by using another improved double-layer embedding process according to the second embodiment of the present invention, wherein the interlayer window 205 is formed by self-alignment according to the trench 215 of the composite structure 220. First Embodiment The contact window is formed on the bottom structure of the element in the substrate 100, and the interlayer window is formed on the bottom structure including a metal layer, or preferably a copper wire formed in a trench of a composite structure according to the present invention. However, for the present invention, the bottom element structure including the source 1 i 0 and the drain 120 is not important, so it will not be described in detail here, so as not to obscure the focus of the present invention. 囷 三 A 至 图 三 D The first embodiment of the present invention is shown, which is formed by a double-layer embedding process. First, a contact window pattern is formed in the insulating layer of the substrate 100. Then, two layers are formed. A4 Grid mo X 297 mm) < Please read the Notes on the back to fill out this page) ---- ----- booked 1 4 443 4 billion
發明說明（丨 介電層’一為内層介電層（ILD) 130，另一為内金屬 介電層（IMD)140，而兩層介電層間相隔一蝕刻終 止層125。需注意的是，通常習知技藝中形成於半 導體梦表面之介電層，指的是内層介電層（ILD)， 而形成於金屬層上的介電層，指的是内金屬介電 層（IMD)。在此’本發明揭露的銅金屬内連線可以 為連接到接觸窗暴露的半導體結構，或為連接到 介層窗暴露的金屬層，因此，在此將保留適當的 命名’以便清楚地辨別各種形式之金屬内連線的 介電層。 熟悉此技藝者均瞭解上述之介電層。圖三/A中 所繪示的内層介電層（ILD)與内金屬介電層（imd), 其材質包括、但不限於二氧化矽、氮化矽與氤氧 化石夕等材料’而其形成方法包括、但不限於積體 電路製程中之化學氣相沈積（CVD)、電漿加強式化 學氣相沈積（PECVD)、與物理氣相沈積（pvd)等方 法所形成β於本發明之實施例中，，較佳之内廣介 電層130材質包括硼磷矽玻璃（bpsG)、或低壓氧 化物（LP-oxide)、或 BP-TEOS(tetraethyl orthosilicate)’其厚度約介於3,000至30,000埃間。 内金屬介電層140則包括電漿加強之氧化物（PE_ oxide) ’且厚度約介於2,000至20,000埃間。 蝕終止層125為一層薄、且均勻覆蓋之材 料’其材質可為氮化矽（Si3N4, SiN)、或氮氧化矽 本紙張尺度適用中因0家標準（CNS)A4规格（210 X 297公爱〉 (請先閱讀背面之ii意事項再填寫本頁)Description of the Invention (丨 The dielectric layer 'is an inner dielectric layer (ILD) 130, the other is an inner metal dielectric layer (IMD) 140, and the two dielectric layers are separated by an etch stop layer 125. It should be noted that In the conventional art, the dielectric layer formed on the surface of the semiconductor dream refers to the inner dielectric layer (ILD), and the dielectric layer formed on the metal layer refers to the inner metal dielectric layer (IMD). The 'copper metal interconnect disclosed in the present invention may be a semiconductor structure exposed to a contact window or a metal layer exposed to a via window, therefore, proper names will be retained here to clearly distinguish the various forms. The dielectric layer interconnected by metal. Those who are familiar with this technology will understand the above dielectric layer. The inner dielectric layer (ILD) and inner metal dielectric layer (imd) shown in Figure 3 / A, their materials Including, but not limited to, materials such as silicon dioxide, silicon nitride, and hafnium oxide, and its formation methods include, but are not limited to, chemical vapor deposition (CVD), plasma enhanced chemical vapor phase in integrated circuit manufacturing processes Deposition (PECVD), and physical vapor deposition (pvd) In the embodiment of the present invention, the preferred material of the inner dielectric layer 130 includes borophosphosilicate glass (bpsG), or low pressure oxide (LP-oxide), or BP-TEOS (tetraethyl orthosilicate). Between about 3,000 to 30,000 angstroms. The inner metal dielectric layer 140 includes a plasma-enhanced oxide (PE_oxide) and has a thickness of about 2,000 to 20,000 angstroms. The etch stop layer 125 is a thin, uniform layer The material 'can be made of silicon nitride (Si3N4, SiN), or silicon oxynitride. This paper is suitable for 0 standard (CNS) A4 specifications (210 X 297 public love). (Please read the notice on the back first) (Fill in this page again)
'^裝--------訂--------- J 經濟部智慧財產局員工消費合作杜印製 —12 4443 4 〇 Α7 Β7 五、發明說明（（y) (SiOxNy)。而本發明之實施例中較佳係採用對钱刻 介電層的蝕刻劑具有高選擇比之氮化矽材料。氮 化矽是由二氣曱烷（SiCl2H2)與氨氣（NH3)反應，利 用低壓化學氣相沈積法所形成’其壓力約為〇j至 10 torr間’溫度約介於600至800°C之間，流速 約為 100 至 5000 sccm(standard cubic centimeters per minute)間，而其厚度約在loo埃到ι〇〇〇埃之 間。 於形成内層介電層、内金屬介電層與蝕刻終止 層後，形成一第一光阻層（圖中未繪示），其厚度約 為1.0至1.2埃’續利用一具有接觸窗圖案之光罩， 對第一光阻層進行圖案化❶接觸窗圖案將藉由蚀 刻而轉移至内金屬介電層140與蝕刻終止層125。 在餘刻内金屬介電層140與餘刻終止層125時， 較佳使用包括CHF3、CF4、C4F8與Ar等組成的钱 刻氣體’而其流速則分別約為〇 1至5〇 sccm ' 〇^ 至50 seem、0·1至1〇〇〇 sccm。在形成接觸窗圖案 之後，則利用氧電漿灰化以去除第一光阻層。 經濟部智慈財產局員工消費合作社印製 接著，於包括之前所形成的接觸窗圖案之基底 上，形成一第一光阻層（圖中未續^示）。續以具有導 線圖案的光罩，來圖案化第二光阻層，之後，導 線的圖案將藉由餘刻而轉移至内金屬介電層14〇， 以形成溝渠145，如圖三B所示β而在内金屬介電 層中形成溝渠的同時，接觸窗圖案也藉由相同 4 443 Α7 五、發明說明（丨今） 蝕刻步驟而被轉移到内層介電層13〇上，而形成 如圖二A中所繪示的接觸窗135。在蝕刻内層介電 層時’較佳是使用包括CHF3、cf4、C4；f8與Ar等 之蝕刻氣體，而其流速則分別約為0丨至5〇sccm、 0.1 至 50 sccm、（U 至 1000 sccme 如此，則形成 了一複合之接觸窗與溝渠的雙層嵌入結構，如圖三 A中標號為150所繪示的。之後，移除第二光阻層。 接著，下一個步驟即為本發明實施例之重要的 步驟。於基底上沉積一阻障層，特別是覆蓋圖三B 中複合結構150之内壁。重要的是，阻障層材料 係由與銅相容之材料族群中選出；亦即，形成阻 障層的材料係可作為防止銅擴散至雙層嵌入結構周 圍之介電層的屏障。因此，較佳的材料為组、氮 化钽、氮化鎢及氮化鈦。於本實施例_，氮化鈦16〇 係使用習知的低壓化學氣相沉積法來沉積，且其 厚度約為100至1000埃間。如此，複合雙層嵌入結 構與基底表面便覆蓋有一層均勻覆蓋的氮化鈦層 160,如圖三B所示。阻障層較佳的厚度約為1〇〇 至1000埃間。 接著，移除圖三B中部分形成於基底表面之阻 障層。此可藉由習知之化學機械研磨法（CMp)來去 除’其中化學研衆是提供於一旋轉之軟墊表面。 而較佳有效去除基底表面、但不包括複合結構内 壁之氮化鈦的方法，其研漿包括二種或三種成分， 私紙張尺度適用10國家標準<CNS>A4规格（210 X 297公爱） ----I ----7----^裝 (請先間讀背面之沒意事項再填寫本頁) ----訂—--- 經濟部智慧財產局員工消費合作社印製 L - 4443 4 〇 Α7 _ - _______ B? ----- — 五、發明說明（丨ψ) 其包括：（1)例如具有可溶解於水的過氧化氫（H2 之化學基；（2)例如鋁、矽或氧化鈦（Ti〇x，其中X 可以為1至2)之研磨劑；（3)例如具有乙X二醇之研 磨劑懸浮於其上的選擇性液體。而熟習此技藝者 較佳是將圖三C中之基底上表面平坦化至暴露出 介電層140。接觸窗與溝渠之複合結構的側壁仍保 留阻障層，如圖三C所示。阻障層不僅可作為電 鐘於其上之金屬銅的阻擋層’亦可作為電鍍製程 的起始導電層表面。 接著，進行本發明之主要特徵與重要步驟，也 就疋將基底轉移到裝有銅分子的電解槽中。金屬 銅僅會選擇性地沈積於本發明所揭露之阻障層、 與氮化鈦的表面上。電解槽提供了不論結構的深 度，可均勻填滿複合結構之接觸窗與溝渠的優點。 此外’由於阻障層被平坦化至基底的表面，因此 銅之選擇性電鍍將終止於複合結構150的”嘴部”，'^ 装 -------- Order --------- J Consumption cooperation by employees of the Intellectual Property Bureau of the Ministry of Economy—12 4443 4 〇Α7 Β7 V. Description of the invention ((y) (SiOxNy ). In the embodiment of the present invention, a silicon nitride material having a high selectivity to the etchant of the money-etched dielectric layer is preferably used. The silicon nitride is composed of dioxane (SiCl2H2) and ammonia (NH3). The reaction is formed by the low pressure chemical vapor deposition method with a pressure of about 0j to 10 torr and a temperature of about 600 to 800 ° C and a flow rate of about 100 to 5000 sccm (standard cubic centimeters per minute). And its thickness is between loo Angstroms and 5,000 Angstroms. After forming the inner dielectric layer, the inner metal dielectric layer and the etch stop layer, a first photoresist layer is formed (not shown in the figure), Its thickness is about 1.0 to 1.2 angstroms. Continue to use a mask with a contact window pattern to pattern the first photoresist layer. The contact window pattern will be transferred to the inner metal dielectric layer 140 and the etch stop layer by etching. 125. In the rest of the metal dielectric layer 140 and the rest of the termination layer 125, it is preferable to use money including CHF3, CF4, C4F8, and Ar. The gas 'and its flow rate are about 0-1 to 50 sccm' 〇 ^ to 50 seem, 0.1 to 10,000 sccm. After the contact window pattern is formed, it is ashed with oxygen plasma to remove the first Photoresist layer. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. Next, a first photoresist layer is formed on the substrate including the previously formed contact window pattern (not shown in the figure). Continued with wires Patterned photomask to pattern the second photoresist layer. After that, the pattern of the conductive lines will be transferred to the inner metal dielectric layer 14 by a moment to form a trench 145, as shown in FIG. 3B. Β At the same time as the trench is formed in the metal dielectric layer, the contact window pattern is also transferred to the inner dielectric layer 13 by the same 4 443 Α7 V. Invention Description (丨 present) etching step, and formed as shown in Figure 2A Illustrated contact window 135. When etching the inner dielectric layer, it is preferred to use an etching gas including CHF3, cf4, C4; f8 and Ar, etc., and their flow rates are about 0 to 50 sccm, 0.1 to 50 sccm, (U to 1000 sccme, so a composite contact window and groove are formed The double-layer embedded structure is shown as 150 in FIG. 3A. Then, the second photoresist layer is removed. Next, the next step is an important step in the embodiment of the present invention. A layer is deposited on the substrate. Barrier layer, especially covering the inner wall of the composite structure 150 in Figure 3B. It is important that the material of the barrier layer is selected from a group of materials compatible with copper; that is, the material of the barrier layer can be used as a preventive material. Copper diffuses into the barrier of the dielectric layer surrounding the double-layer embedded structure. Therefore, preferred materials are groups, tantalum nitride, tungsten nitride, and titanium nitride. In this embodiment, titanium nitride 16 is deposited using a conventional low-pressure chemical vapor deposition method, and has a thickness of about 100 to 1000 angstroms. In this way, the composite double-layer embedded structure and the substrate surface are covered with a uniformly covered titanium nitride layer 160, as shown in FIG. 3B. The thickness of the barrier layer is preferably about 100 to 1000 angstroms. Next, the barrier layer partially formed on the substrate surface in FIG. 3B is removed. This can be removed by the conventional chemical mechanical polishing method (CMp), wherein the chemical researcher is provided on a rotating pad surface. The preferred method of effectively removing titanium nitride on the surface of the substrate, but not including the inner wall of the composite structure, consists of two or three components. The size of the private paper is applicable to 10 national standards < CNS > A4 (210 X 297). ) ---- I ---- 7 ---- ^ installed (please read the unintentional matter on the back before filling in this page) ---- Order ----- Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs Preparation L-4443 4 〇Α7 _-_______ B? ------V. Description of the invention (丨 ψ) It includes: (1) For example, hydrogen peroxide (H2 chemical group); (2) ) For example, abrasives of aluminum, silicon, or titanium oxide (Ti0x, where X may be 1 to 2); (3) Selective liquids, for example, abrasives with ethyl X diol suspended thereon, and be familiar with this technique It is preferable to planarize the upper surface of the substrate in FIG. 3C to expose the dielectric layer 140. The barrier layer of the composite structure of the contact window and the trench still retains a barrier layer, as shown in FIG. 3C. The barrier layer can not only As the barrier layer of metallic copper on the electric clock, it can also be used as the starting conductive layer surface of the electroplating process. Next, the main features of the present invention and The main step is to transfer the substrate to an electrolytic cell filled with copper molecules. Copper metal is only selectively deposited on the barrier layer and the surface of titanium nitride disclosed in the present invention. The electrolytic cell provides no matter The depth of the structure can evenly fill the advantages of the contact windows and trenches of the composite structure. In addition, 'Since the barrier layer is planarized to the surface of the substrate, the selective plating of copper will end at the "mouth" of the composite structure 150,
藉以得到平坦的銅的表面與基底表面，如圖三D 所示。 本發明之第二實施例的雙層嵌入製程繪示於圖 三E至圖三F中，首先，於具有金屬層17〇之底 部結構的基底100之絕緣層中，形成一溝渠圖案。 接著形成於金屬層之底部結構上的介電層為内金 屬介電層（IMD);亦即，分別形成第一内金屬介電 層200與第二内金屬介電層21〇,如圖三e所示。 本紙張尺度適用中關减举蜆格（21〇 * 297公釐 (請先閱讀背面之注意事項再填寫本頁) -4- ^裝！----訂---------* 經濟部智慧財產局員工消費合作社印製 4443 4 〇 經濟部智慧財產局員工消費合作社印製 A7 B7 五、發明說明（l/ ) 雖然可以利用控制時間的方式來取代蝕刻終止層 而形成圖三E令具一特定深度的溝渠，通常約為 兩層内金屬介電層厚度的一半，但較佳的實施情 況為於兩層内金屬介電層間形成蝕刻終止層。於 本發明的第二實施例中’第一内金屬介電層200 包括CVD法所形成的氧化層，且厚度約為2〇〇〇 至6000埃’而第二内金屬介電層21〇包括cvD 法所形成的氧化層，厚度約為2000至10000埃。 於形成第一、第二内金屬介電層與餘刻終止層 後，形成厚度約在0.5到2.0/zm間之第一光阻層（圖 中未繪示）’然後圖案化第一光阻層而形成具有溝 渠囷案的光罩。續將溝渠圖案215藉由蝕刻而轉 移至第二内金屬介電層。蝕刻内金屬介電層21〇 時較佳是使用CHF3、CF4、C4F8與Ar等氣體作為 蚀刻氣體’而其流速則分別約為0.1至50sccm、〇] 至50 seem、0.1至1000 seem。於形成溝渠圖案215 後’利用氧電漿灰化以移除第一光阻層。 接著，於包括之前所形成的接觸窗圖案215之 基底上形成第二光阻層（圖中未繪示）。續圖案化第 二光阻層，以形成具有介層窗開口圖案的光罩， 然後開口圖案藉由敍刻轉移到触刻終止層，再轉 移到第一内金屬介電層200上，以形成介層窗205， 如圖三E所示。蝕刻内金屬介電層時較佳是使用 包括CHF;、CF#、（：4匕與Ar等混合氣體的蝕刻氣 本紙張&度適用中國回家樣準（CNS)A4規格（21t> X 297公釐）" -------- ----- I U- I ---.^裝--------訂-------- (請先閱讀背面之注意事項再填寫本頁) 4443 4 Ο 經濟部智慧財產局員工消費合作社印製 Α7 五、發明說明（士） 體’且其流速則分別約為0.U5〇sccm'〇 ii5〇 二、ο，ι至議secm。如此即形成了介層窗斑 溝朱之複口結構’如圖三E中標號22〇所示 後移除第二光阻層。 | 接著，下-個㈣即為本發时_之重要的Thereby, a flat copper surface and a substrate surface are obtained, as shown in FIG. 3D. The double-layer embedding process of the second embodiment of the present invention is shown in FIGS. 3E to 3F. First, a trench pattern is formed in the insulating layer of the substrate 100 having a bottom structure of the metal layer 170. The dielectric layer formed on the bottom structure of the metal layer is an inner metal dielectric layer (IMD); that is, a first inner metal dielectric layer 200 and a second inner metal dielectric layer 21 are formed, as shown in FIG. 3 e. The paper size is applicable to the Zhongguan deduction standard (21〇 * 297mm (please read the precautions on the back before filling in this page) -4- ^ Install! ---- Order --------- * Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 4443 4 〇 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the Invention (l /) Although time-controlled methods can be used to replace the etching stop layer to form Figure 3 E. A trench with a specific depth is usually about half the thickness of the two metal dielectric layers, but a preferred implementation is to form an etch stop layer between the two metal dielectric layers. In the second embodiment of the present invention In the example, 'the first inner metal dielectric layer 200 includes an oxide layer formed by a CVD method and has a thickness of about 2000 to 6000 angstroms' and the second inner metal dielectric layer 21 includes an oxide layer formed by a cvD method. , The thickness is about 2000 to 10000 angstroms. After forming the first and second inner metal dielectric layers and the epitaxial stop layer, a first photoresist layer with a thickness of about 0.5 to 2.0 / zm is formed (not shown in the figure) ) 'Then pattern the first photoresist layer to form a photomask with a trench pattern. Continued trench The pattern 215 is transferred to the second inner metal dielectric layer by etching. When etching the inner metal dielectric layer 21, it is preferable to use gases such as CHF3, CF4, C4F8, and Ar as etching gases, and the flow rates thereof are about 0.1, respectively. To 50 seem, 0] to 50 seem, 0.1 to 1000 seem. After the trench pattern 215 is formed, the first photoresist layer is removed by ashing with an oxygen plasma. Then, the substrate including the previously formed contact window pattern 215 is removed. A second photoresist layer (not shown in the figure) is formed on top of it. Continue patterning the second photoresist layer to form a photomask with an opening pattern of the interlayer window, and then the opening pattern is transferred to the touch stop layer by engraving. It is then transferred to the first inner metal dielectric layer 200 to form a dielectric window 205, as shown in FIG. 3E. When etching the inner metal dielectric layer, it is preferable to use CHF ;, CF #, (: 4d and Etching gas of mixed gas such as Ar, etc. The paper & degree is suitable for China Home Sample (CNS) A4 specification (21t > X 297 mm) " -------- ----- I U- I ---. ^ Installation -------- Order -------- (Please read the precautions on the back before filling out this page) 4443 4 Ο Staff of Intellectual Property Bureau of Ministry of Economic Affairs Cooperative printed A7 V. Description of the invention (Shi) body ', and its flow rate is about 0. U5 Sccm' 〇ii 50 〇, ο, ι to sec. Respectively. In this way, the interstitial window ditch sulcus Zhuzhi complex mouth structure 'After removing the second photoresist layer as shown by reference number 22 in FIG. 3E.
步驟。於基底上沉積一阻障層，特別是覆蓋圖三E 中複合結構150之内發。舌 <門璧。重要的是，阻障層材料 係由與銅相容之材料族群中選出；亦即形成阻 障層的材料係可作為防止銅擴散至雙層丧入結構周 圍之介電層的屏障。因此’較佳的材料為钽氮 化钽、氮化鎢及氮化鈦。於本實施例中，氮化鈦16〇 係使用習知的低壓化學氣相沉積法來沉積，且其 厚度約為100至1000埃間。如此，複合雙層嵌入結 構與基底表面便覆蓋有一層共形的氮化鈦層16〇 了 如圖三Β所示。阻障層較佳的厚度約為1〇〇至1〇〇〇 埃間。 接著’移除部分形成於基底表面之阻障層。此 可藉由上述之化學機械研磨法（CMP)來去除，其中 化學研漿是提供於一旋轉之軟塾表面。基底之上 表面將平坦化至暴露出下層的介電層21〇，而接觸 窗與溝渠之複合結構的側壁仍保留阻障層，此步 驟類似第一實施例中的圖二如之前所提及的， 阻障層不僅可作為電鍍於其上之金屬銅的阻擋 層’亦可作為電鍍製程的起始導電層表面。 ——J]_———j裝------ —訂--------- (請先閱讀背面之注¾事項再填寫本頁)step. A barrier layer is deposited on the substrate, especially covering the inner structure of the composite structure 150 in FIG. 3E. Tongue < It is important that the material of the barrier layer is selected from a group of materials compatible with copper; that is, the material of the barrier layer can be used as a barrier to prevent copper from diffusing into the dielectric layer surrounding the double-layer sink structure. Therefore, the preferred materials are tantalum tantalum nitride, tungsten nitride, and titanium nitride. In this embodiment, titanium nitride 16 is deposited using a conventional low-pressure chemical vapor deposition method, and has a thickness of about 100 to 1000 angstroms. In this way, the composite double-layer embedded structure and the surface of the substrate are covered with a conformal titanium nitride layer 16 as shown in Fig. 3B. The preferred thickness of the barrier layer is between about 1000 and 10,000 Angstroms. Then, the barrier layer formed on the surface of the substrate is removed. This can be removed by the above-mentioned chemical mechanical polishing (CMP) method, wherein the chemical slurry is provided on a rotating soft palate surface. The upper surface of the substrate will be flattened to expose the underlying dielectric layer 21o, and the barrier layer of the composite structure of the contact window and the trench still retains the barrier layer. This step is similar to Figure 2 in the first embodiment, as mentioned earlier. The barrier layer can be used not only as the barrier layer of metallic copper plated thereon, but also as the surface of the starting conductive layer of the electroplating process. ——J] _———— j equipment ------ —Order --------- (Please read the notes on the back ¾ before filling this page)
接著’進行本發明之主要特徵與重要步驟，也 就是將基底轉移到裝有銅分子的電解槽中。金屬 鋼僅會選擇性地沈積於本發明所揭露之阻障層、 與I化鈦的表面上。電解槽提供了不論結構的深 度’可均勻填滿複合結構之接觸窗與溝渠的優點。 此外’由於阻障層被平坦化至基底的表面，因此 銅之選擇性電鍍將終止於複合結構220的‘‘嘴 部’’’藉以得到平坦的銅的表面與基底表面，如圖 三D所示。 第一實施例與第二實施例之最終結構分別繪示 於圖三D與圖三F中，而本發明之金屬化接觸窗 135與介層窗205間的空間關係則繪示於圈三、声。 藉由銅介層窗插塞所連結的銅導線也同時繪示於 同一圖式中《銅内連線可藉由單一或是多重的雙層 欲入製程來形成。本發明所揭示的重要特徵為阻障 金屬的使用’此阻障金屬可作為選擇性電鍍銅的 表面，因此’不需進行習知技藝用來去除雙層嵌入 結構中多餘之金屬的化學機械研磨步驟。在此並 不贅述本發明之詳細步驟，例如，雖然本發明亦 可使用無電電鑛板來沈積銅金屬，但進行無電電 鑛沈積銅金屬則需進行表面的活化步驟等。 雖然本發明特別強調並敘述本發明的實施例， 然其並非用以限定本發明，任何熟習此技藝者， 在不脫離本發明之精神和範圍内，當可作各種之 本紙張尺度適用中國國家標準（CNS)A4规格（210 X 297公釐） c請先閱讀背面之注意事項再填寫本頁) d裝---- tT--------- 經濟部智慧財產局員工消費合作社印製 Α7 Β7 4443 4 Ο 五、發明說明（丨？） 更動與潤飾，因此本發明之保護範圍當視後附之 申請專利範圍所界定者為準。 <請先閱讀背面之注意事項再填寫本頁) n )DJ n n A— ,，v. 經濟部智慧財產局員工消費合作社印t X 10 2 /1 格 規 A4 s> N (c 準 標 家 國 國 中 用 適 度 尺 張 紙Next, the main features and important steps of the present invention are performed, that is, the substrate is transferred to an electrolytic cell containing copper molecules. Metal steel is only selectively deposited on the surface of the barrier layer and titanium nitride disclosed in the present invention. The electrolytic cell provides the advantage of uniformly filling the contact windows and trenches of the composite structure regardless of the depth of the structure. In addition, since the barrier layer is planarized to the surface of the substrate, the selective plating of copper will end at the "mouth" of the composite structure 220 to obtain a flat copper surface and the substrate surface, as shown in Figure 3D. Show. The final structures of the first embodiment and the second embodiment are shown in FIG. 3D and FIG. 3F, respectively, and the spatial relationship between the metalized contact window 135 and the interlayer window 205 of the present invention is shown in circle three, sound. The copper wires connected by the copper interlayer window plugs are also shown in the same figure. "Copper interconnects can be formed by a single or multiple double-layer process. An important feature disclosed by the present invention is the use of a barrier metal. 'This barrier metal can be used as a surface for selective electroplating of copper. Therefore, it is not necessary to perform chemical mechanical polishing using conventional techniques to remove excess metal in the double-layer embedded structure. step. The detailed steps of the present invention are not repeated here. For example, although the present invention can also use electroless ore plates to deposit copper metal, the electroless ore deposition of copper metals requires a surface activation step. Although the present invention particularly emphasizes and describes the embodiments of the present invention, it is not intended to limit the present invention. Any person skilled in the art can use various Chinese paper standards without departing from the spirit and scope of the present invention. Standard (CNS) A4 specification (210 X 297 mm) c Please read the notes on the back before filling out this page) d Pack ---- tT --------- Staff Consumer Cooperatives, Intellectual Property Bureau, Ministry of Economic Affairs Printed A7 Β7 4443 4 〇 5. Description of the invention (丨?) Changes and retouching, so the scope of protection of the present invention shall be determined by the scope of the attached patent application. < Please read the notes on the back before filling out this page) n) DJ nn A— ,, v. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs t X 10 2/1 Standard A4 s > N (c Moderate grade paper