TW476128B - Integrated method and apparatus for forming an enhanced capacitor - Google Patents

Integrated method and apparatus for forming an enhanced capacitor Download PDF

Info

Publication number
TW476128B
TW476128B TW089119692A TW89119692A TW476128B TW 476128 B TW476128 B TW 476128B TW 089119692 A TW089119692 A TW 089119692A TW 89119692 A TW89119692 A TW 89119692A TW 476128 B TW476128 B TW 476128B
Authority
TW
Taiwan
Prior art keywords
chamber
metal
film
metal oxide
oxide dielectric
Prior art date
Application number
TW089119692A
Other languages
Chinese (zh)
Inventor
Pravin Narwankar
Turgut Sahin
S Randall Urdahl
Original Assignee
Applied Materials Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Applied Materials Inc filed Critical Applied Materials Inc
Application granted granted Critical
Publication of TW476128B publication Critical patent/TW476128B/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/0214Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02183Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing tantalum, e.g. Ta2O5
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02186Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing titanium, e.g. TiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02197Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides the material having a perovskite structure, e.g. BaTiO3
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/0228Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/55Capacitors with a dielectric comprising a perovskite structure material
    • H01L28/56Capacitors with a dielectric comprising a perovskite structure material the dielectric comprising two or more layers, e.g. comprising buffer layers, seed layers, gradient layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03Making the capacitor or connections thereto

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Formation Of Insulating Films (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

A novel method and apparatus for forming a capacitor is described. According to the present invention, a substrate having a bottom electrode is provided. A metal-oxide dielectric film is then formed on the bottom electrode. The metal-oxide dielectric film is annealed with remotely generated radicals. A metal-nitride layer is then formed on the annealed metal-oxide dielectric film. A top electrode is then formed on the metal-nitride barrier layer.

Description

厶Ο厶 〇

、發明說明( 月領域 本發明關於半導體處理之領域,更明確說,係關於一 種於積體電路中形成電容的整合方法與設備。 t明背景:_ 動態隨機存取記憶體(DRAM)係由百萬計之主動及被 裝置’例如電晶體,電容及電阻所構成。為了於dram中, 提供更多儲存能力,裝置特性係被減小或縮小,以提供更 高密度之裝置。完成未來生產高密度DRAM之重要要件是 劇烈地縮小電容器大小,同時維持電容儲存量。為了增加 電容器單元之儲存電荷,則需要高介電常數電容介電質。 高介電常數膜大致係為陶瓷膜(即金屬氧化物),例如 五氧化鈕及氧化鈦。當這些膜被沉積時,它們傾向於晶格 中之陰離子(氧)處具有空缺。現在,這些空缺係藉由於一 氣體混合物中回火該膜加以填充,該氣體混合物可以提供 一活性物種以佔用晶格空缺。例如爐回火及快速氧化(RNO) 法係現行被用以回火這些介電膜。於這些處理中’ 一基材 係被放置於快速加熱設備之爐或室中,並被加熱至一高於 800°C之高溫,同時,例如〇2或N2之回火氣體係分別直 接被饋入放有基材之爐或室中。這些處理必須以很高溫進 行,即大於800°C,以由該回火氣體中產生活性物種。 利用此高回火溫度的一問題是例如五氧化担足介電 膜於曝露至高溫時結晶,這可能造成高戍漏電流。另外’ 高回火溫度可能造成其他離子擴散入該薄中’特別疋於裝 第2頁_____ 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁) -----Γ---^-------- 經濟部智慧財產局員工消費合作社印製 __-2-----— __-2-----— 經濟部智慧財產局員工消費合作社印製 476128 A7 五、發明說明() 置之界面中,並造成較佳電氣效能。再者,很多高密度製 程需要降低(熱預算,以防止或減少摻雜物擴散或再分佈 入該裝置中。再者,—些製程利用具有低熔點之材料,這 排除了後續使用高溫處理之可能。 另一個有關金屬氧化物介電膜之問題是需要阻障層 以將金屬氧化介電質與用以形成電容電極之金屬膜^ 離。同時,也需要一阻障層,以防止於電容電極中之金屬 原子由金屬氧化物介電質中偷取氧並於其中造成空缺,這 造成了南洩漏電流。吾人發現金屬氮化物,例如氮化鈦 (TiN)及氮化钽(TaN)提供良好阻障物。 另外,吾人也知道製造整合一金屬氧化物阻障層與金 屬氮化物膜係很困難的,因為其不同沉積製程之故,及因 為它們可以相互作用並改變電氣品質及沉積膜之特性。另 外,金屬氧化物介電膜與金屬氮化物膜整合入一電容製程 中係必須具有於各種層間較差界面,由於諸層移動於不同 處理模組時之污染與氧化之故。 因此,有需要一種方法與設備,其可以成功地整合金 屬氧化物介電質,回火步驟及金屬氮化物阻障層,而可以 形成高密度大表面積電容。 發明目的及概述: 一種形成一電容的新穎方法與設備係加以說明。依據 本發明,係被提供以具有一底電極之基材^ 一金屬氧化物 介電膜然後形成於該底電極上。金屬氧化物介電膜係以遠 第3頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) -------* *-------r---訂----- (請先閱讀背面之注意事項再填寫本頁) •線 476128 經濟部智慧財產局員工消費合作社印製 A7 B7___ 五、發明說明() 端產生之活性原子團加以回火。一金屬氮化物層然後形成 於該已回火金屬氧化物介電膜上。一頂電極然後形成於該 金屬氮化物阻障層上。 圖式簡單說明: 第1圖為依據本發明形成一電容之處理流程圖。 第2a圖為包含底電容電極之基材示意圖。 第2b圖為一剖面圖,示出第2a圖之基材曝露至一主動原 子物種。 第2c圖為一剖面圖,示出一介電層形成於第2b圖之基材 上。 第2d圖為一剖面圖,示出一回火介電層形成於第2b圖之 基材上。 第2e圖為一剖面圖,示出第2d圖之基材之氮鈍化。 第2f圖為一剖面圖,示出一金屬氮化物膜形成於第26圖 之基材上。 第2g圖為一剖面圖,示出第2f圖之基材之氮原子團曝露 至活化氮原子。 第2h圖為一剖面圖,示出一頂電極之形成於第2g圖之基 材上。 第3a圖為一設備之示意圖,其可以用以依據本發明形成 具有高介電膜之電容。 第3b圖為一室,其可以用於第3a圖之設備中。 第3c圖為一 CVD氣體輸送系統之示意圖,其可以用以提 第4頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁}2. Description of the Invention (Field of the Invention) The present invention relates to the field of semiconductor processing, and more specifically, it relates to an integrated method and device for forming a capacitor in an integrated circuit. Tming background: _ Dynamic Random Access Memory (DRAM) Millions of active and passive devices, such as transistors, capacitors, and resistors. In order to provide more storage capacity in the dram, device characteristics are reduced or reduced to provide higher-density devices. Complete future production An important requirement for high-density DRAM is to drastically reduce the size of the capacitor while maintaining the storage capacity of the capacitor. In order to increase the storage charge of the capacitor unit, a high dielectric constant capacitor dielectric is required. The high dielectric constant film is roughly a ceramic film (ie Metal oxides), such as pentoxide and titanium oxide. When these films are deposited, they tend to have vacancies in the anion (oxygen) in the crystal lattice. These vacancies are now caused by tempering the film in a gas mixture. When filled, the gas mixture can provide an active species to occupy the lattice vacancies, such as furnace tempering and rapid oxidation (RNO) processes. Currently used to temper these dielectric films. In these processes, a substrate is placed in a furnace or chamber of a rapid heating equipment and heated to a high temperature above 800 ° C, for example, 0 2 The tempering gas system of N2 or N2 is directly fed into the furnace or chamber containing the substrate. These processes must be performed at a very high temperature, that is, greater than 800 ° C, to generate active species from the tempering gas. One problem with fire temperature is that, for example, the pentoxide supports the crystallization of the dielectric film when exposed to high temperatures, which may cause high leakage currents. In addition, 'high tempering temperature may cause other ions to diffuse into the thin film', especially when it is installed. 2 pages _____ This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling this page) ----- Γ --- ^ ---- ---- Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs __- 2 -----— __- 2 -----— Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 476128 A7 V. Description of the invention ( ) In the interface and result in better electrical performance. Furthermore, many high-density processes need to be reduced Thermal budget to prevent or reduce the diffusion or redistribution of dopants into the device. Furthermore, some processes use materials with low melting points, which precludes the possibility of subsequent high temperature processing. Another related to metal oxide dielectrics The problem with the film is that a barrier layer is required to separate the metal oxide dielectric from the metal film used to form the capacitor electrode. At the same time, a barrier layer is also required to prevent metal atoms in the capacitor electrode from being mediated by the metal oxide. Oxygen was stolen from the electricity and caused a vacancy in it, which caused the south leakage current. I found that metal nitrides, such as titanium nitride (TiN) and tantalum nitride (TaN), provided good barriers. In addition, I also knew It is difficult to manufacture and integrate a metal oxide barrier layer and a metal nitride film system because of their different deposition processes, and because they can interact and change the electrical quality and characteristics of the deposited film. In addition, the integration of a metal oxide dielectric film and a metal nitride film into a capacitor process must have a poor interface between various layers due to pollution and oxidation when the layers are moved to different processing modules. Therefore, there is a need for a method and equipment that can successfully integrate a metal oxide dielectric, a tempering step, and a metal nitride barrier layer, and can form a high-density large-surface-area capacitor. Purpose and summary of the invention: A novel method and device for forming a capacitor are described. According to the present invention, a substrate provided with a bottom electrode ^ a metal oxide dielectric film is then formed on the bottom electrode. Metal oxide dielectric film is farther on page 3. The paper size is applicable to China National Standard (CNS) A4 specification (210 X 297 mm) ------- * * ------- r --- Order ----- (Please read the notes on the back before filling out this page) • Line 476128 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7___ V. Description of the invention Active radicals generated at the () end are tempered. A metal nitride layer is then formed on the tempered metal oxide dielectric film. A top electrode is then formed on the metal nitride barrier layer. Brief description of the drawings: FIG. 1 is a flowchart of a process for forming a capacitor according to the present invention. Figure 2a is a schematic diagram of a substrate including a bottom capacitor electrode. Figure 2b is a cross-sectional view showing the substrate of Figure 2a exposed to an active atomic species. Figure 2c is a cross-sectional view showing that a dielectric layer is formed on the substrate of Figure 2b. Figure 2d is a cross-sectional view showing that a tempered dielectric layer is formed on the substrate of Figure 2b. Figure 2e is a cross-sectional view showing the nitrogen passivation of the substrate of Figure 2d. FIG. 2f is a cross-sectional view showing that a metal nitride film is formed on the substrate of FIG. 26. Fig. 2g is a cross-sectional view showing the exposure of the nitrogen atomic group of the substrate of Fig. 2f to the activated nitrogen atom. Figure 2h is a sectional view showing the formation of a top electrode on the substrate of Figure 2g. Figure 3a is a schematic diagram of a device that can be used to form a capacitor with a high dielectric film according to the present invention. Figure 3b is a chamber that can be used in the equipment of Figure 3a. Figure 3c is a schematic diagram of a CVD gas delivery system, which can be used to refer to page 4. The paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) (Please read the precautions on the back before filling out this page}

476128 A7 B7 五、發明說明( 供沉積源氣體至第3b圖之室。 第4a圖為一叢集工具之示意圖,其具有依據本發明之單 一整合介電/回火/阻障室。 第4b圖為一叢集工具之示意圖,其具有分開介電質沉積, 回火及阻障沉積室。 第5圖為一表,其顯示洩漏電流隨著不同電極電壓變化, 對於以未回火五氧化鉦介電層形成之電容,及以遠 端產生活性原子物種回火五氧化钽介電層形成之 電容。 第6圖為一阿尼(Arhenius)圖,描緣出於形成金屬氮化物 膜時,一沉積率係如何相對於沉積溫度作反相變 第7圖為具有一 TiN/TaN/Ta05堆疊形成於其中之電極之 剖面圖。 第8a圖為具有一 Ta05/Ti0/TiN膜堆疊之電極之剖面圖。 第8b圖為具有一 TiN/Ti0/Ti05膜堆疊之電極的剖面圖。 圖號對照說明: 請 先 閱 讀 背 S 之 注 意 事 項476128 A7 B7 V. Description of the invention (for deposition source gas to the chamber of Figure 3b. Figure 4a is a schematic diagram of a cluster tool with a single integrated dielectric / tempering / barrier chamber according to the present invention. Figure 4b It is a schematic diagram of a cluster tool with separate dielectric deposition, tempering and barrier deposition chambers. Figure 5 is a table showing the leakage current changes with different electrode voltages. The capacitance formed by the electrical layer and the capacitance formed by tempering the tantalum pentoxide dielectric layer that generates active atom species at the far end. Figure 6 is an Arhenius diagram, which is drawn when forming a metal nitride film. The deposition rate is reversed relative to the deposition temperature. Figure 7 is a cross-sectional view of an electrode with a TiN / TaN / Ta05 stack formed therein. Figure 8a is a cross-section of an electrode with a Ta05 / Ti0 / TiN film stack Fig. 8b is a cross-sectional view of an electrode with a TiN / Ti0 / Ti05 film stack. Comparison of drawing numbers: Please read the precautions of the back S first

頁 經濟部智慧財產局員工消費合作社印製 200 基材 201 碎羞晶基材 202 摻雜區 204 内介電層 205 金屬氮化物阻障層 206 底電極 207 活性氮原子 208 介電膜 209 鈍化膜 210 回火介電層 211 活性原子物種 212 金屬氮化物膜 第5頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 476128 A7 B7 五、發明說明() 經濟部智慧財產局員工消費合作社印製 213 活 性 氮 原 子 214 活 性 氮原 子 216 頂 電 容 電 極 300 設 備 301 遠 端 電 漿產 生器 302 磁 控 管 304 假 負 載 306 波 導 管 308 白 動 調 諧 器 310 施 加 器 空 腔 3 12 源 314 導 管 3 16 導 管 318 氣 體 輸 送 系 統 320 氣 體 源 322 沉 積 液 體 324 蒸發 器 326 旁 路 閥 328 旁 路 導 管 350 室 35 1 基 材 352 晶 圓 支撐 件 354 鋁 夾 具 356 石 英 窗 358 燈 360 真 空 源 362 排 氣 出 α 364 噴 氣 頭 366 氣 體 入 α 400 叢 集 工 具 402 熱 式 加 熱 設 備 404 遠 端 電 漿產 生 406 傳 送 室 408 電 極 沉 積 室 410 真 空 隔 絕 室 450 叢 集 工 具 452 回 火 設 備 456 介 電 質 沉 積 設 460 阻 障 沉 積 設 備 700 合 成 堆 疊 702 五 氧 化 介 電層 704 氮 化 阻 障層 706 頂 電 極 800 電 容 器 膜堆 疊 801 底 電 極 802 氮 化 鈦 膜 804 氧 化 鈦 膜 806 介 電 膜 第6頁 (請先閱讀背面之注意事項再填寫本頁) r Mat tl · 裝-----r---訂--------線j 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 476128 A7Page Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs, Consumer Cooperatives 200 Substrate 201 Substrate 201 Shattered Crystal Substrate 202 Doped Region 204 Internal Dielectric Layer 205 Metal Nitride Barrier Layer 206 Bottom Electrode 207 Active Nitrogen Atom 208 Dielectric Film 209 Passivation Film 210 Tempered dielectric layer 211 Active atomic species 212 Metal nitride film Page 5 This paper is applicable to China National Standard (CNS) A4 (210 X 297 mm) 476128 A7 B7 V. Description of invention () Intellectual property of the Ministry of Economic Affairs Printed by the Bureau ’s Consumer Cooperative 213 Active Nitrogen Atom 214 Active Nitrogen Atom 216 Top Capacitor Electrode 300 Device 301 Remote Plasma Generator 302 Magnetron 304 Dummy Load 306 Waveguide 308 White Dynamic Tuner 310 Applicator Cavity 3 12 Source 314 Duct 3 16 Duct 318 Gas Delivery System 320 Gas Source 322 Deposition Liquid 324 Evaporator 326 Bypass Valve 328 Bypass Duct 350 Chamber 35 1 Substrate 352 Wafer Support 354 Aluminum Fixture 356 Quartz Window 358 Lamp 360 Vacuum Source 362 RowOut of α 364 Jet head 366 Gas into α 400 Cluster tool 402 Thermal heating equipment 404 Remote plasma generation 406 Transfer chamber 408 Electrode deposition chamber 410 Vacuum isolation chamber 450 Cluster tool 452 Tempering equipment 456 Dielectric deposition device 460 Barrier Deposition equipment 700 Synthetic stack 702 Dioxide pentoxide layer 704 Nitriding barrier layer 706 Top electrode 800 Capacitor film stack 801 Bottom electrode 802 Titanium nitride film 804 Titanium oxide film 806 Dielectric film Page 6 (Please read the note on the back first Please fill in this page again for details) r Mat tl · install ----- r --- order -------- line j This paper size is applicable to China National Standard (CNS) A4 specification (210 X 297 mm) 476128 A7

五、發明說明() 經濟部智慧財產局員工消費合作社印製 850介電質堆登 854氧化鈦膜 856 氮化鈦膜 發明詳細說明_· 本發明描述一用以形成一電容器之整合方法及設 備。於以下說明中,例如特定設備架構及處理參數之多種 特定細節係被說明,以提供對本發明之了解。熟習於本技 藝者將了解使用對於所揭示特定點之其他架構或處理細 節係不脫離本發明之範圍。其他已知半導體製程及設備與 方法係未詳細說明以避免不當地限制本發明。 本發明描述一種用以形成一動態隨機存取記憶體 (DRAM)電容之新穎整合方法與設備。依據本發明之一實 施例’其中具有底金屬電極之基材係放於一沉積室内。 底電極然後曝露至遠端產生氮原子團,以純化該金屬電 極。再者’一咼介電常數金屬氧化物介電層,例如五氧化 ia(Ta〇5)或款(Ti)被掺雜以五氧化|£(Ta〇5)或氧化鈥(τί〇) 係被形成於電極上。金屬氧化物介電膜係然後以為活性氧 原子所遠端產生加以回火。以活性氧原子回火該金屬氧化 物介電層填充於金屬氧化物介電質中之空缺,協助了降低 洩漏電流。 已回火金屬氧化物介電膜可以然後藉由將該膜曝露 至遠端產生之活性氮原子加以鈍化。活性氮原子協助防止 於介電質及金屬原子間之相互作用,該等金屬原子係隨後 用以形成一金屬氮化物阻障層,藉以防止介電層電氣特性 第7貰 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) ---丨訂--------線| (請先閱讀背面之注意事項*<填寫本頁) _裝 pc再填寫太V. Description of the invention () Printed by 850 Dielectric stack 854 Titanium oxide film 856 Titanium nitride film in the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economics. Detailed description of the invention . In the following description, various specific details such as specific equipment architecture and processing parameters are described to provide an understanding of the present invention. Those skilled in the art will appreciate that the use of other architectures or processing details for the specific points disclosed does not depart from the scope of the invention. Other known semiconductor processes and equipment and methods have not been described in detail to avoid unduly limiting the invention. The present invention describes a novel integration method and device for forming a dynamic random access memory (DRAM) capacitor. According to an embodiment of the present invention ', a substrate having a bottom metal electrode is placed in a deposition chamber. The bottom electrode is then exposed to the far end to generate nitrogen radicals to purify the metal electrode. Furthermore, a dielectric constant metal oxide dielectric layer, such as pentoxide (ia (Ta〇5) or paragraph (Ti)), is doped with a pentoxide | (Ta〇5) or oxide '(τί〇) system Is formed on the electrode. The metal oxide dielectric film is then tempered as if the distal end of the active oxygen atom is generated. Tempering the metal oxide dielectric layer with vacancies in the metal oxide dielectric with active oxygen atoms helps reduce leakage current. The tempered metal oxide dielectric film can then be passivated by exposing the film to active nitrogen atoms generated at the distal end. Active nitrogen atoms help prevent interactions between dielectrics and metal atoms. These metal atoms are then used to form a metal nitride barrier layer to prevent the electrical characteristics of the dielectric layer. 7th paper size applies to China Standard (CNS) A4 specification (210 X 297 mm) --- 丨 order -------- line | (Please read the precautions on the back * < fill out this page) _install pc and then fill in too

…1厶Q A7… 1 厶 Q A7

五、發明說明() 經濟部智慧財產局員工消費合作社印製 、丈化。再者,一金屬氮化物阻障層,例如但並不限定於 氮化叙(TaN)或氮化鈦(TiN)係形成於鈍化金屬氧化物介電 貝上。於本發明之一實施例中,阻障層係藉由熱分解一金 屬源,以形成金屬原子及組合該金屬原子與遠端產生活性 氮原子,以形成金屬氮化物阻障層加以形成。金屬氮化物 随障層可以然後曝露至活性氮原子,以氮填充金屬氮化物 膜藉以防止其後續氧化。最後,若有必要,則一頂電極可 以形成於金屬氮化物層上,以完成電容器之製作。 於本發明之一實施例中,金屬氧化物介電質形成步 驟’回火步驟,及阻障層形成步驟發生於一加熱設備之單 一室中,該室係連接以接收由遠端分解室來之活性(反應) 氮及或氧原子。整合介電質形成步驟,回火步驟及阻障層 形成步驟入單一室中,完成了穩定,高品質電容單元予以 形成於晶圓上’並由一晶圓至下一晶圓。利用相同沉積室 於各種層間完成了 一很平之界面,因為基材係未曝露至室 外之氣氛中。另外,利用相同沉積室完成穩定溫度及壓力 分佈產生,因為它們利用完全相同硬體(例如燈,加熱器, 流量控制器及泵等)加以產生。再者,整合上述步驟進入 單一沉積室中,降低了所有者之成本,而完成了更小之足 跡,並較可能利用多個個別獨立室。 於本發明之另一實施例中,金屬氧化物介電沉積步 驟,回火步驟及阻障層製造步驟發生於單一,,叢集工具,,之 個別室中。於此一叢集工具中,一金屬氧化物沉積室,一 回火室,及一阻障物沉積室係均藉由一共同傳送室連接在 第8頁 本紙張尺度適用中國國家標準(CNS)A4規格<210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁) -1. J.. 裝·丨丨丨h丨丨丨訂·丨丨丨—丨丨線丨 ^/0128 A7 五、 經濟部智慧財產局員工消費合作社印製 發明說明() 起、此方式阳圓或基材可以以一減少壓力及/或於惰 性,體耗中,由-室移動至另一室’使得晶圓不會曝露 至氧氣氛或其他污染物中,於電容製作步驟中。 本發明之整合方法與設備完成了高品質高介電常數 金屬氧化物介電層及高品質低電阻金屬氮化物阻障層於 低溫,較低於500。(:,並成為高深寬比開口(大於2 :丨)。 本發明之整合處理完成了加強效能之電容器製造,該加強 效能係於未來幾代超高密度動態隨機存取記憶體(draM) 所需要。本發明之整合處理及設備係期待以完成以密度高 於4Gb之DRAM電容之生產β 形成一雷容之整合設備 可以被用來依據本發明之沉積,回火及鈍化膜之設備 3 0 0之例子係示於第3 a及3 b圖中。可以用以提供活性原 子物種之商業可得之設備例子為應用材料公司之Centura 先進帶純化+(ASP)室。設備300包含一遠端電漿產生器 301,其產生並提供活性原子物種給處理室350 ,其中定位 有係予以鈍化或回火之基材。遠端電漿產生器301包含一 磁控管3 0 2 ’其以一微波源產生微波。磁控管3 0 2較佳產 生至10000瓦之2.5GHz之微波能量。應注意的是,所需 功率量係取決(成比例)於回火室350之大小。對於用以處 理300mm晶圓之回火室,10000瓦之功率應足夠。雖然一 微波源係用以於設備3〇〇中產生電漿’但其他能量源,例 如射頻(RF)也可以使用。 第9頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 x 297公釐)V. Description of the Invention () Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. Furthermore, a metal nitride barrier layer, such as, but not limited to, nitride nitride (TaN) or titanium nitride (TiN) is formed on the passivation metal oxide dielectric layer. In one embodiment of the present invention, the barrier layer is formed by thermally decomposing a metal source to form a metal atom and combining the metal atom with a remote end to generate an active nitrogen atom to form a metal nitride barrier layer. The metal nitride-containing barrier layer can then be exposed to active nitrogen atoms, filling the metal nitride film with nitrogen to prevent its subsequent oxidation. Finally, if necessary, a top electrode can be formed on the metal nitride layer to complete the fabrication of the capacitor. In one embodiment of the present invention, the metal oxide dielectric forming step 'tempering step' and the barrier layer forming step occur in a single chamber of a heating device, and the chambers are connected to receive a remote decomposition chamber. Reactivity (reaction) nitrogen and or oxygen atoms. The integration of the dielectric formation step, the tempering step and the barrier layer formation step into a single chamber completes the stabilization, and high-quality capacitor cells are formed on the wafer 'and from one wafer to the next. A very flat interface was achieved between the various layers using the same deposition chamber because the substrate was not exposed to the atmosphere outside the room. In addition, the same deposition chamber is used to achieve stable temperature and pressure distribution generation, because they are generated using exactly the same hardware (such as lamps, heaters, flow controllers, and pumps). Furthermore, integrating the above steps into a single deposition chamber reduces the cost to the owner, completes a smaller footprint, and is more likely to utilize multiple individual independent chambers. In another embodiment of the present invention, the metal oxide dielectric deposition step, the tempering step, and the barrier layer manufacturing step occur in a single, cluster tool, or individual chamber. In this cluster tool, a metal oxide deposition chamber, a tempering chamber, and a barrier deposition chamber are all connected by a common conveying chamber on page 8. This paper is in accordance with China National Standard (CNS) A4. Specifications < 210 X 297 mm) (Please read the precautions on the back before filling out this page) -1. J .. Packing 丨 丨 丨 h 丨 丨 丨 Ordering 丨 丨 丨 — 丨 丨 Line 丨 ^ / 0128 A7 V. Printed invention description printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. In this way, the sun circle or the substrate can be moved from one room to another with a reduced pressure and / or inertia and physical consumption. In this way, the wafer is not exposed to the oxygen atmosphere or other pollutants during the capacitor manufacturing step. The integration method and equipment of the present invention complete a high-quality high-k dielectric metal oxide dielectric layer and a high-quality low-resistance metal nitride barrier layer at a low temperature, lower than 500. (:, And becomes a high aspect ratio opening (greater than 2: 丨). The integrated processing of the present invention completes the manufacturing of capacitors with enhanced performance, which is required for future generations of ultra-high-density dynamic random access memory (draM) The integrated processing and equipment of the present invention is expected to complete the production of DRAM capacitors with a density higher than 4 Gb β to form a lightning capacity integrated equipment that can be used in accordance with the present invention for deposition, tempering and passivation film equipment 3 0 0 An example is shown in Figures 3a and 3b. An example of a commercially available device that can be used to provide active atomic species is Applied Materials' Centura Advanced Band Purification + (ASP) Chamber. The device 300 contains a remote power supply A plasma generator 301 generates and supplies active atom species to the processing chamber 350, wherein a substrate to be passivated or tempered is positioned. The remote plasma generator 301 includes a magnetron 3 0 2 'which uses a microwave The source generates microwaves. The magnetron 302 preferably generates microwave energy of 2.5 GHz up to 10,000 watts. It should be noted that the amount of power required depends on (proportionally) the size of the tempering chamber 350. For processing 300mm wafer In the tempering chamber, a power of 10,000 watts should be sufficient. Although a microwave source is used to generate plasma in the equipment 300, other energy sources, such as radio frequency (RF), can also be used. Page 9 This paper is for China National Standard (CNS) A4 (210 x 297 mm)

I I 訂 線 476128 A7 B7 i、發明說明( 磁控管302係連接至一隔離器及假負載304 ’其係被 提供用以阻抗匹配。此假負載吸收被反射之功率’使《于供 反射功率會進行至磁控管頭。隔離器及假負載304係為一 波導管306所連接,該波導管傳送微波能量至自動調讀器 308。自動調諧器308係由一阻抗匹配頭及分離之檢測器 模組構成,該檢測器模組使用三個步進馬達阻抗匹配導體 棒以減少微波能量之反射功率被導向電源。自動調諧器 3 08對焦該微波能量至微波施加腔(或室3 10)之中心’使得 能量被饋入至施加腔310中之回火氣體所吸收。雖然’自 動調諧器係較佳的,但一手動調諧器也可以使用。施加器 3 1 0使用由磁控管320所接收到之微波能量,以於回火氣 體流經一位於施加器310内部之石英管時,由該回火氣體 創造一電漿。例如一槽之回火氣體之源3 1 2係連接至微波 施加器3 10,該回火氣體例如但並不限定於〇2,N20,及 N2,用以產生活性原子物種。或者,例如氬(Ar)或氦(He) 之惰性氣體源可以連接至施加器3 1 0。一預點亮水銀燈可 以用以照射紫外線入電漿管内,以部份離子化處理氣體, 藉以使微波能量更垮點火該電漿。 來自磁控管302之微波能量將回火氣體轉換為一電 漿,其係基本上由三成份構成;離子化或帶電原子(原子 團)’電中性活性(反應)原子物種,及非分解回火氣體。例 如’當〇2為回火氣體時’微波能量分解〇2氣體成為氧原 子團,反應氧原子及一些回火氣體殘留為Ο〗分子。當N2 為回火氣體時,微波分解N2氣體成為氮原子團,電氣中 第10頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐)II Order line 476128 A7 B7 i. Description of the invention (The magnetron 302 is connected to an isolator and a dummy load 304 'It is provided for impedance matching. This dummy load absorbs the reflected power' so that "for the reflected power It will proceed to the magnetron head. The isolator and the dummy load 304 are connected by a waveguide 306, which transmits microwave energy to the auto-tuner 308. The auto-tuner 308 consists of an impedance matching head and a separate detection The detector module is composed of three stepping motor impedance matching conductor rods to reduce the reflected power of the microwave energy and is directed to the power source. The auto-tuner 3 08 focuses the microwave energy to the microwave application cavity (or the chamber 3 10). The "center" allows energy to be absorbed by the tempering gas fed into the application cavity 310. Although the "auto tuner is preferred, a manual tuner can also be used. The applicator 3 1 0 is used by the magnetron 320 The microwave energy received is such that when the tempering gas flows through a quartz tube located inside the applicator 310, a plasma is created from the tempering gas. For example, a source of tempering gas 3 1 2 is connected to Microwave Adder 3 10, the tempering gas such as, but not limited to, O2, N20, and N2 for generating active atom species. Alternatively, an inert gas source such as argon (Ar) or helium (He) can be connected to the application The device 3 1 0. A pre-lit mercury lamp can be used to irradiate ultraviolet rays into the plasma tube to partially ionize the gas, so that the microwave energy is broken down and ignite the plasma. The microwave energy from the magnetron 302 will temper the gas. Converted into a plasma, which is basically composed of three components; ionized or charged atoms (atomic groups) 'electrically neutral active (reactive) atomic species, and non-decomposable tempering gases. For example,' When 〇2 is tempering gas When the microwave energy is decomposed, the 02 gas becomes an oxygen atom group, and the reactive oxygen atoms and some tempering gases remain as 0 molecules. When N2 is a tempering gas, the microwave decomposes the N2 gas to become a nitrogen atom group. Applicable to China National Standard (CNS) A4 (210 X 297 mm)

I 訂 線 經濟部智慧財產局員工消費合作社印製 A7I Order Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7

五、發明說明() (請先閱讀背面之注意事項再填寫本頁) 性活性氮原子,及一些回火氣體殘留為N2分子。反應原 子物種,例如反應氧原子或反應氮原子係未帶電或離子 化,但係被高能量電中性原子。因為活性原子物種係為高 能量,它們是呈高反應狀態,使得它們迅速地與介電膜反 應,以填補於其中之空缺或鈍化諸膜或基材。因為原子物 種係於為高能量化,當它們進入回火室350時,於室350 中並不需要高溫,以活化該回火氣體。 施加器3 1 0係栓鎖至室3 5 0之蓋子。集中電漿混合物 流經導管3 1 4至室3 5 0。當電漿流經導管3 1 4時,離子化 原子變成電中性,於其到達室3 5 0前,並變成高反應原子 物種前。因此,只有電中性,高反應原子流入室350中。 雖然於此點中,處理氣體係為高反應性,混合物不再對基 材或電氣裝置,例如形成於其中之電晶體造成損壞。因為 活性原子物種係產生於位置(室300)中,其係與室350分 離或遠離,於室中放置有予以回火之基材,活性原子物種 係被說成遠端產生。 經濟部智慧財產局員工消費合作社印製 例如示於第3 b圖之設備3 0 0之室3 5 0包含一晶圓支 撐件352,用以支撐一晶圓或基材351於室350中面朝上。 晶圓支撐件352可以包含一铭夬具354。室350包含一石 英窗356,經外線輻射係經由該窗來自多數(14個)石英鎢 鹵素燈358傳送。於處理時,直接安裝於處理室下之燈輻 射加熱該夾具’其隨後藉由傳導加熱該晶圓。一閉路溫控 系統使用一安裝於夾具中之熱耦器,感應基材或晶圓之溫 度。溫控系統藉由改變燈358之強度,而調整晶圓之溫度。 第11頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 一 -- ^/ΌΙΖδ Α7V. Description of the invention () (Please read the notes on the back before filling this page) Sexually active nitrogen atoms and some tempering gas residues are N2 molecules. Reactive atom species, such as reactive oxygen atoms or reactive nitrogen atoms, are uncharged or ionized, but are charged with high-energy electrically neutral atoms. Because active atom species are high energy, they are in a highly reactive state, allowing them to react quickly with dielectric films to fill gaps in them or passivate the films or substrates. Because atomic species are highly energetic, when they enter the tempering chamber 350, high temperatures are not required in the chamber 350 to activate the tempering gas. The applicator 3 1 0 is bolted to the lid of the chamber 3 5 0. The concentrated plasma mixture flows through the conduit 3 1 4 to the chamber 3 5 0. As the plasma flows through the conduit 3 1 4, the ionized atoms become electrically neutral, before they reach the chamber 3 50 and before they become highly reactive atom species. Therefore, only electrically neutral, highly reactive atoms flow into the chamber 350. Although the process gas system is highly reactive in this regard, the mixture no longer causes damage to the substrate or electrical devices, such as the transistors formed therein. Since the active atom species is generated in the position (chamber 300), it is separated or separated from the chamber 350, and the substrate to be tempered is placed in the chamber. The active atom species is said to be generated remotely. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, such as the equipment shown in Figure 3b, the room 3 500 includes a wafer support 352 to support a wafer or substrate 351 in the middle of the room 350 Up. The wafer support 352 may include an intaglio tool 354. The chamber 350 contains a stone window 356 through which outside radiation is transmitted from a majority (14) quartz tungsten halogen lamps 358. During processing, a lamp mounted directly under the processing chamber radiates the fixture to heat the wafer, which then heats the wafer by conduction. A closed-circuit temperature control system uses a thermocouple mounted in a fixture to sense the temperature of the substrate or wafer. The temperature control system adjusts the temperature of the wafer by changing the intensity of the lamp 358. Page 11 This paper size is in accordance with China National Standard (CNS) A4 (210 X 297 mm) 1-^ / ΌΙZδ Α7

五、發明說明() 雖然燈係被示為用以加熱夾具之加熱源,但其他加熱源, 例如电阻性加熱器也可以使用。一例如泵之真空源3 係 連接至排乳出口 362並控制室壓並去除空氣副產物。一噴 氣頭或配氣板364係直接安裝於晶圓上。喷氣頭364係由 具有多數孔形成於其中之三個石英板構成,以於活性原子 物種流經氣體入口 366時,均勻分配於晶圓上。 於本發明之較佳實施例中,室3 5 〇係同時架構以接收 沉積氣體’以藉由化學氣相沉積(CVD)沉積一膜。以此方 式’ 一介電膜可以於用以沉積該膜之相同室中回火,或介 電膜可以於其沉積時回火。 經濟部智慧財產局員工消費合作社印製 第3c圖例示一 CVD氣體配送系統3 1 8之例子,其可 以用以提供沉積氣體及回火氣體至室35〇。CVD氣體配送 系統3 1 8係為導管3丨6所連接至導管3丨4。cvD氣體配送 系統3 1 8包含一例如多數槽之氣體源32〇,例如h2,N2, NH3,02,N2〇,其可以用以於室350中沉積或回火膜。 氣體配送系統3 1 8同時包含一沉積液體源322,例如 TAETO,TAT-DME,TIPT,及蒸發器324,以提供用以於 室350中沉積薄膜之蒸發液體,氣體配送系統318同時包 含一旁路閥3 26。於一位置中,旁路閥326允許已蒸發液 體流至導管316並進入室350中。於第二位置中,旁路閥 326將蒸發液體分流入旁路導管328,其係連接至室350 之排氣出口 3 62 »當室350不需要蒸發液體時,旁路閥326 及旁路閥328允許蒸發氣體被導引以排氣。以此方式,可 以一直維持一穩態之蒸發液體流,並可以為室350需要時 第12頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 476128 A7 B7 五、發明說明() 使用。 可以了解的是,例如應用材料公司之p〇ly Centura單 晶圓化學氣相沉積反應腔或應用材料公司之具有蜂巢源 之RTP Centura之其他熱處理室也可以用以代替室35〇。 於本發明如第4 a圖所示之實施例中,一例如示於第 3a圖之加熱備3 00之單一熱式加熱設備402係用以形成一 金屬氧化物介電質’回火該介電質,及或者形成一金屬氮 化物阻障層。熱式加熱設備402係連接以接收來自一遠端 電漿產生器404之活性原子,該產生器係例如示於第3a 圖之遠端電漿產生器。熱式加熱設備402之處理室可以是 一叢集工具400之一部份,該叢集工具包含一真空隔絕室 410, 一傳送室406,及其他沉積室,例如電極沉積室4〇8。 傳送室406可以包含一機械手臂,以傳送晶圓或基材於叢 集工具400之各室之間。於叢集工具400内之每一室包含 有真空可密封室門,連接至傳送室406,以使基材可以傳 送於處理室及傳送室之間。傳送室406可以包含一栗,以 降低於傳送室内之壓力並去除一氧環境。另外,傳送室4〇〇 可以包含一氣體入口,以提供例如N2之不活性環境於傳 送室40 6之中。以此方式,基材可以傳送於叢集工具之各 室間,而不會曝露至氧氣氛中。 於示於第4b圖之另一實施例中,電容製造處理係被 執行於叢集工具450中,其包含分離熱金屬氧化物介電質 沉積設備456,一分離之回火設備452及一分離之阻障層 沉積設備460或其組合。叢集工具450包含例如一傳送室 第13頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) !!1.· (請先閱讀背面之注意事項再填寫本頁) ^ i I I L--- - 訂·----I I --* 經濟部智慧財產局員工消費合作社印製 4761285. Description of the Invention () Although the lamp system is shown as a heating source for heating the fixture, other heating sources, such as resistive heaters, can also be used. A vacuum source 3, such as a pump, is connected to the milk discharge outlet 362 and controls the chamber pressure and removes air by-products. A jet head or gas distribution plate 364 is directly mounted on the wafer. The jet head 364 is composed of three quartz plates having a plurality of holes formed therein, so that when the active atom species flows through the gas inlet 366, it is evenly distributed on the wafer. In a preferred embodiment of the present invention, the chamber 350 is constructed simultaneously to receive a deposition gas' to deposit a film by chemical vapor deposition (CVD). In this way 'a dielectric film may be tempered in the same chamber used to deposit the film, or the dielectric film may be tempered during its deposition. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. Figure 3c illustrates an example of a CVD gas distribution system 3 18, which can be used to provide deposition gas and tempering gas to the chamber 350. The CVD gas distribution system 3 1 8 is connected to the conduit 3 丨 4 by the conduit 3 丨 6. The cvD gas distribution system 3 1 8 includes, for example, a gas source 32o for most tanks, such as h2, N2, NH3, 02, N2O, which can be used to deposit or temper a film in the chamber 350. The gas distribution system 3 1 8 also includes a deposition liquid source 322, such as TAETO, TAT-DME, TIPT, and an evaporator 324 to provide the evaporation liquid used to deposit a thin film in the chamber 350. The gas distribution system 318 also includes a bypass Valve 3 26. In one position, the bypass valve 326 allows the evaporated liquid to flow to the conduit 316 and into the chamber 350. In the second position, the bypass valve 326 diverts the evaporated liquid into the bypass duct 328, which is connected to the exhaust outlet 3 of the chamber 350. »When the chamber 350 does not need the evaporated liquid, the bypass valve 326 and the bypass valve 328 allows the evaporated gas to be directed for exhaust. In this way, a steady stream of evaporating liquid can be maintained at all times, and it can be used for the chamber 350 when required. Page 12 This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 476128 A7 B7 V. Invention Instructions () use. It can be understood that, for example, Polily Centura single-wafer chemical vapor deposition reaction chamber of Applied Materials or other heat treatment chambers of Applied Materials' RTP Centura with honeycomb source can be used instead of chamber 35. In the embodiment of the present invention as shown in Fig. 4a, a single thermal heating device 402 such as the heating device 3 00 shown in Fig. 3a is used to form a metal oxide dielectric 'tempering the medium' A dielectric, and / or a metal nitride barrier layer. Thermal heating device 402 is connected to receive active atoms from a remote plasma generator 404, such as the remote plasma generator shown in Figure 3a. The processing chamber of the thermal heating device 402 may be part of a cluster tool 400 that includes a vacuum isolation chamber 410, a transfer chamber 406, and other deposition chambers, such as an electrode deposition chamber 408. The transfer chamber 406 may include a robotic arm to transfer wafers or substrates between the chambers of the cluster tool 400. Each chamber within the cluster tool 400 includes a vacuum sealable chamber door connected to a transfer chamber 406 so that the substrate can be transferred between the processing chamber and the transfer chamber. The transfer chamber 406 may contain a pump to reduce the pressure in the transfer chamber and remove an oxygen environment. In addition, the transfer chamber 400 may include a gas inlet to provide an inert environment such as N2 in the transfer chamber 406. In this way, the substrate can be transferred between the chambers of the cluster tool without being exposed to an oxygen atmosphere. In another embodiment shown in FIG. 4b, the capacitor manufacturing process is performed in the cluster tool 450, which includes a thermal metal oxide dielectric deposition device 456, a separate tempering device 452, and a separate Barrier layer deposition device 460 or a combination thereof. The cluster tool 450 includes, for example, a transfer room, page 13. The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) !! 1 .. (Please read the precautions on the back before filling this page) ^ i II L ----Order · ---- II-* Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 476128

五、發明說明() 經濟部智慧財產局員工消費合作社印製 458,一真空隔絕室41〇之其他室,並可以包含例如電漿 ,儿積至408 &lt;其他沉積室。金屬氧化物介電質沉積設備 456 ’回火設備452,及金屬氮化物沉積設備46〇可以均為 -熱處理設備’其具有一源,用以遠端地啟始活性原子物 種,例如示於第3a圖之設備3〇〇 一般。雖然本發明將參 考使用示於第3a及3b圖之處理設備加以說明,但明顯 地,也可以利用其他適當處理設備及活性物種產生器。 艰成一電容之整合 一種依據本發明之形成電容的方法將參考第丨及2s 至2h圖加以說明。第丨圖例示一流程圖,其描繪出依據 本發明形成一電容的製程。$ 2a〈h圖例示一基材之剖面 圖,其不出依據本發明之DRAM電容的製作。可以了解的 是,14些特定細節係為本發明之一實施例之例示並不應被 認為用以限定本發明。 用以依據本發明形成一電容之流程圖1〇〇之方塊Η: 所示的第一步驟係提供以具有底電極之基材。為了本發明 ^目的,基材係為薄膜沉積之開始材料並依據本發明 加以處理。 依據本發明,該基材係為用以製造動態隨機存取記憶 體(DRAM)單元之基材,例如示於第&amp;圖之基材2〇〇。基 材200包含已知矽磊晶基材2〇1 ,具有一摻雜區2〇2形成 於其中,及一圖案内介電層204(ILD)形成於其上。一底電 容電極206係形成與擴散區2〇2接觸並在ild2〇4上。底 電容電極206可以藉由已知技術,例如藉由化學氣相 第Η頁 (請先閱讀背面之注意事項再填寫本頁) -J. · r裝-----r---訂----- .線 476128V. Description of the invention () Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs, 458, a vacuum isolation room, and other rooms, and can include, for example, plasma, to 408 &lt; other deposition rooms. The metal oxide dielectric deposition equipment 456 'tempering equipment 452, and the metal nitride deposition equipment 46 may be both-heat treatment equipment' which has a source for remotely starting active atomic species, such as shown in section The equipment in Figure 3a is generally 300. Although the present invention will be described with reference to the processing equipment shown in Figs. 3a and 3b, it is obvious that other suitable processing equipment and active species generators can also be used. Difficult to form a capacitor integration A method of forming a capacitor according to the present invention will be described with reference to Figures 2 and 2s to 2h. FIG. 丨 illustrates a flowchart illustrating a process for forming a capacitor according to the present invention. The $ 2a <h diagram illustrates a cross-sectional view of a substrate, which does not show the fabrication of a DRAM capacitor according to the present invention. It can be understood that the 14 specific details are examples of one embodiment of the present invention and should not be considered as limiting the present invention. Block 100 of the flowchart 100 for forming a capacitor according to the present invention: The first step shown is to provide a substrate with a bottom electrode. For the purposes of the present invention, the substrate is the starting material for thin film deposition and is processed in accordance with the present invention. According to the present invention, the substrate is a substrate for manufacturing a dynamic random access memory (DRAM) cell, for example, the substrate 200 shown in &amp; The substrate 200 includes a known silicon epitaxial substrate 201, having a doped region 202 formed therein, and a patterned dielectric layer 204 (ILD) formed thereon. A bottom capacitor electrode 206 is formed in contact with the diffusion region 202 and on the ild204. The bottom capacitor electrode 206 can be by a known technique, for example, by the chemical vapor phase page ((please read the precautions on the back before filling this page) -J. · R equipment ----- r --- order- ---- .line 476128

(CVD)或濺鍍,而會面性沉積一電極薄膜,然後,藉由已 知微影及蝕刻技術,將該會面沉積材料作出圖案成為電極 加以形成。於本發明之一實施例中,電極2〇6係為矽(多 晶矽)電極,其被摻雜以於2-5 X1〇2〇原子每立方公分之密 度。可以了解的疋,一矽底電極206可以是高表面積半球 晶粒多晶矽(HSG)或,,粗poly,,。於本發明之另一實施例 中,底電極為一由例如但並不限於鎢(w),鈦(Ti),鈕(Ta), 鈦鎢(TiW) ’氮化鈦(TiN)及氮化鎢(WN)之金屬中形成之金 屬電極。於本發明之其他實施例中,單晶矽基材2〇1可以 作為一底電極。 因此,於本發明之實施例中,底電極2〇0包含一外氮 化碎或金屬氮化物層205。若底電極200包含一外矽層, 則氮化矽膜205可以藉由氮化底電極206加以形成。一薄 氮化矽層可以藉由將基材200曝露至室350中之遠端產生 反應氮原子加以形成,同時,基材2 00係被加熱至於700 至900C及立350係被維持於5托耳至2托耳之間。反應 氮原子可以藉由將0.5至2.0slm之n2或氨(NH3)流入空腔 310中,並施加於14〇〇至5000瓦之功率至磁控管302加 以形成,以於空腔310中,由N2及NH3氣體創造一電漿。 氮化處理形成氮化矽只有在矽可以與例如矽電極2 〇 6之反 應氮原子反應之位置,而不在矽不能反應之區域,例如 ILD204上。一合適氮化矽層205可以由一矽電極藉由以遠 端產生反應氮原子,來氮化矽200以30秒至120秒之時 間加以形成。或者,一薄氮化矽層205可以由一矽電極, 第15頁 本紙張尺度適用中國國家標準CCNS)A4規格(210 X 297公爱) (請先閱讀背面之注意事項再填寫本頁) • Ί · a ϋ 1&gt; n n n I n I ϋ ϋ ·ϋ ϋ I - 經濟部智慧財產局員工消費合作社印製 476128 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明() 藉由例如熱氮化之已知技術加以形成,於其中基材2 係 被加熱並曝露至一含氨(NH3)之氣氛中。於本發明之另一 實施例中’一氮化矽阻障層205可以藉由以低壓化學氣沉 積(LPCVD),利用含氨(NH3)及矽烷(SiH4)之化學劑加以全 面沉積一氮化矽膜205。此一沉積技術將沉積氮化矽於基 材200之所有表面上,包含ILD2〇4及電極206上。 或者’若底電極206之最外表面為一金屬膜,例如, 鈥’短及鎢,則一金屬氮化物阻障層(例如TiN,TaN , WN) 可以藉由氮化該基材200加以形成。例如,一薄金屬氮化 物層205可以藉由氮化基材,以於基材2〇〇被加熱時,將 基材200曝露至室350中之遠端產生反應氮原子加以形 成。反應氮原子可以藉由將l-5slm之氮(N2)或氨(NH3)流 入空腔310中,並施加功率至磁控管302,以由N2或NH3 氣體於空腔3 1 0中,創造一電漿加以形成。氮化處理形成 一金屬氮化物層於金屬可與反應氮原子反應之區域上,例 如電極206之外表面並不是沒有金屬可用以反應之區域 上,例如ILD204上。適當之金屬氮化物阻障層205可以 由一金屬電極,藉由以遠端產生反應氮原子加以氮化基材 200於30至120秒之間加以形成。或者,一薄金屬氮化物 阻障層205可以由一金屬電極,以其他已知技術,例如藉 由加熱基材200以熱氮化並曝露該基材2 00至包含氨之氣 氛中加以形成。 再者,如於流程圖100之步驟104所述,於本發明之 一實施例中,基材200係以如於第2b圖所示之遠端產生 第16頁 (請先閱讀背面之注意事項 -Ί . 裝 i I F再填寫本頁) ill· —--訂·丨丨 - 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 476128 A7 五、發明說明( 反應氮原子加以鈍化,以改正於氮化矽或金屬氮化物阻障 物層205之缺陷。氮化矽或金屬氮化物阻障層2〇5可以藉 由放置基材200於室350中之夾具354並加熱基材2〇〇至 於3 00-500間之溫度,於N2回火氣體以〇 5至Mm之速 率饋入空腔310中,及一於14〇〇至5〇〇〇瓦之功率係提供 給磁控管302。來自磁控管3〇2之微波由n2處理氣體中, 於$腔310中創造一電漿。高反應電中性之氮原子2〇7然 後流經導管3 14進入室35〇中,其中鈍化2〇9之氮化物阻 障層205。曝露基材2〇〇係反應氮原子2〇7可以用以以氮 原子填充電容電極206,並藉以防止後續電容電極之氧 化。氮化矽或金屬氮化物阻障層2〇5可以足夠鈍化,藉由 將基材200曝露至遠端產生反應氮原子約3〇至12〇秒之 間。或者,氮化矽阻障層205可以藉由用形成氣體(3-1〇%Η2,及97-90%N2)來替代該N2回火氣體。氫(h2)之加 入協助改正缺陷及去除污染物。 再者,如於方塊106所述,一介電膜係形成於基材200 上。於本發明之一實施例中,一高介電常數膜2〇8係全面 性沉積於基材200之ILD204及底電極206上,如於第2c 圖所示。於本發明之一實施例中,該介電膜係為一過渡金 屬介電膜,例如但並不限定於五氧化钽(Ta205)及氧化鈦 (Ti〇2)。於另一實施例中,介電膜208為一被掺雜以鈦之 五氧化銓膜。另一介電層2 08可以是一合成介電膜,其包 含例如Ta05/Ti02/Ta205堆疊介電膜之不同介電質之堆 疊。另外,介電層208可以是例如鈦酸鋇锶(BST)及锆鈦 第17頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁)(CVD) or sputtering, and an electrode film is deposited on the surface, and then, the surface deposition material is patterned and formed into electrodes by known lithography and etching techniques. In one embodiment of the present invention, the electrode 206 is a silicon (polycrystalline silicon) electrode, which is doped to a density of 2-5 X 1020 atoms per cubic centimeter. It can be understood that a silicon bottom electrode 206 can be a high surface area hemispherical grain polycrystalline silicon (HSG) or, coarse poly ,. In another embodiment of the present invention, the bottom electrode is made of, for example, but not limited to, tungsten (w), titanium (Ti), button (Ta), titanium tungsten (TiW), titanium nitride (TiN), and nitride. A metal electrode formed from tungsten (WN) metal. In other embodiments of the present invention, the single crystal silicon substrate 201 can be used as a bottom electrode. Therefore, in the embodiment of the present invention, the bottom electrode 200 includes an external nitride or metal nitride layer 205. If the bottom electrode 200 includes an outer silicon layer, the silicon nitride film 205 can be formed by nitriding the bottom electrode 206. A thin silicon nitride layer can be formed by exposing the substrate 200 to the far end of the chamber 350 to generate reactive nitrogen atoms. At the same time, the substrate 200 is heated to 700 to 900C and the standing 350 series is maintained at 5 Torr. Ear to 2 Torr. The reactive nitrogen atom can be formed by flowing n2 or ammonia (NH3) of 0.5 to 2.0 slm into the cavity 310, and applying a power of 1400 to 5000 watts to the magnetron 302 to form in the cavity 310, A plasma is created from N2 and NH3 gases. Nitriding is used to form silicon nitride only at the position where silicon can react with, for example, the silicon electrode 206 reaction nitrogen atom, and not in the area where silicon cannot react, such as ILD204. A suitable silicon nitride layer 205 can be formed from a silicon electrode by reacting nitrogen atoms at the distal end to form silicon nitride 200 for 30 to 120 seconds. Alternatively, a thin silicon nitride layer 205 can be composed of a silicon electrode. Page 15 This paper size applies the Chinese National Standard CCNS) A4 specification (210 X 297 public love) (Please read the precautions on the back before filling this page) • Ί · a ϋ 1 &gt; nnn I n I ϋ ϋ · ϋ ϋ I-Printed by the Employees 'Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 476128 A7 B7 Printed by the Employees' Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention () It is formed by a known technique of nitriding, in which the substrate 2 is heated and exposed to an atmosphere containing ammonia (NH3). In another embodiment of the present invention, a silicon nitride barrier layer 205 can be fully deposited by a low pressure chemical gas deposition (LPCVD) using a chemical agent containing ammonia (NH3) and silane (SiH4). Silicon film 205. This deposition technique will deposit silicon nitride on all surfaces of the substrate 200, including ILD204 and electrodes 206. Or 'If the outermost surface of the bottom electrode 206 is a metal film, for example,' short and tungsten, a metal nitride barrier layer (eg, TiN, TaN, WN) can be formed by nitriding the substrate 200. . For example, a thin metal nitride layer 205 can be formed by nitriding the substrate so that when the substrate 200 is heated, the substrate 200 is exposed to the far end of the chamber 350 to generate reactive nitrogen atoms. The reaction nitrogen atom can be created by flowing 1-5slm of nitrogen (N2) or ammonia (NH3) into the cavity 310 and applying power to the magnetron 302 to create N2 or NH3 gas in the cavity 3 1 0. A plasma is formed. The nitridation process forms a metal nitride layer on a region where the metal can react with reactive nitrogen atoms. For example, the outer surface of the electrode 206 is not a region where no metal can be used for the reaction, such as ILD204. A suitable metal nitride barrier layer 205 can be formed from a metal electrode by nitriding the substrate 200 by generating reactive nitrogen atoms at the far end for 30 to 120 seconds. Alternatively, a thin metal nitride barrier layer 205 can be formed from a metal electrode by other known techniques, such as by heating the substrate 200 to thermally nitride and expose the substrate 200 to an atmosphere containing ammonia. Furthermore, as described in step 104 of the flowchart 100, in one embodiment of the present invention, the substrate 200 is generated with a distal end as shown in FIG. 2b. Page 16 (please read the precautions on the back first) -Ί. Install i IF and fill in this page again) ill · ——— Order · 丨 丨-This paper size is applicable to Chinese National Standard (CNS) A4 (210 X 297 mm) 476128 A7 V. Description of the invention (Reactive nitrogen atom Passivation is performed to correct defects in the silicon nitride or metal nitride barrier layer 205. The silicon nitride or metal nitride barrier layer 205 can be heated by placing the substrate 200 in the holder 354 in the chamber 350 and heating The temperature of the substrate is between 2000 and 300-500, and the tempering gas in N2 is fed into the cavity 310 at a rate of 0.05 to Mm, and a power of 14000 to 5000 watts is provided to Magnetron 302. Microwave from magnetron 302 is processed by n2 gas to create a plasma in cavity 310. A highly reactive, electrically neutral nitrogen atom 207 then flows through conduit 3 14 into chamber 35 〇, in which the passivation of the nitride barrier layer 205 of 009. Exposed substrate 2000 series of reactive nitrogen atoms 207 can be used to fill the electricity with nitrogen atoms The electrode 206 is used to prevent subsequent oxidation of the capacitor electrode. The silicon nitride or metal nitride barrier layer 205 can be sufficiently passivated, and by exposing the substrate 200 to the far end, reactive nitrogen atoms are generated for about 30 to 120 seconds. Alternatively, the silicon nitride barrier layer 205 can be used to replace the N2 tempering gas by forming gases (3-10% Η2, and 97-90% N2). The addition of hydrogen (h2) helps correct defects Furthermore, as described in block 106, a dielectric film is formed on the substrate 200. In one embodiment of the present invention, a high-dielectric-constant film 208 is completely deposited on On the ILD 204 and the bottom electrode 206 of the substrate 200, as shown in FIG. 2c. In one embodiment of the present invention, the dielectric film is a transition metal dielectric film, such as but not limited to tantalum pentoxide. (Ta205) and titanium oxide (Ti02). In another embodiment, the dielectric film 208 is a hafnium pentoxide film doped with titanium. The other dielectric layer 208 may be a synthetic dielectric film. It includes a stack of different dielectrics such as a Ta05 / Ti02 / Ta205 stacked dielectric film. In addition, the dielectric layer 208 may be, for example, barium strontium titanate (BST) And Zirconium Titanium Page 17 This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling this page)

裝----l·---訂--------;·線I 經濟部智慧財產局員工消費合作社印製 476128 A7 __ B7 五、發明說明() 酸鉛(PZT)或鐵電性物。 於本發明之另一實施例中,介電層208可以是二氧化 矽,氮化矽,氧氮化矽,或合成氧化物/氮化物介電堆疊, 例如已知ΟΝΟ及NO介電質堆疊。此等氧化物之製作係為 已知並可以用以製造閘介電層及電容介電質。例如,一低 溫二氧化矽膜可以藉由化學氣相沉積加以形成,該化學氣 相沉積使用例如Τ Ε Ο S之硬源及例如〇 2之氧源。一氮化 矽膜可以如上述加以形成。 為了藉由熱化學氣相沉積,以全面沉積一五氧化钽 (Ta2〇5)介電膜,一氣體混合物包含例如如但並不限定於 TAETO[Ta(OC2H5)5]及 TAT-DMAE[Ta(OC2H5)4(OCHCH2N (ch3)2),及例如〇2或n2o之氧源可以饋入一沉積室内, 於基材被加熱至於300-500 °C間之沉積溫度中,及該室被 保持於0.5至10托耳之沉積壓力。於受熱基材上之沉積氣 體流造成金屬有機含鋰前驅物之熱分解,及一後續五氧化 銓膜之沉積。於一實施例中,TAET0或TAT-DMAE係被 饋入室中,以於10-50每分毫克之速度,而02或N20係 以0·3至l.Oslm之速度被饋入室中。TAETO及TAT-DMAE 可以藉由直接液體喷射或於進入沉積室前,以發泡機蒸發 加以提供。例如N2,H2及He之載氣於0.5至2.0slm之速 率可以使用以傳送已蒸發TAETO或TAT-DMAE液體進入 沉積室。沉積係持續,直到形成想要厚度之介電膜508為 止。一具有厚度於50至基材200埃之五氧化鈕(Ta205)之 介電膜提供了適當之電容介電質。 第18頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) &lt;請先閱讀背面之注意事項 裝--- 5再填寫本頁)Packing ---- l · --- Order --------; · Line I Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 476128 A7 __ B7 V. Description of the invention () Lead acid (PZT) or iron Electricity. In another embodiment of the present invention, the dielectric layer 208 may be silicon dioxide, silicon nitride, silicon oxynitride, or a composite oxide / nitride dielectric stack, such as the known ONO and NO dielectric stacks. . The fabrication of these oxides is known and can be used to make gate dielectrics and capacitor dielectrics. For example, a low-temperature silicon dioxide film can be formed by chemical vapor deposition, which uses a hard source such as TEOS and an oxygen source such as 02. A silicon nitride film can be formed as described above. In order to fully deposit a tantalum pentoxide (Ta205) dielectric film by thermochemical vapor deposition, a gas mixture includes, for example, but is not limited to, TAETO [Ta (OC2H5) 5] and TAT-DMAE [Ta (OC2H5) 4 (OCHCH2N (ch3) 2), and an oxygen source such as 〇2 or n2o can be fed into a deposition chamber, the substrate is heated to a deposition temperature between 300-500 ° C, and the chamber is maintained Deposition pressure at 0.5 to 10 Torr. The deposition gas flow on the heated substrate caused the thermal decomposition of the metal organic lithium-containing precursor and the subsequent deposition of a hafnium pentoxide film. In one embodiment, TAET0 or TAT-DMAE is fed into the chamber at a rate of 10-50 milligrams per minute, while 02 or N20 is fed into the chamber at a rate of 0.3 to 1.0 lm. TAETO and TAT-DMAE can be provided by direct liquid spraying or evaporation by a foaming machine before entering the deposition chamber. For example, carrier gases of N2, H2, and He at a rate of 0.5 to 2.0 slm can be used to transfer evaporated TAETO or TAT-DMAE liquid into the deposition chamber. Deposition continues until the dielectric film 508 is formed to the desired thickness. A dielectric film having a pentoxide button (Ta205) having a thickness of 50 to 200 angstroms provides a suitable capacitive dielectric. Page 18 This paper size is in accordance with Chinese National Standard (CNS) A4 (210 X 297 mm) &lt; Please read the precautions on the back first (5-then fill out this page)

訂--------^線I 經濟部智慧財產局員工消費合作社印製 476128 A7 -_ B7 五、發明說明() 吾人發現,氧化氮(N20)使用作為氧化劑(氧源),相反 於氧氣〇2改良了所沉積五氧化鈕(Ta2〇5)介電膜^ N20之 使用相反於〇2,已經被發現可以降低洩漏電流並加強所製 造之電容的電容值。N20之加入作為氧化劑協助了由於膜 成長時,來自該膜之碳之去除,而改良了薄膜之品質。 於本發明之一實施例中,介電層208為被摻雜鈦(Ti) 之五氧化鈕(Ta2〇5)膜。被摻雜以鈦之五氧化鈕膜可以藉由 化學氣相沉積加以形成,該方法係藉由於形成五氧化鈕膜 之同時,提供一例如但並不限於TIPT(C12H2604Ti)之鈦源 進入處理室中。被以適當溶液例如異丙醇(IPA)所適當稀釋 5 0%之TIPT可以藉由直接液體噴入或經由發泡機及例如 N2之載氣的使用而饋入處理室内。一於5-20毫克每分之 稀釋TIPT流率可以用以產生一具有於5-2〇原子百分比之 鈥摻雜密度及於20-40之介電常數之五氧化姮膜。精確Ti 摻雜密度可以藉由相當於鈦源流速改變姮源流速加以控 制。可以了解的是,一被摻雜以鈦原子之五氧化鈕膜展現 了較未摻雜之五氧化鈕膜為高之介電常數。 經濟部智慧財產局員工消費合作社印製 於本發明之另一實施例中,介電層208係為一合成介 電層’其包含不同介電材料,例如Ta2〇5/Ti〇2/Ta〇5堆疊 之堆疊。一 TazOs/TiC^/TazO5合成膜可以首先藉由如上述 地沉積五氧化组膜加以形成。於沉積一具有厚度於20-50 埃之五氧化叙膜後,叙源被停止並以一例如Τίρτ之鈥源 流加以替換,以於每分5-20毫克間之稀釋流速。於沉積 具有厚度於20-50埃之氧化鈦膜後,鈦源係被以鈕源加以 第19頁 本紙張尺度適用中國國家標準(CNS)A4規格(21〇 X 297公釐) 476128 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明() 替換,及沉積源繼續,以形成一第二個五氧化妲膜,其具 有厚度20-50埃。藉由包夾一較高介電常數氧化鈦(Ti02) 模於兩五氧化妲(Ta205)膜之間,合成堆疊之介電常數係增 加,超出均質層之五氧化鋰(Ta205)之介電常數。 再者,如於流程圖100之方塊108所述,介電膜208 係被以遠端產生活性原子物種21 1回火,如於第2d圖所 示,以形成一回火介電層210。介電膜208可以藉由放置 基材200入室350中加以回火,該室350連接至遠端電漿 產生器301。基材200係被加熱至回火溫度並曝露至藉由 分解於施加室310中之回火氣體,所產生之活性原子物種 211。藉由產生於遠離回火室之室内之活性原子物種(基材 係位於該室中),一低溫回火可以在不曝露基材至用以形 成活性原子物種之有害電極下而完成。隨著該處理,本發 明之設備之低於4 0 0 °C之回火溫度可以被使用。所遠端產 生活性原子物種之使用以回火介電膜208使得回火溫度小 於或等於被使用介電膜之沉積溫度。 於本發明之另一實施例中,介電膜208係為一過渡金 屬介電質並以由遠端分解02氣體所形成之反應氧原子加 以回火。介電層208可以回火於室350中,以由提供一包 含2slm之〇2及lslm之N2的回火氣體進入室310中,並 施加於500- 1 500瓦之功率至磁控管302,以產生微波所創 造之反應氧原子,這使得一電漿由回火氣體激發。或者, 反應氧原子可以藉由將一回火氣體包含2slm之〇2及3slm 之氬(Ar)流入空腔310中加以形成》於反應氧原子被饋入 第20頁 本紙張尺度適^中國國家標準(CNS)A4規格(210 X 297公釐) ' (請先閱讀背面之注意事項再填寫本頁) 1 裝 L----訂-! —I! 476128 A7 五、發明說明() 回火室350中時,基材200係被加熱至於3〇〇°c之溫度, 及室350被維持於約2托耳之回火壓力。介電層2〇8可以 藉由將基材200曝露至反應氧原子於30-120秒之間而加 以足夠地回火。 例如氮(NO或氬(Ar)之惰性氣體係較佳包含於回火氣 體流中,以協助防止反應原子物種之再結合。應注意的 是,當原子物種(例如反應氧原子)由施加器腔3丨〇行進至 回火室3 5 0時’它們彼此相互碰撞並再結合,以形成ο〕 分子。藉由包含一惰性氣體於回火氣體混合物中,惰性氣 體不會分解,而提供了活性原子物種可以碰撞而不會再結 合之原子。(應注意的是,於500- 1 500瓦間之功率的n2 並不會分解,並可以被認為是一惰性氣體)。另外,為了 協助防止反應原子物種之再結合,較佳於腔3 1 0及回火室 3 5 0間之距離係被儘可能地短。 以反應原子氧回火過渡金屬介電膜208填充了於介電 膜208中之氧空缺(滿足位置),而大大地降低了膜之戌 漏。另外,回火過渡金屬介電質208協助以去除於膜中之 可能造成戍漏之碳(C)。碳可以被併入過渡金屬介電質 中,因為鋰及鈦源,TAT-DMAE,TAETO,及TIPT均為 含破化合物。反應氧原子由該膜,藉由與礙反應並形成二 氧化碳(C〇2)蒸汽而去除碳,該二氧化碳蒸汽隨後由室中 排出。 第5圖例示將五氧化鈕介電膜曝露至遠端產生反應氧 原子係如何地改良沉積膜之品質及電氣效能。線502示出 第21頁Order -------- ^ Line I Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 476128 A7 -_ B7 V. Description of the invention () I found that nitrogen oxide (N20) is used as an oxidant (oxygen source), instead The use of O2 to modify the deposited pentoxide (Ta205) dielectric film ^ N20 is used in contrast to 02, and it has been found that it can reduce the leakage current and enhance the capacitance value of the manufactured capacitor. The addition of N20 as an oxidant helps to improve the quality of the film due to the removal of carbon from the film as the film grows. In one embodiment of the present invention, the dielectric layer 208 is a pentoxide (Ta205) film doped with titanium (Ti). The titanium pentoxide button film doped with titanium can be formed by chemical vapor deposition. The method is to provide a titanium source such as but not limited to TIPT (C12H2604Ti) into the processing chamber while forming the pentoxide button film. in. TIPT, which is appropriately diluted 50% with a suitable solution such as isopropyl alcohol (IPA), can be fed into the processing chamber by direct liquid injection or via a foaming machine and the use of a carrier gas such as N2. A diluted TIPT flow rate of 5-20 mg / min can be used to generate a hafnium pentoxide film with a doping density of 5-20 atomic percent and a dielectric constant of 20-40. The precise Ti doping density can be controlled by changing the hafnium source flow rate corresponding to the titanium source flow rate. It can be understood that a pentoxide button film doped with titanium atoms exhibits a higher dielectric constant than an undoped pentoxide button film. Printed in another embodiment of the present invention by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, the dielectric layer 208 is a synthetic dielectric layer which contains different dielectric materials, such as Ta205 / Ti〇2 / Ta. 5 stacked stacks. A TazOs / TiC ^ / TazO5 composite film can first be formed by depositing a pentoxide film as described above. After depositing a pentoxide film having a thickness of 20-50 angstroms, the source is stopped and replaced with a source stream such as Τρρτ, to a dilution flow rate of 5-20 mg per minute. After depositing a titanium oxide film with a thickness of 20-50 angstroms, the titanium source is applied with a button source. Page 19 This paper is sized for the Chinese National Standard (CNS) A4 (21〇X 297 mm) 476128 A7 B7 Economy Printed by the Consumer Cooperative of the Ministry of Intellectual Property Bureau. 5. Description of the invention () Replacement, and the deposition source continues to form a second hafnium pentoxide film, which has a thickness of 20-50 angstroms. By sandwiching a titanium oxide (Ti02) with a higher dielectric constant between two kinds of hafnium pentoxide (Ta205) films, the dielectric constant of the synthetic stack increases, exceeding the dielectric of lithium pentoxide (Ta205) in the homogeneous layer. constant. Furthermore, as described in block 108 of the flowchart 100, the dielectric film 208 is tempered by generating an active atomic species 21 1 at the far end, as shown in FIG. 2d, to form a tempered dielectric layer 210. The dielectric film 208 can be tempered by placing the substrate 200 into a chamber 350, which is connected to a remote plasma generator 301. The substrate 200 is heated to a tempering temperature and exposed to an active atomic species 211 generated by decomposing the tempering gas in the application chamber 310. With active atom species generated in a room remote from the tempering chamber (the substrate is located in the chamber), a low temperature tempering can be accomplished without exposing the substrate to the harmful electrodes used to form the active atom species. With this treatment, the tempering temperature of the device of the invention below 400 ° C can be used. The use of living atomic species to temper the dielectric film 208 makes the tempering temperature less than or equal to the deposition temperature of the dielectric film used. In another embodiment of the present invention, the dielectric film 208 is a transition metal dielectric and is tempered with reactive oxygen atoms formed by the remote decomposition of 02 gas. The dielectric layer 208 may be tempered in the chamber 350 to provide a tempered gas containing 2 slm 0 2 and lslm N 2 into the chamber 310 and apply a power of 500-1 500 watts to the magnetron 302, In order to generate reactive oxygen atoms created by microwaves, a plasma is excited by a tempering gas. Alternatively, the reactive oxygen atoms can be formed by flowing a tempering gas containing argon (Ar) of 2 slm and 3 slm into the cavity 310. The reactive oxygen atoms are fed into page 20. This paper is suitable for China Standard (CNS) A4 specification (210 X 297 mm) '(Please read the precautions on the back before filling this page) 1 Pack L ---- Order-! -I! 476128 A7 V. Description of the invention () Tempering While in the chamber 350, the substrate 200 is heated to a temperature of 300 ° C, and the chamber 350 is maintained at a tempering pressure of about 2 Torr. The dielectric layer 208 can be sufficiently tempered by exposing the substrate 200 to reactive oxygen atoms between 30-120 seconds. An inert gas system such as nitrogen (NO or argon (Ar)) is preferably included in the tempering gas stream to help prevent the recombination of reactive atomic species. It should be noted that when atomic species (such as reactive oxygen atoms) When the cavity 3 travels to the tempering chamber 3500, they collide with each other and recombine to form molecules. By providing an inert gas in the tempering gas mixture, the inert gas does not decompose, and provides Active atom species can collide without recombining atoms. (It should be noted that n2 with a power of 500-1 500 watts does not decompose and can be considered an inert gas.) In addition, to help prevent Recombination of reactive atom species is preferably as short as possible between the cavity 3 10 and the tempering chamber 350. The dielectric film 208 is filled with a reactive atom oxygen tempered transition metal dielectric film 208 Oxygen vacancies (satisfying position) greatly reduce the leakage of the film. In addition, the tempered transition metal dielectric 208 assists in removing carbon (C) that may cause leakage in the film. Carbon can be combined Into transition metal dielectric Because of the lithium and titanium sources, TAT-DMAE, TAETO, and TIPT are all decomposable compounds. Reactive oxygen atoms are removed from the membrane by reacting with the barrier and forming carbon dioxide (C02) vapor, which is subsequently removed by It is discharged from the chamber. Fig. 5 illustrates how exposing the pentoxide button dielectric film to the far end to generate reactive oxygen atoms can improve the quality and electrical performance of the deposited film. Line 502 shows page 21

先 閲 背 面 之 注 意Η 事* 項 I裳 頁I I 訂 經濟部智慧財產局員工消費合作社印製Please read the note on the back side of the page first * Printed on page I I Order printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs

五、發明說明() 具有1 00埃心未回火五氧化銓介電膜之電容的洩漏電流係 如何隨著不同頂電極電壓而變化。線504顯示具有100埃 足五氧化姮介電膜以遠端產生反應氧原子回火之電容的 洩漏電流係如何隨著不同頂電極電壓加以變化。由線502 看出,一利用未回火五氧化妲介電質之電容,當土15伏 施加至頂電極時,經歷約lxl(rl(安每平方公分)之高淺漏 電流,及當0伏施加至頂電極時,具有lxl〇-6(安每平方 公分高洩漏電流。相比下,當五氧化銓介電質被曝露 至运糕產生反應氧原子時,當±15伏施加至頂電極時, 經歷約1Χ10·5(安每平方公分)之相當低洩漏電流,及當〇 伏施加至頂電極時,具有i χ 10·9(安每平方公分)之洩漏電 流。可以由第5圖明顯看出,將五氧化鈕曝露至遠端產生 活性氧原子劇烈地改良(降低)薄膜之洩漏電流。 經濟部智慧財產局員工消费合作社印製 於本發明之一實施例中,如於流程圖i 〇〇之方塊1 〇7 中所述’沉積步驟106及回火步驟1〇8同時發生,使得介 電膜於其沉積時被回火。一介電膜可以使用連接以接收來 自遠端電漿產生器源之遠端電漿及連接以接收沉積氣體 混合物之單一沉積/回火室,而被同時沉積並回火。於本發 明之實施例中,一包含例如TAT-DMAE或TIPT之金屬 源,或例如TEOS之矽源,及例如〇2或n2〇之氧源的沉 積氣體混合物可以饋入一共同回火/沉積室中,於基材被加 入至想要沉積溫度及室被維持於一想要沉積壓力。同時 地,一例如〇2之回火氣體可以被以於0.5至2slm之速率, 被供給入遠端電漿產生器3 〇〇之施加器空腔室310中。反 第22頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X ^97公f 476128 A7 B7 五、發明說明() 應氧原子然後由室3丨0流入回火沉積室。反應氧原子然後 與由沉積氣體混合物所提供之金屬或矽反應,以分別形成 一金屬氧化物或矽氧化物化合物。於本發明之一實施例 中,只有進入沉積/回火室350之氧源係為來自施加器310 之反應氧原子。 再者,如於方塊110及第2e圖所示,在沉積一金屬 氮化物膜前,介電層208係以遠端產生高反應氮原子213 加以鈍化。金屬氧化物介電質210可以藉由放置基材200 進入罜350中,然後,將基材200曝露至由分解含氮氣體 所形成之高反應氮原子2 1 0加以鈍化,該含氮氣例如但並 不限定於遠端電漿產生器300之分解室31〇之n2及NH3。 將基材200曝露至遠端產生活性氮化原子,以氮原子鈍化 了介電層208。以活化氮原子鈍化介電層208防止了於後 續金屬氮化物沉積步驟所提供之金屬原子擴散入介電膜 中,並造成薄膜特性之不可控制變化。 例如,若一氮化(TiN)膜予以形成於一五氧化鈕(Ta〇5) 介電膜上,若介電膜並未先以活性氮原子鈍化,則鈦可能 擴散入五氧化纽膜,並形成氧化欽化合物,這可能影響了 該膜之電氣特性。藉由開始時以活性氮原子2丨3加以鈍化 該介電膜2 1 0,氮係可迅速地與金屬原子反應,藉以防止 金屬原子擴散入介電膜,並造成薄膜特性之不想要的改 變。 介電膜210可以於基材200被加熱至於350-450 °C間 之一溫度,及室350被維持於低於1〇托耳之壓力時,藉 第23頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) -----丨^---Ί—取裝 (請先閱讀背面之注意事項 寫本頁) l·---訂--------Γ—線i 經濟部智慧財產局員工消費合作社印製 476128 A7 B7 五、發明說明( 由將基材200曝露至高反應氮原子於10-60秒間,而足夠 地鈍化。反應氮原子可以藉由將l-5slm之N2或NH3氣體 饋入施加器310中,並以微波或RF分解該氣體加以形成。 再者,如於流程圖100之方塊102及第2g圖所示, 一金屬氮化物膜212係形成於氮鈍化介電膜210上。 於本發明之一實施例中,金屬氮化膜2 1 2係為由熱化 學氣相沉積法所形成之氮化鈦。一氮化鈦膜可以藉由熱化 學氣相沉積於介電層208上加以形成,藉由於基材200被 加熱至於550-680 °C間之一溫度之同時,提供四氨化鈦 (TiCl4)及氨(NH3)進入沉積室350中加以形成。TiCl4可以 藉由直接喷氣或使用發泡機加以饋入沉積室室350中。來 自基材200之熱量造成四氯化鈦(TiCl4)分解,並提供鈦原 子並造成氨(NH3)分解並提供氮原子。氮原子及鈦原子然 後組合在一起,以形成氮化欽膜。 於本發明之較佳實施例中,TiCl4流係被饋入室350 中,於氨(NH3)流進入室350之前。於此方式中,基材200 為富鈦,及足夠鈦係可以用以與氨反應,於其流入室中之 同時。當氨(NH3)進入室中時,其分裂成為氮,N-H分子 及氫原子。若氫原子能與金屬氧化物介電質反應,它們可 以還原金屬氧化物(Ta05)成為金屬(Ta),這造成金屬氧化 物介電質具有高洩漏。藉由以鈦飽和基材200於開始氨 (NH3)流之前,氮化欽立即形成並防止氫還原金屬氧化物 介電質。 為了依據本發明之另一實施例,以沉積一金屬氮化物 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 請 先 閱 讀 背 面 之 注V. Description of the Invention () How the leakage current of a capacitor with a 100 angstrom untempered hafnium pentoxide dielectric film changes with different top electrode voltages. Line 504 shows how the leakage current of a capacitor having a 100 angstrom osmium pentoxide dielectric film tempered with reactive oxygen atoms at the far end varies with different top electrode voltages. It can be seen from line 502 that a capacitor using untempered holmium pentoxide dielectric, when soil 15 volts is applied to the top electrode, experiences a high shallow leakage current of about lxl (rl (Amps / cm2)), and when 0 When the volt is applied to the top electrode, it has a high leakage current of lxl0-6 (Amps / cm2). In contrast, when the holmium pentoxide dielectric is exposed to a transport oxygen to produce reactive oxygen atoms, when ± 15 volts is applied to the The electrode experiences a relatively low leakage current of about 1 × 10 · 5 (Amps / cm 2), and has a leakage current of i χ 10 · 9 (Amps / cm 2) when 0 volts is applied to the top electrode. The figure clearly shows that exposing the pentoxide button to the far end produces active oxygen atoms to drastically improve (reduce) the leakage current of the film. The employee consumer cooperative of the Intellectual Property Bureau of the Ministry of Economics is printed in one embodiment of the present invention, as in the process The 'deposition step 106' and the tempering step 108 described in Figure 1 〇〇 〇 〇 0 simultaneously occur, so that the dielectric film is tempered during its deposition. A dielectric film can be connected to receive from the far end Remote plasma of plasma generator source and connection to receive sink A single deposition / tempering chamber of the gas mixture is simultaneously deposited and tempered. In an embodiment of the present invention, a metal source such as TAT-DMAE or TIPT, or a silicon source such as TEOS, and The deposition gas mixture of an oxygen source of n20 can be fed into a common tempering / deposition chamber, where the substrate is added to the desired deposition temperature and the chamber is maintained at a desired deposition pressure. At the same time, for example, a Tempering gas can be fed into the applicator cavity 310 of the remote plasma generator 300 at a rate of 0.5 to 2 slm. The page size of this paper applies the Chinese National Standard (CNS) A4 specification (210 X ^ 97 male f 476128 A7 B7 V. Description of the invention () The oxygen atoms then flow into the tempering deposition chamber from the chamber 3 丨 0. The reactive oxygen atoms then react with the metal or silicon provided by the deposition gas mixture to separate A metal oxide or silicon oxide compound is formed. In one embodiment of the present invention, only the oxygen source entering the deposition / tempering chamber 350 is a reactive oxygen atom from the applicator 310. Furthermore, as in block 110 and As shown in Figure 2e, In the case of a nitride film, the dielectric layer 208 is passivated by generating a highly reactive nitrogen atom 213 at the far end. The metal oxide dielectric 210 can be placed into the plutonium 350 by placing the substrate 200, and then the substrate 200 is exposed to The high-reaction nitrogen atoms 2 10 formed by decomposing a nitrogen-containing gas are passivated, and the nitrogen-containing gas is, for example, but not limited to, n2 and NH3 in the decomposition chamber 31 of the remote plasma generator 300. The substrate 200 is exposed to Active nitride atoms are generated at the far end, and the dielectric layer 208 is passivated with nitrogen atoms. Passivating the dielectric layer 208 with activated nitrogen atoms prevents the metal atoms provided in the subsequent metal nitride deposition step from diffusing into the dielectric film and causing Uncontrollable changes in film properties. For example, if a nitride film (TiN) is formed on a pentoxide (Ta05) dielectric film, if the dielectric film is not first passivated with active nitrogen atoms, titanium may diffuse into the pentoxide film, And the formation of oxide compounds, which may affect the electrical characteristics of the film. By inactivating the dielectric film 2 10 with active nitrogen atoms 2 丨 3 at the beginning, the nitrogen system can quickly react with metal atoms, thereby preventing metal atoms from diffusing into the dielectric film and causing unwanted changes in film characteristics. . The dielectric film 210 can be heated to a temperature between 350-450 ° C when the substrate 200 is maintained, and the chamber 350 is maintained at a pressure lower than 10 Torr. CNS) A4 size (210 X 297 mm) ----- 丨 ^ --- Ί—Pick-up (please read the precautions on the back to write this page) l · --- Order ------- -Γ—line i Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 476128 A7 B7 V. Description of the invention (by exposing the substrate 200 to a high reactive nitrogen atom for 10-60 seconds, it is sufficiently passivated. The reactive nitrogen atom can be obtained by 1 to 5 slm of N2 or NH3 gas is fed into the applicator 310, and the gas is formed by microwave or RF decomposition. Furthermore, as shown in block 102 and 2g of flowchart 100, a metal nitride film 212 is formed on the nitrogen passivation dielectric film 210. In one embodiment of the present invention, the metal nitride film 2 1 2 is a titanium nitride film formed by a thermochemical vapor deposition method. A titanium nitride film may It is formed by thermochemical vapor deposition on the dielectric layer 208. Since the substrate 200 is heated to a temperature between 550-680 ° C, Titanium tetramine (TiCl4) and ammonia (NH3) are formed into the deposition chamber 350. TiCl4 can be fed into the deposition chamber 350 by direct jet or using a foaming machine. Heat from the substrate 200 causes tetrachloride Titanium (TiCl4) decomposes and provides titanium atoms and causes ammonia (NH3) to decompose and provides nitrogen atoms. The nitrogen atoms and titanium atoms are then combined to form a nitride film. In a preferred embodiment of the present invention, TiCl4 The stream system is fed into the chamber 350 before the ammonia (NH3) stream enters the chamber 350. In this manner, the substrate 200 is titanium-rich, and sufficient titanium system can be used to react with ammonia while flowing into the chamber. When ammonia (NH3) enters the chamber, it splits into nitrogen, NH molecules and hydrogen atoms. If the hydrogen atoms can react with the metal oxide dielectric, they can reduce the metal oxide (Ta05) to metal (Ta), which causes The metal oxide dielectric has a high leakage. By saturating the substrate 200 with titanium before the ammonia (NH3) flow is started, nitriding forms and prevents hydrogen from reducing the metal oxide dielectric. In accordance with another aspect of the present invention, Example to deposit a metal nitrogen This paper was applicable scale Chinese National Standard (CNS) A4 size (210 X 297 mm) please first read the note on the back of reading

項 ί裝 頁IItem ί Pack Page I

I 1Τ i I 經濟部智慧財產局員工消費合作社印製 476128 A7 B7 五、發明說明( 膜,一例如但並不限定於金屬有機前驅物,例如I 1Τ i I Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 476128 A7 B7 V. Description of the invention (film, such as but not limited to metal organic precursors, such as

TiPT(C12H26〇4Ti),TAETO[Ta(OC2H5)5],TAT-DMAE[Ta (oc2h5)4(ochch2n(ch3)2)之金屬原子源係與形成於分解 室310中之活化氮原子一起饋入沉積室350中。來自基材 200之熱量使得金屬有機前驅物分解並提供金屬原子,其 與高活性氮原子組合,以形成一金屬氮化物薄膜2 1 2。基 材之沉積溫度應足夠,以熱分解該金屬源,而不必使用其 他分解源,例如電漿或光子加強。 於本發明之一實施中,沉積溫度(基材之溫度)係加以 選擇,以用於金屬氮化物膜之阿尼圖之&quot;斜線”區域。例 如,第6圖示出用於金屬氮化物之阿尼圖,其中薄膜之沉 積率係以沉積溫度(1 /T)之反相加以繪製。如於第6圖所 示,於沉積溫度大於Ts時,沉積速率為定值,而當溫度 低於Ts時(即繪圖中之斜線部份602),沉積速率隨著沉積 溫度降低而減少。藉由操作沉積溫度於”斜線區域π,則具 有高活性氮原子之金屬反應並未立即可知。藉由降低沉積 溫度及減緩反應,則金屬原子可以於與高活性氮原子反應 前,進入高深寬比開口。以此方式,大於2: 1,甚至高至 5 : 1之高深寬比開口可以可靠地被填以金屬氮化物薄膜。 於基材被加熱至於3 5 0-4 50 °C間之沉積溫度,同時, 於室310中之活化氮原子係被以l-5slm之速率饋入室350 中時,一氮化鈦(TiN)膜可以藉由將以下鈦有機前驅物,例 如但並不限定於TiPT(C12H2604Ti)以每分以5至100毫克 之速度通入沉積室250中加以形成。活化氮原子可以藉由 第25頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐)The metal atom source system of TiPT (C12H26〇4Ti), TAETO [Ta (OC2H5) 5], TAT-DMAE [Ta (oc2h5) 4 (ochch2n (ch3) 2) is fed with the activated nitrogen atom formed in the decomposition chamber 310 Into the deposition chamber 350. The heat from the substrate 200 decomposes the metal-organic precursor and provides metal atoms, which are combined with highly active nitrogen atoms to form a metal nitride film 2 1 2. The substrate should be deposited at a temperature sufficient to thermally decompose the metal source without using other sources such as plasma or photon reinforcement. In one implementation of the present invention, the deposition temperature (the temperature of the substrate) is selected for use in the &quot; slanted &quot; area of the Anitto for metal nitride films. For example, FIG. 6 illustrates the use for metal nitrides. The Ani diagram, in which the deposition rate of the thin film is plotted as the inverse of the deposition temperature (1 / T). As shown in Figure 6, when the deposition temperature is greater than Ts, the deposition rate is a fixed value, and when the temperature is low At Ts (ie, the oblique line portion 602 in the drawing), the deposition rate decreases as the deposition temperature decreases. By operating the deposition temperature in the “slanted region π”, the metal reaction with highly active nitrogen atoms is not immediately known. By lowering the deposition temperature and slowing the reaction, the metal atoms can enter the high aspect ratio openings before reacting with the highly reactive nitrogen atoms. In this way, openings with aspect ratios greater than 2: 1 and even up to 5: 1 can be reliably filled with metal nitride films. When the substrate is heated to a deposition temperature between 3 5 0-4 50 ° C, and the activated nitrogen atom in the chamber 310 is fed into the chamber 350 at a rate of 1-5 slm, titanium nitride (TiN) The film can be formed by passing the following titanium organic precursor, such as, but not limited to, TiPT (C12H2604Ti) into the deposition chamber 250 at a rate of 5 to 100 mg per minute. Activated nitrogen atoms can be obtained on page 25. This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)

I 訂 經濟部智慧財產局員工消費合作社印製 476128 A7 B7 五、發明說明() 將l-5slm之N2或NH3饋入室310中,並以微波或RF分 解氣體加以產生。鈦有機前驅物可以藉由直接液體噴射或 經由使用發泡機加以饋入室3 1 0之中。此等條件可以於高 深寬比開口中,以每分於10至100埃之速率產生均勻及 保角氮化鈦膜。 一氮化妲膜可以藉由將例如但並不限定於I Order Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 476128 A7 B7 V. Description of the invention () Feed 1-5slm of N2 or NH3 into the chamber 310 and generate it with microwave or RF decomposed gas. The titanium organic precursor can be fed into the chamber 3 1 0 by direct liquid jetting or by using a foaming machine. These conditions can produce a uniform and conformal titanium nitride film in a high aspect ratio opening at a rate of 10 to 100 angstroms per minute. A hafnium nitride film can be formed by, for example, but not limited to

TAETO[Ta(OC2H5)5]及 TAT-DMAE[Ta(OC2H5)4(OCHCH2N (C HU)2)之鈕有機前驅物通入沉積室35〇中,以每分於1〇-50毫克之速率進行,於基材被加熱至於35〇·5001間之一 沉積溫度時,具有於丨-5托耳之沉積室壓力,同時活化氮 原子係被饋入沉積室350中,以l-5slm之速率進行之同 時。活化氮原子可以藉由將Usim之N2或NH3饋入室3 10 中’並以微波及於其間施加一功率分解氣體加以產生。钽 有機前驅物可以藉由直接液體喷射或經由使用發泡機加 以饋入室350之中。 應可以了解的是,利用本發明之預氮鈍化步驟,金屬 氮化物膜之沉積可以簡單地開始金屬前驅物流入室室 3 5 0 ’同時活性氮原子持續由氮鈍化步驟饋入開始。 於一足夠厚金屬氮化膜212沉積後,該沉積被停止。 於本發明之一實施例中,金屬氮化物膜2丨2係被形成至於 30-100埃間之一厚度。 於本發明之如方塊104中所述及於形成金屬氮化物膜 後之如於第2g圖所示之一較佳實施例中,金屬氮化物膜 係曝露至遠端產生活性氮原子。藉由曝露金屬氮化物膜 第26頁 本紙張尺度適用_國國家標準(CNS)A4規格⑽x 297公爱) (請先閱讀背面之注意事項 裝---- 寫本頁) l· —訂--------τι 線' 經濟部智慧財產局員工消費合作社印製 476128 A7 B7 五、發明說明() 212至活性氮原子214,氮原子係被填入金屬氮化物膜 2 1 2。將氮原子填入金屬氮化物膜防止了金屬原子(例如Ti 或Ta)與氧反應’這會造成由於金屬氧化物化合物,例如 TiON及TaON之加入,而增加了金屬氮化物膜之電阻。 一金屬氮化物膜可以藉由將活性氮原子馈入沉積室 350中於10-60秒間,以於l-5slm之速率,於基材被加熱 至於3 5 0 - 4 5 0 °C之溫度之同時,被填充以氮原子。活化氮 原子可以藉由將l-5slmN2或NH3饋入室310中並以微波 或RF分解該氣體加以產生。 如於流程圖1 00之方塊1 1 6所述之本發明之下一步驟 為完成裝置之處理。例如,於第2e圖所示,若想要的話, 一頂電容電216可以形成於金屬氮化物層212上。任何已 知技術可以用以形成頂電極2 1 6,其包含全面沉積金屬 膜,例如鎢於金屬氮化物阻障層2 1 2上,然後,使用已知 微影術及蚀刻技術以對電極膜,金屬氮化物膜2 1 2及介電 層20 8作出圖案。吾人想要將金屬氮化物阻障層212之使 用於一例如五氧化鋰之金屬氧化物介電膜介電層20 8及一 金屬電極216之間,因為這防止由電容電極216來之金屬 由金屬氧化物介電質介電層208上拉出氧分子並創造電荷 空缺,而造成了高洩漏電流。 本發明之處理及方法可以用以製造一大量特有之電 容器膜堆疊或結構,其已經展現了優秀之效能。於本發明 之一實施例中,一氮化is (TaN)膜係形成於五氧化钽(Ta205) 膜及氮化鈦(TiN)膜之間。例如,第7圖例示一合成堆疊 第27頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) ' (請先閱讀背面之注意事項相填寫本頁) 裝 ϋ ϋ ϋ n》rJ_ I I n n I ϋ ϋ 9 · 兮0 « 經濟部智慧財產局員工消費合作社印製 476128 Α7 Β7 五、發明說明() 700,其包含一五氧化鋰介電層7〇2形成於一底電極上。 一氮化鋰阻障層704係形成於五氧化妲介電層上。一氮化 欽之頂電極706或具有氮化鈦底層之頂電極係形成於該氮 化每阻障層704之上。TazOVTaN/TiN堆疊700已經於電 容DRAM中展現了極端優良之低洩漏電流。 於本發明之另一實施例中,一氧化鈦(Ti〇)膜係形成 於氮化鈥膜及一五氧化鈕(TazO5)介電膜之間。例如,第8a 圖例示一新穎電容膜堆疊800,其係包含一具有一氮化钦 膜802形成於其上之底電極8〇1。一氧化鈦(Ti0)膜804係 形成於氮化鈦膜802上。五氧化钽(Ta205)介電膜806係形 成於氧化欽膜804之上。於另一實施例中,如於第gb圖 所示,一電容介電堆疊850包含一五氧化钽(Ta2〇5)介電膜 806。一氧化鈦(TiO)膜854係形成於一五氧化鋰(Ta2〇5) 介電膜806及一氮化鈦(TiN)膜856係形成於氧化鈦(Ti0) 膜8 54上。可以迅速地了解,吾人可以形成包含第8a及 8b圖之堆疊之電容堆疊,以形成一 TiN/Ti0/Ta205 /TiO/TiN電容。藉由將一氧化鈥膜於氮化鈇及五氧化輕膜 之間’吾人可以提供一具有改良薄膜界面之電容堆疊,該 界面增加了電容效能及可靠性。 新穎方法與設備已經加以說明,這完成了高品質,高 介電常數及金屬氧化物介電層及高品質,低電阻金屬氮化 物層於低於50(TC之低溫及高深寬比(大於2 : 1)開口之形 成與整合。本發明之整合處理及設備完成了用於超高密度 動態隨機存取記憶體之加強效能電容器的製造。 第28頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) fmm ϋ fr ατ ϋ 0 (請先閱讀背面之注意事項再填寫本頁) ^-----r---^--------Γ- ^ 經濟部智慧財產局員工消費合作社印製 476128 A7 B7 經濟部智慧財產局員工消費合作社印製TAETO [Ta (OC2H5) 5] and TAT-DMAE [Ta (OC2H5) 4 (OCHCH2N (C HU) 2) button organic precursors are introduced into the deposition chamber 35, at a rate of 10-50 mg per minute When the substrate is heated to a deposition temperature of 350.0500, it has a deposition chamber pressure of 丨 -5 Torr, and the activated nitrogen atom system is fed into the deposition chamber 350 at a rate of 1-5 slm. At the same time. The activated nitrogen atom can be generated by feeding N2 or NH3 of Usim into the chamber 3 10 ', and applying a power decomposition gas in the microwave and in between. The tantalum organic precursor can be fed into the chamber 350 by direct liquid jetting or by using a foaming machine. It should be understood that with the pre-nitrogen passivation step of the present invention, the deposition of a metal nitride film can simply begin the metal precursor flow into the chamber 3 5 0 ′ while the active nitrogen atoms continue to be fed from the nitrogen passivation step. After a sufficiently thick metal nitride film 212 is deposited, the deposition is stopped. In one embodiment of the present invention, the metal nitride film 21 is formed to a thickness between 30 and 100 angstroms. In a preferred embodiment of the present invention as described in block 104 and after forming the metal nitride film as shown in FIG. 2g, the metal nitride film is exposed to the far end to generate active nitrogen atoms. By exposure of metal nitride film, page 26, this paper is applicable _ National Standard (CNS) A4 size ⑽ x 297 public love) (Please read the precautions on the back first-write this page) l · —Order- ------- τι line 'Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 476128 A7 B7 V. Description of the invention () 212 to active nitrogen atoms 214, the nitrogen atom system is filled in the metal nitride film 2 1 2. Filling the nitrogen atom into the metal nitride film prevents the metal atom (such as Ti or Ta) from reacting with oxygen. This causes the resistance of the metal nitride film to be increased due to the addition of metal oxide compounds such as TiON and TaON. A metal nitride film can be heated by feeding active nitrogen atoms into the deposition chamber 350 for 10-60 seconds at a rate of 1-5 slm on the substrate to a temperature of 3 50-4 50 ° C. At the same time, it is filled with nitrogen atoms. Activated nitrogen atoms can be generated by feeding 1-5 slmN2 or NH3 into the chamber 310 and decomposing the gas by microwave or RF. The next step of the invention as described in block 1 16 of flow chart 100 is to complete the processing of the device. For example, as shown in FIG. 2e, a top capacitor 216 may be formed on the metal nitride layer 212 if desired. Any known technique can be used to form the top electrode 2 1 6, which includes a comprehensive deposition of a metal film, such as tungsten on a metal nitride barrier layer 2 1 2, and then, using known lithography and etching techniques to counter the electrode film The metal nitride film 2 1 2 and the dielectric layer 20 8 are patterned. I want to use the metal nitride barrier layer 212 between a metal oxide dielectric film dielectric layer 20 8 such as lithium pentoxide and a metal electrode 216 because this prevents the metal from the capacitor electrode 216 The metal oxide dielectric dielectric layer 208 pulls out oxygen molecules and creates a charge vacancy, resulting in a high leakage current. The process and method of the present invention can be used to make a large number of unique capacitor film stacks or structures, which have demonstrated excellent performance. In one embodiment of the present invention, a nitride is (TaN) film is formed between a tantalum pentoxide (Ta205) film and a titanium nitride (TiN) film. For example, Figure 7 illustrates a synthetic stack on page 27. The paper size is applicable to the Chinese National Standard (CNS) A4 (210 X 297 mm). '(Please read the precautions on the back first and fill out this page) Decoration ϋ ϋ n 》 RJ_ II nn I ϋ ϋ 9 · xi0 «Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs and the Consumer Co-operative Society 476128 Α7 Β7 V. Description of the invention (700), which contains a lithium pentoxide dielectric layer 702 formed on a bottom electrode on. A lithium nitride barrier layer 704 is formed on the hafnium pentoxide dielectric layer. A nitride top electrode 706 or a top electrode having a titanium nitride bottom layer is formed on the nitride per barrier layer 704. TazOVTaN / TiN stack 700 has demonstrated extremely good low leakage current in capacitive DRAM. In another embodiment of the present invention, a titanium oxide (Ti0) film is formed between the nitride film and a TazO5 dielectric film. For example, FIG. 8a illustrates a novel capacitive film stack 800 including a bottom electrode 801 having a nitride film 802 formed thereon. A titanium oxide (Ti0) film 804 is formed on the titanium nitride film 802. A tantalum pentoxide (Ta205) dielectric film 806 is formed on the oxide film 804. In another embodiment, as shown in FIG. Gb, a capacitor dielectric stack 850 includes a tantalum pentoxide (Ta205) dielectric film 806. A titanium oxide (TiO) film 854 is formed on the lithium pentoxide (Ta205) dielectric film 806 and a titanium nitride (TiN) film 856 is formed on the titanium oxide (Ti0) film 8 54. It can be quickly understood that we can form a capacitor stack including the stacks of Figures 8a and 8b to form a TiN / Ti0 / Ta205 / TiO / TiN capacitor. By placing an oxide film between hafnium nitride and a light pentoxide film, we can provide a capacitor stack with an improved thin film interface, which increases the capacitance performance and reliability. Novel methods and equipment have been explained, which completes high quality, high dielectric constant and metal oxide dielectric layers and high quality, low resistance metal nitride layers at temperatures lower than 50 (TC low temperature and high aspect ratio (greater than 2) : 1) Formation and integration of openings. The integrated processing and equipment of the present invention completes the manufacture of enhanced performance capacitors for ultra-high-density dynamic random access memory. Page 28 This paper applies Chinese National Standard (CNS) A4 Specifications (210 X 297 mm) fmm ϋ fr ατ ϋ 0 (Please read the precautions on the back before filling in this page) ^ ----- r --- ^ -------- Γ- ^ Economy Printed by the Employees 'Cooperatives of the Ministry of Intellectual Property Bureau 476128 A7 B7 Printed by the Employees' Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs

Claims (1)

經濟部智慧財產局員工消費合作社印製 476128 A8 B8 C8 D8 六、申請專利範圍 1. 一種製造一裝置之方法,該方法至少包含步驟: 放置一具有金屬膜之基材於一第一處理室内; 於第二室内產生活性氮原子,其中第二室係與第一 室分離開; 將於該第一室内之金屬膜曝露至該活性氮原子;及 形成一金屬氧化物介電質於該被曝露金屬膜之活性 氮原子上。 2. 如申請專利範圍第1項所述之方法,其中上述之金屬膜 係由包含鎢,氮化鎢,氮化鈦及鈦鎢構成之群組中選 出。 3. 如申請專利範圍第1項所述之方法,其中上述之活性氮 原子係由包含N2之回火氣體所形成。 4. 如申請專利範圍第1項所述之方法,其中上述之活性氮 原子係由一含氨(NH3)之回火氣體形成。 5. —種用以形成一半導體裝置的方法,該方法至少包含步 驟: 形成一金屬氧化物介電質於一基材上; 形成一氧化鈥膜於該金屬氧化物介電質上; 形成一氮化鈦層於該氧化鈦膜上。 第30頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁) ▼裝---.-----訂----- A8B8C8D8 經濟部智慧財產局員工消費合作社印製 六、申請專利範圍 6.如申請專利範圍第5項所述之方法,其中上述之金屬氧 化物係為五氧化鋰(Ta05)。 7·如申請專利範圍第5項所述之方法,其中上述之金屬氧 化物介電質係由壓電材料及鐵電材料構成之群組中選 出。 8. 一種用以形成一半導體裝置之方法,該方法至少包含步 驟: 形成一氮化鈦膜於一基材上; 形成一氧化鈦膜於該氧化鈦膜上; 形成一金屬氧化物介電質於該氧化鈦膜上。 9·如申請專利範圍第8項所述之方法,其中上述之金屬氧 化物介電質為五氧化钽。 1 〇 ·如申請專利範圍第9項所述之方法,更包含步驟: 形成一氧化鈥膜於該五氧化艇膜上;及 形成一氮化鈦膜於該氧化鈦膜上。 11. 一種形成一電容器的方法,該方法至少包含步騾: 提供一具有底電極之基材; 形成一金屬氧化物介電質膜於該底電極上; 以遠端產生活性原子物種,回火該金屬氧化物介電 第31頁 本紙週用中國國家標準(CNS)A4規格(210 X 297公釐) ---”— (請先閱讀背面之注意事項再填寫本頁)Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 476128 A8 B8 C8 D8 VI. Patent Application Scope 1. A method for manufacturing a device, the method at least includes the steps of: placing a substrate with a metal film in a first processing chamber; An active nitrogen atom is generated in the second chamber, wherein the second chamber is separated from the first chamber; a metal film in the first chamber is exposed to the active nitrogen atom; and a metal oxide dielectric is formed in the exposed chamber. On the active nitrogen atom of the metal film. 2. The method according to item 1 of the scope of patent application, wherein the above-mentioned metal film is selected from the group consisting of tungsten, tungsten nitride, titanium nitride, and titanium tungsten. 3. The method according to item 1 of the scope of patent application, wherein the above-mentioned active nitrogen atom is formed of a tempering gas containing N2. 4. The method according to item 1 of the scope of patent application, wherein the above-mentioned active nitrogen atom is formed of a tempering gas containing ammonia (NH3). 5. A method for forming a semiconductor device, the method includes at least the steps of: forming a metal oxide dielectric on a substrate; forming an oxide film on the metal oxide dielectric; forming a A titanium nitride layer is formed on the titanium oxide film. Page 30 This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling out this page) ▼ 装 ---.----- Order --- -A8B8C8D8 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. 6. Patent application scope. 6. The method described in item 5 of the patent application scope, wherein the metal oxide is lithium pentoxide (Ta05). 7. The method according to item 5 of the scope of patent application, wherein the above-mentioned metal oxide dielectric is selected from the group consisting of a piezoelectric material and a ferroelectric material. 8. A method for forming a semiconductor device, the method comprises at least the steps of: forming a titanium nitride film on a substrate; forming a titanium oxide film on the titanium oxide film; forming a metal oxide dielectric On this titanium oxide film. 9. The method according to item 8 in the scope of the patent application, wherein the metal oxide dielectric is tantalum pentoxide. 10. The method according to item 9 of the scope of patent application, further comprising the steps of: forming an oxide film on the pentoxide film; and forming a titanium nitride film on the titanium oxide film. 11. A method for forming a capacitor, the method comprising at least the steps of: providing a substrate having a bottom electrode; forming a metal oxide dielectric film on the bottom electrode; generating an active atom species at a remote end, and tempering The metal oxide dielectric is on page 31. This paper uses Chinese National Standard (CNS) A4 specifications (210 X 297 mm) per week --- "— (Please read the precautions on the back before filling this page) 4/()128 A8B8C8D8 六、申請專利範圍 質膜; (請先閱讀背面之注意事項再填寫本頁) 形成一金屬氮化物阻障廣於該已回火金屬氧化物介 電質膜上。 1 2 ·如申請專利範圍第11項所述之方法,更包含步驟: 於形成該金屬氮化物阻障層前,將該金屬氧化物介 電質層曝露至遠端產生活性氮原子。 1 3 ·如申請專利範圍第U項所述之方法,更包含步騾: 於形成該金屬氮化物層後,將該金屬氮化物阻障層 曝露至遠端產生氮原子團。 1 4.如申請專利範圍第11項所述之方法,其中上述之底電 極為一金屬電極。 1 5 ·如申請專利範圍第11項所述之方法,更包含步驟: 於形成該金屬氧化物介電質層前,將該底電極曝露 至遠端產生活性原子物種。 經濟部智慧財產局員工消費合作杜印制衣 16·—種形成一電容器的方法,該方法至少包含步驟: 將一具有底電極之基材放於一處理室内; 將於該處理室内之基材加熱; 沉積一金屬氧化物介電質膜於處理室内之底電極 第32頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 丄/δ A8B8C8D8 、申請專利範圍 以形成於分解室内之活性原子物種,回火於該處理 室内之金屬氧化物介電質膜; 形成一金屬氮化物阻障層於該處理室内之已回火金 屬氧化物介電質膜上。 17·如申請專利範圍第16項所述之方法,更包含步驟: 於沉積該金屬氧化物介電質前,將於處理室内之底 電極曝露至形成於分解室内之活性原子物種。 18·如申請專利範圍第16項所述之方法,更包含步騾: 於形成該金屬氮化物阻障層前,將仍在該處理室内 之金屬氧化物介電質層曝露至形成於分解室内之活性 氮原子。 19·如申請專利範圍第16項所述之方法,更包含步驟: 將該仍在處理室内之金屬氮化物阻障層曝露至形成 於分解室内之活化氮原子。 20·如申請專利範圍第16項所述之方法,其中上述之金屬 氧化物介電質膜包含五氧化钽。 2 1 ·如申請專利範圍第1 9項所述之方法,其中上述之金屬 亂化物阻障層係氮化輕(TaN)。 第33頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁) ▼裝---·-----訂--------Ί線秦 經濟部智慧財產局員工消費合作社印製 4/0128 A8 B8 C8 D84 / () 128 A8B8C8D8 6. Scope of patent application Plasma film; (Please read the precautions on the back before filling this page) The formation of a metal nitride barrier is wider than the tempered metal oxide dielectric film. 1 2. The method according to item 11 of the scope of patent application, further comprising the step of: exposing the metal oxide dielectric layer to a remote end to generate active nitrogen atoms before forming the metal nitride barrier layer. 1 3 · The method as described in item U of the patent application scope, further comprising the step of: after forming the metal nitride layer, exposing the metal nitride barrier layer to the far end to generate a nitrogen atom group. 14. The method according to item 11 of the scope of patent application, wherein the bottom electrode is a metal electrode. 15. The method according to item 11 of the scope of patent application, further comprising the step of: before forming the metal oxide dielectric layer, exposing the bottom electrode to a remote end to generate an active atom species. Consumers ’cooperation with the Intellectual Property Bureau of the Ministry of Economic Affairs Du printed clothing 16. A method for forming a capacitor, the method includes at least the steps of: placing a substrate with a bottom electrode in a processing chamber; and placing the substrate in the processing chamber Heating; Deposition of a metal oxide dielectric film in the bottom electrode of the processing chamber page 32 This paper size applies Chinese National Standard (CNS) A4 specifications (210 X 297 mm) 丄 / δ A8B8C8D8, the scope of patent application to form in Decompose the active atom species in the chamber and temper the metal oxide dielectric film in the processing chamber; form a metal nitride barrier layer on the tempered metal oxide dielectric film in the processing chamber. 17. The method according to item 16 of the scope of patent application, further comprising the step of: exposing the bottom electrode of the processing chamber to the active atom species formed in the decomposition chamber before depositing the metal oxide dielectric. 18. The method described in item 16 of the scope of patent application, further comprising the step of: exposing the metal oxide dielectric layer still in the processing chamber to the formation in the decomposition chamber before forming the metal nitride barrier layer Active nitrogen atom. 19. The method according to item 16 of the scope of patent application, further comprising the step of: exposing the metal nitride barrier layer still in the processing chamber to activated nitrogen atoms formed in the decomposition chamber. 20. The method according to item 16 of the scope of patent application, wherein the metal oxide dielectric film comprises tantalum pentoxide. 2 1 · The method according to item 19 of the scope of patent application, wherein the above-mentioned metal chaos barrier layer is light nitride (TaN). Page 33 This paper size is in accordance with Chinese National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling this page) ▼ 装 --- · ----- Order --- ----- Printed by the Consumers' Cooperative of the Intellectual Property Bureau of the Qin Qin Ministry of Economic Affairs 4/0128 A8 B8 C8 D8 六、申請專利範圍 22. 如申請專利範圍第21項所述之方法,其中上述之頂電 極包含一下氮化鈦(TiN)層。 23. 如申請專利範圍第16項所述之方法1中上述之金屬 乳'物介電質膜係藉由-方法形成,該方法包含步驟: 提供一金屬有機前驅物進入處理室内; 提供活化氮原子氧原子團進入該處理室内; 其中該活化氧原子係藉由分解於分解室内之含氧氣 體加以形成; ' 於該處理室内熱分解該金屬有機前驅物,以形成金 屬原子;及 組合該金屬原子與該活性氧原子團,以形成該金屬 氧化物介電質膜。 24. 如申請專利範圍第16項所述之方法,更包含將該底電 極曝露至形成於分解室内之活性氮原子。 25·—種形成一電容器的方法,該方法至少包含步驟: 將一具有底電極之基材放於一叢集工具之第—沉# 室内; 形成一金屬氧化物介電質膜於第一沉積室内之底電 極上; 於傳送室仍於一降低壓力時’將基材由第一沉積室 經由一傳送室移動至一回火室; 第34頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閲讀背面之注意事項再填寫本頁) ▼装---·-----訂-------- 經濟部智慧財產局員*x消費合作社印製 經濟部智慧財產局員工消費合作社印製 476128 A8 B8 C8 D8 六、申請專利範圍 以形成於第一分解室内之活性原子物種,回火於該 回火室内之金屬氧化物介電質; 於該傳送室仍於一降低壓力時,將基材由該回火室 經由該傳送室移到一第二沉積室;及 形成一金屬氮化物阻障層於該已回火金屬氧化物介 電質上。 26.如申請專利範圍第25項所述之方法,其中上述之金屬 氧化物介電質膜係藉由一方法形成,該方法包含步驟: 提供一金屬有機前驅物進入該第一沉積室内; 提供活化氧原子團進入該第一沉積室内,其中該活 化原子團係藉由分解於一第三分解室内之含氧氣體加 以形成; 於該第一沉積室内熱分解該金屬有機前驅物,以形 成金屬原子;及 組合該金屬原子與該活化氧原子,以形成該金屬氧 化物介電質膜。 27·—種形成一電容器的方法,該方法至少包含步驟: 加熱一具有底電極之基材; 將該底電極曝露至遠端產生之第一活性原子物種; 於已曝露之底電極之第一活性原子物種上形成一金 屬氧化物介電質膜; 以遠端產生活化氧原子,回火該金屬氧化物介電質 第35肓 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 一 (請先閱讀背面之注意事項再填寫本頁) 一 elm n .n a— n I 1-*-reJ 1 ammmw ϋ n n n —^a . 476128 A8 B8 C8 D8 六、申請專利範圍 膜; 將該已回火金屬氧化物介電質層曝露至遠端產生活 性氮原子; 形成一金屬氮化物阻障層於曝露金屬氧化物介電質 膜之活性氮原子上; 將金屬氮化物阻障層曝露至遠端產生活性氮原子; 及 形成一頂閘電極於該曝露金屬氮化物阻障上之活性 氮原子上。 (請先閱讀背面之注意事項再填寫本頁) 擊裝---.-----訂--------:*線| 經濟部智慧財產局員工消費合作社印製 第36頁 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐)6. Scope of patent application 22. The method described in item 21 of the scope of patent application, wherein the top electrode mentioned above comprises a titanium nitride (TiN) layer. 23. The metal emulsion 'material dielectric film described in method 1 described in item 16 of the scope of patent application is formed by a method comprising the steps of: providing a metal organic precursor into a processing chamber; providing activated nitrogen Atomic oxygen radicals enter the processing chamber; wherein the activated oxygen atoms are formed by decomposing the oxygen-containing gas in the decomposition chamber; '' thermally decompose the metal organic precursor in the processing chamber to form metal atoms; and combine the metal atoms And the active oxygen atom group to form the metal oxide dielectric film. 24. The method described in item 16 of the scope of patent application, further comprising exposing the bottom electrode to an active nitrogen atom formed in a decomposition chamber. 25 · —A method for forming a capacitor, the method includes at least the steps of: placing a substrate with a bottom electrode in a first chamber of a cluster tool; forming a metal oxide dielectric film in a first deposition chamber; On the bottom electrode; while the transfer chamber is still at a reduced pressure, 'the substrate is moved from the first deposition chamber through a transfer chamber to a tempering chamber; page 34 This paper size applies the Chinese National Standard (CNS) A4 specification ( 210 X 297 mm) (Please read the precautions on the back before filling out this page) ▼ Packing --- · ----- Order -------- Member of the Intellectual Property Bureau of the Ministry of Economic Affairs * x Printed by Consumer Cooperatives Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 476128 A8 B8 C8 D8 6. Apply for a patent to form active atom species formed in the first decomposition chamber, and temper the metal oxide dielectric in the tempering chamber; While the chamber is still at a reduced pressure, the substrate is moved from the tempering chamber through the transfer chamber to a second deposition chamber; and a metal nitride barrier layer is formed on the tempered metal oxide dielectric. 26. The method of claim 25, wherein the metal oxide dielectric film is formed by a method comprising the steps of: providing a metal organic precursor into the first deposition chamber; providing Activated oxygen radicals enter the first deposition chamber, wherein the activated radicals are formed by decomposing an oxygen-containing gas in a third decomposition chamber; the metal-organic precursor is thermally decomposed in the first deposition chamber to form metal atoms; And combining the metal atom and the activated oxygen atom to form the metal oxide dielectric film. 27. A method of forming a capacitor, the method comprising at least the steps of: heating a substrate having a bottom electrode; exposing the bottom electrode to a first active atom species generated at a remote end; A metal oxide dielectric film is formed on the active atom species; the activated oxygen atoms are generated at the far end, and the metal oxide dielectric is tempered. The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297). Mm) 1. (Please read the precautions on the back before filling out this page) 1. elm n .na— n I 1-*-reJ 1 ammmw ϋ nnn — ^ a. 476128 A8 B8 C8 D8 6. Apply for patent scope film; Exposing the tempered metal oxide dielectric layer to the far end to generate active nitrogen atoms; forming a metal nitride barrier layer on the active nitrogen atoms exposing the metal oxide dielectric film; blocking the metal nitride The layer is exposed to the far end to generate active nitrogen atoms; and a top gate electrode is formed on the active nitrogen atoms on the exposed metal nitride barrier. (Please read the precautions on the back before filling out this page) Click-to-install .---------- Order: * line | Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs and Consumer Cooperatives Page 36 This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)
TW089119692A 1999-09-24 2000-09-22 Integrated method and apparatus for forming an enhanced capacitor TW476128B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US40586099A 1999-09-24 1999-09-24

Publications (1)

Publication Number Publication Date
TW476128B true TW476128B (en) 2002-02-11

Family

ID=23605542

Family Applications (1)

Application Number Title Priority Date Filing Date
TW089119692A TW476128B (en) 1999-09-24 2000-09-22 Integrated method and apparatus for forming an enhanced capacitor

Country Status (4)

Country Link
EP (1) EP1087426A2 (en)
JP (1) JP2001250929A (en)
KR (1) KR20010030487A (en)
TW (1) TW476128B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115206929A (en) * 2021-04-09 2022-10-18 中芯国际集成电路制造(上海)有限公司 Semiconductor structure and method for forming semiconductor structure

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020168847A1 (en) * 2001-05-09 2002-11-14 Applied Materials, Inc. Methods of forming a nitridated surface on a metallic layer and products produced thereby
KR100437618B1 (en) * 2002-05-21 2004-06-30 주식회사 하이닉스반도체 METHOD FOR FORMING SEMICONDUCTOR CAPACITOR USING (Ta-Ti)ON DIELECTRIC THIN FILM
JP4372443B2 (en) 2003-04-01 2009-11-25 東京エレクトロン株式会社 Processing apparatus and processing method
US8813325B2 (en) 2011-04-12 2014-08-26 Intermolecular, Inc. Method for fabricating a DRAM capacitor
US8815677B2 (en) 2011-06-14 2014-08-26 Intermolecular, Inc. Method of processing MIM capacitors to reduce leakage current
JP2013021012A (en) * 2011-07-07 2013-01-31 Renesas Electronics Corp Semiconductor device manufacturing method
JP5882075B2 (en) * 2012-02-06 2016-03-09 東京エレクトロン株式会社 Capacitor manufacturing method, capacitor, and dielectric film forming method used therefor
US11769789B2 (en) 2019-03-28 2023-09-26 Intel Corporation MFM capacitor with multilayered oxides and metals and processes for forming such

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115206929A (en) * 2021-04-09 2022-10-18 中芯国际集成电路制造(上海)有限公司 Semiconductor structure and method for forming semiconductor structure

Also Published As

Publication number Publication date
EP1087426A2 (en) 2001-03-28
KR20010030487A (en) 2001-04-16
JP2001250929A (en) 2001-09-14

Similar Documents

Publication Publication Date Title
US6518203B2 (en) Method and apparatus for integrating a metal nitride film in a semiconductor device
US20020009861A1 (en) Method and apparatus for the formation of dielectric layers
US6204203B1 (en) Post deposition treatment of dielectric films for interface control
JP2002231656A (en) Method for manufacturing semiconductor integrated circuit device
TW476128B (en) Integrated method and apparatus for forming an enhanced capacitor
US6525364B1 (en) Capacitor for semiconductor memory device and method of manufacturing the same
JP2001203339A (en) Method of manufacturing capacitor of semiconductor element
US6640403B2 (en) Method for forming a dielectric-constant-enchanced capacitor
US6218300B1 (en) Method and apparatus for forming a titanium doped tantalum pentaoxide dielectric layer using CVD
US6387748B1 (en) Semiconductor circuit constructions, capacitor constructions, and methods of forming semiconductor circuit constructions and capacitor constructions
US20070264770A1 (en) Capacitor forming method
KR100772531B1 (en) Method for fabricating capacitor
KR100342873B1 (en) Method for forming capacitor of semiconductor device
KR100382742B1 (en) Method for forming capacitor of semiconductor device
KR20070106286A (en) Method of forming titanium oxide with rutile structure and method of manufacturing capacitor using the same
US6716717B2 (en) Method for fabricating capacitor of semiconductor device
KR100761406B1 (en) Method for fabricating capacitor with tantalum oxide
KR20020048619A (en) Method for forming capacitor
JPH10135233A (en) Method of reforming high-dielectric const. film and heat-treating apparatus using the same
KR20010020024A (en) Method For Treating The High Temperature Of Tantalium Oxide Capacitor

Legal Events

Date Code Title Description
GD4A Issue of patent certificate for granted invention patent
MM4A Annulment or lapse of patent due to non-payment of fees