TW471126B - Manufacturing method for dual damascene of copper connection - Google Patents

Abstract

An innovative manufacturing method for dual damascene of copper connection which is characterized in that after removing the etch stop layer at the bottom of the via, the plasma processing with the gas containing nitrogen and hydrogen is performed to replace the oxygen portion in the oxide layer on the sidewall of the via. Therefore, during the cleaning within the wet bench, it will be easier to be etched with an acid solution so that the whole profile of the sidewall of the via can be smoother. By the above described method, the undesired effect at the undercut of the via can be greatly reduced.

Description

'Fifth, the invention said

471T2B Yu Yiyi is about a method of making an internal connection, especially related to; a method of manufacturing a double-t steel connection. The double damascene process has been widely used in the production of copper connection lines.筮 彳 A! N the same ship-cabin a has been widely used in post-pak-chia 1 min. 1 ~ 1 D picture display is not double embedded semiconductor copper process: knife: wide return: of which '1 is a semiconductor substrate , 2 is a copper metal layer, 3 is chaotic. Stone is used as a diffusion barrier layer (di f fusion rr = r and an etching stop layer at the bottom of the via hole) of the copper metal layer 2. "Privilege" mainly uses nitride stone Xi 5 as the intermediate I engraved termination layer

Cet ^ chmg stop layer), so that the insulating layer 6 and the insulating layer 4 are lined up, such as a thin layer, USG, FSG, etc.) to form a section with a p-white ladder ^ (or τ type) as shown in Figure U. In addition, the substrate 3 is terminated by bottom etching to prevent the above-mentioned copper metal layer 2 from being contaminated by the remaining etching. The area of the opening a is mainly to define the pattern or trench of the upper layer wire; and the area of the opening b is mainly to define the via hole, which is used to form the `` s $ of the upper layer wire and the substrate connection. After completing the cross-sectional structure shown in Figure 丨 A, the dry silicon or wet etching method is used to remove the silicon nitride layer 3 in the opening b (while removing the silicon nitride layer 5 in the opening a #) to expose the copper metal layer 2 As shown in Figure ΐβ. Next, a barrier layer 7, such as a TaN layer, is deposited, as shown in FIG. 1C. Next, a copper metallization process is performed to complete the double-process semiconductor copper process. As shown in FIG. 1D, the symbol 8 represents a copper metal layer. Λ ,: and 'when using dry or wet touch engraving to remove the silicon nitride layer 3 (and the silicon nitride layer 5 in the opening a) exposed in the opening dagger to expose the steel metal layer 2, An undercut or notch will be formed on the silicon nitride layer 3 at the bottom of the via hole (ie, the bottom of the opening b), as shown in the cutl and

471126 V. Description of the invention quot " '~ "--cj 12 For the " layer / same bottom (ie the bottom of the opening b), its step coverage is inherently poor; therefore, When the sedimentation barrier (TaN) 7 is invisible, because the cutl (and cut2) portion cannot be attached and covered by τ & N, it is easy for the sedimentation of the TaN layer to be discontinuous (discontinuous); This is shown in Figure 2β. After the barrier layer 7 is formed, a copper seed 0 "(1 copper) must be formed on the TaN layer before the pvD method can be used to deposit copper through the seed to complete a good quality copper metallization process. And, two copper metals are filled in the openings a and b (refer to Figures 丨 C and 1 D). However, since the TaN layer is apt to be disconnected in the cutl (and cut2) portion of the cut; therefore, the copper metal is completed After the metallization process, copper metal may not be deposited in the cutl (cut2) part of the opening b, but instead a hole (vooid) structure is formed, as shown in Figure 2C, the holes void and void2. In subsequent processes In addition, since other heating cycles are required, the heating process will cause the grain structure of the copper metal to reorganize, which will cause the hole structure to change in the interstitial holes (opening b). The copper metal 8 at the bottom of the via hole and the copper metal layer 2 and the barrier layer 7 in the substrate 1 may be disconnected or the connection may be unstable; as shown in Figure 2D. In addition, if it is a subsequent test process Medium, because there are often tests The thermal energy generated by the flow through the copper metal 8 at the bottom of the via will also cause the grain structure of the copper metal to reorganize. Finally, the above-mentioned disconnection or instability may also occur. From the above, it can be known that the bottom of the via is The formation of the cut cu 11 and the hole may cause the copper metal 8 at the bottom of the via to be unable to be electrically connected to the copper metal layer in the substrate 1;

丄 丄 发明 5. Description of the invention (3) The yield and stability of the product are seriously affected. In view of this, the present invention proposes a method, which is mainly to remove the diffusion barrier layer manufactured by the copper connection at the bottom of the via hole. ), It is replaced by the oxide layer on the side wall of the via hole with nitrogen, VIII, 9 (also steel metal texture); because of A, it is carried out using an acid bath: = the composition is etched by the nitrogen component neodymium. The cuts are the same as the bottom; the incision 3 3 = the size of the liquid is reduced. 疋 Adverse effects can be achieved by Dafa In order to achieve the above purpose, the present invention is used to improve the integrity of copper embedding. The next step is: ° layer. /, A piece and a copper wire are formed on it (b) sequentially opened >> a first insulation layer X s a second insulation layer, a second metal layer "the first metal interlayer The electrical layer and the p-th layer; the electrical layer is on the semiconductor substrate. The second insulation is exposed, in which the above-mentioned households and the first belong to the gatekeeper's [the first metal interlayer dielectric layer and the second insulation description: An electrical layer to form a first-on. An insulating layer. The metal layer opening exposes the second insulating layer ... In the layer and the second opening, the above-mentioned second metal interlayer dielectric, e) is removed: one electric two structure: up the ladder / (the first In the second and second middle school: the above-mentioned absolute must, and the above-mentioned rf X ^ ——, and the edge layer to expose the above-mentioned copper wire layer. (F) the electric paddle treatment containing nitrogen and hydrogen into the lamp.

471126 V. Description of the invention (4) (g) Use an acidic solution to perform cleaning procedures to remove the contamination on the copper wire layer, etch the sidewall of the first interlayer dielectric layer, and enlarge the first opening. Of its width. (i) A copper metallization process is performed to embed copper metal into the first and second openings. Brief description of the drawings: In order to make the above-mentioned objects, features, and advantages of the present invention clearer and easier to understand, the following describes the preferred embodiments and the accompanying drawings in detail, as follows: Section 1 A ~ Figure 1D shows part of the flowchart of the dual-embedded semiconductor copper manufacturing process; Figures 2A to 2D are schematic diagrams showing the effects of holes in the conventional dual-mosaic structure; Figures 3A to 3F show examples of the manufacturing method of the dual-embedded copper connection of the present invention Process sectional view. Explanation of symbols: 1 ~ semiconductor substrate; 2 ~ copper metal layer; 3 ~ silicon nitride; 4 ~ insulating layer; 5 ~ gasification dream; 6 ~ insulating layer; 7 ~ barrier layer; 8 ~ copper metal layer; ab ~ CuU-cut2 ~ cut; 30 ~ semiconductor substrate; 31 ~ copper wire layer; 32 ~ first insulating layer; 33 ~ first metal interlayer dielectric layer; 34 ~ second insulating layer; 35 ~ second metal Interlayer dielectric layer; 36 ~ barrier layer; 37 ~ copper metal layer; OP1 ~ first opening; OP2 second opening; C2 C2 ~ cutout; voidl-void2 ~ hole. Example: The method of the present invention will be described in detail below with reference to FIGS. 3A to 3E.

Page 8 471126 Description of the invention (5) Explains the manufacturing of the first double-embedded copper wiring ... including the following steps. (Shown) and copper wire two. The semiconductor substrate is 3 °, and elements are formed thereon (not shown, and then the first-^ Ο Ο male K t = t ^-m ^ ^), the edge layer 32, the first metal interlayer dielectric layer 33 ′ ^ The first-metal interlayer dielectric layer 35 is on the above-mentioned semiconductor beauty # 30; as shown in FIG. 3A. (4) Jing Cong violent material (2): the second insulating layer may be a silicon nitride layer (SiN), silicon carbide Layer (SiC), or rolled silicon nitride layer (SiON), etc. In this embodiment, the first and second insulating layers (32, 34) are both silicon nitride layers siN; The two metal interlayer dielectric layer is an oxide layer (si02), such as ytterbium, USG, etc., and defines the etching of the above-mentioned oxide layer 35, silicon nitride layer 34, and oxide 33 to form a first opening. Define the interlayer hole), and expose the upper siliconized silicon layer 3 2; as shown in FIG. 3B, the above-mentioned oxide layer 35 is etched with a lithographic definition, and the silicon nitride layer 34 is used as an etching stop layer to form a second The opening 〇P2, and the silicon nitride layer 34 is exposed; as shown in FIG. 3C, the first opening 〇ρι is located in the second opening OP2, and the oxide layers 35 and 33 constitute a stepped (or Ding) Type) wheel Next, the dry etching method is used to remove the silicon nitride layer 32 in the first opening oop and the silicon nitride layer 34 in the second opening OP2 to expose the copper wire layer 31; as shown in FIG. 3D It is worth noting that in FIG. 3D, the silicon nitride layer 32 at the bottom of the first opening 0p has a cut C1; and the silicon nitride layer 32 of the second opening 0p2 also has a cutout C1.

Page 9 471126 V. Description of the invention (6) A " The cut C2 is formed. Plasma treatment containing nitrogen ions and hydrogen ions is further performed. In this embodiment, the reaction gas system used in the plasma treatment is selected from NHs, chem. / 仏 '-〇 ^, where the above-mentioned oxide layers 35 and 33 pass through After NH3 or ^ / 112 plasma treatment, part of the oxygen contained in its interior will be replaced by nitrogen (such as Si02 ~ SiON). Next, use an acidic solution to perform a cleaning process (acid bath treatment) to remove the contamination on the copper wire layer 31 described above. Because most of the acidic solutions used in general cleaning procedures contain fluorine and amine components, so the etching rate of the above acidic solutions for SiON, Si02, and Si are respectively · S 1 ON > > si 〇2 main si N . The etching rate of the solution treated by the acid bath to the SiON layer (that is, converted from the oxide layers 35 and 33) is much greater than the SiN layer (34, 32). Therefore, while cleaning the copper wire layer 31, the acid / valley solution will also etch the sidewall portion of the S1 ON layer in the first opening 0P1 (via hole) and the second opening 0p2 (that is, remove the 3D picture) Dashed area), the results are shown in Figure 3E. Because the side walls of the 8 丨 training layer (the original oxide layers 33, 35) are treated with an acid bath, the width of the first and second openings (〇ρι, 0P2) is increased, thereby eliminating the incision (C1, C2). And adjust the purpose of open wheels. -Finally, the barrier layer 36 (such as TaN) is deposited first; then the steel metal is deposited, and the copper metal is then inserted into the first opening Pl and the second opening oop2, and the double-post copper connection process is completed. The result is as follows: Figure 3F. From the above, it can be known that the present invention is mainly based on the removal of the bottom of the via hole.

471126 V. Description of the invention (7) After the stop layer, the plasma treatment is performed with a gas containing nitrogen and wind components, and part of the oxygen components in the oxide layer on the side wall of the via are replaced by nitrogen components; When the groove is cleaned, it is easier to be etched by the acid solution, so that the overall profile of the sidewall of the via is smoother. By the above-mentioned method, the adverse effect of the cut at the bottom of the via can be greatly reduced and eliminated. PP A ^ I clarified that the above-mentioned embodiments are disclosed from the right, but they are not used;

Restricting the present invention, anyone familiar with the U-shen and Ganwei can do a little bit of the fine edge of the m1 Ming Fei will be treated as the attached application ^ χ ^ Ming only as defined by the Treasure Hunting Garden . Complain

$ 11 pages

Claims (1)

471126 VI. Application # 鄕 目 --- 1. A method for manufacturing a dual-embedded copper connection to improve the integrity of copper embedding, including: providing a semiconductor substrate having a component and a copper wire layer formed thereon; Sequentially forming a first insulating layer, a first metal interlayer dielectric layer, a second insulating layer, and a second metal interlayer dielectric layer on the semiconductor substrate; defining the removal of the second metal interlayer dielectric layer, the two insulating layers, The first layer: remove the second metal interlayer dielectric layer and the second insulating layer to form a first opening with ν to expose the second insulating layer; the mouth is located in the second opening; Ί .M ^ 1 describes that the second metal interlayer dielectric layer and the first metal interlayer dielectric layer constitute a stepped (or τ-shaped) profile wheel ^ except for the above-mentioned 'insulation layer' and the above-mentioned The second insulation layer in the second mouth is exposed to the copper wire. The plasma treatment containing nitrogen and hydrogen is performed. The cleaning process is performed using a solution to remove the steel wire layer. : Up and Up First Metal The sidewall of the dielectric layer is etched to increase the width of the first opening; and the second metallization process of the steel is to embed the copper metal into the first opening and the first silicon oxynitride. The method described in the item i of the scope, wherein the first and second insulating layers are selected from one of a silicon nitride layer, a silicon carbide layer, and a layer. 3. The method described in item 1 of the scope of patent application, wherein 471126 6. Scope of patent application 1. The second metal interlayer dielectric layer is an oxide layer. 4. The method according to item 3 of the scope of patent application, wherein after the above-mentioned oxidation layer is subjected to the above-mentioned plasma treatment, part of the oxygen component contained in the inside of the oxidation layer will be replaced by nitrogen, and it will be more easily left by the above-mentioned acidic solution. 5. The method according to item 1 of the scope of patent application, wherein the reaction gas system used in the above plasma treatment is selected from one of NH3 and N2 / H2. Page 13