TW469555B - System and cassette for testing and transporting semiconductor chips - Google Patents

Abstract

An apertured, punched plastic carrier tape with a pressure sensitive adhesive backing is loaded with ICs. The tape is wound on supply and take-up reels of a cassette. The cassette is adapted to be driven by a tape handler located in the factory or at a customer location where testing of the ICs takes place. The tape handler includes the necessary active components (e.g., a tape indexing mechanism, a chip ejector etc.) for driving the tape and removing chips from it. As such the cassette has at least two cavities adapted to receive the indexing mechanism that advances the carrier tape in a controlled fashion and a chip ejector mechanism that, in conjunction with a pick-and place tool, allows IC chips to be removed from the carrier tape. In addition, the cassette has at least one window that permits access to the topside of the chips in the tape for the purpose of performing various electrical tests (e.g., via an electrical probe) or vision tests (e.g., via a camera) and/or to permit bad chips to be removed form the tape. In one embodiment, a first cassette contains chips as yet unknown as being either good or bad, and if a chip tests as bad, it may by replaced with a good chip (e.g., via, a pick-and-place tool). In another embodiment, a second cassette contains only known-good chips that serve as the source of good replacement chips accessed by the pick-and-place tool In yet another embodiment, the cassette includes a plurality of windows: one for performing the aforementioned tests, one for removing/replacing chips, and optionally one for viewing an identification marker on the backside of each chip (e.g., via a pattern recognition system).

Description

469555 _Case No. 89114917_ Revised in January and Month_ V. Description of the Invention (1) Cross Reference to Related Applications This application claims priority based on provisional application serial number 60/145, 761, which is filed in 1 9 9 Application was made on July 27, 1997. Scope of the invention The present invention relates generally to the testing and transportation of semiconductor wafers or dies. In particular, the invention relates to the technology and testing of "integrated circuit (IC) wafers or dies on wafer carrier tape" and Device. BACKGROUND OF THE INVENTION As described in US Patent No. 5,966,903 issued by TD Dudderar and others on October 19, 1999, there are currently many systems on the market that can integrate integrated circuit chips into self-integrated circuits. The division operation is transmitted to the integrated circuit packaging operation. This patent is incorporated herein by reference. Many of these systems use plastic carrier tapes with openings, perforations, and pressure-sensitive adhesive backing. This type of tape is called a "carrier tape" and is in Arlington, Virginia. A more detailed description is provided in the Industrial Standard No. EIA / IS-74 7 published by the City's Electronics Industry Association. The chip is mounted in the opening by a pick-and-place tool, and is fixed in the opening by a pressure-sensitive adhesive backing. A widely used carrier tape system has two adhesive backing tracks that extend parallel to the bottom surface of the carrier tape with an opening. C. Gutentag issued a description of this type of carrier tape in US Patent No. 5,203,143 issued on April 20, 1993. This patent is incorporated by reference. This article. The carrier tape can be transported to the next assembly operation after loading, but it is usually wound on a reel for temporary storage. The tape can then be unrolled from the reel and the wafer can be picked up from the carrier tape and placed in a package assembly machine. The wafer on the carrier tape is with the circuit side facing up,

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O: \ 65 \ 65384.ptc Page 8 95 55 Case No. 89114917 Λ_η Amendment 5 'Explanation of Invention (3). However, so far, the integrated circuit industry has mainly applied this type of tape to the packaging of integrated circuit wafers, not to test wafers. The integrated circuit industry still needs a method that can more effectively handle integrated circuits during testing, whether in the factory building or at the customer's premises, and a safe, convenient, and economical way to send the integrated circuits to the client. method. Summary of the Invention In one aspect of the present invention, a plastic carrier tape having an opening, a hole punched, and a pressure-sensitive adhesive backing can be used to load an integrated circuit. The tape is wound around a passive cassette Supply and tighten the reels. In other words, to reduce costs, the cassette is not equipped with the active devices or circuits necessary to perform multiple indexing and picking operations. The cassette can also be used as a shipping container due to its low cost. The cassette can be driven by a tape processor in the premises, whether it is integrated circuit testing in the factory building or the customer's premises. The win tape processor includes the necessary active components (such as a win tape indexing mechanism, a wafer ejector, etc.). Therefore, the cassette has at least two holes for accommodating an indexing mechanism and a wafer ejection mechanism. The indexing mechanism can advance the carrier tape in a controlled manner, and the wafer ejection mechanism can be connected to the same pickup. Place the tool and remove the integrated circuit chip from the carrier tape. In addition, the cassette has at least one window, so that we can access the top surface of the chip in the tape to perform various electrical tests (such as by an electrical probe), or visual tests (such as by a camera), and / or Allows the wafer to be removed from the tape. In a specific example, the quality of the wafers contained in a first cassette is unknown. If a wafer is tested as a bad wafer, we can replace it with a good wafer (for example, by a pick and place tool). In another specific example

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The wafers contained in the second cassette of S1 have been confirmed to be good wafers. They can be used as the source of good replacement wafers »by picking and placing tools. In another specific example, the cassette includes a plurality of window frames--the aforementioned test formula can be executed >-the chip can be removed / replaced ψ The window set as required can be used to view the bottom surface of each chip Of --- identification marks (for example, by--pattern identification. Identification system) (i. A brief description of the drawings, after referring to the drawings and a more detailed description below, you should be able to understand the invention and its various features and advantages 〇 Figure 1 in the drawings-• Schematic block diagram > showing various systems, tape handlers', and cassettes according to the present invention 〇 Major components represent symbols 10 Predictive integrated circuit chip system 1 2 With tape 14 wafer 14. 1 wafer 20 cassette 20. 1 supply roll sleeve 20. 2 tighten the roll fortunately by 20. 3 Station window 20.4 Rigid support surface 20. 5 The first hole 20. 6 The second hole 20. 7 The second hole 20. 8 The-window D

O: \ 65 \ 65384.ptc Page 10, 69555 _Case No. 89114917_ Year, month, and year of revision_ 5. Description of the invention (5) 20.9 Third window 30 Tape processor 30.1 Sprocket 3 0.1a Indexing sprocket 30.1b Motor 30.2 Ejector pin 3 0.3 Sensor 4 0.1 Test equipment 40.2 Tool 4 0.3 Test sub-system 40.4 Microprocessor 40.5 Detailed description of the invention of the pattern recognition system See Figure 1. A system for testing integrated circuit chips A cassette 20 is provided with a carrier tape 12. Semiconductor wafers or wafers 14 are pre-installed in wafer positions on the carrier tape. For example, wafer 1 4 may be a integrated circuit wafer with the circuit surface facing up (hereinafter referred to as the "top surface" of the wafer). The system 10 also includes a tape processor 30, into which a cassette can be inserted (the cassette can also be removed from the tape processor) in order to drive the carrier tape; and a series of peripheral equipment 4 0. 1 to 4 0. 5, Used to perform a variety of "test and / or remove wafer" related functions, and if necessary, can also include "replace bad chips with good ones" related functions. In detail, the cassette 20 includes a supply reel 20.1 and a tightening reel 20.2., At least one test station window 20.3, and an associated hard support surface 20.4, a first cavity 20.5, and a first Two points 20.6. This first point is for

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ih QSRS (_Case No. 89114917_ Year and Month Amendment _) 5. Description of the Invention (6) A component of an indexing mechanism (such as a sprocket 3 ο. η) that houses the tape processor 30; the second hole is used for A component (for example, an ejector pin 30.2) that houses an ejection mechanism also located in the tape processor. The carrier tape 12 will be unrolled from the self-supply reel 20.1 and past the support surface 20. 4, and then wound on the tightening reel 2 0.2. The movement of the tape is controlled by the indexing mechanism, which includes the indexing sprocket 30. la and a motor 30.1b, the former can be on the adhesive tape The sprocket hole (not shown), which can drive the indexing sprocket 30.1a. The motor is controlled by the microprocessor 4 0. 4. For example, the tape can be any kind of open, warped Hole, and a plastic carrier tape with a pressure-sensitive adhesive backing, which allows the top surface of the chip to appear under the windows 20, 3, and allows me to approach the bottom surface of the chip for reasons described below. For example, it can be used The type of tape described in the aforementioned Gutentai patent. One of them is from Probe Wave Electronics of Los Angeles, California. The tape sold by the company has the trademark SURFT APE, and this tape is also currently more suitable for the present invention. The tape's movement increment is controlled so that the wafer 14 and the test station window 2 0.3 overlap one by one. For example, when the wafers 14.1 and 1 are in this position, they will be tested by the equipment 40.1. The equipment can test the wafers in a variety of traditional ways, such as electrical testing with a probe and / or using a visual system Visual test. (If the probe is in actual contact with the tape, the supporting surface 20.4 will provide support for the tape to fix the vertical position of the tape during the probe operation.) The test data will be sent to a test system 40. 3, the secondary system can be a computer, which contains specification data and programs for comparison. The secondary system 4 0.3 can determine whether the chip meets the predetermined specifications, that is, determine the quality of the chip. For example, In other words, electrical tests can include current or voltage measurements or power measurements.

O: \ 65 \ 65384.ptc Page 12 4 6 9 5 5 5 · Case No. 89114917 Amendment 5. Description of invention (7) Capability test; visual test may include identifying mechanical defects or observing the chip on the carrier Wafer in position. Those who have been tested as good wafers will be left in the wafer position on the tape for future use. If the test result is a bad wafer, the test sub-system will send a signal to the pick-and-place tool 40.2. In order to remove the wafer in the downstream pick-and-place station, if necessary, a good wafer can be used instead. Another approach is that pick-and-place operations can be performed at the same location as test operations. (The good replacement wafer itself may be another cassette of the same type as before, but the wafer carried on the carrier tape has previously undergone the test / replacement procedures described herein.) After the test sub-system has completed all tests for a wafer A "Done" signal will be sent to the microprocessor 4 0.4 to move the tape so that the next chip position is below the test station window 20.3. After the wafer moves downstream and reaches the pick-and-place station, the pick-and-place operation will take place at one of the second windows 20.8 of the cassette. The vacuum head for picking and placing the tool 40.2 will pass through the window 20.8 and reach the top surface of the wafer. At the same time, an ejection pin 30.2 will push the wafer from the bottom surface of the wafer. Controlled by signals from the test subsystem. Then, the tool 40.2 can remove the bad wafer from the tape, leaving a vacant wafer position, picking a good wafer from a known good source, and placing it in the same through the window 20.8 position. (If a wafer is missing at a wafer position, the follow-up is similar.) After completing the replacement of all the bad / missing wafers in this way, tightening the wafer on the reel 20.2 will be all good wafers. . We must accurately understand the relative relationship between the position of the wafer on the tape and the test station and the pick-and-place station. The accuracy of the tape itself helps to determine accurately

O: \ 65 \ 65384.ptc Page 13 46955c Case No. 89114917 Month Amendment 5. Description of the invention (8) Where is the position of the chip. A simple counter (not shown) in the tape processor can be used to count the position on the tape. If active position control is required, the tape processor can be provided with a sensor 30.3, whose output is sent to a microprocessor 40.4, which will provide a corresponding input to the test Secondary system 4 0. 3. If a sensor is provided, the cassette 20 will have a third cavity 20.7 for accommodating the sensor 30.3 and positioning it at a position where the tape can be viewed, for example, next to the tape At the supply reel. The sensor can also be placed elsewhere along the tape. Finally, if the bottom mask of the wafer has an identification mark (such as a bar code or a number of pieces cut by laser), I can use one of the pattern recognition systems on the market to send the identification information to the test subassembly. For example, the cassette may be provided with a third window 20.9, through which the pattern recognition system can view the bottom surface of the chip. Basically, each chip is located in the test window 20, 3 when it is inspected, but it is not necessary. If the identification mark on the bottom surface of the wafer needs to be inspected, the supporting surface 20.4 should have an opening (as shown), or be made transparent by other methods, so that the light can reflect the mark image back to the system 40.5. For simplicity, windows 20.3 and 20.9 are located on opposite sides of the cassette and are aligned with each other. These windows can also be placed in other locations to fit the space constraints in the cassette or tape processor. 5。 If the two windows are not aligned as shown, we can use well-known optics (such as mirrors) to transfer the image of the bottom surface of the wafer to the system 40.5. The design described above is only an example of many specific specific examples to which the principles of the present invention are applied. Those skilled in the art can design many other designs according to the present invention without departing from the spirit and scope of the present invention.

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Claims (1)

4 6 9 5 5 5 Case No. 89114917 Amendment VI. Patent Application Scope 1. A system for testing a semiconductor wafer, including a first cassette, including (1) a supply reel and a tightening reel; (2) — Carrier tape with an opening, the tape is wound on the reels, and has sprocket holes and wafer positions. The wafers are pre-loaded in the wafer positions with the top surface facing up. The tape allows We are close to the top surface and the bottom of the wafer; (3) —The window of the test station is located on one surface of the cassette, which allows us to close the top surface of a wafer that coincides with the window; , For accommodating an indexing mechanism, which is used to move the tape, and make the wafer position coincide with the window of the test station one by one; and (5) — a second cavity, which is used to accommodate an ejection mechanism, which is used Push the bottom surface of a chip; a tape processor, the first cassette can be inserted into or removed from the processor, the processor includes (1) the indexing mechanism, which includes a sprocket and a motor, the former Used to join the tape Sprocket holes, the latter is used to rotate the wheel; and (2) the ejection mechanism; and peripheral equipment, including (1) test equipment, used to test the wafer appearing in the window of the test station, and identify the wafer And a bad wafer; and (2) a pick-and-place device that can cooperate with the ejection mechanism to remove the bad wafer from the tape and replace it with a good wafer. 2. The system according to item 1 of the patent application scope, wherein the pick-and-place equipment has removed a bad wafer from a wafer position in the first cassette, and further includes a second cassette that is substantially the same, The cassette contains only known good wafers, and the pick-and-place device can pick up a known good wafer from the second cassette and place it on the removed bad wafer O: \ 65 \ 653S4.ptc Page 16 4 6 9 5 5 5 Case No. 89114917_Year Month Amendment_ VI. In the position of the patent application sheet " 3. If the system of item 1 of the patent application, where The tape processor includes a sensor for identifying the location of the wafer on the tape; and the first cassette includes a third hole for receiving the sensor. 4. The system according to item 1 of the patent application scope, wherein the first cassette includes a hard support surface under the window of the test station, and when the test equipment actually contacts a wafer coincident with the window, the support surface may be The tape provides support. 5. The system according to item 1 of the patent application scope, wherein the pick-and-place device can perform its function through the test station window. 6. The system according to item 1 of the patent application scope, wherein one surface of the first cassette includes a pick-and-place window located downstream of the test station window, and the ejection mechanism is positioned below the pick-and-place window And aligned with it, the pick and place device can perform its function via the pick and place window. 7. — A cassette for carrying and testing semiconductor wafers, including (1) a supply reel and a tightening reel; (2) — a carrier tape with an opening, the tape is wound on these reels, and It has sprocket holes and wafer positions. The wafers are pre-loaded in the wafer positions with the top surface facing up. The tape allows me to get close to the top surface and the bottom of the wafers; (3) — Workstation window, which It is located on one surface of the cassette and can be used to approach the top surface of a wafer coinciding with the window; (4) A first cavity is used to accommodate an indexing mechanism, which is used to move the tape and make the wafer The positions coincide with the windows of the workstation one by one; and (5) — a second cavity for receiving an ejection mechanism, which O: \ 65 \ 65384.ptc Page 17 469555 Case No. 89114917 A_η Amendment 6. The scope of patent application is used to push the bottom surface of a wafer. 8. If the cassette in the patent application scope item 7 includes a hard supporting surface under the window of the station, the supporting table is supported when the wafer coincides with the window. 9. The cassette according to item 7 of the patent application includes a pick-up and placement window, which is located at the ejection mechanism cavity so that the ejection opening is below and aligned with the ejection opening. 10. The cassette according to the scope of patent application No. 7 is sent to the container for loading the pre-completed place. 1 1. If the wafer included in the cassette of the scope of patent application No. 7 is unknown, its quality is not known, and the wafer such as the window is tested. 1 2. The cassette according to item 7 of the patent application includes a wafer that is known to be good, and the window may be provided to remove the wafer from the tape. The cassette can provide support for the tape when the test equipment actually touches the side. The card is located downstream of the workstation window and is located in the pick-and-place window. The cassette includes a shipping tape. Transported from somewhere to another, where the carrier tape is wrapped in a test window, which can be used, where the carrier tape is only wrapped for a pick and place worker O: \ 65 \ 653S4.ptc Page 18