TW466681B - Method for preventing HDP dielectric layer from peeling off - Google Patents
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^ ο 68 1 五、發明說明(1) 發明之領域1 本發明提供一種避免一半導體晶片上之高濃度電漿 Chyh density plasma,hdp)介電層發生剝落的方法,尤 指一種避免—氮矽層上之HDP介電層發生剝落的方法。 背景說明 在半導體製程中’為了使晶片上各個電子元件之間擁 1良好的隔離’以避免元件相互干擾而產生短路現象,一 身又採用區域氧化法(1 oca 1 i zed ox i da t i on i so 1 at i on, LOCOS)或是淺溝隔離方法來進行隔離與保護。由於L〇c〇s 製程中產生的場氧化層(Held oxide)所佔據晶片的面積 太大’而且生成過程會伴隨鳥嘴(bird,s beak)現象的發 生’因此對於最低線寬〇. 2 5/z m以下的.半導體製程都採用 淺溝隔離方法。淺溝隔離方法是在晶片表面的各元件間製 作一淺溝(s h a 1 1 〇 w t r e n c h )並填入絕緣物質以產生電性隔 離的效果。 習知用來製作淺溝隔離(shallow trench isolation, ST I)的半導體晶片上包含有一基底,一介電層設於基底之 上’以及一淺溝設於介電層中。習知方法是先於介電層表 面上以及淺溝内均勻沈積一氮矽層。接著對預定進行HDP 沈積製程之反應搶(chamber)通入純氣(inert gas)以進行^ ο 68 1 V. Description of the invention (1) Field of invention 1 The present invention provides a method for avoiding peeling off of the dielectric layer of a high concentration plasma (Chyh density plasma, hdp) on a semiconductor wafer. A method of exfoliating the HDP dielectric layer on a layer. Background: In the semiconductor process, 'in order to have a good isolation between the electronic components on the wafer' to avoid the short circuit phenomenon caused by mutual interference of components, the area oxidation method (1 oca 1 i zed ox i da ti on i so 1 at i on (LOCOS) or shallow trench isolation method for isolation and protection. Because the field oxide layer (Held oxide) produced in the L0c0s process occupies an area of the wafer that is too large, and the generation process is accompanied by the occurrence of the bird, s beak phenomenon, so the minimum line width is 0.2. Below 5 / zm. Semiconductor processes use shallow trench isolation. The shallow trench isolation method is to create a shallow trench (s h a 1 10 w t r e n c h) between components on the surface of the wafer and fill it with an insulating material to produce the effect of electrical isolation. A conventional semiconductor wafer used for making shallow trench isolation (ST I) includes a substrate, a dielectric layer disposed on the substrate ', and a shallow trench disposed in the dielectric layer. A conventional method is to deposit a silicon nitride layer uniformly on the surface of the dielectric layer and in the shallow trench. Then, inert gas is introduced into the chamber for the reaction scheduled for the HDP deposition process.
第4頁 i五、發明說明(2) HDP沈積製程的預熱(pre-heat)步驟。再將半導體晶片加 熱昇溫約5秒左右,然後通入甲砂烷(siUcane,^0H4m° 及氧氣以進行一前HDP沈積製程,於氮矽層表面形成一 HDP介電層(pre-HDP layer)。最後同樣通入甲矽烷(SiH 以及氧氣以進行一 HDP沈積製程,於前HDp層上形成—主4 丨H D P介電層(main HDP layer)’並填滿淺溝。 由於氮化矽的介電常數較高是一種良好的介電材 因此可以確保淺溝隔離絕緣的效果。此外,於〇ρ沈積 程前先填入淺溝的氮化矽層亦可以用來作為對HDp介 進行回姓時的蝕刻停止層(st〇p layer)。 唱 然而氮化矽薄膜的拉伸應力(tensiu高逹 | 1〇^ 上,容易有龜裂(crack)或剝落(peeHng) ;的6形發生,而且一般進杆覆筌私备功思 取退仃覆盍於氮矽層上的前HDp介電 |層的沈積溫度較低,因此無法形成一品質良好的矽氧層。 此外,習知技術所形成的前HDP介電層為—類似多矽矽氧 層(silicon rich 〇xif|p ,0 ,, ..^ ^ . lde, SR0)的組成’致使前HDP介電層 與氮石夕層間的附者力不其p i見 哈 二4 +、β > unp人& 是良好其界面常產生有氣泡,進 二層發生突起的現象,甚至導致前獲介 電層氮層剝⑥。淺溝隔離填充的絕緣物若有剝落的 情形時,可能造成有漏啻ώ、&、格念卹&來视右啕刺浴扪 A I ti @ M t属電&自淺溝底部的部份漏移’尤其 ’ 、線寬(1 ine width)逐漸縮小,淺溝隔離 的絕緣能力將影響半導體元件整體的電性表i / j 五、發明說明(3) 發明概述 因此本發明之本λ 上之高濃度電漿(ΗΙ)Ρ\目的在提供一種避免一半導體晶片 述習知技術之問題。介電層發生剝落的方法,以解決上 在本發明的最佳杳 有-氮石夕層。該方2施例中,該半導體晶片表面上包含 處认# β 古係先於一預定進行HDP沈積製程之反 -、入一純氣及氧氣,接著使用一無線電波頻率(RF) 將該通入之鈍氣及氧氣解離為電漿以充滿該反應艙,並將 該半導體晶片加熱昇溫約20秒。然後進行一前HDP (pre-HDP)沈積製程,於該氮矽層表面形成一前HDP介電層 (pre-HDP layer)。最後再進行一 HDP沈積製程’於該前 HDP層上形成一主HDP介電層(main HDP layer)。 由於本發明係在進行HDP沈積製程前所進行的預熱步 驟中即通入氧氣,以於該半導體晶片表面形成—類似石夕氧 層結構的前HDP介電層’因而提高對於後續所形成之氣石夕 層的附著能力,所以不會發生有氣泡生成或HDP介電層剝 落的情形’進而確保淺溝隔離絕緣的效果。 發明之詳細說明Page 4 i. Description of the invention (2) Pre-heat step of HDP deposition process. The semiconductor wafer is then heated up for about 5 seconds, and then a methanoxane (siUcane, ^ 0H4m ° and oxygen) is passed to perform a pre-HDP deposition process to form a pre-HDP layer on the surface of the silicon nitride layer Finally, silane (SiH and oxygen) was also passed in to perform an HDP deposition process, which was formed on the front HDp layer-the main 4 HDP dielectric layer (main HDP layer) 'and filled the shallow trench. Because of the silicon nitride dielectric A higher dielectric constant is a good dielectric material, which can ensure the effect of shallow trench isolation and insulation. In addition, a silicon nitride layer filled with shallow trenches before the 0ρ deposition process can also be used as a surname for HDp dielectrics. The etching stop layer (stoop layer). However, the tensile stress of the silicon nitride film (tensiu high | 10 ^, easy to crack (crack) or peel (peeHng); 6-shaped occurrence, and generally The advanced HDp dielectric layer deposited on the silicon-nitrogen layer has a low deposition temperature, so a good-quality silicon-oxygen layer cannot be formed. In addition, it is formed by conventional techniques. The front HDP dielectric layer is similar to a polysilicon layer (silicon rich 〇x if | p, 0 ,, .. ^^. lde, SR0) 'cause the attachment between the front HDP dielectric layer and the nitrogen stone layer to be inferior, see pi 2 +, β > unp person & It is good that the interface often has bubbles, and the protrusion occurs in the second layer, which even causes the nitrogen layer of the dielectric layer to be stripped. ⑥ If the insulation filled with shallow trench isolation is peeled off, it may cause leakage. &, commemorative shirt & come to see right stab bath AI ti @ M t belongs to electricity & from the bottom of the shallow trench, the leakage is 'especially', the line width (1 ine width) is gradually reduced, the shallow trench is isolated The insulating ability of the semiconductor device will affect the overall electrical performance of the semiconductor device. I. Description of the invention (3) Summary of the invention Therefore, the high-concentration plasma (Q1) P on the lambda of the present invention is intended to provide a semiconductor wafer The problem of the conventional technology. The method of exfoliating the dielectric layer is used to solve the problem of the best layer of the present invention-the azolite layer. In the embodiment of the method, the surface of the semiconductor wafer contains a process # β 古 系First, the reverse of a HDP deposition process is scheduled, a pure gas and oxygen are introduced, and then a radio frequency (R F) Dissociating the inert gas and oxygen into a plasma to fill the reaction chamber, and heating and heating the semiconductor wafer for about 20 seconds. Then, a pre-HDP (pre-HDP) deposition process is performed on the silicon-nitrogen layer A front HDP dielectric layer (pre-HDP layer) is formed on the surface. Finally, a HDP deposition process is performed to form a main HDP dielectric layer on the front HDP layer. Since the present invention introduces oxygen during the pre-heating step before the HDP deposition process is performed to form the surface of the semiconductor wafer-a pre-HDP dielectric layer similar to the oxidized oxygen layer structure, thus improving The adhesion ability of the gas stone layer, so there will be no bubble generation or peeling of the HDP dielectric layer ', thereby ensuring the effect of shallow trench isolation and insulation. Detailed description of the invention
第6頁 j S 6 B 1 五、發明說明(4) 請參考圖一至圖三’圖一至圖三為本發明避免HDP介 電層2 4發生剝落的方法示意圖。本發明製作之h D P介電層 丨24主要係用來作為一淺溝隔離(shallow trench isolation, STI)製程中的絕緣物質,以隔絕半導體元件 (例如M0S電晶體)間的電性。 j | | 如圖一所示’半導體晶片10上包含有一基底12,一介 I電層14設於基底12之上’以及一氮矽層20設於介電層14之 |上。本發明方法是先以一光阻(未顯示)塗佈(coating) |於氮矽層2 0表面’再進行一黃光(lithography)製程以定 義淺溝18之圖案(pattern)。接著進行一乾蝕刻(dry etching)製程’向下去除未被該光阻覆蓋的部份氮梦層2〇 以及介電層14以形成淺溝18。其中殘餘於介電層14上的氮 矽層20係用來作為後續蝕刻製程中的蝕刻停止層(st〇p layer)。然後利用一化學氣相沈積法(chemicai vapor deposition,CVD)於氮矽層20表面上以及淺溝μ内均勻沈 積一氮碎層1 6。 如圖二所示’接著進行一 HDP沈積製程的預熱 (pre-heat)步驟,以幫助後續的HDP製程更為順暢均勻。 進行該預熱步驟時,是先對預定進行HDP沈積製程之反應 艙((:11311^6]:)通入鈍氣(丨1161^亘&3)以及氧氣(〇〇8611)。在 本發明之較佳實施例中係使用氬氣(arg〇n)為揭帶氣體 (carrier gas)通入氧氣’使反應艙内形成為—富含有氧Page 6 j S 6 B 1 V. Description of the invention (4) Please refer to Fig. 1 to Fig. 3 'Fig. 1 to Fig. 3 are schematic diagrams of the method for preventing the HDP dielectric layer 24 from peeling off according to the present invention. The h D P dielectric layer 24 produced by the present invention is mainly used as an insulating substance in a shallow trench isolation (STI) process to isolate electrical properties between semiconductor elements (such as MOS transistors). j | | As shown in FIG. 1 ', the semiconductor wafer 10 includes a substrate 12, a dielectric I layer 14 is disposed on the substrate 12, and a silicon nitride layer 20 is disposed on the dielectric layer 14. In the method of the present invention, a photoresist (not shown) is applied on the surface of the nitrogen silicon layer 20, and then a lithography process is performed to define the pattern of the shallow trench 18. A dry etching process is then performed to remove a portion of the nitrogen dream layer 20 and the dielectric layer 14 that are not covered by the photoresist to form a shallow trench 18. The silicon nitride layer 20 remaining on the dielectric layer 14 is used as an etching stop layer in a subsequent etching process. Then, a chemical vapor deposition (CVD) method is used to uniformly deposit a nitrogen fragment layer 16 on the surface of the silicon nitride layer 20 and in the shallow trench μ. As shown in FIG. 2 ', a pre-heat step of an HDP deposition process is then performed to help the subsequent HDP process to be smoother and more uniform. When performing this preheating step, first pass the inert gas (丨 1161 ^ 亘 & 3) and oxygen (〇〇8611) to the reaction chamber ((: 11311 ^ 6] :) scheduled for HDP deposition process. In a preferred embodiment of the invention, argon (argon) is used as a carrier gas to pass in oxygen to make the reaction chamber be rich in oxygen.
第7頁Page 7
五、發明說明(5) 氣的環境。接著再使用一無線電波頻率(radi〇 frequency,RF)以將通入之氩氣以及氧氣解離為電漿以充 滿反應艙内。 然後將半導體晶片1 〇加熱昇溫約2〇秒以達4〇〇吒至 500 °C左右,接著通入甲矽烷(SiH4)a及氧氣,進行一前 HDP沈積製程,於氤矽層16表面形成一前HDp介電層 |(py-HDP lyery2。由於該預熱步驟中會將反應搶形成 一富含有氧氣的環境,因此在進行前HDp沈積製程時可以 形成一類似矽氧層構造的前&PP介電層,提高對後續所形 成之氮矽層的附著能力。然後同樣通入甲矽烷(s i H 4)以及 氧氣以進行一 HDP沈積製程,於前HDP層2 2上形成一主HDP 介電層(main HDP layer)24,並填滿淺溝18。 如圖三所示,對半導體晶片1 〇進行一平坦化 (planarization)製程’利用一回姓(etch back)製程或 一化學機械研磨法(chemical mechanical polishing, CMP)來去除部份的HDP介電層24以及前HDP介電層22,完成 淺溝隔離(ST 1)26的製作。 由於本發明製作淺溝隔離的方法一方面是先延長預熱 時間,适使反應搶内達到足夠溫度後’再進行該前HDP沈 積製程;而另一方面’本發明方法在進行該HDP沈積製程 前所進行的預熱步驟中即通入氧氣’使反應艘内形成一富5. Description of the invention (5) The environment of qi. Then, a radio frequency (RF) frequency is used to dissociate the argon and oxygen gas into a plasma to fill the reaction chamber. The semiconductor wafer is then heated for 10 seconds to a temperature of about 400 ° C to 500 ° C, and then silan (SiH4) a and oxygen are passed in, and a pre-HDP deposition process is performed to form a silicon wafer 16 surface. A front HDp dielectric layer | (py-HDP lyery2. Since the reaction is rushed to form an oxygen-rich environment during this preheating step, a silicon-oxygen layer-like front can be formed during the pre-HDp deposition process. & PP dielectric layer, to improve the adhesion to the nitrogen and silicon layer formed later. Then pass through silane (si H 4) and oxygen to perform an HDP deposition process, forming a main on the front HDP layer 22 A HDP dielectric layer (main HDP layer) 24 and fills the shallow trench 18. As shown in FIG. 3, a planarization process is performed on the semiconductor wafer 10 'using a etch back process or a chemical Chemical mechanical polishing (CMP) is used to remove part of the HDP dielectric layer 24 and the front HDP dielectric layer 22, and complete the production of shallow trench isolation (ST 1) 26. Because of the method 1 of the present invention for making shallow trench isolation The first aspect is to extend the warm-up time to make the reaction After the temperature reached a sufficient 'then the front HDP deposition process; the other hand' the preheating step process of the invention carrying out the HDP deposition process that is performed before the oxygen gas into 'the reaction vessels forming a rich
第8頁 I五、發明說明(6) i含有氧氣的環境,因此在進行前HDP沈積製程時便可形成 | 一類似矽氧層構造的前H D P介電層。相較於習知由多矽矽 氧層(SRO)的前HDP介電層,矽氧層對於氮矽層的附著能力 較佳,因此不會使HDP介電層生成有氣泡或發生剝落的情 形,故能有效地確保淺溝隔離絕緣的效果。 i 丨 以上所述僅本發明之較佳實施例,凡依本發明申請專 I利範圍所做之均等變化與修飾,皆應屬本發明專利之涵蓋 範圍。Page 8 I. Description of the invention (6) i The environment containing oxygen, so that it can be formed during the pre-HDP deposition process | a front H D P dielectric layer similar to the structure of a silicon oxide layer. Compared with the conventional HDP dielectric layer made of polysilicon-silicon-oxide (SRO) layer, the silicon-oxygen layer has better adhesion to the nitrogen-silicon layer, so it does not cause bubbles or peeling of the HDP dielectric layer. Therefore, it can effectively ensure the effect of shallow trench isolation and insulation. i 丨 The above are only the preferred embodiments of the present invention. Any equal changes and modifications made in accordance with the scope of the patent application of the present invention shall fall within the scope of the patent of the present invention.
第9頁 4 6 6 68 1 ffl式簡單說明 圖示之簡單說明 圖一至圖三為本發明避免HDP介電層發生剝落的方法 示意圖。 圖示之符號說明 10 半導體晶片 12 基底 14 介電層 16 氮矽層 18 淺溝 20 氮矽層 22 前HDP介電層 24 HDP介電層 26 淺溝隔離Page 9 4 6 6 68 1 Simple description of ffl type Simple illustration of figures Figures 1 to 3 are schematic diagrams of the method for preventing the HDP dielectric layer from peeling off according to the present invention. Explanation of Symbols 10 Semiconductor wafer 12 Substrate 14 Dielectric layer 16 Silicon silicon layer 18 Shallow trench 20 Silicon nitrogen layer 22 Front HDP dielectric layer 24 HDP dielectric layer 26 Shallow trench isolation
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