TW465263B - Substrate with at least two metallic polymer protrusions used for the weld connection containing a wiring - Google Patents

Substrate with at least two metallic polymer protrusions used for the weld connection containing a wiring Download PDF

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Publication number
TW465263B
TW465263B TW089109430A TW89109430A TW465263B TW 465263 B TW465263 B TW 465263B TW 089109430 A TW089109430 A TW 089109430A TW 89109430 A TW89109430 A TW 89109430A TW 465263 B TW465263 B TW 465263B
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Taiwan
Prior art keywords
polymer
substrate
protrusions
wiring
solder
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TW089109430A
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Chinese (zh)
Inventor
Puymbroeck Jozef Van
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Siemens Ag
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/13Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3436Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29LINDEXING SCHEME ASSOCIATED WITH SUBCLASS B29C, RELATING TO PARTICULAR ARTICLES
    • B29L2031/00Other particular articles
    • B29L2031/34Electrical apparatus, e.g. sparking plugs or parts thereof
    • B29L2031/3493Moulded interconnect devices, i.e. moulded articles provided with integrated circuit traces
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12044OLED
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/09045Locally raised area or protrusion of insulating substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09845Stepped hole, via, edge, bump or conductor
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

A substrate (S) with at least two metallic polymer protrusions (PS), especially a polymer stud Grid Array. It is so formed that the polymer bump (PS) contains at least a step (ST) and at least an elevation (E). The geometry of the weld protrusion (PS) assure reliable weld connection containing a wiring (V) and a reproducible layer thickness of solder (L).

Description

A7 46526 3 ____B7_ " 一i '~' ' 五、發明說明() 積體電路不斷地獲得更高的端子總數,並且因此不斷 地進一步的撤型化。在此愈來愈微型化中,可以期待之具 有焊料軟蕾塗佈與配備的困難,應該藉由新的殼體形成而 濟除。因而在此持別強諏在球形柵極陣列封裝中之單個 數個一或多値晶 Η 模組(DE-Z productionic 5,1994 ,第54,55頁),此模組是根據於一貫穿接觸的基板, 在其上此晶Η例如藉由接觸佈線(contact wiring)或借 肋於履晶Μ (Flip Chip)安裝而接觸。在此等基板的反 面是球形柵極陣列(Ball Grid Array)(BGA),此經常亦 稱為焊料柵極陣列(Solder Grid Array}或焊料突起陣列 (Solder Bump Array)。此球形柵極陣列包活在基板之反 面之上所平面配置的焊料突起,其使得能夠可以在電路 板或封裝單元(Package unit)上作表面安裝。藉由此焊 料突起的平面配置可以實現.在例如1.27毫米(mm)的粗槌 的網目中高的端子總數。 在所謂的MID技術(MID =模型化内連裝置)(Moulded Interconnection Devices)中是使用具有積售化導軌之 傳統式壓縮電路之射出成形部件a高價值的熱塑材料, 其本身對三度空間基板的射出成型適合,是此種技術之_ 基礎。此種熱塑性材料其本身對於用於壓縮電路的傳統 式之基板材料,藉由更佳的機械,化學電氣與環境技術 特性而突顯。在特殊方向中的MID技術,此所謂的SIL技 術(SIL =具有積體化導軌之射出成型部件)。此結構化實 現了一値在射出成型部件上塗佈的金屬層,藉由一特殊 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閲讀背面之注意事項再填寫本頁)A7 46526 3 ____B7_ " a i '~' 'V. Description of the Invention () The integrated circuit is constantly gaining a higher total number of terminals, and therefore it is continuously further removed. In this increasingly miniaturization, it can be expected that the difficulty of coating and provision of solder soft buds should be eliminated by forming a new shell. Therefore, we hereby insist on a single number of one or more crystal modules in a ball grid array package (DE-Z productionic 5, 1994, pages 54, 55). This module is based on a through The contacted substrate on which the wafer is contacted, for example, by contact wiring or by mounting on a flip chip (Flip Chip). On the opposite side of these substrates is a Ball Grid Array (BGA), often referred to as a Solder Grid Array or Solder Bump Array. This ball grid array package The solder bumps that are arranged on the opposite surface of the substrate lively can enable surface mounting on a circuit board or a package unit. By this, the planar configuration of the solder bumps can be achieved. For example, 1.27 millimeters (mm) ) The total number of high terminals in the mesh of the rough mallet. In the so-called MID technology (MID = Molded Interconnection Devices) (Moulded Interconnection Devices), injection molded parts using a conventional compression circuit with a build-up rail are used. The thermoplastic material, which is suitable for injection molding of three-dimensional substrates, is the basis of this technology. This thermoplastic material is itself a better substrate for traditional substrate materials used for compression circuits. Chemical electrical and environmental technology characteristics are highlighted. MID technology in special directions, this so-called SIL technology (SIL = injection molding section with integrated guide rails) ). This structure realizes a stack of metal layers coated on injection molded parts, and applies a Chinese paper standard (CNS) A4 specification (210 X 297 mm) with a special paper size (please read the note on the back first) (Fill in this page again)

-n n ^OJ .1 ϋ n I n Λ/ n b— I ϋ ϋ n n It i I .\)/ _ “ 526 3 A7 1 1 ___ —_ B7_____ 2五、發明說明() 的雷射結構化方法,而放窠了通常的遮罩技術。 在此具有結搆化金靨層的三度空間射出成型部件中, 是因此可以整合多個準械與電氣功能。此所採用的殼體 f載功能同時導向並搭扣建接,而其金屣化層除了接線 與連接功能之外,還有用作電磁屏蔽,並且用於負載作 良好之熱量之引離。為了製造在射出成型部件之彼此面 對的表面上介於兩橱接線裝置之間的導電源連接,已經 在射出成型中産生相對應的通孔。此通孔的内壁是在射 出成型部件的金屬化中,同樣是以金靨層覆蓋。製造此 具有積體化導軌之三度空間射出成塱部件的其他細節詳 情可以例如由DE-A-37 32 249或ΕΡ-Α-0 361 192而得知。 由WO-A- 8 9/ 0 0 3 4 6而産生一所熟知的單晶片模組,在 其中此射出成型三度空間基板是由一種電氣絶線聚合物 所製成,在此基扳的反面上在射出成型時共同形成突起 件,其在此情況下還可平面配置。在此基板之表面配置 一 1C晶Η,其端子經由精細的焊接線而與在基板表面上 所形成的導軌相連接。此導軌是在其側經由貫穿接觸而 與配置於在突起件上形成的外部端子連接e 由tf,0-A-96 096 46是所謂熟知的聚合物柱狀柵極陣列 (Polymer Stud Grid Array)(PSGA),其結合了球狀柵極 陣列(BGA)的優點與MID技術之優點。此新的結構形式的 名稱是聚合物柱狀柵極陣列(Polymer Stud Grid Array) (PSGA),它因此是依據在球狀柵極陣列上而實施。因而 ,此"聚合物柱"(Polymer Stud)的觀念應該是指在基板 (請先閲讀背面之注意事項再填寫本頁) .0 !訂.—______線 6_____________________ 本紙張尺度適用中國國家標準(CNS>A4規格(210 X 297公釐〉 4 6-5 26 3 A7 __B7 3五、發明說明() 的射出成形時所一起形成的聚合物突起。此新的用於單 値,數個,多個晶Η模組之適合的結構形式包括: -一値射出成形的,三度空間的基板,是由一種電性絶 緣聚合物所構成, ,在基板的反面上平面地配置,並且在射出成形時,共 同形成了聚合物突起, -在聚合物突起上藉由一可溶解的終端表面而形成外部 -至少在基板的反面形成導軌,其將此具有内部端子的 外部端子連接,以及 ,在基板上配置至少一晶片,其端子與内部端子或電氣 傳導連接。 除了當在基板射出成型時以簡單而成本身有利的方式 製造聚合物突起件外,還可以最小的費用在聚合物突起 上製造外部端子,以及通常在MID技術或SIL技術中採用 以製造導軌。藉由此在SIL技術中較佳的雷射精細結構 化,可以將此等在聚合物突起部上的外部端子,在精細 的網目中實現高的端子總數。 因此,其為明顯,此等聚合物突起部之溫度膨脹對應 於基板的溫度膨腺,以及此接線之功率消耗率。因此在 溫度之經常不穩定中逹成焊料連接之高度可靠性。 由US-A-5 4Ή 087其還可為熟知,在當使用電子元件 像是例如半導體之接觸時,聚合物突起部之溫度行為表 現與彈性特性。對此,在電子元件的鋁電極上首先各自 (請先閲讀背面之注意事項再填寫本頁) --------訂________線-ο_____ 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐〉 46526 3 A7 1 -4—-^-五、發明說明() — 障層。在此金靥層上形成聚合物突起部β 聚合物突起部然後以一金屬層覆蓋,其 具有一低的熔點。 若聚0物柱狀柵極陣列(Polymer Stud Grid Array) $胃» 與具有像是例如電路板之接線之金屬化 聚合物突起部經由回流之焊料而連接。因此而具有此危 險’此溶化&5焊料沿著聚合樹突起部的金屬層而向上移 動。Itb在大結175%的聚合物突起件中所發生的現象,於 言導致在聚合物突起部下之焊料層厚度之 Μ且在此情況下導致其與附近導軌之短路。 此®申請專利範圍第1項中所規範說明之本發明以此 間S2IS礎,其在用於焊料連接之具有聚合物突起部的 確保聚合物突起部下之具有接線之可重製焊料 層厚度。 本發明以此理解為基礎,其藉由聚合物突起件的幾何 形狀,具有至少一値增高部。其因此所形成的一値或多 値階梯,而防止熔化的焊料向上移動β因此在聚合物突 起部下産生可重製的焊料層厚度。其保證在它方面焊料 連接之高度可靠性。由於焊料向上移動而産生短路之危 險可以同樣地被排除。 本發明有益的配置是在申請專利範圍附屬項中規範説 明。 此根據申請專利範圍第2項的配置是特別適合用於經 由射出成型而製造具有稹體化聚合物突起部的基板。因 -6 — (請先間讀背面之注f項再填寫本頁) '、今 _ 良.1 IV n n I Λ. .k n n J— n n n 本紙張尺度適用中國國家標準(CNS)A4規格(210 χ 297公釐) 465263 A7 * _B7 一_五、發明說明() 此在申請專利範圍第3項中所提出說明在聚合物柱狀栖 極陣列(Poiymei· Stud Grid Array)中用於圓柱形増高 部的尺寸,導致特別可靠的焊料連接。 此在申請専利範圍第4, 5輿6項中所説明之用於聚合 物突起部之幾何形狀之變化例防止經由階梯(step)之同 樣地焊料之向高移動。因此産生此可能性,此聚合檄突 起部的幾何形狀調整成特別的使用形狀。 本發明的實施例是在圖式中描逑,並旦在以下作進一 步説明。 園忒夕簡蜇說昍 第1圃是經由一具有整體成型,成階梯之聚合物突起 部之基板之截斷面説明。 第2圖是根據第1圖之基板之聚合物突起部,其具有 在此之上塗佈的金靥層,以及具有一個由聚合物突起部 離開進行的導軌β 第3圖是在第2圔中說明之具有一接線之聚合物突起 部之焊料連接。 第4圖卡具有一雙重階悌之(Step)之聚合物突起部之 第一變化例。 第5圔是用於具有多個配置於一階梯(step)上之增高 部份之聚合构突起部之第二變化例。 第6圔是用於具有一環增高部之聚合物突起部之第三 變化例。 第1圖顯示經由一基板S之截面,在其反面ϋ形成聚_ γ _ (請先閱讀背面之注意事項再填寫本頁) -!丨訂! II線丨 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 465263 A7 ' _B7_五、發明說明() 合物柱狀棚極陣列,在當基板射出成形時配置所一起形 成之聚合樹突起部PS或聚合物柱(polymer studh其可 認出,此所形成稍後團錐形的聚合物突起部PS在其下端 各自具有所設之圓柱形增高部E。此圔柱形増高部E的 直徑是如此的設計,使得其本身各自作為至聚合物突起 部PS其餘部份之界面,而産生一環形的階禅ST。在所描 逑的實施例中,聚合物突起部PS在其底座區域中具有400 微米(Am)的直徑D ,而作為介於基板S的反面U與階梯 ST之間的距離之高度Η是400微米(#m)。此圓柱形增高 部E的直徑是160微米(Am),而此圓柱形增高部E的高 度h是5 0撤米(# m )。 第2圖顯示根據第1圖的聚合物突起部PS,是在雷射 精細結構化之後,在基板S上所塗佈之金屬層的整個表 面。它可以認出,聚合物突起部PS包括圓柱形增高部E ,具有所設的金屬層Μ,並且由在基板S的反面ϋ上的 聚合物突出部PS而遠離進行的導軌LZ。 第3圖顯示在第2圖中所説明具有一接線V之聚合物 突起部PS之焊料連接,此形成在說明的實施例中作為具 有在其表面上配置之連接墊ΑΡ的電路板LP。它可以明顯’ 地看出,此整掴的焊料L在當焊料回流時保持在介於階 梯ST與連接塾ΑΡ之間的區域中,並且不像是在沒有階梯 的聚合物突起部中,在其側面一直向上移動至導軌LE。 藉由此成階梯的聚合物突起部PS之幾何形狀t因此確保 焊料L之可重製的層厚度β -8 - {請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 46 526 3 A7 · _B7_ 五、發明說明() 在第4圖中所說明的第一變化例,是在一基板S1上所 整髏形成的聚合物突起部,而以P S表示。藉由聚合物突 起部PS1的雙重階梯,而形成一璟形的増高部E1與一圏 柱形的增高部E1Q。其所屬的環形階梯是以Sri或以ST10 表示。 在第5圖中所說明的第2實施例,是在基板S2上整體 形成的聚合物突起部,而以PS2表示。在一個作為板形而 形成之階梯S T 2上是總共設有四個在彼此的距離中所配置 的圓柱形增高部E2。 在第6圖中所描述的笫三變化例,是在基板S3上所整 體形成的聚合物突起部,以PS3表示。在一個同樣作為板 形形成的階梯ST3上 是一環形的增高部E3。 除了在第1至第6圖中所描述之稍微鈍錐體形的聚合 物突起部之外,可以還使用.其他横截面形狀之聚合物突 起部或増高部^然而具有重大意義的是在此至少形成一 値階梯,其在當焊料回流時,防止焊料在側面向高處移 動β 符號之説明 D......直徑 Ε......增高部 Η ·..-,,高度 L......焊料 LP .....電路板 LZ.....導軌 -9 - 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁) n n D I 一 I n n I \ _u n 4 6 526 3 A7 _B7 五、發明說明() MB.....鍍有金屬 PS.....聚合物突起部 S......基板 ST.....階梯 U......反面 V......接線 (請先閲讀背面之注意事項再填寫本頁) REk ! 4. -10- ί. Λ ^ if t— n V ·.. vh _1 It n n —fl tl ϋ 本紙張尺度適用中國國家標準(CNS)A4現格(210 X 297公釐)-nn ^ OJ .1 ϋ n I n Λ / nb— I ϋ ϋ nn It i I. \) / _ “526 3 A7 1 1 ___ —_ B7_____ 2 V. Laser structure method of the description of the invention (), The conventional masking technology is released. In this three-dimensional space injection molding component with a structured gold layer, multiple quasi-mechanical and electrical functions can be integrated. The f-loading function of the shell used at the same time is guided In addition to the functions of wiring and connection, the metalized layer also serves as electromagnetic shielding, and is used for the load to conduct good heat away. In order to manufacture the surfaces facing each other in the injection molding part The conductive power supply connection between the two cabinet wiring devices has created a corresponding through-hole in the injection molding. The inner wall of this through-hole is in the metallization of the injection-molded part and is also covered with a layer of gold. Manufacturing Further details of this three-dimensionally spaced projecting part with integrated guide rails can be known, for example, from DE-A-37 32 249 or EP-A-0 361 192. From WO-A- 8 9/0 0 3 4 6 to produce a well-known single-chip module, in which the three-dimensional space is injected and formed. The substrate is made of an electrically insulating polymer, and the projections are formed on the reverse side of the base plate during injection molding. In this case, it can also be arranged in a plane. On the surface of this substrate, a 1C crystal cymbal is arranged. The terminals are connected to a guide rail formed on the surface of the substrate via a fine soldering wire. This guide rail is connected on its side to an external terminal arranged on the protruding member through a through contact e by tf, 0-A- 96 096 46 is the so-called Polymer Stud Grid Array (PSGA), which combines the advantages of ball grid array (BGA) with the advantages of MID technology. The name of this new structure Polymer Stud Grid Array (PSGA), which is based on a spherical grid array. Therefore, the concept of "Polymer Stud" should be Refers to the substrate (please read the precautions on the back before filling in this page). 0! Order. —______ Line 6_____________________ This paper size applies to Chinese national standard (CNS > A4 size (210 X 297 mm) 4 6-5 26 3 A7 __B7 3 V. Invention The polymer protrusions formed during the injection molding of the Ming (). This new structure suitable for single, several, and multiple crystal modules includes:-a single injection molding, three-dimensional The substrate is made of an electrically insulating polymer. It is arranged flat on the reverse surface of the substrate, and during the injection molding, polymer protrusions are formed together.-A soluble terminal surface is formed on the polymer protrusions. Forming the external-at least a guide rail is formed on the reverse side of the substrate, which connects this external terminal with internal terminals, and at least one chip is arranged on the substrate, and its terminals are connected to the internal terminals or electrically conductively. In addition to manufacturing the polymer protrusions in a simple and advantageous manner when injection molding is performed on the substrate, external terminals can be manufactured on the polymer protrusions at a minimum cost, and they are generally used in MID technology or SIL technology to manufacture a guide rail. By virtue of the finer structured laser in SIL technology, these external terminals on the polymer protrusions can achieve a high total number of terminals in a fine mesh. Therefore, it is obvious that the temperature expansion of these polymer protrusions corresponds to the temperature expansion of the substrate, and the power consumption rate of this wiring. This results in a high degree of reliability in solder connections in the often unstable temperature. It is also well known from US-A-5 4 087 that when using electronic components such as, for example, semiconductors, the temperature behavior of polymer protrusions exhibits elastic properties. In this regard, first on the aluminum electrode of the electronic component (please read the precautions on the back before filling this page) -------- Order ________ Wire-ο _____ This paper size applies to China National Standards (CNS) A4 specification (210 X 297 mm) 46526 3 A7 1 -4--^-V. Description of the invention ()-barrier layer. Polymer protrusions β polymer protrusions are formed on this gold layer and then a metal layer It has a low melting point. The Polymer Stud Grid Array is connected to a metalized polymer protrusion with wiring such as a circuit board via reflowed solder. Therefore, there is a danger that this melting & 5 solder moves upward along the metal layer of the protruding portion of the polymerization tree. The phenomenon that Itb occurs in the polymer protruding portion of 175%, in a word, results in the polymer protruding portion. The thickness of the solder layer is M and in this case causes a short circuit with the nearby rail. The invention specified in item 1 of this patent application is based on the S2IS, which has polymer protrusions for solder connection. Polymer protrusions It has the thickness of a reworkable solder layer for wiring. The present invention is based on this understanding. It has at least one raised portion by the geometry of the polymer protrusions. One or more steps formed by it, and Prevents the molten solder from moving up β thus creating a reproducible solder layer thickness under the polymer protrusions. It guarantees high reliability of the solder connection in it. The danger of short circuits due to the upward movement of the solder can be eliminated as well. The beneficial configuration of the invention is specified in the appendix to the scope of the patent application. This configuration according to item 2 of the scope of the patent application is particularly suitable for manufacturing a substrate with a raised polymer protrusion through injection molding. -6 — (Please read the note f on the back before filling in this page) '、 今 _ Liang.1 IV nn I Λ. .Knn J— nnn This paper size is applicable to China National Standard (CNS) A4 (210 χ 297 mm) ) 465263 A7 * _B7 1-5. Description of the invention () The description proposed in item 3 of the scope of patent application is used in polymer columnar habitat arrays (Poiymei · Stud Grid Array) The size of the columnar high section results in a particularly reliable solder connection. This variation of the geometric shape of the polymer protrusions described in the claims 4, 5 and 6 of the application scope prevents steps through the steps. Similarly, the solder is moved to a high direction. Therefore, this possibility arises, and the geometric shape of the aggregated ridge projection is adjusted to a particular use shape. Embodiments of the present invention are described in the drawings and will be further described below. The garden is described briefly by the first section through a cross-section of a substrate having integrally formed, stepped polymer protrusions. Fig. 2 is a polymer protrusion of the substrate according to Fig. 1, which has a gold-coated layer applied thereon, and has a guide rail which is carried away by the polymer protrusion β. Fig. 3 is in Fig. 2 Solder connection of polymer bumps with a wiring as described in. Fig. 4 shows a first modification of the polymer protrusion having a double step. The fifth aspect is a second modified example for a polymer structure protrusion having a plurality of elevated portions arranged on a step. The sixth item is a third modified example for a polymer protrusion having a loop-upper portion. Figure 1 shows the cross-section of a substrate S, forming a poly _ γ _ on the reverse side (Please read the precautions on the back before filling this page)-! 丨 Order! Line II 丨 This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) 465263 A7 '_B7_ V. Description of the invention () Composite columnar pole array, which is configured together when the substrate is injection-molded The formed polymer tree protrusions PS or polymer columns (polymer studh) can be recognized, and the polymer protrusions PS formed later in the shape of a cone each have a cylindrical raised portion E at the lower end thereof. This column The diameter of the shaped high portion E is so designed that each of them acts as an interface to the remaining portion of the polymer protrusion PS, resulting in a ring-shaped step Zen. In the depicted embodiment, the polymer protrusion The portion PS has a diameter D of 400 micrometers (Am) in its base region, and the height 作为, which is the distance between the reverse surface U of the substrate S and the step ST, is 400 micrometers (#m). This cylindrical elevation E The diameter is 160 micrometers (Am), and the height h of this cylindrical elevation E is 50 ton meters (#m). Figure 2 shows the polymer protrusion PS according to Figure 1, which is in the laser fine structure After conversion, the entire surface of the metal layer applied on the substrate S. It can be recognized The polymer protruding portion PS includes a cylindrical raised portion E, has a metal layer M provided, and is separated away from the guide rail LZ by the polymer protruding portion PS on the reverse side of the substrate S. FIG. 3 shows the second portion The solder connection of the polymer protrusion PS with a wiring V illustrated in the figure is formed in the illustrated embodiment as a circuit board LP with a connection pad AP disposed on its surface. It can be clearly seen that This entire solder L remains in the area between the step ST and the connection 塾 AP when the solder is reflowed, and unlike in a polymer protrusion without a step, it moves all the way up to the guide rail LE The geometrical shape t of the polymer protrusion PS thus stepped thus ensures the reproducible layer thickness of solder L β -8-{Please read the precautions on the back before filling this page) This paper size applies to China Standard (CNS) A4 specification (210 X 297 mm) 46 526 3 A7 · _B7_ V. Description of the invention () The first variation illustrated in Figure 4 is the polymerization of the entire body formed on a substrate S1 The object protrusion is represented by PS. With the double step of the polymer protruding portion PS1, a 璟 -shaped raised portion E1 and a 圏 -shaped raised portion E1Q are formed. The circular ladder to which it belongs is represented by Sri or ST10. The second embodiment illustrated in Fig. 5 is a polymer protrusion formed integrally on the substrate S2, and is designated PS2. A step S T 2 formed in a plate shape is provided with a total of four cylindrical elevations E 2 arranged at a distance from each other. The third modification described in Fig. 6 is a polymer protrusion integrally formed on the substrate S3, and is represented by PS3. On a step ST3 also formed as a plate shape is an annular elevated portion E3. In addition to the slightly blunt cone-shaped polymer protrusions described in Figures 1 to 6, other polymer protrusions or raised portions of other cross-sectional shapes may be used. However, it is of great significance here At least one step is formed, which prevents the solder from moving to the high side when the solder is reflowed. Explanation of the β symbol D ... diameter E ... increased part Η · ..-, height L ...... Solder LP ..... Circuit board LZ ..... Guide-9-This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) (Please read the back first Please pay attention to this page and fill in this page) nn DI I I nn I \ _u n 4 6 526 3 A7 _B7 V. Description of the invention () MB ..... plated with metal PS ..... polymer protrusion S. ..... substrate ST ..... ladder U ... reverse V ... wiring (please read the precautions on the back before filling this page) REk! 4. -10- ί . Λ ^ if t— n V · .. vh _1 It nn —fl tl ϋ This paper size is applicable to China National Standard (CNS) A4 (210 X 297 mm)

Claims (1)

465263 § … D8 _ 六、申請專利範圍 種具有至少兩個金屬化聚合物突起部(PS; PSl; PS2 ;PS3)之基板(s; SI; S2; S3),此等突起部用於具有 接線(V)之焊料逋接,以及具有由在基板(s; S1; S1; S3)之反面(l〇上之聚合物突起(PS; PS1; PS2; PS3) 而離開進行的導軌(LZ>,其特歡為:此等聚合物突起 部(P S ; P S 1 ; p s 2 ; P S 3 )至少具有一階梯(S T ; S T 1 ; ST2; ST3),以形成至少一增高部(E; El; E10; E2; E3) 0 2. 如申請專利範圍第1項之基板(S),其中同心對聚合 物突起部(PS)配置,圓柱形的增高部份(Ε)β 3. 如申請專利範圍第2項之基板(S),其中此圓柱形增 高部(Ε),具有直徑(d)介於100微米(#κ)與30fl撤米 (#m)之間,以及高度介於25微米與2 5 0微米之間。 4. 如申請專利範圍第1項之基板(S1),其中此聚合物突 起部(PS1)具有所設之兩個增高部(El; E10)與兩锢階 梯(ST1 ; ST 1 0 )。 5. 如申請專利範圍第1項之基板(S1),其中此聚合物突 起部(PS2)具有所設之多個在階悌(ST2)上,在彼此距 離中配置之增高部U2)e 8.如申請專利範圍第1項之基板(S3),其中此聚合物突 起部(PS3)具有所設之在階梯(ST3)上所配置的環形増 高部(Ε3)。 -1卜 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁) 訂. -線· _465263 §… D8 _ VI. Patent application substrates (s; SI; S2; S3) with at least two metalized polymer protrusions (PS; PSl; PS2; PS3), these protrusions are used to have wiring (V) solder joint, and a guide (LZ >) having a polymer protrusion (PS; PS1; PS2; PS3) on the opposite side of the substrate (s; S1; S1; S3) (10; Its special feature is that these polymer protrusions (PS; PS 1; ps 2; PS 3) have at least one step (ST; ST 1; ST2; ST3) to form at least one elevated portion (E; El; E10 E2; E3) 0 2. If the substrate (S) of the first scope of the patent application, where the polymer protrusions (PS) are arranged concentrically, the cylindrical elevated portion (Ε) β 3. Substrate (S) of 2 items, wherein the cylindrical raised portion (Ε) has a diameter (d) between 100 μm (# κ) and 30fl to m (#m), and a height between 25 μm and 2 μm 50 micrometers. 4. For example, the substrate (S1) of the scope of patent application, wherein the polymer protruding portion (PS1) has two raised portions (El; E10) and two stair steps (ST1; ST 1 0). 5 For example, the substrate (S1) of the scope of patent application, wherein the polymer protruding portion (PS2) has a plurality of heightening portions U2) e arranged on the step (ST2) in a distance from each other. 8. For example, the substrate (S3) of the scope of application for the patent, wherein the polymer protruding portion (PS3) has a ring-shaped raised portion (E3) arranged on the step (ST3). -1 The paper size is applicable China National Standard (CNS) A4 Specification (210 X 297 mm) (Please read the notes on the back before filling this page) Order. -Line · _
TW089109430A 1999-05-20 2000-05-17 Substrate with at least two metallic polymer protrusions used for the weld connection containing a wiring TW465263B (en)

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DE10145348C1 (en) * 2001-09-14 2003-03-27 Siemens Dematic Ag Intermediate carrier for electronic component has suction used for removal of excess solder at foot of contact projections formed integral with plastics carrier body
DE10217700A1 (en) * 2002-04-20 2003-11-06 Festo Ag & Co Injection-molded circuit board, carries ramped tracks terminating at studs with laser-beam activated upper surfaces forming flip-chip connections
DE10217698B4 (en) * 2002-04-20 2008-04-24 Festo Ag & Co. Electrical switching arrangement with an injection-molded circuit carrier
DE10227305A1 (en) * 2002-06-19 2003-09-04 Siemens Dematic Ag Electrical multiple layer component module used in polymer stud grid array technology comprises a second three-dimensional substrate arranged on first three-dimensional substrate with intermediate connections connected to contacts
JP2005353740A (en) 2004-06-09 2005-12-22 Toshiba Corp Semiconductor element and semiconductor device
DE102015005205A1 (en) * 2015-04-23 2016-10-27 Multiple Dimensions Ag Carrier body for receiving electronic circuits

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JPH0832183A (en) * 1994-05-12 1996-02-02 Furukawa Electric Co Ltd:The Semiconductor chip package
WO1996009646A1 (en) * 1994-09-23 1996-03-28 Siemens N.V. Polymer stud grid array
JPH0969401A (en) * 1995-08-31 1997-03-11 Oki Electric Ind Co Ltd Surface mounting component
US5736790A (en) * 1995-09-21 1998-04-07 Kabushiki Kaisha Toshiba Semiconductor chip, package and semiconductor device
JPH09275106A (en) * 1996-04-04 1997-10-21 Nec Corp Structure of bump and its forming method
JP2828069B2 (en) * 1996-10-11 1998-11-25 松下電器産業株式会社 Soldering method of work with bump
KR100239406B1 (en) * 1996-12-27 2000-01-15 김영환 Surface mounted semiconductor package and method of manufacturing the same
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KR20020005753A (en) 2002-01-17
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KR100426044B1 (en) 2004-04-06
EP1186031A1 (en) 2002-03-13

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