TW453135B - Programmable plan driving circuit - Google Patents

Programmable plan driving circuit Download PDF

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Publication number
TW453135B
TW453135B TW89123900A TW89123900A TW453135B TW 453135 B TW453135 B TW 453135B TW 89123900 A TW89123900 A TW 89123900A TW 89123900 A TW89123900 A TW 89123900A TW 453135 B TW453135 B TW 453135B
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Taiwan
Prior art keywords
transistor
terminal
input
row
programmable
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TW89123900A
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Chinese (zh)
Inventor
Da-Chang Juang
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Sunplus Technology Co Ltd
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Abstract

The present invention relates to a kind of programmable plan driving circuit that is applied in the organic light emission flat display plate and includes plural driving units, in which each driving unit has a switching transistor, a current output transistor and a discharge transistor. In addition, plural sets of multiplexers are used to do column driving input, row driving input and the selection of required bias. Through the operation of the control terminal of multiplexer, the control of switching is performed so as to obtain a programmable plan driving circuit unit.

Description

4 53 1 3 5 A7 _______B7 _ 五、發明説明(I ) 【本發明之領域】 (請先閲讀背面之注意事項存填寫本頁) 本發明係本發明係為一種驅動電路,尤指一種應用於 有機發光發射平面顯示板之可程式規劃驅動電路0 【本發明之背景】 有機發光發射平面顯示板(〇LED panel)是一種由 薄膜有機發光二極體陣列所構成的平面顯示器,其驅動方 式可為足電壓或足電流驅動,第5圖及第6圖分別顯示有機 發光發射平面顯示板與定電壓驅動電路及定電流驅動電路 的系統構造圖,其中,由於有機發光發射平面顯示板都是 共陰極構造,因此,驅動電路分為行驅動電路51及61與 列驅動電路52兩部份,當中,行驅動電路5丨及61的功能 是依據行資料移位暫存器53之行資料(c〇lumn “a)而 輸出電流到對應行的有機發光二極體54的陽極,而列驅動 電路52則將没人(sink)由列掃晦移位暫㈣55之㈣ 線脈衝(scanning line pulse)所點亮的整列共陰極有 機發光二極體54的導通電流。 經濟部智慧財產局員工消費合作社印製 而因應系統的設計,定電流驅動電路之行驅動電路Η 係可由多數個如第7圖所示的定電流行驅動單元71與一參 考偏壓產生器62所構成,而定電壓驅動電路之行驅動電路 5 1則可由多數個如第8圖所示的定電壓 书壓仃驅動單元81所構 成,這兩個行驅動單元7丨及81是否 〜$输出電流皆由行輸入 端COLI所輸入來自行資料移位暫存 處, 』·. 予益5 3的行驅動信號 (column driving signal)所決定,t 心而為了降低有機發 各紙張尺度適用中國國家標準(CMS ) A4規格(21〇Χ293公釐) 53 1 3 5 A7 ______ B7 五、發明説明(二) 光二極體5 4之接面電容與佈線雜散電容所引發的殘影現 象,行驅動電路51及61之行驅動單元71及81都附有一受 放電信號DIS控制的放電元件MND,該放電元件MND係 在每一條掃描線開始或結束時短暫地打開,以便將有機發 光二極體之接面電容與佈線雜散電容的儲存電荷洩漏掉。 同時,在定電流行驅動單元71中,亦常設置有一預充電元 件MPPRE,以由一預充電控制端pRE_CHARGE控制而 可對所要點亮之有機發光二極體進行預充電。 而列驅動電路5 2係由多數個列驅動單元5 2 1所構成, 其中每一列驅動單元521通常係為一個反相器或是一個具 有較大電流汲入(s i n k )能力的放大器,以便由其列輸入 端ROWI將整列的有機發光二極體導通電流汲入且維持一 個甚低,譬如低於IV的電壓降。 經濟部智慧財產局員工消費合作杜印製 n.——I i^i I- -- »^1 I i t. I 1^1---In ^^1 -3 、** (請先聞讀背面之注意事項再填寫本頁) 由於行驅動與列驅動的特性要求不同,故有機發光發 射平面顯示板的系統設計都使用分開設計製作的行驅動積 體電路(1C)與列驅動積體電路,但在不同的應用需求 下,有機發光發射平面顯示板像素(pixel)數的組合非 ¥多,譬如有(6 4行X 1 6列)、(4 8行X 3 2列)、 (32行X48列)、(1qfX64列)等,或是甚至更大的 =素數組合的有機發光發射平面顯示板,故而必須開發非 ¥多種驅動單7〇數的行驅動積體電路與列驅動積體電路, 造成成本升高與資源的浪費。因此,前述習知有機發光二 極體驅動電路之設計實有予以改進之必要。 本“尺度 it 财關家辟(CNS ---— - 經濟部智慧財產局員工消費合作社印製 4 53 1 3 5 五、發明説明(3 發明人爰因於此,本於積極到新之精神,虽思一種可 以解决上述問題之可&式規劃驅動電路」,幾經研究實 驗終至完成此項新穎進步之發明。 【本發明之概述】 本發明之主要目的係在提供—種可程式規劃驅動電 路,其可依有機發光發射平面顯示板像素數的組合,加以 程式規劃所需的行驅動器通道數與列驅動器通道數,而無 須使用分開設計製作的行驅動積體電路與列驅動積體電 路。 依據本發明之一特色,該可程式規劃驅動電路包括有 複數個驅動單元’每一驅動單元包括:一開關電晶體,其 源極連接電源;一電流輸出電晶體,其源極連接該開關電 晶體之汲極,其汲極作為該驅動單元之行/列輸出端;一 放電電晶體,其源極連接至該電流輸出電晶體之没極,其 汲極接地;一第一多工器,其輸出端連接該開關電晶體之 閘極,其第一輸入端及第二輸入端係分別作為該驅動單元 之列輸入端及行輸入端;一第二多工器,其輸出端連接該 放電電晶體之閘極’其第一輸入端係連接該列輸入端,其 第二輸入端係作為一放電控制端;以及一第三多工器,其 輸出端連接該電流輸出電晶體之閘極,其第一及及第二輸 入端係分別與接地端及一偏壓輸出端相連,其中,該第 一、第二及第三多工器之控制端係共同連接而作為可程式 規劃控制端。 本紙張尺度逋用中國國家標準(CNS ) Α4規格(210X295公釐} ---------装------ΐτ------^ (請先閲讀背面之注意事項再填寫本頁) 4 53 1 3 5 經濟部智慧財產局8工消費合作社印製 A7 B7 五、發明説明(斗) 依據本發明之另一特色,該可程式規劃驅動電路包括 有複數個驅動單元,每一驅動單元包括:一開關電晶體, 其源極連接電源;一電流輸出電晶體,其源極連接該開關 电晶體之没極,其汲極作為該驅動單元之行/列輸出端; 一放電電晶體,其源極連接至該電流輸出電晶體之汲極, 其没極接地;一預充電電晶體,其源極與汲極分別連接該 電源輸出電晶體之源極與汲極;一第一多工器,其輸出端 連接該開關電晶體之閘極,其第一輸入端及第二輸入端係 分別作為該驅動單元之列輸入端及行輸入端;一第二多工 器,其輸出端連接該放電電晶體之閘極,其第一輸入端係 連接該列輸入端,其第二輸入端係作為一放電控制端;一 第二多工器’其輸出端連接該電流輸出電晶體之閘極,其 第一及及第二輸入端係分別與接地端及一偏壓輸出端相 連;以及一第四多工器,其輸出端連接該預充電電晶體之 閘極,其第一輸'端係連接電源,其第二輸入端係作為一 預充電控制端;其中,該第一、第二、第三及第四多工器 之控制端係共同連接以作為可程式規劃控制端。 依據本發明之再一特色,該可程式規劃驅動電路包括 有複數個驅動單元,每一驅動單元包括:一開關電晶體, 其源極連接電源;一電流輸出電晶體,其源極連接該開關 電晶體之汲極,其汲極作為該驅動單元之行/列輸出端; 一放電電晶體,其源極連接至該電流輸出電晶體之汲極, 其汲極接地;一自動鉗位預充電電晶體,其源極與汲極分 別連接該電流輸出電晶體之汲極與源極;一第一多工器, 本紙^尺度適用中國國家標準(CNS ) A4規格(210X290公慶)-------- 1.1 ---- -1—i ϋ - --->π (請先Η讀背面之注意ί項再填寫本頁) 4 53 1 3 5 Α7 ____ Β7 _ 五、發明説明(5 ) 其輸出端連接該開關電晶體之閘極,其第一輸入端及第二 輸入端係分別作為該驅動單元之列輸入端及行輸入端;一 第二多工器,其輸出端連接該放電電晶體之閘極及該自動 翻位預充電電晶體之閘極,其第一輸入端係連接該列輸入 端,其第二輸入端係作為一放電控制端;一第三多工器, 其輸出端連接該電流輸出電晶體之閘極,其第一及及第二 輸入端係分別與接地端及一偏壓輸出端相連,其中,該第 一、第二及第三多工器之控制端係共同連接以作為可程式 規劃控制端。 由於本發明構造新穎,能提供產業上利用,且確有增 進功效,故依法申請專利。 為使貴審查委員能進一步瞭解本發明之結構、特徵 及其目的’兹附以圓式及較佳具體實施例之詳細說明如 后: 【圖式簡單説明】 第1圖·’係顯示本發明之第—實施例的可程式規劃驅動電 路之一驅動單元。 第2圖*係顯不本發明之第—杳始办丨 対Θ I弟—實施例的可程式規劃驅動電 路之一驅動單元。 第3圖:係顯示本發明之坌-安t 4 f 之第二實鈀例的可程式規劃驅動電 路之一驅動單元。 第4圖··係為用以規劃本發明之可程式規劃驅動電路之示 意圖。4 53 1 3 5 A7 _______B7 _ V. Description of the invention (I) [Field of the invention] (Please read the notes on the back and fill in this page) The invention is a driving circuit, especially a kind of application Programmable driving circuit for organic light emitting flat display panel 0 [Background of the present invention] The organic light emitting flat display panel (〇LED panel) is a flat display composed of a thin film organic light emitting diode array, and its driving method can be For full-voltage or full-current driving, Figures 5 and 6 show the system structure diagrams of the organic light-emitting emission flat display panel, the constant-voltage driving circuit, and the constant-current driving circuit, respectively. The structure of the cathode, therefore, the driving circuit is divided into two parts of the row driving circuits 51 and 61 and the column driving circuit 52. Among them, the functions of the row driving circuits 5 and 61 are based on the row data of the register 53 (c 〇lumn "a) and output current to the anode of the organic light-emitting diode 54 of the corresponding row, and the column driving circuit 52 will shift no one (sink) from the column scan to shift the time of 55 The on-current of the entire array of common cathode organic light-emitting diodes 54 lit by a scanning line pulse. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs and printed on the basis of the system design. A plurality of constant current row driving units 71 as shown in FIG. 7 and a reference bias generator 62 are configured, and a row driving circuit 51 of the constant voltage driving circuit can be composed of a plurality of constant voltages as shown in FIG. 8. The book pressure driving unit 81 is composed of whether the two row driving units 7 丨 and 81 ~~ output current are input from the row input terminal COLI from the row data shift temporary storage place, ".. Yuyi 5 3 rows Determined by the column driving signal, in order to reduce the paper size of organic hair, the Chinese National Standard (CMS) A4 specification (21〇 × 293 mm) is applicable. 53 1 3 5 A7 ______ B7 V. Description of the invention (II) The afterimage caused by the junction capacitance and wiring stray capacitance of the photodiode 54, the row drive circuits 51 and 61, and the row drive units 71 and 81 are each provided with a discharge element MND controlled by a discharge signal DIS. The discharge The MND is turned on briefly at the beginning or end of each scan line to leak the stored charge of the junction capacitance and the stray capacitance of the wiring of the organic light emitting diode. At the same time, in the constant current row driving unit 71, A pre-charging element MPPRE is often provided to pre-charge the organic light-emitting diodes to be lit by being controlled by a pre-charging control terminal pRE_CHARGE. The column driving circuit 5 2 is composed of a plurality of column driving units 5 2 1 Structure, wherein each column driving unit 521 is generally an inverter or an amplifier with a large current sinking capability, so that the column input terminal ROWI can draw the entire row of organic light-emitting diode conduction currents into And maintain a very low, such as a voltage drop below IV. Duty printing of employee cooperation of the Intellectual Property Bureau of the Ministry of Economic Affairs n .—— I i ^ i I--»^ 1 I i t. I 1 ^ 1 --- In ^^ 1 -3, ** (Please listen first (Please read the notes on the back and fill in this page again.) Due to the different characteristics of row drive and column drive, the system design of the organic light emitting flat display panel uses a separately designed row drive integrated circuit (1C) and column drive integrated Circuit, but under different application requirements, the combination of the number of pixels of the organic light emitting flat display panel is not much, such as (64 rows x 1 6 columns), (48 rows x 3 2 columns), ( 32 rows X48 columns), (1qfX64 columns), etc., or even a larger = organic number emission flat display panel with a prime number combination, so it is necessary to develop a row driver integrated circuit and column driver that are not multi-driver single 70 Integrating a circuit causes cost increase and waste of resources. Therefore, it is necessary to improve the design of the conventional organic light emitting diode driving circuit. This "It's a financial policy (CNS ------Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 4 53 1 3 5 5. Inventor's Note (3) Because of this, the inventor has been active and new "Although thinking of a programmable driving circuit that can solve the above problems", after several research experiments, this novel and progressive invention has been completed. [Summary of the Invention] The main purpose of the present invention is to provide a kind of programmable planning Drive circuit, which can program the number of row driver channels and the number of column driver channels according to the combination of the pixel number of the organic light emitting flat display panel, without the need to use separate row driver integrated circuits and column driver integrated circuits. According to a feature of the present invention, the programmable driving circuit includes a plurality of driving units. Each driving unit includes a switching transistor whose source is connected to a power source, and a current output transistor whose source is connected to the circuit. The drain of the switching transistor, whose drain is used as the row / column output terminal of the driving unit; a discharge transistor whose source is connected to the current output transistor The first electrode and the second input of the first multiplexer are used as the column input and row of the driving unit, respectively. An input terminal; a second multiplexer whose output terminal is connected to the gate of the discharge transistor; its first input terminal is connected to the row of input terminals; its second input terminal is used as a discharge control terminal; and a third The output terminal of the multiplexer is connected to the gate of the current output transistor, and the first and second input terminals thereof are respectively connected to the ground terminal and a bias output terminal, wherein the first, second and third The control terminals of the multiplexer are connected together and used as programmable control terminals. This paper size uses the Chinese National Standard (CNS) A4 specification (210X295 mm) --------- installation ----- -ΐτ ------ ^ (Please read the precautions on the back before filling out this page) 4 53 1 3 5 Printed by A8 B7, Intellectual Property Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the Invention (Battle) According to the invention Another feature is that the programmable drive circuit includes a plurality of drive units, each drive The unit includes: a switching transistor, the source of which is connected to a power source; a current output transistor, the source of which is connected to the terminal of the switching transistor, and the drain of which is the row / column output terminal of the driving unit; a discharge transistor Its source is connected to the drain of the current output transistor, and its pole is not grounded; a pre-charged transistor whose source and drain are connected to the source and drain of the power output transistor, respectively; The output terminal of the multiplexer is connected to the gate of the switching transistor. The first input terminal and the second input terminal are respectively used as the column input terminal and the row input terminal of the driving unit. A second multiplexer whose output terminal is The first input terminal connected to the gate of the discharge transistor is connected to the row of input terminals, and the second input terminal is used as a discharge control terminal; a second multiplexer 'whose output terminal is connected to the current output transistor A gate whose first and second input terminals are respectively connected to a ground terminal and a bias output terminal; and a fourth multiplexer whose output terminal is connected to the gate of the precharged transistor, and whose first output terminal 'The end is connected to the power supply, its second output The input terminal is used as a pre-charging control terminal; among them, the control terminals of the first, second, third and fourth multiplexers are connected together as a programmable control terminal. According to still another feature of the present invention, the programmable driving circuit includes a plurality of driving units, and each driving unit includes: a switching transistor whose source is connected to a power source; and a current output transistor whose source is connected to the switch. The drain of the transistor, whose drain acts as the row / column output of the drive unit; a discharge transistor, whose source is connected to the drain of the current output transistor, whose drain is grounded; an automatic clamp precharge Transistor, its source and drain are connected to the drain and source of the current output transistor respectively; a first multiplexer, the size of this paper applies to China National Standard (CNS) A4 specification (210X290 public celebration) --- ----- 1.1 ---- -1—i ϋ---- > π (please read the note on the back and fill in this page first) 4 53 1 3 5 Α7 ____ Β7 _ 5. Description of the invention (5) Its output terminal is connected to the gate of the switching transistor, and its first input terminal and second input terminal are respectively used as the column input terminal and the row input terminal of the driving unit; a second multiplexer whose output terminal Connected to the gate of the discharge transistor and the gate of the automatic flip precharge transistor, The first input terminal is connected to the row of input terminals, and the second input terminal is used as a discharge control terminal; a third multiplexer, the output terminal of which is connected to the gate of the current output transistor, the first and second The input terminals are respectively connected to the ground terminal and a bias output terminal. Among them, the control terminals of the first, second and third multiplexers are commonly connected to serve as programmable control terminals. Since the present invention has a novel structure, can provide industrial use, and does have an increasing effect, it has applied for a patent in accordance with the law. In order to allow your reviewers to further understand the structure, characteristics and purpose of the present invention, a detailed description of the round and preferred embodiments is attached as follows: [Simplified illustration of the drawings] Figure 1 "shows the present invention A driving unit of one of the programmable driving circuits of the first embodiment. Fig. 2 * shows a driving unit of one of the programmable driving circuits of the embodiment of the present invention-the first operation of the present invention. Fig. 3 is a drive unit of a programmable drive circuit showing a second example of palladium-an t 4 f according to the present invention. Fig. 4 is a schematic diagram of a programmable driving circuit for planning the present invention.

本紙張尺錢财關家縣(CNS 請 先 閲 背 Sr 之 注This paper ruler Qiancai Guanjia County (CNS please read the note of Sr

I 裝 經濟部智慧財產局員工消費合作社印製 453 1 35 五、發明説明( 第5圖·係為習知有機發光發射平面顯示板與定 電路的系統構造圖。 弟6圖·係為習知有機發光發射平面顯示板與定電流驅動 電路的系統構造圖。 第7圖·係為習知之定電流行驅動單的電路圖α 第8圖.係為習知之定電壓行驅動單的電路圖。 【圖號説明】 (1 1 ) ( 21 ) ( 31 )驅動單元 (4 2 )移位暫存器 (5 2 )列驅動電路 (5 3 )行資料移位暫存器 (5 5 )列掃瞒移位暫存器 (71)定電流行驅動單元 (請先Μ讀背面之注意事項再填寫本頁) (4 1 )微處理器 (51) (61)行驅動電路 (5 2 1 )列驅動單元 (54)有機發光二極體 (62 )參考偏壓產生器 (81)定電壓行驅動單元 【較佳具體實施例之詳細説明】 經濟部智慧財產局員工消費合作社印製 有關本發明之可程式規劃驅動電路之一較佳實施例, 請先參照第1圖所示該裝置之一驅動單元11,其具有一由 作為開關元件之PMOS電晶體MPS與作為電流輸出元件之 PMOS電晶體ΜΡΟ,該電晶體MPS之源極連接電源 VDD,汲極與電晶體ΜΡΟ之源極相連,閘極則連接至一 多工器MUX1之輸出端Υ,該多工器MUX1之第一輸入端 II及第二輸入端I 2係分別連接至列輸入端R〇 WI及行輸入 端COLI,該電晶體ΜΡΟ之汲極連接至行/列輸出端 本紙張尺度通用中國國家標準(CNS > Α4規格(210 X 2对公釐} 4 53 1 3 5 A7 B7 五、發明説明(7 ) CRDO,其閘極連接至一多工器MUX3之輸出端γ,該多 工器MUX 3之第一輸入端11及第二輸入端I 2係分別與接地 (請先閲讀背面之注意事項再填寫本頁) 端及參考偏壓產生器(圖中未式)之偏壓輸出端VB相 連。 該驅動單元11中亦包含一作為放電元件之NMOS電 晶體MN D,其源極連接至電晶體ΜP 0之汲極,其汲極則 接地,而電晶體MND之閘極則連接至一多工器]ViUX2之 輸出端Y,該多工器MUX2之第一輸入端II及第二輸入端 12係分別與列輸入端row I及放電控制端DIS相連。I Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 453 1 35 V. Description of the invention (Figure 5 is a system structure diagram of a conventional organic light-emitting emission flat display panel and a fixed circuit. Brother 6 Figure is a conventional system The system structure diagram of the organic light-emitting emission flat display panel and the constant current drive circuit. Figure 7 is a circuit diagram of a conventional constant current row drive unit. Figure 8 is a circuit diagram of a conventional constant voltage row drive unit. Description: (1 1) (21) (31) Drive unit (4 2) Shift register (5 2) Column drive circuit (5 3) Row data shift register (5 5) Column Bit register (71) constant current row drive unit (please read the precautions on the back before filling this page) (4 1) microprocessor (51) (61) row drive circuit (5 2 1) column drive unit (54) Organic light-emitting diode (62) Reference bias generator (81) Constant-voltage row drive unit [Detailed description of preferred embodiments] The consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs prints a program related to the present invention To plan a preferred embodiment of the driving circuit, please refer to a driving unit of the device shown in FIG. 1 first. Element 11, which has a PMOS transistor MPS as a switching element and a PMOS transistor MP0 as a current output element. The source of the transistor MPS is connected to the power source VDD, the drain is connected to the source of the transistor MP0, and the gate It is connected to the output terminal Υ of a multiplexer MUX1. The first input terminal II and the second input terminal I 2 of the multiplexer MUX1 are respectively connected to the column input terminal ROWI and the row input terminal COLI. The transistor The drain of ΜΡΟ is connected to the row / column output. The paper size is generally Chinese national standard (CNS > A4 size (210 X 2 pair mm) 4 53 1 3 5 A7 B7 V. Description of the invention (7) CRDO, its gate The terminal is connected to the output terminal γ of a multiplexer MUX3. The first input terminal 11 and the second input terminal I 2 of the multiplexer MUX 3 are respectively grounded (please read the precautions on the back before filling this page). It is connected to the bias output terminal VB of the reference bias generator (not shown in the figure). The driving unit 11 also includes an NMOS transistor MN D as a discharge element, and its source is connected to the drain of the transistor MP 0. , Its drain is grounded, and the gate of the transistor MND is connected to a multiplexer] ViU The output terminal Y of X2, the first input terminal II and the second input terminal 12 of the multiplexer MUX2 are respectively connected to the row input terminal row I and the discharge control terminal DIS.

以上述驅動電路之驅動單元1 1,當多工器MUX1~3 之控制端CD/RD的輸入信號設為邏輯1時,每一多工器 MUX1〜3之輸出端γ係切換連接第二輸入端12,此時,當 行輸入端COLI為低電壓準位時,PMOS電晶體MPS導 通’而使PMOS電晶體MPO由行/列輸出端CRDO輸出定 電流,且當放電控制端DIS為高電壓準位時,電.晶體MND 導通而進行放電,故驅動單元Π的功能是一個行驅動單 元0 經濟部智慧財產局員工消費合作社印製 而若控制端CD/RD的輸入信號設為邏輯0時,每一多 工器MUX 1〜3之輸出端γ係切換連接第一輸入端π,則多 工器MUX1將電晶體MPS的閘極改接列輸入端ROWI,多 工器MUX2將電晶體MND的閘極也改接列輸入端 ROWI,而多工器MUX3將電晶體MPO的閘極改接地使之 強制導通而等效於一小電阻,且由於電晶體MPS與MND 之閘極相連並連接至列輸入端ROWI,因此驅動單元1 1的 本紙張尺度適用中國國家標準(CNS ) A4规格(21〇Χ29Μ釐) 453135 A7 經濟部智慧財產局員工消費合作社印製 _____B7_五、發明説明(8 ) 功能變成是受列輸入端ROWI控制的反相器,也就是—個 列驅動單元。 第2圖顯示有關本發明之可程式規劃驅動電路之另— 較佳實施例的一驅動單元21 ’相似於前一實施例,其亦具 有作為開關電晶體Μ P S、電流輸出電晶體μ P 〇、放電電 晶體MND以及多工器MUX1〜3等設置,而與前一實施例 之主要不同在於另外設置有一作為預充電元件之PM〇s電 晶體MPPRE,該電晶體MPPRE係並聯於電晶體河?〇, 亦即’電晶體MPPRE之源極與ί及極分別連接電晶體mpo 之源極與汲極,而電晶體MPPRE之閘極係連接於一多工 器MUX4之輸出端Υ,該多工器MUX4之第一輸入端π及 第二輸入端12係分別連接電源ν D D及預充電控制端 PRECHARGE ° 以上述之驅動電路,當多工器MUX 1〜4之控制端之 ,輸入信號CD/RD設為邏輯1時,其輸出端γ係切換連接第 二輸入端12,此時,已如前一實施例中所述,驅動單元21 的功能是一個行驅動單元,且電晶體Mp pre之閘極係連 接預充電控制端PRECHARGE,故可在驅動區間的前緣 將電晶體Μ P P R E之閘極短暫地短路到地,而產生瞬間大 電流來將雜散電容快速充到高電位,俾達成預充電之效果0 而若控制端CD/RD的輸入信號設為邏輯〇時,每一多 工器MUX1〜4之輸出端Υ係切換連接第一輸入端II,此 時’電晶體ΜPPRE之閘極連接電源,故將保持在關閉之 表紙張尺度it财SS家鮮(CNS ) Α4規格(21GX2嫩釐"j .1 I ^^^1 ^^^1 —^1. - - ·ί 11^ {請先閲讀背面之注意事項再填寫本頁) 4 53 1 3 5 A7 B7 五、發明説明(?) 狀態而不產生任何作用’因此’如前—實施例中所述,驅 動單元2 1的功能是一個列驅動單元。 (請先閲讀背面之注意事項再填寫本頁) 第3圖係顯717有關本發明之可程式規劃驅動電路之又 一較佳實施例的一驅動單元31,相似於第一實施例,其亦 具有作為開關電晶體MPS、電流輸出電晶體MP〇、放電 電晶體MND以及多工器MUX 1〜3等設置,而與第一實施 例之主要不同在於另外設置有一作為自動鉗位預充電元件 之NMOS電晶體MNST,該電晶體“^^丁與電流輸出電晶 體MPO並聯,而構成一源極追隨器,亦即,電晶 之源極與汲極分別連接電晶體Μ p 〇之汲極與源極,電晶 體MNS Τ之閘極與電晶體μΡ 〇之閘極相連而共同連接至多 工器MUX3之輸出端Υ。 * 經濟部智慧財產局員工消費合作社印製 以上述之驅動電路,當多工器MUX 1〜3之控制端之 輸入信號CD/RD設為邏輯1時,其輸出端γ係切換連接第 一,入端12,此時,亦如前一實施例中所述,驅動單元η 的功能是一個行驅動單元,且電晶體ΜΝ S Τ之閘極係連接 偏壓輸出端VB,故當電晶體ΜΡΟ開始輸出定電流時,所 驅動的有機發光二極體的端電壓仍為〇V或低電壓甚至是 負電壓,而由於電晶體MNST的閘源極電壓VGS =偏壓 VB-有機發光二極體之端電壓,故vGS大於電晶體MNST 的臨界電壓Vth,因此預充電電晶體MNST會導通而以其 汲極源極電流IDS提供作為額外的大電流對所驅動的有機 發光二極體作快速預充電,所以端電壓會快速上升直到 VGS小於Vth為止,俾以達成自動鉗位預充電之效果。 本紙張尺度逋用中國國家標準(CNS ) Μ规格(2丨0X 29妙>釐) 453135 五、發明说明(r 而若控制端CD/RD的輸入信號設為邏輯〇時,每一多 工器MUX1〜3之輸出端γ係切換連接第一輸入端11,此 時,電晶體MNST之閘極連接電源,故將保持在關閉之狀 態而不產生任何作用,因此,如前一實施例中所述,驅動 單元3 1的功能是一個列驅動單元。 第4圖係為用以規劃本發明之可程式規劃驅動電路之 示意圖,其中,該驅動電路係由複數個可為前述任一實施 例之驅動單元11,21或31所排列组成,而每一驅動單元 II,21或3 1的控制端CD/RD之輸入為程式設定所控制, 例如,由微處理器41將控制資料寫入一移位暫存器42而 控制對每一驅動單元n,21或31之輸入,因此,以此可 程式規劃驅動電路來設計製作有機發光二極體驅動1<:時, 便可依有機發光發射平面顯示板像素數的組合,加以程式 規劃所需的行驅動器通道數與列驅動器通道數,譬如設計 成一個80通道可程式規劃驅動器便可以依需要規劃成 (64行驅動+ I 6列驅動)、(48行驅動+ 3 2列驅 動)、(3 2行驅動+ 4 8列驅動)或(1 6行驅動+ 6 4列 驅動)’甚至是單純的8 0行驅動或8 〇列驅動,以便運用 在更大的有機發光發射平面顯示板上’據此,無須使用分 開汉计製作的行驅動積體電路與列驅動積體電路,而以單 一之有機發光二極體驅動積體電路便可適應多種有機發光 發射平面顯示板之需求,故能達成節省成本與資源之效 果。 表紙張纽適用巾關家縣(CNS) A4^ (2丨Q χ 2你餐 ^1. ^^1 I ^1. I I— m · I t请先Mi*背面之泣意事項存填寫本萸) 订 經濟部智慧財產局w工消骨合作社印製 4 53 彳 3 5 A7 __________B7 五、發明説明(丨丨) 综上所陳,本發明無論就目的、手段及功效,在在均 顯不其迥異於習知技術之特徵,為有機發光發射平面顯示 板之驅動電路的製作上之一大突破,誠為一具產業上利用 性新穎性及進步性之發明,應符合專利申請要件,爰依 法提出申請。 ---------- 装-- (請先閲讀背面之注意事項再填寫本頁)With the driving unit 11 of the above driving circuit, when the input signal of the control terminal CD / RD of the multiplexers MUX1 to 3 is set to logic 1, the output terminal γ of each multiplexer MUX1 to 3 is switched to connect the second input Terminal 12, at this time, when the row input terminal COLI is at a low voltage level, the PMOS transistor MPS is turned on, so that the PMOS transistor MPO outputs a constant current from the row / column output terminal CRDO, and when the discharge control terminal DIS is high voltage When the level is on, the electric crystal MND is turned on to discharge, so the function of the drive unit Π is a row drive unit. 0 Printed by the employee consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs and if the input signal of the control end CD / RD is set to logic 0 The output terminal γ of each multiplexer MUX 1 ~ 3 is switched to the first input terminal π, then the multiplexer MUX1 changes the gate of the transistor MPS to the row input terminal ROWI, and the multiplexer MUX2 connects the transistor MND The gate of the transistor is also connected to the row input terminal ROWI, and the multiplexer MUX3 changes the gate of the transistor MPO to ground to force it to conduct, which is equivalent to a small resistance, and because the transistor MPS is connected and connected to the gate of MND To the row input ROWI, so this paper size of the drive unit 1 1 is suitable National Standard (CNS) A4 Specification (21〇 × 29M%) 453135 A7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs __B7_ V. Description of the Invention (8) The function becomes an inverter controlled by the row input terminal ROWI, also That's a column drive unit. FIG. 2 shows another programmable driving circuit related to the present invention. A driving unit 21 ′ of the preferred embodiment is similar to the previous embodiment, and also has a switching transistor M PS and a current output transistor μ P 〇 , The discharge transistor MND and multiplexers MUX1 ~ 3, etc., but the main difference from the previous embodiment is that a PM0s transistor MPPRE as a pre-charging element is additionally provided. The transistor MPPRE is connected in parallel with the transistor river. ? 〇, that is, the source and the transistor of the transistor MPPRE are respectively connected to the source and the drain of the transistor mpo, and the gate of the transistor MPPRE is connected to the output terminal of a multiplexer MUX4. The multiplexer The first input terminal π and the second input terminal 12 of the MUX4 are respectively connected to the power supply ν DD and the precharge control terminal PRECHARGE ° With the above drive circuit, when the control terminal of the multiplexer MUX 1 ~ 4, the input signal CD / When RD is set to logic 1, its output terminal γ is switched to connect to the second input terminal 12. At this time, as described in the previous embodiment, the function of the driving unit 21 is a row driving unit, and the transistor Mp pre The gate is connected to the precharging control terminal PRECHARGE, so the gate of the transistor M PPRE can be short-circuited to the ground briefly at the leading edge of the driving section, and an instantaneous large current is generated to quickly charge the stray capacitance to a high potential. The effect of precharging is 0. If the input signal of the control terminal CD / RD is set to logic 0, the output terminal of each multiplexer MUX1 ~ 4 is switched to connect to the first input terminal II. At this time, the gate of the transistor MPPPRE The pole is connected to the power supply, so it will be kept at the closed paper size. it property SS Jiaxian (CNS) Α4 specifications (21GX2 tender) " j .1 I ^^^ 1 ^^^ 1 — ^ 1.--· 11 11 {Please read the precautions on the back before filling this page ) 4 53 1 3 5 A7 B7 V. Description of the invention (?) State without any effect 'hence' as described in the previous embodiment, the function of the driving unit 21 is a column driving unit. (Please read the precautions on the back before filling this page.) Figure 3 shows a driving unit 31 of another preferred embodiment of the programmable driving circuit of the 717, similar to the first embodiment, which also It has settings as switching transistor MPS, current output transistor MP0, discharge transistor MND, and multiplexer MUX 1 ~ 3. The main difference from the first embodiment is that it is additionally provided with an automatic clamping pre-charging element. The NMOS transistor MNST is connected in parallel with the current output transistor MPO to form a source follower, that is, the source and the drain of the transistor are respectively connected to the drain of the transistor M p 〇 and The source and the gate of transistor MNS Τ are connected to the gate of transistor μP 〇 and are connected to the output terminal of multiplexer MUX3. * The consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs prints the above drive circuit. When the input signal CD / RD of the control terminal of the MUX 1 ~ 3 is set to logic 1, the output terminal γ is switched to be connected to the first and the input terminal 12. At this time, as described in the previous embodiment, the drive unit η's function is a row-driven The gate of the transistor MN S T is connected to the bias output terminal VB, so when the transistor MP0 starts to output a constant current, the terminal voltage of the driven organic light emitting diode is still 0V or low voltage or even Negative voltage, and because the gate-source voltage VGS of the transistor MNST = the bias voltage VB-the terminal voltage of the organic light-emitting diode, vGS is greater than the threshold voltage Vth of the transistor MNST, so the pre-charged transistor MNST will be turned on and The drain-source current IDS provides fast pre-charging of the driven organic light-emitting diode as an extra large current, so the terminal voltage will rise rapidly until VGS is less than Vth, so as to achieve the effect of automatic clamping pre-charging. Paper size adopts Chinese National Standard (CNS) M specification (2 丨 0X 29 Miao > centimeter) 453135 V. Description of the invention (r And if the input signal of the control end CD / RD is set to logic 0, each multiplexer The output terminal γ of MUX1 ~ 3 is switched to connect to the first input terminal 11. At this time, the gate of the transistor MNST is connected to the power supply, so it will remain closed without any effect. Therefore, as in the previous embodiment, Description, driver The function of 31 is a column driving unit. Figure 4 is a schematic diagram of a programmable driving circuit for planning the present invention, wherein the driving circuit is composed of a plurality of driving units 11 which can be any of the foregoing embodiments. 21 or 31 are arranged, and the input of the control end CD / RD of each drive unit II, 21 or 31 is controlled by the program setting. For example, the microprocessor 41 writes the control data into a shift register. 42 and control the input to each driving unit n, 21 or 31. Therefore, the programmable driving circuit can be used to design and manufacture the organic light emitting diode driver 1 <: Combination, plus the number of row driver channels and column driver channels required for program planning. For example, if an 80-channel programmable driver is designed, it can be planned as (64 row driver + I 6 column driver), (48 row driver + 32-row drive), (32-row drive + 4 8-row drive) or (16-row drive + 64-row drive) 'or even a simple 80-row drive or 80-row drive for use in larger Organic light emitting flat According to the display board, there is no need to use a row-driven integrated circuit and a column-driven integrated circuit that are manufactured separately, and a single organic light-emitting diode-driven integrated circuit can be adapted to a variety of organic light-emitting flat display panels. Demand, so it can achieve the effect of saving costs and resources. Sheet paper New Zealand is applicable to Guanjia County (CNS) A4 ^ (2 丨 Q χ 2 Your meal ^ 1. ^^ 1 I ^ 1. II— m · I t Please fill in the note on the back of Mi * ) Ordered by the Intellectual Property Bureau of the Ministry of Economic Affairs and printed by the Industry and Bone Reduction Cooperatives 4 53 彳 3 5 A7 __________B7 V. Description of the Invention (丨 丨) In summary, the present invention, regardless of its purpose, means and effects, is significantly different in Features that are quite different from the conventional technology. It is a major breakthrough in the production of the driving circuit of the organic light emitting flat display panel. It is an invention with industrial novelty and advancement. It should meet the requirements of patent application. submit application. ---------- Install-(Please read the precautions on the back before filling this page)

訂-------X 經濟部智慧財產局員工消費合作社印製 本纸張尺度適用中國國家標準(CNS > Α4規格(210Χ2衫公釐)Order ------- X Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economy This paper size applies to Chinese national standards (CNS > Α4 size (210 × 2 shirt mm)

Claims (1)

5 3 ·*1 3 5 4 ABCD 六、申請專利範圍 1. 一種可程式規劃驅動電路,主要包括有複數個驅 動單元,每一驅動單元包括: 一開關電晶體,其源極連接電源; 一電流輸出電晶體,其源極連接該開關電晶體之汲 極’其汲極作為該驅動單元之行/列輸出端; 一放電電晶體,其源極連接至該電流輸出電晶體之汲 極,其汲極接地; 一第一多工器,其輸出端連接該開關電晶體之閘極, 其第一輸入端及第二輸入端係分別作為該驅動單元之列輸 入端及行輸入端; 一第二多工器,其輸出端連接該放電電晶體之閘極, 其第一輸入端係連接該列輸入端,其第二輸入端係作為一 放電控制端;以及 一第三多工器,其輸出端連接該電流輸出電晶體之閘 極,其第一及及第二輸入端係分別與接地端及一偏壓輸出 端相連,其中,該第一、第二及第三多工器之控制端係共 同連接而作為可程式規劃控制端。 2 ·如申請專利範圍第1項所述之可程式規劃驅動電 路,其中,該開關電晶體及電流輸出電晶體均為PMOS電 晶體,該放電電晶體為NMOS電晶體。 3 .如申請專利範圍第2項所述之可程式規劃驅動電 路,其中,當該可程式規劃控制端之輸入信號設為邏輯1 (請先閱讀背面之注意事項再填寫本頁) 裝 Μί.译弋度適用申國國家標准(C'NS 坭格(2丨0x2v!4釐) 4 53 1 3 5 六、申請專利範圍 時,ί:多工器之輸出端係切換連接第二輸入端,而使該 駆動早元成為一行驅動單元。 .4申4專利|a圍第2项所述之可程式規劃驅動電 路,其中,當該可程式規劃控制端之輪入信號設為邏輯〇 時,每:多工器之輸出端係切換連接第一輸入端,而使該 驅動單元成為"列驅動單元。 。5 .-種可程式規劃驅動電路,主要包括有複數個驅 動單元,每一驅動單元包括: 一開關電晶體,其源極連接電源; -電流輸出電晶豸,其源極連接該開關電晶體之沒 其汲極作為該驅動單元之行/列輪出端; 一放電電晶體,其源極連接至該電流輸出電晶體之汲 其汲極接地; 一預充電電晶體,其源極與汲極分別連接該電源輸出 電晶體之源極與汲極; 一第一多工器,其輸出端連接該開關電晶體之閘極, 其第一輸入端及第二輸入端係分別作為該驅動單元之列輸 入端及行輸入端; —第二多工器,其輸出端連接該放電電晶體之閘極, 其第一輸入端係連接該列輸入端,其第二輸入端係作為一 放電控制端; 一第三多工器,其輸出端連接該電流輸出電晶體之閑 極,其第一及及第二輸入端係分別與接地端及—偏壓輸出 端相連;以及 極 極 尺度適用申gf國家標龙(ΓΝί; ) A4規格(210x297公釐) (請先閲讀背面之注意事項再填寫本頁) 裝. 訂 453135 A8 B8 C8 ------D8 六、申請專利範圍 ~~ —第四多工器,其輸出端連接該預充電電晶體之閘 極’其第一輸入端係連接電源,其第二輸入端係作為一預 充電控制端;其中,該第一、第二、第三及第四多工器之 控制端係共同連接以作為可程式規劃控制端。 6 ‘如申請專利範園第5項所述之可程式規劃驅動電 路,其中,該開關電晶體、電流輸出電晶體及預充電電晶 體均為PMOS電晶體,該放電電晶體為1^1^〇5電晶體。 7 ·如申請專利範圍第6項所述之可程式規劃驅動電 路’其中’當该可程式規劃控制端之輸入信號設為邏輯1 時,每一多工器之輸出端係切換連接第二輸入端,而使該 驅動單元成為一行驅動單元。 8,如申請專利範圍第7項所述之可程式規劃驅動電 路,其中,當該可程式規劃控制端之輸入信號設為邏輯〇 時,每一多工器之輸出端係切換連接第一輸入端,而使該 驅動單.元成為一列驅動單元。 9.—種可程式規劃驅動電路,主要包括有複數個驅 動單元’每一驅勒單元包括: 一開關電晶體,其源極連接電源,· 一電流輸出電晶體,其源極連接該開關電晶體之汲 極,其汲極作為該驅動單元之行/列輸出端: 一敌電電晶體,其源極連接至該電流輸出電晶體之汲 極,其汲極接地; 一自動鉗位預充電電晶體,其源極與汲極分別連接該 電流輸出電晶體之汲極與源極; ί請先閲讀背面之注意事項再填寫本頁) 訂 經-'ΛΓ部智Λ工消費合作Ti印龙 53 1 3 5 A8 B8 C8 _ __ DS 六、申請專利範圍 一第一多工器,其輸出端連接該開關電晶體之閘極, 其第一輸入端及第二輸入端係分別作為該驅動單元之列輸 入端及行輸入端; ^^^^1 ^^^^1 —^ϋ - - (請先閲讀背面之注意事項再填寫本頁) 第一多工器,其輸出端連接該放電電晶體之閘極及 該自動鉗位預充電電晶體之閘極,其第一輸入端係連接該 列輸入知,其第二輸入端係作為一放電控制端; 一第二多工器,其輸出端連接該電流輸出電晶體之閘 極,其第一及及第二輸入端係分別與接地端及一偏壓輸出 端相連’其中,該第一、第二及第三多工器之控制端係共 同連接以作為可程式規劃控制端。 1 0 .如申請專利範圍第9項所述之可程式規劃驅動電 路,其中,該開關電晶體及電流輸出電晶體均為p M〇 S電 曰Ε»體,該放電電晶體及自動鉗位預充電電晶體均為nm〇s 電晶體。 1 1 如申請專利範園第1 0項所述之可程式規劃驅動電 路,其中,當該可程式規劃控制端之輸入信號設為邏輯1 時,每一多工器之輸出端係切換連接第二輸入端,而使該 驅動單元成為一行驅動單元。 12_如申請專利範圍第1〇項所述之可程式規劃驅動電 路,其中,當該可程式規劃控制端之輸入信號設為邏輯〇 時,每一多工器之輸出端係切換連接第一輸入端,而使該 驅動單元成為—列驅動單元。 ( CNS ) A4現樁(:!i〇x29,4^y5 3 · * 1 3 5 4 ABCD 6. Scope of patent application 1. A programmable driving circuit, mainly including a plurality of driving units, each driving unit includes: a switching transistor, the source of which is connected to a power source; a current An output transistor whose source is connected to the drain of the switching transistor 'whose drain is used as the row / column output terminal of the driving unit; a discharge transistor whose source is connected to the drain of the current output transistor, which The drain is grounded; a first multiplexer whose output terminal is connected to the gate of the switching transistor, and its first input terminal and second input terminal are respectively used as the column input terminal and the row input terminal of the driving unit; Two multiplexers whose output terminals are connected to the gate of the discharge transistor, whose first input terminal is connected to the row of input terminals, and whose second input terminal is used as a discharge control terminal; and a third multiplexer, which The output terminal is connected to the gate of the current output transistor. The first and second input terminals are respectively connected to the ground terminal and a bias output terminal. Among them, the control of the first, second and third multiplexers is Common terminal And the control terminal as a planning program. 2 · Programmable driving circuit as described in item 1 of the scope of patent application, wherein the switching transistor and the current output transistor are both PMOS transistors, and the discharge transistor is an NMOS transistor. 3. Programmable planning drive circuit as described in item 2 of the scope of patent application, wherein when the input signal of the programmable planning control terminal is set to logic 1 (please read the precautions on the back before filling this page). Install Μί. The translation degree applies to the national standard of Shen Guo (C'NS Grid (2 丨 0x2v! 4%) 4 53 1 3 5 6. When applying for a patent, the output terminal of the multiplexer is switched to the second input terminal. The automatic early element becomes a row of drive units. .4 application 4 patent | a programmable planning drive circuit described in item 2 above, wherein when the turn-in signal of the programmable planning control terminal is set to logic 0, Each: The output terminal of the multiplexer is switched to connect to the first input terminal, so that the driving unit becomes a "row driving unit." 5 .- A programmable driving circuit, mainly including a plurality of driving units, each driving The unit includes: a switching transistor, the source of which is connected to a power source;-a current output transistor, the source of which is connected to the drain of the switching transistor as the output terminal of the row / column wheel of the driving unit; a discharging transistor Whose source is connected to this current output The drain of the crystal is connected to the drain; a precharged transistor whose source and drain are connected to the source and the drain of the power output transistor; a first multiplexer whose output is connected to the switching transistor. The gate, the first input terminal and the second input terminal are respectively used as the column input terminal and the row input terminal of the driving unit; a second multiplexer whose output terminal is connected to the gate of the discharge transistor, and its first The input terminal is connected to the row of input terminals, and the second input terminal is used as a discharge control terminal; a third multiplexer whose output terminal is connected to the free terminal of the current output transistor, and its first and second input terminals It is connected to the ground terminal and the bias output terminal respectively; and the polar scale is applicable to the national standard dragon (ΓΝί;) A4 size (210x297 mm) (please read the precautions on the back before filling this page). Order 453135 A8 B8 C8 ------ D8 6. Scope of patent application ~~-The fourth multiplexer, whose output terminal is connected to the gate of the precharged transistor ', its first input terminal is connected to the power source, and its second input The terminal is used as a pre-charge control terminal; In the control terminals of the first, second, third and fourth multiplexers are connected together as a programmable programming control terminal. 6 'The programmable programming driving circuit described in item 5 of the patent application park, Among them, the switching transistor, the current output transistor, and the pre-charged transistor are all PMOS transistors, and the discharge transistor is a 1 ^ 1 ^ 05 transistor. 7 · Programmable as described in item 6 of the scope of patent application When the input signal of the programmable planning control terminal is set to logic 1, the output terminal of each multiplexer is switched to the second input terminal, so that the driving unit becomes a row driving unit. The programmable planning driving circuit described in item 7 of the scope of patent application, wherein when the input signal of the programmable planning control terminal is set to logic 0, the output terminal of each multiplexer is switched to the first input terminal, The driving unit becomes a row of driving units. 9. A programmable drive circuit, which mainly includes a plurality of drive units. Each drive unit includes: a switching transistor whose source is connected to a power source, and a current output transistor whose source is connected to the switching circuit. The drain of the crystal, whose drain is used as the row / column output of the drive unit: an enemy transistor whose source is connected to the drain of the current output transistor, whose drain is grounded; an automatic clamp precharge The source and drain of the crystal are connected to the drain and source of the current output transistor respectively; ί Please read the precautions on the back before filling in this page) Scripture-'ΛΓ 部 智 Λ 工 consuming cooperation Ti Yinlong 53 1 3 5 A8 B8 C8 _ __ DS VI. Patent application scope-a first multiplexer, whose output is connected to the gate of the switching transistor, and its first input and second input are used as the drive unit respectively Column input and row input; ^^^^ 1 ^^^^ 1 — ^ ϋ--(Please read the precautions on the back before filling this page) The first multiplexer, whose output is connected to the discharge transistor Gate and the self-clamping pre-charged transistor For the gate, the first input terminal is connected to the row of inputs, and the second input terminal is used as a discharge control terminal; a second multiplexer, the output terminal of which is connected to the gate of the current output transistor, the first The first and second input terminals are respectively connected to the ground terminal and a bias output terminal. Among them, the control terminals of the first, second, and third multiplexers are commonly connected as programmable control terminals. 10. The programmable driving circuit as described in item 9 of the scope of the patent application, wherein the switching transistor and the current output transistor are both p MOS electric body, the discharge transistor and the automatic clamp The pre-charged transistors are all nmOs transistors. 1 1 The programmable planning driving circuit described in Item 10 of the patent application park, wherein when the input signal of the programmable planning control terminal is set to logic 1, the output terminal of each multiplexer is switched to connect to the first Two input terminals, so that the driving unit becomes a row driving unit. 12_ The programmable planning driving circuit as described in item 10 of the scope of patent application, wherein when the input signal of the programmable planning control terminal is set to logic 0, the output terminal of each multiplexer is switched to connect to the first The input terminal makes the driving unit a column driving unit. (CNS) A4 spot (:! I〇x29,4 ^ y
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8508514B2 (en) 2008-07-22 2013-08-13 Pervasive Display Co., Ltd. Display module and driving method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8508514B2 (en) 2008-07-22 2013-08-13 Pervasive Display Co., Ltd. Display module and driving method thereof

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