TW449788B - P-type modified lateral silicon controlled rectifier structure for electrostatic discharge protection - Google Patents
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4 49 788 五、發明說明(1) 5_1發明領域: 本發明有關於一種用於靜電放電(electrostatic discharge,ESD)保護的發控整流器 (silicon controlled rectifier,SCR) ’特別是有關於一種用於靜電放電保護 的ρ +連結修飾橫向梦控整流器(p+ bridging modified lateral silicon controlled rectifier, PMSCR) 〇 5-2發明背景: 矽控整流器為一種已知的閘流體》由於具有將極高阻 抗狀態切換至極低阻抗狀態的能力,因此廣泛應用於電源 裝置上。基於同樣的理由,將矽控整流器適當地設計即可 做為一種非常有效的靜電放電保護迴路^ 一簡單的橫向矽控整流器(lateral silicon controlled rectifier, LSCR)的橫截面圖如第一圖所示4 49 788 V. Description of the invention (1) 5_1 Field of invention: The present invention relates to a silicon controlled rectifier (SCR) for electrostatic discharge (ESD) protection. Discharge-protected ρ + bridging modified lateral silicon controlled rectifier (PMSCR) 〇5-2 Background of the invention: Silicon controlled rectifier is a known thyratron because it has a very high impedance state to extremely low The impedance state capability is widely used in power supply devices. For the same reason, a properly designed silicon controlled rectifier can be used as a very effective electrostatic discharge protection circuit ^ A cross-sectional view of a simple lateral silicon controlled rectifier (LSCR) is shown in the first figure
’基本上一石夕控整流器包含了一 pnpn的結構。一石夕控整流 器結構 1 0 0為一典型的橫向矽控整流器結構《此橫向矽控 整流器結構1 〇 〇是形成在一半導體層11 〇内。在此半導體層 Π0内有一輕摻雜Ν井112。在此半導體層110内另有一輕摻 雜Ρ井11 4,並與Ν井11 2鄰接。一重摻雜Ν型(Ν+)區域1 2 0 在1^井112中,並電氣接觸至一陽極1〇〇—重摻雜?型(? + 449788 五、發明說明(2) )區域126在P井114中,並電氣接觸至一陰極20。一P+區域 122在N井112中,且位於N+區域120與P+區域126之間,並 且電氣接觸至一陽極10。一N+區域1 24在P井114中,且位 於P+區域122與P+區域126之間,並且電氣接觸至一陰極20 。一場絕緣區域132在N井112中,且位於N+區域120與P+區 域1 2 2之間。一場絕緣區域1 3 6在P井114令,且位於N +區域 124與P·{•區域126之間。一場絕緣區域134在N井112與P井 114中,且位於N井Π 2與P井11 4之間,以致於部分重疊到n 井112與P井114間的結合面140。 在N井中的P+區域122作為矽控整流器的陽極,其中有 電洞流向N井。在P井中的N+區域j 24則作為矽控整流器的 陰極’其中有電子流向P井.藉由一個位於N井的N+接點 120來與N井連結,而p井則藉由一個位於p井的p+接點126 來與之連結》 ‘ 一矽控整流器可視為兩個雙載子電晶體。以陽極為射 極N井為基極和P井為集極形成一個PM電晶體,η ^另 外,以陰極為射極、ρ井為基極和Ν井為集極形成一個η 電晶體,Τ2。此矽控整流器的等效電路如第二圖所示。苴 中,Τ1與Τ2分別代表ρηρ224與ηρη222電晶體',R ?‘Basically a stone evening rectifier contains a pnpn structure. A stone-controlled rectifier structure 100 is a typical lateral silicon-controlled rectifier structure. This lateral silicon-controlled rectifier structure 100 is formed in a semiconductor layer 110. There is a lightly doped N-well 112 in the semiconductor layer Π0. There is another lightly doped P well 11 4 in the semiconductor layer 110, and it is adjacent to the N well 11 2. A heavily doped N-type (N +) region 1 2 0 is in 1 ^ well 112 and is in electrical contact with an anode 100—heavily doped? Type (? + 449788 V. Description of the Invention (2)) The region 126 is in the P well 114 and is in electrical contact with a cathode 20. A P + region 122 is in the N well 112 and is located between the N + region 120 and the P + region 126 and is in electrical contact with an anode 10. An N + region 1 24 is in the P well 114 and is located between the P + region 122 and the P + region 126 and is in electrical contact with a cathode 20. The field insulation region 132 is in the N well 112 and is located between the N + region 120 and the P + region 1 2 2. A field insulation region 1 3 6 is located in the P well 114, and is located between the N + region 124 and the P · {• region 126. The field insulation region 134 is in the N well 112 and the P well 114, and is located between the N well Π 2 and the P well 114, so as to partially overlap the junction surface 140 between the n well 112 and the P well 114. The P + region 122 in the N-well serves as the anode of the silicon controlled rectifier, in which holes flow to the N-well. The N + region j 24 in well P is used as the cathode of the silicon controlled rectifier, where electrons flow to well P. It is connected to well N by an N + contact 120 located in well N, and well p is connected by a well located in p The p + contact 126 is connected to it "" A silicon controlled rectifier can be regarded as two bipolar transistors. A PM transistor is formed with the anode as the emitter and the N well as the base and the P well as the collector. In addition, a cathode is formed with the emitter, the ρ well is used as the base, and the N well is used as the collector to form an η transistor. T2 . The equivalent circuit of this silicon controlled rectifier is shown in the second figure. In 苴, T1 and T2 respectively represent ρηρ224 and ηρη222 transistors', R?
與Rp-well 2 1 4則代表N井電阻與P井電阻。 eU 當矽控整流器作為一靜電放電保護迴路時,其 視為And Rp-well 2 1 4 represents N-well resistance and P-well resistance. eU When a silicon controlled rectifier is used as an electrostatic discharge protection circuit, it is regarded as
ΗΗ
第6頁 788Page 788
月 曰 修正 索號 89^15837 五、發明說明(3) 個一接頭裝置,陽極盘N并遠接力一扣 ^ 开遲接在起,而陰極與P井連接 在:起。要開啟矽控整流器可以藉由p井中的電洞流使陰 極產生正向偏壓,如同在 — OS電晶體中觸動η邱一般,或 疋藉由Ν井中的電子流來開啟ρηρ。在低電流時,典型的 ηρη增益(gain)約比ρηρ大一冪次(〇rder),所以啟動一 npri要較啟動一pnp更為容易。因此,引發電壓(tHgger voltage)定義為井至底材的累增崩潰電壓Uvaianche breakdown voltage),引發電流(trigger current)亦 以相似上述方式定義。 作為靜電放電保護的矽控整流器能夠承受相當高的靜 電放電應力(ESD stress )。當矽控整流器一引發時,其 便能提供良好的保護。然而,先前技術中的矽控整流器的 問題是其引發電壓過高。在較先進的⑶⑽製程中η井至底 材的累增崩潰電壓大約5 〇 V ^所以橫向矽控整流器的引發 電位並不夠低至允許其單獨使用在靜電放電保護上。為了 使石夕控整流器做為一個有效的靜電放電保護迴路,引發電 位必須降低。 一修飾橫向矽控整流器(modified lateral SCR, MLSCR )被提出來。它是使用一個額外的N+擴散在N井的邊 緣來完成的’如第三圖所示。—矽控整流器結構3 0 0為一 典型的修飾橫向矽控整流器結構。此修飾橫向矽控整流器 結構3 00是形成在一半導體層310内。在此半導體層3 10内Modification No. 89 ^ 15837 V. Description of the invention (3) One-connector device, anode plate N and remote relay one buckle ^ Open late connected at the beginning, and the cathode and P well connected at the beginning. To turn on the silicon-controlled rectifier, the cathode can be forward-biased by the hole current in p-well, just as n-Qiu is touched in the OS transistor, or 开启 nρ can be turned on by the electron current in N-well. At low currents, the typical ηρη gain is approximately one power greater than ρηρ, so starting an npri is easier than starting a pnp. Therefore, the trigger voltage (tHgger voltage) is defined as the cumulative breakdown voltage Uvaianche breakdown voltage from the well to the substrate, and the trigger current is also defined in a similar manner to the above. Silicon controlled rectifiers as electrostatic discharge protection can withstand relatively high electrostatic discharge stress (ESD stress). When the silicon controlled rectifier is triggered, it provides good protection. However, the problem with the prior art silicon controlled rectifiers is that their induced voltage is too high. In the more advanced CDD process, the cumulative breakdown voltage from η well to the substrate is about 50 V ^ so the initiation potential of the lateral silicon controlled rectifier is not low enough to allow it to be used alone for electrostatic discharge protection. In order to make Shi Xikong rectifier as an effective electrostatic discharge protection circuit, the induced potential must be lowered. A modified lateral silicon controlled rectifier (MLSCR) was proposed. It is done using an additional N + diffusion at the edge of the N well as shown in the third figure. — Silicon controlled rectifier structure 300 is a typical modified lateral silicon controlled rectifier structure. The modified lateral silicon controlled rectifier structure 300 is formed in a semiconductor layer 310. Within this semiconductor layer 3 10
第7頁 2001.05.18. 007 449788 五、發明說明(4) 有一輕摻雜N井312〇在此半導體層310内另有一輕摻雜P井 314,並且與N井31 2鄰接。一 N+區域320在N井31 2中,並電 氣接觸至一陽極10。一 P+區域 326在P井314中,並電氣接 觸至一陰極20。一 P+區域 322在N井3 12中,且位於N+區域 32 0與P+區域32 6之間,並且電氣接觸至一陽極10。一 N+區 域324在P井3 14中,且位於P+區域 322與P+區域326之間, 並且電氣接觸至一陰極20。一 N+區域 328在N井312與P井 3 14之中,且位於P+區域322與N+區域 324之間,以致於部 分重疊到N井3 1 2與P井31 4間的接合面3 4 0。 一場絕緣區域33 2在N井312中,且位於N+區域32 0與P + 區域3 2 2之間。一場絕緣區域3 3 4在N井3 1 2中,且位於P +區 域3 22與N+區域328之間。一場絕緣區域336在P井3 14中, 且位於N +區域3 2 8與N +區域3 2 4之間。一場絕緣區域3 3 8在P 井314中’且位於N+區域324與P+區域326之間。 現在石夕控整流器的崩潰^ 一…,/ 土仰苜於田此蒴外 的η +擴政至底材的崩潰電位,而引發電位現在則大約為.2 〇 -25V。然而,相較於閘極氧化物的崩潰電位,修飾橫向矽 3 2的引發電位仍然太大。如果沒有有效的二級保護 電;Ϊ::ί控整流器仍然無法有效保護輸入接 更進一步減少引發電位可以使用一閘極二極體置於ηPage 7 2001.05.18. 007 449788 V. Description of the invention (4) There is a lightly doped N well 3120. In this semiconductor layer 310, there is also a lightly doped P well 314, which is adjacent to the N well 31 2. An N + region 320 is in the N well 31 2 and is in electrical contact with an anode 10. A P + region 326 is in P well 314 and is in electrical contact with a cathode 20. A P + region 322 is in the N well 3 12 and is located between the N + region 32 0 and the P + region 32 6 and is in electrical contact with an anode 10. An N + region 324 is in the P well 314, is located between the P + region 322 and the P + region 326, and is in electrical contact with a cathode 20. An N + region 328 is between N well 312 and P well 3 14 and is located between P + region 322 and N + region 324, so that it partially overlaps the junction 3 between N well 3 1 2 and P well 31 4 3 4 0 . A field insulation region 33 2 is in the N well 312 and is located between the N + region 32 0 and the P + region 3 2 2. A field insulation region 3 3 4 is in the N well 3 1 2 and is located between the P + region 3 22 and the N + region 328. The field insulation region 336 is in the P well 3 14 and is located between the N + region 3 2 8 and the N + region 3 2 4. A field insulation region 3 3 8 is in P well 314 'and is located between N + region 324 and P + region 326. Now the collapse of Shi Xi controlled rectifier ^ I ..., / 仰 + outside the field η + expands to the collapse potential of the substrate, and the initiation potential is now about .20 -25V. However, compared to the breakdown potential of the gate oxide, the initiation potential of the modified lateral silicon 32 is still too large. If there is no effective secondary protection, Ϊ :: the controlled rectifier still cannot effectively protect the input connection. To further reduce the initiation potential, a gate diode can be used to place η
第8頁 五、發明說明(5) 并邊緣來達成,如第四圖所示。一 >ε夕控整流器結構 40 0為 一典蜜的低電位引發砂控整流器(a low voltage trigger SCR* LVTSCR)結構。此低電位引發矽控整流器結構400是 形成在一半導體層410内。在此半導體層410内有一輕摻雜 N井412。在此半導體層 410内另有一輕摻雜P井414,並且 與N井41 2鄰接。一N+區域 42 0在N井41 2中,並電氣接觸至 一陽極1 0。一 P+區域 426在P井41 4中,並電氣接觸至一陰 極20。一 P+區域42 2在N井4 12中,且位於N+區域42 0與P+區 域 426之間,並且電氡接觸至一陽極1〇。一 N+區域424在P 井41 4中’且位於P+區域422與P+區域 426之間,並且電氣 接觸至一陰極20。一 N+區域 42 8在N井412與P井41 4之中, 且位於P {區域4 2 2與N +區域 4 2 4之間,以致於部分重疊到N 井41 2與P井41 4間的接合面4 4 0。 一場絕緣區域4 3 2在N井41 2中》且位於N +區域4 2 0與P + 區域4 2 2之間。一場絕緣區域4 3 4在N井41 2中,且位於p +區 域422與N+區域 428之間。一場絕緣區域438在P井4 14中, 且位於N+區域 424與P +區域426之間。一閘極450與一絕緣 體比如閛極氧化物4 5 2在P井41 4上,且位於N +區域4 2 8與N + 區域42 4之間’並且電氣接觸至陰極20。因此,閘極450、 N+區域428與N+區域424形成一類似nMOS結構且本質上如同 一 nMOS電晶體一般。低電位引發矽控整流器的引發電位相 當於一個具有與前述類似η M 0S結構相同絕緣體厚度與通道 長度的nMOS電晶體的崩潰電位。Page 8 V. Description of the invention (5) and edge to achieve, as shown in the fourth figure. A > ε evening control rectifier structure 400 is a low voltage triggering sand control rectifier (a low voltage trigger SCR * LVTSCR) structure. The low-potential-triggered silicon-controlled rectifier structure 400 is formed in a semiconductor layer 410. There is a lightly doped N-well 412 in the semiconductor layer 410. There is another lightly doped P-well 414 in the semiconductor layer 410, which is adjacent to the N-well 41 2. An N + region 42 0 is in the N well 41 2 and is in electrical contact with an anode 10. A P + region 426 is in the P well 41 4 and is in electrical contact with a cathode 20. A P + region 42 2 is in the N well 4 12, is located between the N + region 42 0 and the P + region 426, and is electrically contacted to an anode 10. An N + region 424 is in P well 414 and is located between P + region 422 and P + region 426, and is in electrical contact with a cathode 20. An N + region 42 8 is between N well 412 and P well 41 4, and is located between P {area 4 2 2 and N + region 4 2 4, so that it partially overlaps between N well 41 2 and P well 41 4的 接面 4 4 0。 The joint surface 4 4 0. A field insulation region 4 3 2 is in the N well 41 2 ″ and is located between the N + region 4 2 0 and the P + region 4 2 2. A field insulation region 4 3 4 is in the N well 41 2 and is located between the p + region 422 and the N + region 428. The field insulation region 438 is in the P well 414 and is located between the N + region 424 and the P + region 426. A gate 450 and an insulator such as a hafnium oxide 4 5 2 are on the P well 41 4 and are located between the N + region 4 2 8 and the N + region 42 4 ′ and are in electrical contact with the cathode 20. Therefore, the gate 450, the N + region 428 and the N + region 424 form an nMOS-like structure and are essentially like an nMOS transistor. The initiation potential of the low-potential-triggered silicon-controlled rectifier is equivalent to the collapse potential of an nMOS transistor with the same insulator thickness and channel length as the aforementioned η M 0S structure.
第9頁 449783 ‘ - 五、發明說明(6) 這種裝置的引發電位大約10-15V。因為其低引發電位 ,所以這些裝置被稱為低電位引發矽控整流器或簡寫為 LVTSCK。但是低電位引發矽控整流器的靜電放電效率會因 為nMOS閘極化而衰退,特別是在矽化金屬製程上。為克服 這些問題,本發明提出一種新的矽控整流器結構。 5 - 3發明目的及概述. 本發明的目的是提供一種新的改進的矽控整流器。一 P+區域而非N+區域在N井與P井中,以致於該區域部分重 疊到N井與P井的接合面。此種新的矽控整流器的引發電位 猶大於低電位引發石夕控整流器的引發電位,但是比修飾橫 向矽控整流器的引發電位小。 〇 本發明的另一目的是提供一有效的靜電放電保護裝置 «測試此種新的矽控整流器的人體模式效率(human body model performance)並與修飾橫向矽控整流器與低電位引 發矽控整流器的結果比較。此種新的矽控整流器不論在阻 絕石夕化金屬生成的結構(silicide-blocked structure) 或有石夕化金屬生成的結構(siHcided structure)中,均 發現其效率較修飾橫向矽控整流器與低電位引發矽控整流 器更好。Page 9 449783 ‘-V. Description of the invention (6) The initiation potential of this device is about 10-15V. Because of their low trigger potential, these devices are called low-potential-triggered silicon controlled rectifiers or LVTSCK for short. However, the electrostatic discharge efficiency of the silicon controlled rectifier caused by the low potential will decline due to the nMOS gate polarization, especially in the silicided metal process. To overcome these problems, the present invention proposes a new silicon controlled rectifier structure. 5-3 Object and Summary of the Invention The object of the present invention is to provide a new and improved silicon controlled rectifier. A P + region, rather than an N + region, is in wells N and P, so that this region partially overlaps the junction of wells N and P. The initiation potential of this new silicon-controlled rectifier is greater than the initiation potential of the low-voltage-triggered stone-controlled rectifier, but smaller than that of the modified lateral silicon-controlled rectifier. 〇 Another object of the present invention is to provide an effective electrostatic discharge protection device «to test the human body model performance of this new silicon controlled rectifier and to modify the horizontal silicon controlled rectifier and low potential induced silicon controlled rectifier. Compare results. This new silicon-controlled rectifier is found to be less efficient than modified lateral silicon-controlled rectifiers in both silicide-blocked structures and siHcided structures. Potential-triggered silicon-controlled rectifiers are better.
第10頁 4 49 788 五、發明說明(7) ^述本發.明的目的可以一 p+連結修倚橫向矽控整流器 結構使得在低電位即可引發此石夕控整流器。此 橫向砍控整流器的結構類似先前技術的修飾橫 '=2器。如本發明所述,連結修飾橫向梦控整 中,田:Λ:至少包含一第一輕摻雜區域形成於半導體底材 一道為一井區域,其中此第一輕摻雜區域具有一第 半鉍比如ρ型。此外,有一第二輕摻雜區域形成於 2體底材t與該第一輕摻_域相鄰1帛來作為一井 二丄,其具有—第二導電型其導電性相反於第一導電型, 成;型二以及有一具有第一導電型的第一重摻雜區域形 S 摻雜區域中’並且電氣輕合至-第-節點比如 =—。_以及有一具有第二導電型的第二重摻雜區域形成於 。了輕摻雜區域中,並且電氣耦合至一第二節點比如陽極 一有了具有第二導電型的第三重摻雜區域形成於該第 雜區域中,且位於第一重摻雜區域與第二重摻雜區 電型二蜜並且電氣耦合至第一節點。以及有一具有第’一導 I型的第四重摻雜區域形成於第二輕摻雜區域中,且2 令ΐ重ί雜區域與第三重摻雜區域之間,並且電氣耦入至 二郎點。以及有一第五重摻雜Ρ型區域形成於第一 ,區域與第二輕摻雜區域之中,以致於部分重疊 =雜區域與第二輕摻雜區域之間的接合自,並且位:: 一重摻雜區域與第四重摻雜區域之間。 :第Page 10 4 49 788 V. Description of the invention (7) The purpose of the present invention is to use a p + connection to repair a lateral silicon controlled rectifier structure so that the Shixi controlled rectifier can be triggered at a low potential. The structure of the horizontal chopping rectifier is similar to the modified horizontal '= 2 device of the prior art. According to the present invention, in the connection modification horizontal dream control, Tian: Λ: includes at least a first lightly doped region formed on a semiconductor substrate as a well region, wherein the first lightly doped region has a first half Bismuth is, for example, p-type. In addition, a second lightly-doped region is formed on the two-body substrate t adjacent to the first lightly-doped domain 1 y to serve as one well and two ytterbium, which has a second conductivity type whose conductivity is opposite to the first Type II, Type II, and a first heavily doped region with a first conductivity type in the S-doped region, and are electrically closed to the -th node such as =-. _ And a second heavily doped region having a second conductivity type is formed at. In the lightly doped region, and electrically coupled to a second node, such as the anode, a third heavily doped region having a second conductivity type is formed in the second impurity region, and is located between the first heavily doped region and the first The double-doped region is electrically dimer and electrically coupled to the first node. And a fourth heavily doped region having a first-conducting I-type is formed in the second lightly doped region, and the two heavily doped regions and the third heavily doped region are electrically coupled to the Erlang point. And a fifth heavily doped P-type region is formed in the first, the second region and the second lightly doped region, so that the partial overlap = the junction between the hetero region and the second lightly doped region is: Between a heavily doped region and a fourth heavily doped region. : Article
^9788- 五、發明說明(8) : -- 上述的第一輕摻雜區 當底材摻雜具有第一導體型時 域並非是絕對需要的。 5-4發明詳細說明: 本發明的較佳實施例將詳細討論如後。實施例乃是用 以描述使用本發明的一特定範例,並非用以限定本發明的 範圍。 本發明提出一種新的矽控整流器結構,其中一 p+區域^ 9788- V. Description of the invention (8):-The above-mentioned first lightly doped region is not absolutely necessary when the substrate is doped with the first conductive type time domain. 5-4 Detailed Description of the Invention: The preferred embodiments of the present invention will be discussed in detail later. The embodiment is used to describe a specific example of using the present invention and is not intended to limit the scope of the present invention. The invention proposes a new silicon controlled rectifier structure, in which a p + region
而非N+區域在N井與p井中’以致於該P+區域部分重疊到N 井與P井的接合面。此新矽控整流器的電流對電位曲線關 係圖也將予以測量以決定其引發電位。並測試此種新的矽 控整流器的人體模式(human body model,ΗΒΜ)效率並與 修飾橫向矽控整流器與低電位引發矽控整流器的結果比較 〇 第五圖為本發明的較佳實施例的概要截面圖。一矽控 整流器結構5 0 0為一典型的p+連結修飾橫向矽控整流器(p + bridging modified lateral SCR’ PMSCR)結構。此 P+連 結修飾橫向矽控整流器結構5 0 0是形成在一半導體層51 0内 。在此半導體層 510内有一輕摻雜N井512。在此半導體層 5 10内另有一輕摻雜P井514,並且與N井5 12鄰接。一 N+區The non-N + region is in the N and p wells' so that the P + region partially overlaps the junction of the N and P wells. The new silicon controlled rectifier's current versus potential curve will also be measured to determine its initiating potential. And test the human body model (ΗBM) efficiency of this new silicon controlled rectifier and compare it with the results of modified lateral silicon controlled rectifier and low potential induced silicon controlled rectifier. The fifth figure is a preferred embodiment of the present invention. A schematic cross-sectional view. A silicon controlled rectifier structure 500 is a typical p + bridging modified lateral SCR ’PMSCR structure. The P + connection modifies the lateral silicon controlled rectifier structure 500 is formed in a semiconductor layer 510. There is a lightly doped N-well 512 in the semiconductor layer 510. A lightly doped P-well 514 is located in the semiconductor layer 5 10 and is adjacent to the N-well 5 12. One N + zone
第12頁 449788 五、發明說明(9) 域520在N井51 2中’並電氣接觸至一陽極1〇。一 p+區域526 在P井51 4中’並電氣接觸至一陰極20。一 P+區域52 2在N井 512中’且位於1H區域520與P +區域526之間,並且電氣接 觸至一陽極1 〇。一 N+區域524在P井5 14中,且位於P+區域 5 2 2與P +區域5 2 6之間’並且電氣接觸至一陰極2〇。一 p +區 域528在N井512與p井514之中,且位於P+區域522與N+區域 524之間’以致於部分重疊到N井5 1 2與P井5 1 4間的接合面 540 » 一場絕緣區域532在N井512中,且位於N+區域52〇與p + 區域522之間。一場絕緣區域5 34在N井512中,且位於p+區 域522與P+區域528之間。一場絕緣區域5 36在p井514中, 且位於P+區域528與N+區域5 24之間。一場絕緣區域538在p 井514中,且位於N+區域524與P+區域526之間。Page 12 449788 V. Description of the invention (9) The domain 520 is in the N well 51 2 'and is in electrical contact with an anode 10. A p + region 526 is in P well 51 4 'and is in electrical contact with a cathode 20. A P + region 522 is in the N well 512 'and is located between the 1H region 520 and the P + region 526, and is in electrical contact with an anode 10. An N + region 524 is in P well 5 14 and is located between P + region 5 2 2 and P + region 5 2 6 'and is in electrical contact with a cathode 20. A p + region 528 is between N well 512 and p well 514 and is located between P + region 522 and N + region 524 'so as to partially overlap to the junction 540 between N well 5 1 2 and P well 5 1 4 » The field insulation region 532 is in the N well 512 and is located between the N + region 52 and the p + region 522. A field insulation region 5 34 is in the N well 512 and is located between the p + region 522 and the P + region 528. The field insulation region 5 36 is in the p-well 514 and is located between the P + region 528 and the N + region 5 24. The field insulation region 538 is in the p-well 514 and is located between the N + region 524 and the P + region 526.
P+連結修飾橫向矽控整流器的電流對電位 如第六圖所示。曲線61至63分別為p+連結修飾橫向石= 流器、修㈣向矽控整、流器及低電位引發矽控整流“ 流對電位曲=係圖。由圖可以發現p+連結修 JThe current vs. potential of the P + connection modifies the lateral silicon controlled rectifier as shown in Figure 6. Curves 61 to 63 are p + link modified lateral stone = flow device, repaired silicon controlled rectifier, flow device, and low potential induced silicon controlled rectification. "Flow to potential curve = system diagram. From the figure we can find p + connection repair J
=器的弓I發電位大約是12_13V1大於低電位引= /爪器,但小於修飾橫向石夕控整流器。 t 的人體模型效率並與 控整流器的結果比較 測試P+連結修飾橫向矽控整流器 修飾橫向石夕控整流器與低電位引發&The generator's bow I power level is about 12_13V1, which is greater than the low-potential lead = / claw device, but smaller than the modified lateral stone evening rectifier. The human body model efficiency of t is compared with the results of the controlled rectifier. Test P + connection to modify the lateral silicon controlled rectifier.
449788 五、發明說明(ίο) 。所有待測結構均以相同的大小5 〇仁m X 2 0只m來設計, 且安裝設計的參數均保持相同,在低電位引發矽控整流器 中nMOS閘極的長度為〇. 5仁m。此外’具有與沒有石夕化金屬 阻絕幕罩(si lie ide block mask)的結構也要予以考慮。 對於人體模型測試,起始電位設K1〇〇v,增加量為5〇v。 測試的結果如第七圖所示。可以發現p+連結修飾橫向矽控 整流器在阻絕矽化金屬生成的結構(silicide_M〇cked structure )與有矽化金屬生成的結構(siiicided structure )時均有高的效率,分別為6, 7KV and 5. 7KV。 效率指數(performance indices)分別為 6.7V/ //ms and 5. 7V/ 此外,亦可發現p+連結修飾橫向矽控整流器 不論在阻絕矽化金屬生成的結構或有矽化金屬生成的結構 中,均發現其人體模型效率較修飾橫向 位引發矽控整流器更好。 ^449788 V. Description of the Invention (ίο). All the structures to be tested are designed with the same size of 50 μm × 20 m, and the parameters of the installation design remain the same. The length of the nMOS gate in the low-potential induced silicon controlled rectifier is 0.5 μm. In addition, a structure with and without a si lie ide block mask must also be considered. For the human body model test, the initial potential was set to 100 volts and the increase was 50 volts. The test results are shown in Figure 7. It can be found that the p + link modified lateral silicon controlled rectifiers have high efficiency when blocking silicide_Mocked structure and siiicided structure, which are 6, 7KV and 5. 7KV, respectively. The performance indices are 6.7V / // ms and 5. 7V /. In addition, it can also be found that the p + link modified lateral silicon controlled rectifiers are found in structures that prevent silicided metals or structures that have silicided metals. The efficiency of its human body model is better than that of modified laterally-triggered silicon-controlled rectifiers. ^
在製造本發明的梦控整流 前技術並無不同且已廣為人知 再詳述。以上所述僅為本發明 以限定本發明之申5青專利範圍 示之精神下所完成之等效改變 申請專利範圍内。 器結構時可用到的方法與先 亦無特別的限制,因此不 之較佳實施例而已,並非用 ,凡其它未脫離本發明所揭 或修飾,均應包含在下述之The technology prior to the manufacture of the dream-controlled rectification of the present invention is not different and is well known and will be described in detail. The above description is only within the scope of the patent application for equivalent changes made in the spirit of the present invention to limit the scope of the present invention. There are no special restrictions on the methods and methods that can be used in the device structure. Therefore, it is not a preferred embodiment, and is not used. Anything that does not depart from or be modified by the present invention should be included in the following.
449788 圖式簡單說明 第一圖顯示一典型的橫向矽控整流器(LSCR)的橫截 面圖。 第二圖顯示一橫向矽控整流器的等效電路圖。 第三圖顯示一典型的修飾横向矽控整流器(MLSCR)的 橫截面圖。 第四圖顯不一低電位引發矽控整流器(LHSCR)的橫 截面圖。 第五圖顯示一 P+連結修飾橫向矽控整流器(pMSCK)的 橫截面圖° 第六圖顯示P+連結修飾橫向矽控整流器、修飾橫向石夕 控整流器及低電位引發矽控整流器的電流.對電位曲線關係 圖。 第七圖顯示P+連結修飾橫向矽控整流器,修飾橫向石夕 控整流器以及低電位引發矽控整流器的人體模式(HBM)效 率〇 主要部分之代表符號: 1 0陽極449788 Brief description of the diagram The first diagram shows a cross-sectional view of a typical lateral silicon controlled rectifier (LSCR). The second figure shows the equivalent circuit diagram of a lateral silicon controlled rectifier. The third figure shows a cross section of a typical modified lateral silicon controlled rectifier (MLSCR). The fourth figure shows a cross-section of a low-potential-triggered silicon controlled rectifier (LHSCR). The fifth figure shows a cross-sectional view of a P + link modified lateral silicon controlled rectifier (pMSCK) ° The sixth figure shows the P + linked modified lateral silicon controlled rectifier, a modified lateral stone controlled rectifier, and the low-current induced silicon controlled rectifier current. Curve diagram. The seventh figure shows the human body model (HBM) efficiency of the P + link modified lateral silicon controlled rectifier, modified horizontal stone controlled rectifier, and low-potential induced silicon controlled rectifier. 0 Representative symbols of main parts: 1 0 anode
ί 4 49 70 8 圖式簡單說明 20陰極 1 0 0典型的横向矽控整流器結構 112輕摻雜N井 114輕摻雜P井 120重摻雜N型區域 122重摻雜P型區域 124重摻雜N型區域 126重摻雜P型區域 132場絕緣區域 134場絕緣區域 1 3 6場絕緣區域 1 4 0 結合面 .212 Rn_ffell ,N 井電阻 214 Rp_well ,P 井電阻 222 T2,npn電晶體 224 ΤΙ , pnp電晶體 3 0 0典型的修飾橫向矽控整流器結構 312輕摻雜N井 314輕摻雜P井 320重摻雜N型區域 322 重摻雜P型區域 324 重摻雜N型區域 326重摻雜P型區域 328 重摻雜N型區域ί 4 49 70 8 Schematic description of 20 cathode 1 0 0 typical lateral silicon controlled rectifier structure 112 lightly doped N well 114 lightly doped P well 120 heavily doped N-type region 122 heavily doped P-type region 124 heavily doped Miscellaneous N-type region 126 Heavily doped P-type region 132 Field insulating region 134 Field insulating region 1 3 6 Field insulating region 1 4 0 Joint surface .212 Rn_ffell, N well resistance 214 Rp_well, P well resistance 222 T2, npn transistor 224 T1, pnp transistor 3 0 0 Typical modified lateral silicon controlled rectifier structure 312 Lightly doped N-well 314 Lightly doped P-well 320 Heavy-doped N-type region 322 Heavy-doped P-type region 324 Heavy-doped N-type region 326 Heavily doped P-type region 328 Heavily doped N-type region
第16頁 449788 圖式簡單說明 3 3 2場絕緣區域 3 34場絕緣區域 3 3 6場絕緣區域 3 3 8場絕緣區域 340結合面 4 0 0典型的低電位引發矽控整流器結構 4 1 2輕摻雜N井 4 1 4輕摻雜P井 420重摻雜N型區域 422重摻雜P塑區域 424重摻雜N型區域 426重摻雜P型區域 428重摻雜N型區域 4 3 2場絕緣區域 4 3 4場絕緣區域 4 3 8場絕緣區域 440結合面 4 5 0閘極 4 5 2閘極氧化物 5 00典型的P+連結修飾橫向矽控整流器結構 51 2輕摻雜N井 5 1 4輕摻雜P井 520重摻雜N型區域 . 5 2 2重摻雜P型區域Page 16 449788 Brief description of the diagram 3 3 2 field insulation area 3 34 field insulation area 3 3 6 field insulation area 3 3 8 field insulation area 340 bonding surface 4 0 0 Typical low potential induced silicon controlled rectifier structure 4 1 2 light Doped N-well 4 1 4 Lightly doped P-well 420 Heavily-doped N-type region 422 Heavily-doped P-type region 424 Heavily-doped N-type region 426 Heavily-doped P-type region 428 Heavily-doped N-type region 4 3 2 Field insulation area 4 3 4 Field insulation area 4 3 8 Field insulation area 440 Bonding surface 4 5 0 Gate 4 5 2 Gate oxide 5 00 Typical P + connection modified lateral silicon controlled rectifier structure 51 2 Lightly doped N well 5 1 4 Lightly doped P well 520 Heavily doped N-type region. 5 2 2 Heavily doped P-type region
第17頁 4 49 788 圖式簡單說明 5 24重摻雜N型區域 526重摻雜P型區域 5 2 8重摻雜P型區域 5 3 2場絕緣區域 5 3 4場絕緣區域 5 3 6場絕緣區域 5 3 8場絕緣區域 5 4 0結合面 61 P+連結修飾橫向矽控整流器的電流對電位曲線關係 圖 62 修飾橫向矽控整流器的電流對電位曲線關係圖 6 3 低電位引發矽控整流器的電流對電位曲線關係圖Page 17 4 49 788 Schematic illustration 5 24 heavily doped N-type region 526 heavily doped P-type region 5 2 8 heavily doped P-type region 5 3 2 field insulation region 5 3 4 field insulation region 5 3 6 field Insulation area 5 3 8 Field insulation area 5 4 0 Joining surface 61 P + connection Modified current vs. potential curve of lateral silicon controlled rectifier Figure 62 Modified current vs. potential curve of lateral silicon controlled rectifier Figure 6 3 Low potential induced silicon controlled rectifier Current vs. potential curve
第18頁Page 18
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US9748220B1 (en) | 2016-08-31 | 2017-08-29 | Global Unichip Corporation | Gate-bounded silicon controlled rectifier |
CN107785364A (en) * | 2016-08-31 | 2018-03-09 | 创意电子股份有限公司 | Silicon controlled rectifier with bounded grid |
CN107785364B (en) * | 2016-08-31 | 2020-04-21 | 创意电子股份有限公司 | Silicon controlled rectifier with bounded grid |
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