TW445515B - Physical vapor phase deposition device capable of producing a thin film with uniform thickness on the surface of a semiconductor chip - Google Patents

Physical vapor phase deposition device capable of producing a thin film with uniform thickness on the surface of a semiconductor chip Download PDF

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TW445515B
TW445515B TW88106069A TW88106069A TW445515B TW 445515 B TW445515 B TW 445515B TW 88106069 A TW88106069 A TW 88106069A TW 88106069 A TW88106069 A TW 88106069A TW 445515 B TW445515 B TW 445515B
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Taiwan
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metal
voltage
physical vapor
vapor deposition
semiconductor wafer
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TW88106069A
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Chinese (zh)
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Hsueh-Chung Chen
Juan-Yuan Wu
Water Lur
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United Microelectronics Corp
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Abstract

The present invention provides a physical vapor phase deposition device capable of producing a thin film with uniform thickness on the surface of a semiconductor chip. The device comprises a vacuum chamber which can be vacuumed and filled with Ar gas to produce Ar ions; a chip pad formed in the vacuum chamber for carrying a round semiconductor chip; a round metal target formed in the vacuum chamber and located above the semiconductor chip; a ring coil formed in the vacuum chamber and located between the metal target and the semiconductor chip, the ring coil having the same material as the metal target; and a voltage controller for controlling the voltages of the metal target, the chip pad, and the ring coil. When performing a physical vapor deposition, the voltage controller respectively generates a preset voltage difference between the metal target and the chip pad, and between the coil and the chip pad. Therefore, the Ar ions in the vacuum chamber can bombard the metal target and the ring coil, respectively, to release metal atoms, so as to uniformly sputter on the center and edge of the semiconductor chip and thus produce a thin film with uniform thickness on the surface of the semiconductor chip.

Description

4 4b 5 1 5 五、發明說明(1) 本發明係提供一物理氣相沈積(phy s i ca 1 vapor deposition,PVD)裝置,尤指一種能於半導體晶片表面產 生—厚度均勻之薄膜的PVD裝置。 半導體製程的物理氣相沈精(physical vapor deposition)是用來於半導體晶片表面形成金屬薄膜。一 層結構良好的金屬薄膜不能有空洞(void)殘存於金屬薄膜 内’並且金屬薄膜厚度必須有良好的均勻性 (uniformity) ° 請參閱圖一,圊一為習知PVD裝置1〇的結構示意圖β 習知PVD裝置1〇包含有—真空艙12,其可被抽至低真空並 通入氬氣(argon, Ar)以產生氬離子18,一晶片承座14用 來承放一圓形的半導趙晶片16 ’以及一圓形金屬把I?。 PVD裝置1〇會產生内建電場,真空艙12内的氬離子18受内 建電場的影響撞擊金屬靶17而造成離子森擊(i〇n bombardment),進而撞出金屬靶表面的金屬原子19,使得 金屬原子19掉落至位於金屬靶17下方的半導體晶片16,而 於半導體晶片16表面形成一層金屬薄膜2〇。 請參閱圏二,圖二為圖一所示PVD裝置1〇於半導體晶 片16表面形成金屬薄膜20的示意圓,圖二中的圖圈表示金 屬靶17因離子在擊所產生的金屬原子19,而箭頭表示金屬 原子19的掉落方向。利用PVD裝置1〇對具有凹槽22、以的4 4b 5 1 5 5. Description of the invention (1) The present invention provides a physical vapor deposition (PVD) device, especially a PVD device capable of generating a thin film of uniform thickness on the surface of a semiconductor wafer. . Physical vapor deposition of semiconductor processes is used to form metal thin films on the surface of semiconductor wafers. A layer of a well-structured metal film must not have voids remaining in the metal film 'and the thickness of the metal film must have good uniformity ° Please refer to Figure 1, which is a schematic diagram of the structure of a conventional PVD device 10 β The conventional PVD device 10 includes a vacuum chamber 12 which can be evacuated to a low vacuum and passed through argon (Aron) to generate argon ions 18. A wafer holder 14 is used to hold a circular half Guide the wafer 16 'and a round metal handle I ?. The PVD device 10 will generate a built-in electric field. The argon ions 18 in the vacuum chamber 12 impact the metal target 17 due to the built-in electric field, causing ion bombardment, and then knock out metal atoms 19 on the surface of the metal target. , So that the metal atoms 19 fall to the semiconductor wafer 16 located below the metal target 17, and a metal thin film 20 is formed on the surface of the semiconductor wafer 16. Please refer to Fig. 2. Fig. 2 is a schematic circle of the PVD device 10 shown in Fig. 1 forming a metal thin film 20 on the surface of the semiconductor wafer 16. The circle in Fig. 2 represents metal atoms 19 generated by the metal target 17 due to the impact of ions. The arrow indicates the falling direction of the metal atom 19. PVD device 10 is used to

第5頁 4455 1 5 五、發明說明(2) 半導體晶片1 6進行PVD製程時,金屬原子1 9的掉落方向是 非常凌亂(random)且毫無規則性,形成於凹槽22頂端的轉 角處的金屬薄膜容易產生懸突(over hang)現象,而於凹 陷寬度較小(high aspect ratio)的凹槽24内則容易形成 空洞26 ’因此PVD裝置10内產生的金屬原子19形成金屬薄 膜時填洞能力較差。 請參閱圖三及圖四,圖三為習知具準直管 (collimator)的PVD裝置30的示意圖,圖四為圖三所示pvd 裝置30於半導體晶片36表面形成金屬薄膜40的示意圖。 PVD裝置3 0與PVD裝置10主要不同之處在於PVD裝置30另設 有一個由許多平行的長管所併排構成的準直管38,以阻播 那些散射出圓形金屬靶37表面卻非垂直掉落的金屬原子。 利用PVD裝置30對具有凹槽的半導體晶片36進行PVD製程 時’大部份凌亂的金屬原子會被阻擋在準直管38之中,而 掉落至半導體晶片36表面的金屬原子19是垂直地下落,使 得生成於半導體晶片36表面之金屬薄膜40幾乎沒有懸突現 象’因此PVD裝置30内產生的金屬原子19形成金屬薄膜時 具有良好的填洞能力。由於大部份凌IL的金屬原子會被阻 擋在準直管38之中,準直管38須定時清洗或更換進因而增 加PVD製程所需的時間與成本。 請參閱圖五,圖五為習知離子化(ionized) PVD裝置 50的示意圖》習知離子化PVD裝置50與PVD裝置10、30主Page 5 4455 1 5 V. Description of the invention (2) When the semiconductor wafer 16 is in the PVD process, the falling direction of the metal atoms 19 is very random and irregular, and is formed at the corner of the top of the groove 22 The metal thin film at the place is prone to overhang, and the cavity 26 is easily formed in the recess 24 with a low aspect ratio. Therefore, the metal atom 19 generated in the PVD device 10 forms a metal thin film. Poor hole filling ability. Please refer to FIG. 3 and FIG. 4. FIG. 3 is a schematic diagram of a conventional PVD device 30 with a collimator. FIG. 4 is a schematic diagram of a metal thin film 40 formed on the surface of a semiconductor wafer 36 by the PVD device 30 shown in FIG. 3. The main difference between the PVD device 30 and the PVD device 10 is that the PVD device 30 is additionally provided with a collimation tube 38 composed of a plurality of parallel long tubes side by side to block the surface of those round metal targets 37 that are scattered but not vertical. Falling metal atoms. When using the PVD device 30 to perform a PVD process on a semiconductor wafer 36 having a groove, 'most of the messy metal atoms will be blocked in the collimator tube 38, and the metal atoms 19 falling on the surface of the semiconductor wafer 36 are vertical Falling, so that the metal thin film 40 generated on the surface of the semiconductor wafer 36 has almost no overhang phenomenon. Therefore, the metal atoms 19 generated in the PVD device 30 have a good hole filling ability when forming a metal thin film. Since most of the metal atoms of Ling IL will be blocked in the collimator tube 38, the collimator tube 38 must be cleaned or replaced regularly, which increases the time and cost required for the PVD process. Please refer to FIG. 5. FIG. 5 is a schematic diagram of a conventional ionized PVD device 50. The conventional ionized PVD device 50 and PVD devices 10 and 30 are mainly

第6頁 五、發明說明(3) 要不同之處在於離子化pVD裝置5〇包含有一環形線圏58設 於金屬把57與晶片承座54之間。當pyjj裝置50進行pyj)製程 時’環形線圏58所環繞的柱狀區域會因—加之於環形線圈 58的局頻率交流電壓而產生一磁場。真空艙52内的氬離子 除了會受内建電場的影響撞擊圓形金屬靶57使圓形金屬靶 57產生金屬原子,同時氬離子會藉由磁場的作闬進行螺旋 狀的運動’進而使氬離子易於與掉落之金屬原子相碰撞, 減少氬離子的平均自由徑(meari f ree叩“)並使金屬原子 帶電。而帶電的金属原子會受PVD裝置5〇之垂直内建電場 的影響,增加垂直方向的掉落速度,並相對地減小其他方 向的掉落速度,因此IMP PVD裝置50内產生的金屬原子具 有良好的填洞能力。 積於半導體晶片56表面之邊緣部分(edge)的金屬薄膜厚度 小於中央部分(center)的金屬薄膜厚度,使得利用IMp PVD裝置50所製備之金屬薄膜的均勻性不佳。 請參閱囷六,圖六為圖 導體晶片56上所形成之金屬 示意圖。由於IMPPVD裝置50 的’因此環形線圈58的尺寸 五所示之IMP PVD裝置50於半 薄膜57的厚度沿a-a線的分布 之真空艙5 2的大小通常是固定 有一定範圍限制,這會導致沉 因此本發明之主要目的在於提供一種新的pV£)裝置, 本發明PVD裝置内產生的金屬原子於形成金屬薄膜時具有 較佳的填洞能力,並且所形成的金屬薄膜具有均勻的厚Page 6 V. Description of the invention (3) The difference is that the ionized pVD device 50 includes a ring wire 58 provided between the metal handle 57 and the wafer holder 54. When the pyjj device 50 performs the pyj) process, the cylindrical area surrounded by the toroidal coil 58 will generate a magnetic field due to the local-frequency AC voltage applied to the toroidal coil 58. In addition to the impact of the built-in electric field, the argon ions in the vacuum chamber 52 will impact the circular metal target 57 to generate metal atoms in the circular metal target 57. At the same time, the argon ions will perform a spiral motion by the action of the magnetic field, thereby causing argon Ions are prone to collide with falling metal atoms, reducing the mean free path (meari f ree 叩 ") of the argon ions and charging the metal atoms. The charged metal atoms are affected by the vertical built-in electric field of the PVD device 50. Increasing the dropping speed in the vertical direction and relatively reducing the dropping speed in other directions, so the metal atoms generated in the IMP PVD device 50 have a good hole filling ability. The thickness of the metal thin film is smaller than the thickness of the metal thin film in the center, so that the uniformity of the metal thin film prepared by the IMP PVD device 50 is not good. Please refer to Figure 26, which is a schematic diagram of the metal formed on the conductor wafer 56. Because of the size of the IMPPVD device 50, the size of the loop coil 58 shown in FIG. 5 is the distribution of the IMP PVD device 50 in the thickness of the semi-thin film 57 along the aa line of the vacuum chamber 5 2 Small is usually fixed with a certain range limit, which will lead to sinking. Therefore, the main purpose of the present invention is to provide a new pV device. The metal atoms generated in the PVD device of the present invention have better hole filling ability when forming a metal thin film. And the formed metal film has a uniform thickness

第了頁 445515 五、發明說明(4) 度。 圖示之簡單說明 圖一為習知PVD裝置的結構示意圖。 圖二為圖一所示PVD裝置於半導體晶片表面形成金屬薄膜 的示意圖。 圖三為習知具準直管之PVD裝置的結構示意圖。 圖四為圖三所示PVD裝置於半導體晶片表面形成金屬薄膜 的示意圖。 圖五為習知離子化PVD裝置的結構示意圖。 圖六為圖五所示之IMP PVD裝置於半導體晶片表面所形成 之金屬薄膜的厚度沿a-a線的分布示意闽。 圖七為本發明PVD裝置之結構示意圖。 圖八為本發明另一實施例PVD裝置的結構示意圖。 圖示之符號說明 70、80真空艙 74、84 晶片承座 N、86半導體晶片 78、88環形線圈 75、85電壓控制器 Η、87圓形金屬靶 90環形金屬靶 請參閱圖七,圖七為本發明pVD裝置7〇 發明PVD裝置包含右一亩*格70 分叫· t ^ i i ^有真空艙72 ’其可被抽真空並通入為 軋以產生氩離子18,一曰^ . 氬Page 445515 V. Description of the invention (4) Degree. Brief Description of the Figures Figure 1 is a schematic structural diagram of a conventional PVD device. FIG. 2 is a schematic diagram of forming a metal thin film on the surface of a semiconductor wafer by the PVD device shown in FIG. 1. FIG. Figure 3 is a schematic structural diagram of a conventional PVD device with a collimator. FIG. 4 is a schematic diagram of forming a metal thin film on the surface of a semiconductor wafer by the PVD device shown in FIG. 3. FIG. 5 is a schematic structural diagram of a conventional ionization PVD device. Figure 6 shows the distribution of the thickness of the metal thin film formed on the surface of the semiconductor wafer by the IMP PVD device shown in Figure 5 along the a-a line. FIG. 7 is a schematic structural diagram of a PVD device according to the present invention. FIG. 8 is a schematic structural diagram of a PVD device according to another embodiment of the present invention. Symbols shown in the figure 70, 80 vacuum chamber 74, 84 wafer holder N, 86 semiconductor wafer 78, 88 toroidal coil 75, 85 voltage controller Η, 87 circular metal target 90 toroidal metal target Please refer to Figure 7, Figure 7 This invention pVD device 70 invention PVD device contains a right acre * grid 70 minutes called t ^ ii ^ there is a vacuum chamber 72 'which can be evacuated and passed into the mill to produce argon ions 18, a ^. Argon

Ba片承座74 ’設於真空艙72内,用The Ba sheet holder 74 ′ is set in the vacuum chamber 72 and used

第8頁 ,M45R 1 r__ 五、發明說明(5) 來承放一圓形之半導體晶片76 ’ 一圓形金屬靶π,設於真 空驗72内並位於半導體晶片76之正上方,一環形線圈78, 設於真空艙72内並位於圓形金屬靶77與半導體晶片76之 間’以及一電壓控制器75 ’用來控制圓形金屬靶77、晶片 承座74及環形線圈*78之電壓。環形線圈78與園形金屬靶77 是由相同材質所構成,例如銅(CU)、鈦(Ti)或钽(Ta)等金 屬物質。進行PVD時,真空艙72内之氩氣體氣壓須維持於 30至50毫托耳(mtorr)的範圍之内。 當於本發明PVD裝置70進行物理氣相沈積時,電壓控 制器75會以直流電壓施加於圓形金屬耙门、環形線圈78及 晶片承座74之上’並使圓形金屬靶77與晶片承座74之間, 以及環形線圈78與晶片承座74之間能各形成一預定的電位 差。因而使真空艙72内的氬離子18轟擊圓形金屬靶77使其 釋放金屬原子19並大約略地濺鍍於半導體晶片π的中央部 位’以及使真空艙72内的氬離子18轟擊環形線圏78使其釋 放出金屬原子19並大略地濺鍍於半導體晶片76的邊緣部 位。由於環形線圈78的材質與圓形金屬靶77相同,而環形 線圈78疋被用來當作一個副金属把(sub-metai target), 以釋放出金屬原子19滅銀於半導想晶片76的邊緣部位,因 此使半導想晶片76表面會形成一層厚度均勻的金屬薄獏β 此外,電壓控制器7 5會施加一高頻交流電壓於環形線 圈78上以產生一磁場,使真空艙72内之氬離子18進行一螺Page 8, M45R 1 r__ 5. Description of the invention (5) To hold a circular semiconductor wafer 76 ′ A circular metal target π, located in the vacuum test 72 and directly above the semiconductor wafer 76, a toroidal coil 78. It is located in the vacuum chamber 72 and located between the circular metal target 77 and the semiconductor wafer 76 'and a voltage controller 75' is used to control the voltage of the circular metal target 77, the wafer holder 74 and the toroidal coil * 78. The toroidal coil 78 and the circular metal target 77 are made of the same material, such as copper (CU), titanium (Ti), or tantalum (Ta). When performing PVD, the pressure of the argon gas in the vacuum chamber 72 must be maintained within the range of 30 to 50 mtorr. When the physical vapor deposition is performed in the PVD device 70 of the present invention, the voltage controller 75 applies a DC voltage to the circular metal rake door, the toroidal coil 78 and the wafer holder 74 'and causes the circular metal target 77 and the wafer to A predetermined potential difference can be formed between the holders 74 and between the toroidal coil 78 and the wafer holder 74. Therefore, the circular metal target 77 is bombarded with argon ions 18 in the vacuum chamber 72 to release metal atoms 19 and is sputtered approximately at the center portion of the semiconductor wafer π ', and the argon ions 18 in the vacuum chamber 72 are bombarded to the torus 78 causes it to release metal atoms 19 and is roughly sputtered on the edge portion of the semiconductor wafer 76. Since the material of the toroidal coil 78 is the same as that of the circular metal target 77, the toroidal coil 78 疋 is used as a sub-metai target to release metal atoms 19 to destroy silver on the semiconducting wafer 76. The edge part, so that the surface of the semiconducting wafer 76 will form a layer of metal with a uniform thickness. In addition, the voltage controller 75 will apply a high-frequency AC voltage to the toroidal coil 78 to generate a magnetic field, so that the inside of the vacuum chamber 72 Argon 18

^445515^ 445515

旋狀的運動,進而使氬離子18與圓形金屬靶77所產生的之 金屬原子20易於碰撞而使金屬原子19帶電。因此帶電的金 屬原子1 9便會受PVD裝置70之内建電場的影響,增加垂直 方向的掉落速度’並相對地減小其他方向的掉落速度,使 半導體晶片76形成金屬薄膜時具有較佳的填洞能力。 本發明PVD裝置70進行物理氣相沈積時,分成為兩個 控制階段:第一階段是利用圓形金屬靶77所產生的金屬原 子來滅鍍,以完成半導體晶片76中央部位的濺鍍;第二階 段則是利用環形線圈78所產生的金屬原子來濺鍍,以完成 半導體晶片7 6邊緣部位的濺鍍。這兩個階段的控制方式分 別說明如下: 第一階段:電壓控制器75以直流電壓施加於圓形金屬 乾77及晶片承座74上’同時以一高頻交流電壓持續地施加 於環形線圈78。施加於圓形金屬靶77的直流電壓為—wo 至-1 000伏特,而施加於晶片承座74的直流電壓則為 -100至-300伏特》施加於線圈5〇之高頻交流電壓之頻率 只要大於1至3 MHz的離子過度頻率(i〇n transition frequency)即可,而一般工業界使用的高頻交流電壓之頻 率為13, 56MHz,施加於線圈5〇之高頻交流電壓之功率為 100至500瓦。這個階段中,真空艙72内所有的金屬原子均 由圓形金屬靶77產生,並且這些金屬原子會通過沿著環形 線圈78所環繞的柱狀區域,易於與氩離子相互碰撞而形成The rotational movement further causes the argon ion 18 to easily collide with the metal atom 20 generated by the circular metal target 77 to charge the metal atom 19. Therefore, the charged metal atoms 19 will be affected by the built-in electric field in the PVD device 70, increasing the falling speed in the vertical direction and relatively reducing the falling speed in other directions, so that when the semiconductor wafer 76 forms a metal thin film, Best hole filling ability. When the PVD device 70 of the present invention performs physical vapor deposition, it is divided into two control stages: the first stage is to use metal atoms generated by the circular metal target 77 to perform plating to complete the sputtering of the central portion of the semiconductor wafer 76; In the second stage, metal atoms generated by the toroidal coil 78 are used for sputtering, so as to complete sputtering on the edge portion of the semiconductor wafer 76. The control methods of these two phases are respectively explained as follows: Phase 1: The voltage controller 75 is applied to the circular metal stem 77 and the wafer holder 74 with a DC voltage and is continuously applied to the toroidal coil 78 with a high-frequency AC voltage. . The DC voltage applied to the circular metal target 77 is -wo to -1 000 volts, and the DC voltage applied to the wafer holder 74 is -100 to -300 volts. The frequency of the high-frequency AC voltage applied to the coil 50. As long as the ion transition frequency is greater than 1 to 3 MHz, the frequency of the high-frequency AC voltage used in the general industry is 13, 56MHz, and the power of the high-frequency AC voltage applied to the coil 50 is 100 to 500 watts. At this stage, all metal atoms in the vacuum chamber 72 are generated by the circular metal target 77, and these metal atoms are easily formed by collisions with argon ions through the columnar area surrounded by the annular coil 78

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帶電的金屬原子19,帶電的金屬原子19於半導體晶片76形 成金屬薄膜時會具有較佳的填洞能力。 V 第二階段:當第一階段持續進行一段時間後,再以直 流電壓施加於環形線圈7 8及晶片承座7 4上。施加於環形線 圈7 8之直流電壓係為-1 0 0至-3 0 0伏特。第一階段後,半 導體晶片76邊緣部份的厚度已濺鍍至一定程度,第二階段 再加入環形線圈78產生金屬原子,真空艙72内的金屬原子 、 不僅由圓形金屬靶77還由環形線圈78產生,以增加錢錢於 半導體晶片76邊緣部位的金屬薄膜厚度,因此使得半導體 晶片76表面能形成一層中央及邊緣厚度均勻的金屬薄膜。一 請參閱圖八,囷八為本發明另一實施例PVD裝置80的 示意圖。PVD裝置70中環形線圈78既提供磁場也作為與副 金屬靶,而PVD裝置80則是將磁場提供者與副金屬乾分 開,也可同樣地達到使生成之金屬薄膜厚度均勻的目的。 PVD裝置80與PVD裝置70主要不同之處在於PVD裝置80另包 含有一環形金屬乾90設於真空擒82内,並位於環形線圈μ 與半導體晶片86之間。環形金屬靶90的材質與圓形金屬把 87相同’而環形線圈88的材質不須與圓形金屬托87相同。' 一 PVD裝置80的電壓控制器85是用來控制圓形金屬靶87、環 形線圈88、環形金屬靶90以及晶片承座84之間的電壓。 PVD裝置80在進行物理氣相沈積時,電壓控制器85會The charged metal atom 19 has a better hole filling ability when the semiconductor wafer 76 forms a metal thin film. V The second stage: After the first stage is continued for a period of time, a DC voltage is applied to the toroidal coil 78 and the wafer holder 74. The DC voltage applied to the toroidal coil 78 is -10 to -300 volts. After the first stage, the thickness of the edge portion of the semiconductor wafer 76 has been sputtered to a certain degree. In the second stage, the ring coil 78 is added to generate metal atoms. The metal atoms in the vacuum chamber 72 are not only formed by the circular metal target 77 but also by the ring shape. The coil 78 is generated to increase the thickness of the metal thin film on the edge portion of the semiconductor wafer 76, so that the surface of the semiconductor wafer 76 can form a metal thin film with a uniform center and edge thickness. 1 Please refer to FIG. 8, which is a schematic diagram of a PVD device 80 according to another embodiment of the present invention. The toroidal coil 78 in the PVD device 70 provides both the magnetic field and the secondary metal target, while the PVD device 80 separates the magnetic field provider from the secondary metal, and can also achieve the purpose of making the thickness of the metal thin film uniform. The main difference between the PVD device 80 and the PVD device 70 is that the PVD device 80 includes an annular metal stem 90 provided in the vacuum trap 82 and located between the toroidal coil μ and the semiconductor wafer 86. The material of the ring metal target 90 is the same as that of the circular metal handle 87, and the material of the ring coil 88 need not be the same as that of the circular metal holder 87. A voltage controller 85 of a PVD device 80 is used to control the voltage between the circular metal target 87, the ring coil 88, the ring metal target 90, and the wafer holder 84. When the PVD device 80 performs physical vapor deposition, the voltage controller 85 will

如445 5 五、發明說明(8) 以直流電壓施加於圓形金屬乾8 7、環形金屬乾9 0及晶片承 座84上,並使圓形金屬靶87與晶片承座84之間、以及環形 金厲I&90與晶片承座84之間各產生一預定的電位差。真空 搶8 2内之氬離子18會轟擊圓形金屬靶87,使圓形金屬靶87 釋放出金屬原子並大略地濺鍍於半導體晶片76之中央部 位。並且真空艙82内之氬離子18會轟擊環形金屬乾9〇,使 環形金屬靶90釋放出金屬原子並大略地濺鍍於半導體晶片 8 6之邊緣部位。 PVD裝置80在進行物理氣相沈積時也是分成為兩個控 制階段。第一階段僅利用圓形金屬靶87而不利用環形金屬 靶90來進行PVD ’並且電壓控制器85也會同時施加一高頻 乂 電壓於環形線圈88之上’使氣離子18易於與掉落之金 屬原子相碰撞而使金屬原子19帶電。金屬原子19便垂直地 落下’因而於半導體晶片86形成金屬薄膜時則會具有較佳 的填洞能力。第二階段不僅利用圓形金屬乾8γ還利用環形 金屬靶90 ’以增加半導體晶片86之邊緣部位的金屬薄膜厚 度’因此半導體晶片86表面能形成厚度均勻之金屬薄膜。 相較於習知PVD裝置,本發明pvd裝置7〇具有環形線 圈,使得形成於半導體晶片表面的金屬薄膜填洞良好。並 且本發明利用與面形金屬靶質材相同的環形線圈或是另外 設置一個環形金屬乾作為副金屬起,來増加濺链於半導體 晶片邊緣部位的金屬薄骐厚度,以使半導體晶片表面形成Such as 445 5 V. Description of the invention (8) Apply a DC voltage to the circular metal stem 8 7, the annular metal stem 90 and the wafer holder 84 with the circular metal target 87 and the wafer holder 84, and Each of the ring metal I & 90 and the wafer holder 84 generates a predetermined potential difference. The argon ions 18 in the vacuum grabbing 8 2 will bombard the circular metal target 87, so that the circular metal target 87 releases metal atoms and is roughly sputtered on the center portion of the semiconductor wafer 76. In addition, the argon ions 18 in the vacuum chamber 82 will bombard the ring metal stem 90, so that the ring metal target 90 releases metal atoms and is roughly sputtered on the edge portion of the semiconductor wafer 86. The PVD device 80 is also divided into two control stages when performing physical vapor deposition. In the first stage, PVD is performed using only the circular metal target 87 instead of the ring metal target 90, and the voltage controller 85 also applies a high-frequency chirp voltage to the ring coil 88 at the same time to make the gas ions 18 easy to fall. The metal atoms collide and the metal atom 19 is charged. The metal atoms 19 fall vertically 'so that when the semiconductor wafer 86 forms a metal thin film, it will have better hole filling ability. In the second stage, not only the circular metal stem 8γ but also the ring-shaped metal target 90 'are used to increase the thickness of the metal thin film at the edge portion of the semiconductor wafer 86'. Therefore, a uniform metal thin film can be formed on the surface of the semiconductor wafer 86. Compared with the conventional PVD device, the PVD device 70 of the present invention has a ring-shaped coil, so that the metal thin film formed on the surface of the semiconductor wafer is filled well. In addition, the present invention uses the same toroidal coil as the surface metal target material or additionally sets a toroidal metal stem as a secondary metal to increase the thickness of the metal thin film that is chained to the edge portion of the semiconductor wafer to form the surface of the semiconductor wafer.

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Claims (1)

5 六、申請專利範圍 1. 一種物理氣相沈積(physical vapor deposition,PVD) 裝置’其包含有: 一真空艙’其可被抽真空並通入氬(arg〇n,Ar)氣體以 產生氬離子; 一晶片承座,設於該真空艙内,用來承放一圓形之半導 體晶片; 一圓形金屬靶,設於該真空艙内並位於該半導體晶片之 上方; 一環形線圏,設於該真空艙内並位於該金屬靶與該半導 體晶片之間,其材質與該金屬靶相同;以及 一電壓控制器,用來控制該金屬靶、晶片承座及線圈之 電壓; 其中於進行物理氣相沈積時,該電壓控制器會以直流電 壓施加於該金屬靶、線圈及晶片承座之上並使該金屬 靶與該晶片承座之間以及該線圈與該晶片承座之間各 產生一預定之電位差,以使該真空艙内之氬離子轟擊 該金屬靶使其釋放出金屬原子並大略地濺鍍於該半導 體晶片之中央部位,以及轟擊該線圈使其釋放出金屬 原子並大略地濺鍍於該半導體晶片之邊緣部位以使該 半導體晶片表面產生一厚度均勻之金屬薄膜。 2.如申請專利範圍第1項之物理氣相沈積裝置,其中該電 壓控制器會先以直流電壓施加於該金屬靶之上以完成該 半導體晶片中央部位之濺鍍,而後再以直流電壓施加於5 VI. Application Patent Scope 1. A physical vapor deposition (PVD) device 'which includes: a vacuum chamber' which can be evacuated and passed through argon (Ar) gas to generate argon Ions; a wafer holder provided in the vacuum chamber for receiving a circular semiconductor wafer; a circular metal target provided in the vacuum chamber and above the semiconductor wafer; a circular wire coil, It is located in the vacuum chamber and is located between the metal target and the semiconductor wafer, the material of which is the same as the metal target; and a voltage controller for controlling the voltage of the metal target, the wafer holder and the coil; During physical vapor deposition, the voltage controller applies a DC voltage to the metal target, the coil, and the wafer holder, and separates the metal target from the wafer holder and between the coil and the wafer holder. Generating a predetermined potential difference, so that argon ions in the vacuum chamber bombard the metal target to release metal atoms and sputter roughly on the central portion of the semiconductor wafer, and bombard the coil And which releases the metal atoms sputtered Roughly edge portion of the semiconductor wafer such that a surface of the semiconductor wafer to produce a uniform thickness of the metal thin film. 2. The physical vapor deposition device according to item 1 of the patent application scope, wherein the voltage controller first applies a DC voltage to the metal target to complete the sputtering of the central portion of the semiconductor wafer, and then applies the DC voltage. to 第Μ頁 ,4 45 5 1 5 六、申請專利範圍 遠線圏之上以完成該半導體曰 守猫日曰片邊緣部位之濺鍍。 3-如申請專利範圍第1項之物拽名4 田X ja * ^ @ S &才目沈積裝置,其中在利 用該金屬靶所產生之金属肩 顸牧罝兵干在利 線圈之上以使該真空艙内之氬::交流電壓施加於該 生之金廣原子相碰撞並使其層乾所產 子在該半導體晶片形成該ίπ肢:該ί帶電之金屬原 洞能力。 取琢金屬薄膜時則會具有較佳的填 央郁付陆,玆®壓控土,《 Ϊ 錢鍵該半導體晶片之中 如申請專利範圍第3項之物理氣相沈積裝置’其中於進 行物理氣相沈積時,該電壓控制器施加於該線圈之高頻 交流電壓之頻率為13, 56MHz ’而該高頻交流電壓之功率 係為100至500瓦。 5. 如申請專利範圍第1項之物理氣相沈積裝置,其中該金 屬乾係以銅(Cu)、鈦(Ti)或纽(Ta)所構成。 6. 如申請專利範圍第1項之物理氣相沈積裝置,其中於進 行物理氣相沈積時,該真空艙内之氬氣體氣壓係維持於 30至50毫掩耳(mtorr) 〇 7.如申請專利範圍第1項之物理氣相沈積裝置,其中於進 行物理氣相沈積時’該電壓控制器施加於該線圈之直流Page M, 4 45 5 1 5 6. Scope of patent application The far line line is above to complete the sputter plating of the edge portion of the semiconductor watchdog. 3- As the first item in the scope of the patent application, the name 4 Tian X ja * ^ @ S & Caimu deposition device, in which the metal shoulder scapular herd soldiers produced by the use of the metal target are dried on the coil of interest. The argon in the vacuum chamber: AC voltage applied to the raw gold-gold atoms collided and allowed to dry out the sons formed in the semiconductor wafer to form the limb: the charged metal hole. When the metal film is cut, it will have a better filling, Yu Fu Lu, pressure control soil, "Ϊ 键 键 the semiconductor wafer in the semiconductor wafer such as the scope of patent application of the physical vapor deposition device No. 3, where the physical During vapor deposition, the frequency of the high-frequency AC voltage applied to the coil by the voltage controller is 13, 56 MHz ', and the power of the high-frequency AC voltage is 100 to 500 watts. 5. The physical vapor deposition device according to item 1 of the patent application scope, wherein the metal stem is made of copper (Cu), titanium (Ti) or tassel (Ta). 6. For example, a physical vapor deposition device of the scope of application for a patent, wherein the pressure of the argon gas in the vacuum chamber is maintained at 30 to 50 mtorr when performing physical vapor deposition. The physical vapor deposition device of the first scope of the patent, wherein when the physical vapor deposition is performed, the DC voltage applied to the coil by the voltage controller is 第15頁 六、申請專· 電壓係為-100至- 300伏特’施加於該金屬乾之直流電壓 係為-500至-1 〇〇〇伏特,而施加於該晶片承座之直流電 壓係為-100至-300伏特。 8. 一種物理氣相沈積裝置,其包含有: —真空艙’其可被抽真空並通入氬(Ar)氣體以產生 子; B曰片承座’設於該真空驗内’用來承放一圓形之半導 體晶片; 圓形金屬把’設於該真空餘内並位於該半導趙晶片之 上方; 一環形金屬把’設於該真空艙内並位於該圓形金厲乾與 該半導體晶片之間,其材質與該圓形金屬靶相同;以 及 一電壓控制器’用來控制該二金屬靶及晶片承座之電 壓; 其中於進行物理氣相沈積時,該電壓控制器會以直流電 壓施加於該二金屬靶及晶片承座之上並使該圓形金屬 靶與該晶片承座之間以及該環形金屬靶與該晶片承座 之間各產生一預定之電位差’以使該真空艙内之氬離 子轟擊該圓形金屬靶使其釋放出金屬原子並大略地濺 鍍於該半導體晶片之中央部位,以及轟擊該環形金屬 靶使其釋放出金屬原子並大略地濺鍍於該半導體晶片 之邊緣部位以使該半導體晶片表面產生一厚度均勻之Page 15 VI. Applying for a voltage · The voltage system is -100 to -300 volts' The DC voltage applied to the metal stem is -500 to -1000 volts, and the DC voltage applied to the wafer holder is -100 to -300 volts. 8. A physical vapor deposition device comprising:-a vacuum chamber 'which can be evacuated and passed through an argon (Ar) gas to generate a son; a B-piece holder' set in the vacuum chamber 'for receiving A circular semiconductor wafer is placed; a circular metal is placed in the vacuum chamber and above the semiconductor wafer; a ring-shaped metal is placed in the vacuum chamber and is located in the circular gold stem and the semiconductor wafer In between, its material is the same as the circular metal target; and a voltage controller 'is used to control the voltage of the two metal target and the wafer holder; wherein during physical vapor deposition, the voltage controller uses a DC voltage It is applied on the two metal target and the wafer holder, and a predetermined potential difference is generated between the circular metal target and the wafer holder and between the annular metal target and the wafer holder, so that the vacuum chamber Internal argon ions bombard the circular metal target to release metal atoms and sputter roughly on the central portion of the semiconductor wafer, and bombard the ring metal target to release metal atoms and sputter on the roughly Edge portions of the conductor so that the wafer surface of the semiconductor wafer to produce a uniform thickness _ 第丨6頁 4455 1 5 申請專利範圍 金屬薄膜 9.如申請專利範圍第8項之物理氣相沈積裝置,其中該電 壓控制器會先以直流電壓施加於該圓形金屬乾之上以完 成該半導體晶片中央部位之濺鍍,而後再以直流電壓施 加於該環形金屬靶之上以完成該半導體晶片邊緣部位 濺鍍。 10. 如申請專利範圍第8項之物理氣相沈積裝置,其另包含 有一線圏’電連接於該電壓控制器並設於該真空艙内 並位於該圓形金屬靶與該環形金屬靶之間,其中在利 用該圓形金屬靶所產生之金屬原子來濺鍍該半導體晶 片之中央部位時,該電壓控制器會以一高頻交流電壓 施加於該線圏之上以使該真空艙内之氬離子易於與該 圓形金屬乾所產生之金屬原子相碰撞並使其帶電,而 該等帶電之金屬原子在該半導體晶片形成該金屬薄膜 時則會具有較佳的填洞能力。 11. 如申請專利範圍第1〇項之物理氣相沈積裝置,其中於 進行物理氣相沈積時,該電壓控制器施加於該線圈之 高頻交流電壓之頻率為13· 56MHz,而該高頻交流電壓 之功率係為100至5〇〇瓦β 12·如申請專利範圍第8項之物理氣相沈積裝置,其中該二 ^445515 六、申請專利範圍 金屬靶係以銅(Cu)、鈦(Ti )或钽(Ta)所構成。 13·如申請專利範圍第8項之物理氣相沈積裝置,其中於連 行物理氣相沈積時,該真空艙内之氬氣體氣壓係維持 於 3 0 至 5 0 m t 〇 r r β 14.如申請專利範圍第8項之物理氣相沈積裝置,其中於進 行物理氣相沈積時’該電壓控制器施加於該環形金屬 托之直流電壓係為-100至-300伏特,施加於該園形金 屬把之直流電塵係為-500至-1 0 00伏特,而施加於該晶 片承座之直流電壓係為-100至-300伏特。_ Page 丨 6 4455 1 5 Patent application scope metal thin film 9. For example, the physical vapor deposition device of the patent application scope item 8, wherein the voltage controller will first apply a DC voltage to the circular metal stem to complete Sputtering at the central portion of the semiconductor wafer, and then applying a DC voltage to the annular metal target to complete sputtering at the edge portion of the semiconductor wafer. 10. If the physical vapor deposition device of item 8 of the patent application scope further includes a wire 圏 'electrically connected to the voltage controller and located in the vacuum chamber and located between the circular metal target and the annular metal target In the meantime, when metal atoms generated by the circular metal target are used to sputter the central portion of the semiconductor wafer, the voltage controller will apply a high-frequency AC voltage to the line coil to make the inside of the vacuum chamber The argon ions easily collide with and charge the metal atoms generated by the circular metal stem, and the charged metal atoms will have better hole filling ability when the semiconductor wafer forms the metal thin film. 11. For example, the physical vapor deposition device of the scope of application for patent No. 10, wherein when performing physical vapor deposition, the frequency of the high-frequency AC voltage applied by the voltage controller to the coil is 13.56 MHz, and the high-frequency The power of the AC voltage is 100 to 500 watts. Β 12 · For example, the physical vapor deposition device of item 8 of the scope of patent application, wherein the two ^ 445515 6. The scope of the patent application metal target is copper (Cu), titanium ( Ti) or tantalum (Ta). 13. The physical vapor deposition device according to item 8 of the scope of patent application, wherein the pressure of the argon gas in the vacuum chamber is maintained at 30 to 50 mt 〇rr β during successive physical vapor deposition. The physical vapor deposition device of the range item 8, wherein when the physical vapor deposition is performed, the DC voltage applied by the voltage controller to the ring-shaped metal holder is -100 to -300 volts, and is applied to the circular metal. The DC electric dust is -500 to -100 volts, and the DC voltage applied to the wafer holder is -100 to -300 volts.
TW88106069A 1999-04-16 1999-04-16 Physical vapor phase deposition device capable of producing a thin film with uniform thickness on the surface of a semiconductor chip TW445515B (en)

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