TW444378B - Thin film resistor for semiconductor chip and the manufacturing method thereof - Google Patents

Abstract

The present invention provides a thin film resistor for semiconductor chip and the manufacturing method thereof to produce the thin film resistors with stable resistance. The manufacturing method for thin film resistor includes the following steps: first, forming a resistance layer and a passivation layer in a predetermined region on the dielectric of a chip surface; forming an insulation layer on the chip surface to cover the surface and the edge of the passivation, the edges of the resistance layer and the dielectric surface outside the predetermined region; then, conducting a dry etching process on the insulation layer to form two holes for penetrating to the surface of the passivation; and, conducting a wet etching process on the passivation under the two holes of the insulation layer to form two holes for penetrating to the resistance layer; finally, in the two holes of the insulation layer and the passivation, individually forming a conductive layer for contacting both ends of the resistance layer to be used as the electric conductive wire at both ends of the resistance layer.

Description

4 443 7 b V. Description of the invention (l) The present invention provides a thin film resistor for a semiconductor wafer and a method for manufacturing the same. Thin-film resistors are sometimes used as resistance elements in semiconductor circuit designs. Thin film resistors have low conductivity and have stable resistance values that are not affected by temperature changes. However, when the thickness of the resistance layer of the thin film resistor is not uniform, the resistance value will be unstable, which will affect the function of the thin film resistor. Please refer to FIG. 1. FIG. 1 is a schematic cross-sectional view of a conventional thin film resistor 19 used for a semiconductor wafer 11. The conventional thin film resistor 19 is provided on the surface. The thin resistor 19 on the surface includes a dielectric layer 10 provided on the semiconductor wafer I. On the surface, two conductive layers 12 are provided on a predetermined area of the dielectric layer 10, an insulating layer 14 is provided on the two conductive layers 12, and a sacrifice hole 16 is provided on the upper side of the two conductive layers 12, respectively. And a resistive layer 18 is disposed in a predetermined area on the surface of the insulating layer 14 'and fills the holes 16 on the upper side of the two conductive layers 12. Since one end of the conductive layer 12 and the resistance layer 18 are in contact with each other, when the semiconductor wafer 电 is electrically connected to the outside, the two conductive layers 12 can be used as electrical connection lines of the resistance layer is. In the manufacturing process of the conventional thin film resistor 19, since the two conductive layers 12 are provided on the dielectric layer 10, the surface height of the semiconductor wafer 11 is different. Therefore, when the insulating layer 14 and the resistive layer 18 are sequentially deposited, When the semiconductor wafer 11 is on the surface, a step coverage problem occurs, which causes the deposition thickness of the resistance layer 18 to be uneven and affects the stability of the resistance value. Due to resistance

Page 4 θ A44378 V. Description of the invention (2) The thickness of the layer 18 is not uniform. When the two conductive layers 12 and the resistive layer 18 are electrically connected to each other, a greater resistance will be generated in the area where the thickness of the resistive layer 18 is smaller. Value ', and in the region where the thickness of the resistance layer 18 is larger, a smaller resistance value will be generated', and the resistance value required for the circuit design cannot be achieved. Therefore, the main object of the present invention is to provide a thin film resistor for a semiconductor wafer and a manufacturing method thereof. 'Thin film resistors with stable resistance values can be manufactured, and are suitable for a process with a 0.6-micron line width to reduce the area of semiconductor products. Brief description. Figure 1 shows the fabrication of a conventional thin film resistor. Figures 2 to 5 are schematic diagrams of the invention used for half. Symbols shown 20 Dielectric layer 2 2 Insulating layer 2 6 Protective layer 3 Insulating layer 4 0 Thin film resistor Please refer to Figure 2 to Figure 5 for a schematic diagram of the manufacturing method of thin film resistor 40 of wafer 21. Method for manufacturing thin-film resistors of bulk wafers 2 1 Semiconductor wafer 24 Resistive layer 2 8 Holes in protective layer 3 2 Holes in insulating layer 5 Contact hole Figure 5 is a schematic diagram of a semiconductor used in the present invention. Film resistor of the present invention

Page 5

Vk4433 7 8 V. Description of the invention ¢ 3) 40 is fabricated on the dielectric layer 20 on the surface of a semiconductor wafer 21, and the dielectric layer 20 is an interlayer dielectric composed of borophosphosilicate glass (BPSG) (Inter layer dielectric, ILD for short). When the thin film resistor 40 is manufactured, an isolation layer 22 composed of silicon nitride (SiN) or silicon oxide is sequentially formed on the surface of the dielectric layer 20, and a silicon chromium (SiCr) ) 的 保护 层 24。 Resistive layer 24. Then, a chemical vapor deposition method (Chemicai vapor deposi ton) is used to form a protective layer 26 made of silicon nitride on the surface of the resistive layer 24. Then, an anisotropic dry etching process is performed to remove the insulation layer 22, the resistance layer 24, and the protection layer 26 outside a predetermined area. Then, an chemical vapor deposition method is used to form an insulating layer 30 made of silicon oxide on the surface of the semiconductor wafer 21 to cover the surface and side edges of the protective layer 26, the side edges of the resistive layer 24, and the dielectric layer outside the predetermined area. 2 〇 surface, as shown in Figure 2. Next, another dry etching process is performed on the insulating layer 30 to form two holes 32 accessible to the surface of the protective layer 26, and simultaneously forming two contact holes 50 on the insulating layer 30 and the dielectric layer 20 outside a predetermined area. As the electrical connection channels of other components of the semiconductor wafer 21, as shown in FIG. Then, the insulating layer 30 is used as a hard mask, and the protective layer 26 under the two holes 32 of the insulating layer 30 is subjected to a wet residual etching process by using phosphoric acid (3P04) as an etching solution to form a two-layer The holes 28 leading to the resistance layer 24 are shown in FIG. Finally, a metal deposition, yellow light, and metal etching process is used to form a conductive layer composed of a metal alloy mainly composed of aluminum (A1) in the two interconnected holes 32 and 28.

Page 6 4 443 7 8 V. Description of the invention ⑷ * " " — ----- 34 ′ is used as an electrical connection line at both ends of the resistance layer 24. When a conductive layer 34 is formed in the communicating holes 32 and 28, a non-connected conductive layer 34 is formed in each contact hole 50 at the same time, so that the conductive layer 34 in the contact hole 50 can cross the surface of the insulating layer 30, and An electrical connection line with one of the resistance layers 24 communicates with each other, and is used as electrical connection lines of other components of the semiconductor wafer 21, as shown in FIG. As shown in Figure 5, the thin film resistor 40 of the present invention includes a dielectric layer 20 provided on the surface of the semiconductor wafer 21, an insulating layer 22 provided on a predetermined area of the surface of the dielectric layer 20, and a resistive layer 24 provided on the insulation. A protective layer 26 provided with two holes 28 above the layer 22 and located in the predetermined area is provided on the resistive layer 24 and is provided with the insulating layer 30 provided with two holes 32 within the predetermined area. The surface and the side edge, the side edge of the resistance layer 24 and the surface of the dielectric layer 20 outside the predetermined area, wherein the holes 32 and 28 communicate with each other up and down to reach the surfaces of both ends of the resistance layer 24, and the two conductive layers 34 are respectively provided on The communicating holes 32 and 28 are in contact with both ends of the resistance layer 24 and are used as electrical connection lines at both ends of the resistance layer 24. In the thin film resistor 40 of the present invention, the 'resistance layer 24 is formed in a nearly flat dielectric layer. On the electrical layer 20, the thickness of the resistance layer of the thin-film resistor 40 is quite uniform, so that it has a stable resistance value. In the thin film resistor 40 of the present invention, an insulating layer 22 is provided below the resistive layer 24. The insulating layer 22 can isolate out-gassing generated by the borophosphosilicate glass of the dielectric layer 20 to avoid affecting the resistance of the resistive layer 24. resistance. A protective layer 26 is provided above the resistance layer 24.

Page 7 444378 V. Description of the invention (5) It is used to protect the resistive layer 24 from being damaged by the dry etching process and causing crack damage. In addition, the two accessible holes 28 of the resistive layer 24 are formed by a wet etching process, and the influence of the dry etching process on the conductivity of the resistive layer 24 can be avoided. And because the side edge of the resistance layer 24 is protected by the insulating layer 30, the conductive layer 34 can directly directly connect with other components across the side edge of the resistance layer 24 without causing an electrical short circuit, so that The electrical connection design of the conductive layer 34 is easier. In the manufacturing method of the present invention, the positions of the resistive layer 24 formed in a predetermined area, the holes 32 that reach the protective layer 26, and the contact holes 50 are all defined by a dry etching process, so that the area of the thin film resistor can be minimized. The invention can be applied to a 0.6 micron line width process to reduce the area of a semiconductor product to reduce costs. Moreover, the holes 32 on the protective layer 26 and the contact holes 50 on the dielectric layer 20 are formed by a dry etching process at the same time, so that the number of times of using the photomask is reduced 'is also very helpful to reduce the process cost. Compared with the conventional thin film resistor 19, the thin film resistor 40 used in the semiconductor wafer 21 and the manufacturing method thereof according to the present invention are provided with a resistive layer 24 on a flat dielectric layer 20 and protected on the resistive layer 24. A conductive layer 34 is formed in the two holes 32 and 28 of the layer 26 and the insulating layer 30, and is used as an electrical connection line at both ends of the resistance layer 24. Therefore, the thin film resistor 40 of the present invention has the resistance layer 24 with a uniform thickness. The manufacturing method of the present invention can not only manufacture a thin-film resistor with a stable resistance value 40 ′, but also be applicable to a 0.6 micron line width process to reduce the area of a semiconductor product.

4443 78

Claims (1)

6. Scope of patent application1. A method for manufacturing a thin film resistor 'The thin resistor is fabricated on a dielectric layer on the surface of a semiconductor wafer. The manufacturing method includes the following steps: A predetermined area on the surface of the dielectric layer A resistive layer and a protective layer are formed inside, the protective layer is located on the resistive layer; an insulating layer is formed on the surface of the semiconductor wafer to cover the surface and side edges of the protective layer, the lateral edges of the resistive layer, and the predetermined The surface of the dielectric layer outside the region; a dry-repeating process is performed on the insulating layer to form two holes that can be connected to the surface of the protective layer, the protective layer is used to protect the resistive layer from the dry etching The influence of the process causes plasma damage; a wet etching process is performed on the protective layer under the two holes of the insulating layer to form two holes that can reach the resistive layer; and the resistance of the insulating layer and the protective layer Conductive layer connection lines at both ends of the layer. Two holes are formed in each of the two holes, which can be used as electricity at both ends of the resistive layer. 2. If a contact hole is made in the first scope of the patent application, an insulation layer can be formed outside the predetermined area. And the dielectric layer w dry etching process --- ^-, and the " electrical layer is formed at the same time. 3. If the method of applying for the scope of the patent application No. 2, when the layer, the contact hole will be formed at the same time A line of hemp is formed inside the contact hole and the contact hole 4443 78 VI. The conductive layer within the scope of patent application can cross the surface of the insulating layer and communicate with one of the electrical connections of the resistive layer. 4. The manufacturing method according to item 1 of the scope of patent application, wherein the resistance layer and the protection layer in the predetermined area are formed by the following steps: forming the resistance layer on the surface of the dielectric layer; * forming the protection on the surface of the resistance layer Layer; and performing an anisotropic dry etching process to remove the resistive layer and the protective layer outside the predetermined area. 5. The manufacturing method according to item 1 of the scope of the patent application, wherein the dielectric layer is composed of boro phosphosilicate glass (BPSG), and the resistive layer is composed of silicon chromium (S i Cr) The protective layer is made of silicon nitride (SiN) formed by chemical vapor deposition. The insulating layer is made of silicon oxide (Si 1) formed by chemical vapor deposition. icon oxide) β 6. The manufacturing method according to item 5 of the patent application scope, wherein the thin film resistor further includes an insulation layer, which is disposed in the predetermined area and located between the resistance layer and the dielectric layer. To isolate the out-gassing of the dielectric layer by filling the silica glass to prevent it from affecting the resistance of the resistive layer. Page 11 lV 4443 7 ο 6. Application scope of patent 7 The production method of item 6 of the scope of patent application, wherein the insulation layer is β 8 composed of silicon nitride or silicon oxide * As for the production method of item 1 of scope of patent application, The wet etching process uses phosphoric acid (3P04) as an etching solution. 9 The manufacturing method according to item 1 of the scope of patent application, wherein the conductive layer is composed of a metal alloy with aluminum (Al) as a main component. 10. A thin film resistor provided on a dielectric layer on the surface of a semiconductor wafer, comprising: a resistive layer provided in a predetermined area on the surface of the dielectric layer; a protective layer provided on the resistive layer And is located in the predetermined area, and includes two holes formed by the wet etching process on both ends of the resistive layer; an insulating layer formed on the surface of the semiconductor wafer and covering the surface and side edges of the protective layer; The side edge of the resistive layer and the surface of the dielectric layer outside the predetermined area include two holes formed by a dry etching process on two holes of the protective layer, wherein the two holes of the insulating layer and the protective layer The two holes communicate with each other up and down and reach the surfaces of the two ends of the resistance layer; and two conductive layers are respectively provided in the two holes of the protective layer and the insulation layer and contact the two ends of the resistance layer for the purpose of Of the two ends of the resistance layer Page 12 44437 8 Scope of patent application Electric connection line. 11. The thin-film resistor according to item 10 of the application, wherein the resistance layer is made of silicon chromate, and the protective layer is made of silicon nitride formed by chemical vapor deposition. The insulation layer is made of Chemical vapor deposition method; formed of silicon oxide, the two conductive layer is composed of aluminum as the main metal alloy, and the dielectric layer is made of borophosphosilicate glass. 12. "Please refer to the thin film resistor of item… of the patent ... The thin film resistor contains an insulation layer, which is located in the predetermined area and located between the resistance ϊΐΪ: layers, and is used to isolate the dielectric layer of the phosphorite glass. The generated gas is to avoid affecting the resistance value of the resistance layer. 1 3 _For example, the scope of the application for patent # 2M is a gasified stone η Γ film resistance, wherein the insulation layer is made of tile crushed or silicon oxide. 1 4. If the thin dielectric layer and insulation layer outside the scope of the patent application item No. 10 =:;!; And touch the pre- "domain and the-electrical connection line of the resistance layer to each other the insulation layer Surface Page 13