經濟部智慧財產局員工消費合作社印製 r，442 082 A7 ^ -B7____ _ 五、發明說明（1 ) 驩拎在春邦赞助研fe典發爲朴U下之趙利的磬明 本發明係為依國防先進研究計劃屬（DARPA)所授與之 第MDA972-96-3-0014號合約，在政府的支持下所完成者。 聯邦政府對於本發明享有某些權利。 發明頫述 本發明係關於特別有關對於AIxGayInzN元件之兩側提 供高品質反射表面之光發射領域。 訾景 一垂直空腔光電子結構由一插入封閉層的發光層所形 成的主動區域所構成’該封閉層可被摻雜、未被摻雜或含 有一 ρ'η接合面。該結構亦包含至少一面在垂直於發光層 之方向上形成Fabry-Perot空腔之反射鏡β在Printed by the Consumers' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, r, 442 082 A7 ^ -B7 ____ _ V. Description of the invention (1) Huan Ye was issued by Chun Li under the sponsorship of the Spring State Research Institute and published as Zhao Li's Lu Ming under the present invention is Completed with the support of the government in accordance with Contract No. MDA972-96-3-0014 granted by the National Defense Advanced Research Projects (DARPA). The federal government has certain rights in this invention. SUMMARY OF THE INVENTION The present invention relates to the field of light emission which is particularly related to providing high-quality reflective surfaces on both sides of an AIxGayInzN element.訾 景 A vertical cavity optoelectronic structure is composed of an active region formed by a light-emitting layer inserted into a sealing layer. The sealing layer may be doped, undoped, or contain a ρ'η junction. The structure also includes at least one reflecting mirror β forming a Fabry-Perot cavity in a direction perpendicular to the light emitting layer.
GaN/ALGaylnzN/AlxGauNataALGayli^Ntx+y+Pi， 並且在AlxGai.xN中1)材料系統中製造垂直空腔光電子 结構會具有遠離某他m-v材料系統置放該結構之挑戰， 而難以生成具有高光學品質之AlxGayInzN結構。電流散布 對AlxGayInzN元件具有主要的利害關係。在型材料中之 橫向雷流散布比在η-型材料中小〜30倍。此外，因為元件 為了最佳的熱下陷而應該被安裝成接合面朝下，故許多基 材之熱導率增加了元件設計的順性。 一種例如垂直空腔表面發射雷射（vc;SeL)之垂直空腔 光電子結構要求尚品質的鏡子，例如99.5%的反射率。— c锖先閱蜻背面之注意事項再填寫本頁) _ ! I 訂·! !1!* 線 — -n n - -fi a— nGaN / ALGaylnzN / AlxGauNataALGayli ^ Ntx + y + Pi, and manufacturing a vertical cavity optoelectronic structure in AlxGai.xN 1) material system will have the challenge of placing the structure away from some other MV material system, and it is difficult to generate high optical Quality AlxGayInzN structure. Current spreading has a major stake in AlxGayInzN components. The lateral lightning current spread in the type material is ~ 30 times smaller than in the η-type material. In addition, the thermal conductivity of many substrates increases the compliance of the component design because the component should be mounted with the mating side facing down for optimal thermal sag. A vertical cavity optoelectronic structure, such as a vertical cavity surface emitting laser (vc; SeL), requires a quality mirror, such as a 99.5% reflectance. — C 锖 Read the precautions on the back of the dragon before filling out this page) _! I order!! 1! * Line — -n n--fi a— n
經濟部智慧財產局MK工消費合作社印製 A7 _____B7___ 五、發明說明（2 ) 種達呈高品質鏡子之方法是透過半導體生成技術•為達到 適合VCSELs(>99%)之分佈布雷格反射器（DBRs)所需的高 反射率，對於半導體AlxGayIn^NL__；QBRs的生成會有重要的 材料問題，其係包括破裂與導電率。這些鏡子要求許多交 替的銦鋁鎵氮化物組成物（AlxGayInzN/A：lx，Gay，Inz，N) 之節/層。與半導體DBRs相對照，介電DBRs(D-DBR)被相 地直接製造具有AlxGayInzN系統所跨的光譜範圍中超過 99%的反射率。這些鏡子典型地藉由蒸發或濺鍍技術而被 沉積’但MBE(分子束蟲晶，molecular beam epitaxial)與 MOCVD(金屬有機物化學氣相沉積，metal-〇rganic chemical vapor deposition)亦可以被使用。然而，僅有主 動區域的一侧可以使用D-DBR_沉積，除非生長基材被移 除。若可能在AlxGayInzN動區域的兩側上结合與/或沉積 D-DBRs，則製造AlxGayInzN垂直空腔光電子結構會是更 加容易。 晶圓結合可以被分成兩個基本類別：直接晶圓結合以 及金屬晶圓結合。在直接晶圓結合中，兩晶圓經由於接合 界面處的質量傳送而被熔合在一起。直接晶圓結合可以在 半導體、氧化物及界電材料的任何組合間被執行。其通常 是在高溫（>40(TC)並在單軸壓力下被完成。一種合適的直 接晶圓結合技術被Kish等人在美、國專利_^5,5〇2,316號中揭 露。在金屬晶圓结合中，一金屬!被沉^兩結合^枯I 展著。一金屬結合之例示為倒裝片接合，其係 為一種使用在微粒與,光電子工業中，以將元件面朝下^ 本免>張尺度適用Φ國國家標準（CNS)A4規格（210 X 29Γ么、爱） I-----— lull— --------f ------ - <請先閲讀背面之注意事項再填寫本頁) 仏:邮 A7 _ B7_____ 五、發明說明（3 ) 附著至基材上之技術，該例示係被Yablonavitch等人揭露 於 1990年版 Applied Physics Letters 第 56冊第 2419-2421 頁 中。因為倒裝片接合被用來改善_元件的熱下陷，基材之 移除會視元件結構，以及習慣上僅對導電與機械堅固的金 屬结合層之要求而定》 在Dudley於 1994年版之Applied Physics Letters第 64冊 No.12 第 1463-1465 頁中所發表之 ’’Low threshold，wafer fused long wavelength vertical cavity lasers”中教示，將 A1 As/GaAs半導M DBRs直接晶圓結合至垂直空腔結構之 一側上，而在Babic等人於1995年11月版之IEEE Photonics Technology Letters 第 7 冊 No.ll 中所發表的”Room· Temperature Continuous-Wave Operation of 1.54 μ. m Vertical-Cavity Lasers”中教示直接晶圓結合半導體DBRs 至InGaAsP VCSEL的兩側上，以使用在AlAs/GaAs之間大 的折射率變化。如將會說明者，晶圓接合D-DBRs至 AlxGayInzN比半導體至半導體晶圓結合更複雜許多，並在 此技藝中先前並不知曉。 在Chua等人於1994年12月版之IEEE Photonics Technology Letters 第 5冊 No. 12 中所發表的 ”Dielectrically-B在使用應變補償多重量子井之GaAs上介電結合長波長垂 直空腔雷射”揭露AlAs/GaAs半導體DBRs藉由旋塗式玻璃 層而與InGaAsP雷射連結。旋塗式玻璃對於在主動層與 DBR夕閜的VCSEL中之結合並不是一合的材料，因 為難以控制旋塗式玻璃精择的厚度，因而對於vrsFT空 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公f ) (請先閱讀背面之注意事項再填寫本頁) ί--------訂---------線— 經濟邨智慧財產局具工消費合作社印< -IP .^1 n · 6 A7 A7 經濟部智慧財產局員工消費合作钍印製 B7 五、發明說明（4 ) 腔所需要的臨界層控制無效。此外，玻璃的性質會是非均 一性’而造成在空腔中的散射與其他損失。 具有足夠VCSEL用之反射率，例如>99%之半導體dbr 鏡子之AlxGa〖_xN/GaN對的光學鏡子生成為困難者β參考 第1圖’反射率之理論計算建議達到所要求的高反射率， 一高指數對比被要求可以藉由增加低指數AlxGaixN層之 A1組成與/或藉由包括更多層節（取自Ambacher et al.，MRS - Internet Journal of Nitride Semiconductor Research, 2(22) 1997之材料性質）而被提供。這些方法招致重要的考驗。 若電流將會透過DBR層而被傳導，重要的是dbrs為導電 者。為了充分地傳導，AIxGaUxN層必須被充分地摻雜。 除非A1組成被減少到對於Si(n-型）摻雜低於約50%以下， 而對於Mg(p-型）摻雜約20%以下，否則導電率不足夠。然 -Λ 而’如第1圖所示’需要使用低Α1組成層而達到足夠的反 射率之層節數目要求*的AUGa.-yN曾料之總厚唐，以增 加磊晶層破裂的風險（由於在今溆naN之問相對大的晶格 錯配合所造成），後減少組成控制。實際上，第1圖之Printed by A7 _____B7___ of the Intellectual Property Bureau of the Ministry of Economic Affairs of the Ministry of Economic Affairs. 5. Description of the invention (2) A method for achieving a high-quality mirror is through semiconductor generation technology. The high reflectivity required for (DBRs) has important material problems for the generation of semiconductor AlxGayIn ^ NL__; QBRs include cracks and electrical conductivity. These mirrors require many alternating indium-aluminum-gallium-nitride compositions (AlxGayInzN / A: lx, Gay, Inz, N). In contrast to semiconductor DBRs, dielectric DBRs (D-DBR) are directly fabricated with a reflectance of over 99% in the spectral range spanned by the AlxGayInzN system. These mirrors are typically deposited by evaporation or sputtering techniques. But MBE (molecular beam epitaxial) and MOCVD (metal-organic chemical vapor deposition) can also be used. However, only one side of the active area can be used for D-DBR deposition, unless the growth substrate is removed. If it is possible to combine and / or deposit D-DBRs on both sides of the AlxGayInzN moving region, it would be easier to fabricate AlxGayInzN vertical cavity optoelectronic structures. Wafer bonding can be divided into two basic categories: direct wafer bonding and metal wafer bonding. In direct wafer bonding, two wafers are fused together via mass transfer at the bonding interface. Direct wafer bonding can be performed between any combination of semiconductors, oxides, and dielectric materials. It is usually completed at high temperature (> 40 (TC) and under uniaxial pressure. A suitable direct wafer bonding technology is disclosed by Kish et al. In US Patent No. 5,502,316. In In metal wafer bonding, a metal! Is being developed by sinking two bonds ^ dry I. An example of a metal bond is flip-chip bonding, which is a type used in the microparticle and optoelectronic industries to face the component face down ^ This exemption > Zhang scale is applicable to the national standard (CNS) A4 specification (210 X 29Γ, love) I -----— lull— -------- f ------- < Please read the notes on the back before filling this page) 仏: Post A7 _ B7_____ V. Description of the invention (3) Technology attached to the substrate, this example was disclosed by Yablonavitch et al. in the 1990 edition of Applied Physics Letters Volume 56, pages 2419-2421. Because flip chip bonding is used to improve the thermal sag of components, the removal of the substrate will depend on the structure of the component and the requirement for a conductive and mechanically strong metal bonding layer. Applied in Dudley's 1994 edition Physics Letters Vol. 64 No. 12 pages 1463-1465 teaches "Low threshold, wafer fused long wavelength vertical cavity lasers" to directly bond A1 As / GaAs semiconductor M DBRs to a vertical cavity One side of the structure, and "Room · Temperature Continuous-Wave Operation of 1.54 μ. M Vertical-Cavity Lasers" published by Babic et al. In November 1995, IEEE Photonics Technology Letters, Volume 7, No.ll The instruction teaches direct wafer bonding of semiconductor DBRs to both sides of the InGaAsP VCSEL to use large refractive index changes between AlAs / GaAs. As will be explained, wafer bonding D-DBRs to AlxGayInzN is better than semiconductor to semiconductor wafers. The combination is much more complicated and previously unknown in this technique. Published in Chua et al., December 1994, IEEE Photonics Technology Letters, Volume 5, No. 12 "Dielectrically-B dielectrically combines long-wavelength vertical cavity lasers on GaAs using strain-compensated multiple quantum wells" revealed that AlAs / GaAs semiconductor DBRs are connected to InGaAsP lasers by spin-on glass layers. The combination of the active layer and DBR's VCSEL is not a unified material, because it is difficult to control the thickness of the spin-on glass, so the Chinese national standard (CNS) A4 specification (210 X 297 公 f) (Please read the precautions on the back before filling out this page) ί -------- Order --------- line — printed by Economic Village Intellectual Property Bureau Tooling Consumer Cooperatives < -IP. ^ 1 n · 6 A7 A7 Consumption cooperation between employees of the Intellectual Property Bureau of the Ministry of Economic Affairs and printing of B7 V. Description of the invention (4) The critical layer control required for the cavity is invalid. In addition, the nature of glass will be caused by heterogeneity ' Scattering and other losses in the cavity. Have sufficient reflectivity for VCSEL, such as> 99% of semiconductor dbr mirror AlxGa 〖_xN / GaN pair optical mirror generation is difficult for β reference Figure 1 Theoretical calculations suggest to achieve the required high reflection A high-index contrast is required by adding A1 to the low-index AlxGaixN layer and / or by including more layers (taken from Ambacher et al., MRS-Internet Journal of Nitride Semiconductor Research, 2 (22) 1997 Material properties). These methods pose important tests. If the current will be conducted through the DBR layer, it is important that dbrs is a conductor. In order to conduct fully, the AIxGaUxN layer must be sufficiently doped. Unless the Al composition is reduced to less than about 50% for Si (n-type) doping and less than about 20% for Mg (p-type) doping, the conductivity is insufficient. Ran -Λ and 'as shown in Figure 1' requires the use of a low A1 composition layer to achieve a sufficient number of sections * AUGa.-yN is expected to increase the risk of cracking the epitaxial layer (Due to the relatively large lattice mismatch in today's naN), the composition control is reduced afterwards. In fact, in Figure 1
Al,30Ga70N/GaN積材早已是〜2.5/zm厚，且與VCSEL之足 夠的反射率相差甚遠。因此’根據此層對之高反射率DBR 要求顯著大於2.5ym的總厚度，並且只要在A1N與GaN生 成條件之間與材料性質發生錯配合的情況下，便難以可靠 地生成。若層未被摻雜’即使破裂未大到而成為一個問題， 組成控制與AlN/GaN生成溫度仍對生成高反射率DBRs造 成大考驗。因此，即使在DBRs不需要傳導電流的應用下， -------I------裝-----丨丨訂--------- C請先閱讀背面之注意事項再填寫本頁> 又 lc 竿 ^ .豕 §1 格 規 4 Μ 公 7 9 2 7 A7 f· 4429 82 ___B7_____ 五、發明說明（5 ) 在料系統中具有反射率>99%之半導體鏡子 積材未被證實。為此原因，以介電體為主的DBR鏡子為較 佳者。_ 鑪结 至少一鏡子積材，例如一介電分佈布雷格反射器（D-DBR)或複合D-DBR/半導體DBR *插在一 Al,GayInzN主動 區域與一主基材之間。一晶圓結合界面被定置在主基材與 主動區域之間的某處》—任意的中間結合層與晶圓結合界 面相鄰，以適應於晶圓結合界面處的應變與熱係數錯配 合。一任意的鏡子積材相鄰於AlxGayInzN主動區域而被定 置。主基材或令間結合層因為順性而被選擇。 前述發明之一實施例由一具有被定置成與AlxGayInzN 主動區域相鄰之晶圚結合界面的元件所構成，該 AlxGayInzN主動區域在例如A1203之犧^ ^ ^ h nh被製 造。附著於主基材上之鏡子積材被直接晶圓結合至Al, 30Ga70N / GaN stack is already ~ 2.5 / zm thick, and it is far from the sufficient reflectivity of VCSEL. Therefore, according to the high reflectivity DBR of this layer, a total thickness of significantly greater than 2.5 μm is required, and it is difficult to reliably generate as long as the mismatch between the A1N and GaN generation conditions and the material properties occurs. If the layer is not doped ', even if the crack is not large enough to become a problem, composition control and AlN / GaN generation temperature will still pose a great test for the generation of high reflectivity DBRs. Therefore, even in applications where DBRs do not need to conduct current, ------- I ------ installation ----- 丨 丨 order --------- C Please read the back first Please pay attention to this page and fill in this page again. Lc lc 1 11 Grid gauge 4 Μ Public 7 9 2 7 A7 f · 4429 82 ___B7_____ 5. Description of the invention (5) Reflectivity in the material system > 99% The semiconductor mirror building blocks have not been proven. For this reason, a DBR mirror mainly composed of a dielectric is preferable. _ Furnace junction At least one mirror block, such as a dielectric distributed Bragg reflector (D-DBR) or composite D-DBR / semiconductor DBR * is inserted between an Al, GayInzN active area and a main substrate. A wafer bonding interface is positioned somewhere between the main substrate and the active area. "Any intermediate bonding layer is adjacent to the wafer bonding interface to accommodate the mismatch of strain and thermal coefficient at the wafer bonding interface. An arbitrary mirror stack is positioned adjacent to the AlxGayInzN active area. The main substrate or interlayer bonding layer is selected for compliance. One embodiment of the foregoing invention is composed of an element having a crystal junction interface positioned adjacent to the AlxGayInzN active region. The AlxGayInzN active region is manufactured at, for example, the sacrifice of A1203 ^ ^ ^ h nh. The mirror block attached to the main substrate is bonded directly to the wafer
AlxGayInzN主動區域上。接著，犧牲基材被移除。任意的 — 鏡子積材被附著至AlxGayInzN主動區域的頂部上《供附著 、用之技術包括結合 '沉積及生成。電氣接點被加到n_型與 p-型層上。 對於具有被定置成與主基材相鄰之晶圓結合界面之另 一替實施例’鏡子積材被附著在AIxGayInzN主動區域上β 若採用直接晶圓結合，被選擇而具有合適的機械性質之主 基材被晶圓結合至鏡子積材上。另一方面，金屬結合可以 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公爱） (請先閲讀背面之注意事項再填寫本頁)AlxGayInzN on the active area. The sacrificial substrate is then removed. Arbitrary-the mirror block is attached to the top of the active area of AlxGayInzN. For attachment, the techniques used include combining 'deposition and generation. Electrical contacts are added to the n_ and p-type layers. For an alternative embodiment having a wafer bonding interface positioned adjacent to the main substrate, the mirror mirror is attached to the active area of AIxGayInzN. If direct wafer bonding is used, it is selected to have suitable mechanical properties. The main substrate is bonded to the mirror stack by the wafer. On the other hand, metal bonding is possible. This paper size applies Chinese National Standard (CNS) A4 specifications (210 X 297 public love) (Please read the precautions on the back before filling this page)
-ϋ I I 訂---------線丨 經濟部智慧財產局員工消費合作社印5衣 8 經濟部智慧財產局員工消费合Α社印製 A7 ^-------B7____ 五、發明說明（6 ) 被用來將主基材結合至鏡子積材上。犧牲基材被移除。一 任意的鏡子積材被附著在AlxGayInzN主動區域的頂部上。 電氣接點被加到n-型與p_型層上。在直接晶圊結合而得到 所欲性質的情況下，主基材之選擇是一個重要的教示。另 外的實施例包括在DBR之内定置晶圓結合界面。 圈式之ffi组說明 第1圖例示理論反射率對AlN/GaN與Al.30Ga 70N/GaN DBRs之波長。 第2圖例示本發明之較佳實施例。 第3A-F圖圖示地描述對應本發明之流程圖。 第4A-F圖圖示地描述對應本發明之另一個流程圖β 第5圖顯示在一被沉積在GaN/Al203結構上之ο七BR 與一GaP主基材間之直接晶圓結合界面的掃描式電子顯微 鏡（SEM)橫截面圖。 第ό圖顯示具有一被金屬結合至主基材上經沉積的D* DBR主動區域的SEM橫截面圖。該基材已被移除且第二 DBR相對於第一 D-DBR已被沉積在AlxGayInzN之侧邊上。 第7圊顯示來自第6圊所述之元件從400至50〇nm的光 學發射光譜3典型的高峰描述垂直空腔結構。 圈式之祥妇說明 介電分佈布雷格反射器（D-DBR)由低損失介電體之積 材對所構成’在此^對材姻·沾耸伞之一具有低折射率，而一 本紙張又度遘用由國國家標準（CNS)A4規格(210 X 297公爱） -------I---I t --------t -------- (請先閱讀背面之注意Ϋ項再填寫本頁) 9 f r AAZ^ B 2 a A7 ___ B7_______ 五、發明說明（7 ) (靖先閱讀背面之注急事項再填寫本頁) 具有高折__教·專》某些可能的介電DBR鏡子以與二氧化鈦 (Ti〇2)成對的二氡化矽⑸叫層為根據，二氧化鍅（Zr〇2)、 氧化纽（TjA^MUKJif02)可以達到藍色垂亙空腔表面 發射雷射（VCSEL)所要求的高反射率，例如>99 5%，或是 共振空腔發光元件（RCLED)所要求者’例如〜60%或更高。 因為SiOj/HfC»2積材對可以被用來生產在35〇-5〇〇nm的波長 範圍中具有超過99%的反射率之鏡子積材，故對Si〇2/Hf〇2 積材對具有特別的興趣。以Si02/Hf02之交替廣所製成之 \ D-DBRs已顯出直至l〇5〇eC會具有機械穩定，而對之後的 處理提供撓曲度。 經濟部智慧財產局WK工消费合作社印製 ^1 1- n , 一較佳實施例顯示於第2圊中。在第2囷中，一第一鏡 子積材14，例如具有高反射率之DBR，被附著至一合適的 基材12上。鏡子積材14可以由一種或多種下列之材料所構 成：介電體、半導艎以及金屬。第一鏡子積材14被晶圓結 合至被生成於一犧牲基材上之人1:^3/111以主動區域18中的 頂部ρ-層18b上。AlxGayInzN垂直空腔光電子結構18已為 了在所欲之波長下具有高增益而被設計。晶與結合界面16 必須具有非常低散射之極好的光學品質。晶圓結合界面16 可以包括一任意的中間結合層（未顯示）。一例如D-DBR(於 第2圖所示）之任意的笫二鏡子精材20被附著至在相對於第 一鏡子積材之一側上的AlxGavInzN垂直空腔光電子結構18 上，任意的第二鏡子積材20與AlxGayInzNi動區域18之n-與p-型層18a、18b會被形成圖案並被蝕刻，以提供歐姆接 觸用之區塊》對於一 VCSEL，鏡子必須具有非常高的反 本紙張尺度適用令國國家標準（CNS)A4規格（210 X 297公爱） 10 經濟部智慧財產局員工消費合作社印製 附 至 A7 ______B7_____ 五、發明說明（8 ) 射率>99%。對於一 RCLED，鏡子反射率之要求被放寬 (>60%). 第2圖所示之另一種方法係為供欲被附著至 AlxGayInzNS動區域18上之鏡子積材14之用。接著，晶圓 結合界面16接著位於鏡子積材14與主基材12之間。此結構 亦會具有一任意的第二鏡子積材20。欲連同第一或第二種 方法一起被使用之又另一種方法為在一或兩鏡子積材的中 間處具有一直接晶園結合。數種晶圓結合界面16可能的配 置被顯示於第2圖中》 電流集中可以在η-型或p-型主動區域材料中藉由插入 一 AlxGayInzN層而被達成’其係可以被蝕刻與/或氧化，以 改善電流與光學限制，因而減少雷射門檻或改件效 率。當一 D-DBR與/或未摻雜之半導體DBR被使用時，此 類層的合併是重要的，因為沒有電流透過它們而被傳導。 空腔根據接觸層所需的厚度而可以是單一或多重波長空 腔’以得到適合的低正向電壓。上述許多結構上的變化為 可能者。一相似的結構亦可以p-與n_型材料轉換的方式而 被製造。 第3 A-F圖圖示地描述對應本發明之一實施例的流程 圖。在第3A圖中’ 一 AlxGayInzN主動區域在例如Al2〇3的 犧牲基材上被製造。在第3B圖中，一第一鏡子積材被 著至一主基材上。供附著用之技術包括結合、沉積與生成 在第3C圖中，該第一，子積材經由晶圓韓貪而被附著 AlxGayItizN主動區域上。對於一 VcSEL，直接晶圓結合應 (2W * 297 公坌） -------------^^ _!11!1 訂—------線 《請先閱讀背面之注意事項再填寫本頁) 11 ' R .) ' R .) 經濟部智慧財產局員工消f合作社印製 A7 B7 五、發明說明（9 ) 該被使用’因為具有低光學損失是重要的因素。在第3D 圖中’該犧牲基材被移除。在第3E圖中，任意的第二鏡 子積材被附著至AlxGayInzN主動區域的頂部上a在第3F圖 中’電氣接點被加到任意的第二鏡子積材或AlxGayInzNi 動區域上。形成圖案來界定元件面積並暴露接觸層亦可以 .在處理流程中被執行。 第4八-卩囷圖示地描述另一處理流程圚β在第4A圖中， 一 AlxGayInzN主動區域在一犧牲基材上方被生成。在第4Β 圖中’該第一鏡子積材被附著至AIxGayInzN主動區域上。 在第4C圖中，一主基材經由直接晶圓結合或金眉結合而 被附著至第一鏡子積材上。因為晶與結合是在光學空腔的 外部’由於晶圊厶所造成的損失較不重要。在第4D圖 中，該犧牲基材被移除。在第4E圖中，任意的第二鏡工 積材被附著至AlxGayInzN主動區域上。在第4F圖中，電氣 接點被加到任意的第二鏡子積材或AlxGayInzN主動區域 上。形成圖案來界定元件面積並暴露接觸層也可以在處理 流程中被執行。 供直接晶圓結合用之主基材的選擇是重要的，並被下 列數種性質所影孪：晳蚩僂谈、J1庚性、及應力/應變減緩β 該主基材可以選自一個包括磷化鎵（Gap)、砷化磷fGaAs)、 磷化銦（InP)、或矽（Si)之群組。對於Si，基材較佳的厚度 在1000人與50以111之間。 質量傳送在直接晶圓結合扮演一個重要的角色。在標 準皿-v至m-v的直接晶圓結合，或是m-v至介電結合 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公爱） <請先閲讀背面之注*事項再填寫本頁) ^------——訂·-----— —線· 12 A7 五、發明說明（10 中至）一表面在足夠低來維護層品質的溫度下呈現顯著 的質量傳送。相反地，AlxGayIiizN與大多數的介電封料在 與維持高In含量的AlxGayIllzN主動區域之完整性一致的溫 度下（<1GGG°C)不會進行顯著的質量傳送。在—種或兩種 « η材料中質量傳送的缺乏會阻礙晶圓的附著性。對於此 之模式是當兩種材料在結合溫度下皆呈現出顯著的質量傳 送時’兩種材料的結合可以跨越界面而重新排列成最強的 結合。當僅有一種材料呈現顯著的質量傳送時’僅此一種 材料的結合可與其他材料的表面結合對準。在此情況下， 難以形成具有高機械強度的晶圓結合。 順性是材料改變原子或巨觀級形狀而適應應力或應變 之能力。為了本發明之目的，順性被界定以藉由具有比結 σ度低的炫點之.材料’或在材料在低於結合溫度下具有 一可延展/脆化的變換之時’或於基材比〜5〇#111薄時而被 達成。 對於GaP、GaAs、及inP基材之標準瓜-V晶圓結合一 般是在400-1000Χ：的溫度下執行，於此溫度下兩種基材係 皆為順性。至少一種結合材料的順性對於晶圓結合是必須 的，因為材料具有原有的表面粗糙度與/或缺乏微觀或巨 觀級上的平坦度。在1〇001的溫度下，於環境下回火2〇 分鐘的AlxGayInzN結構會造成約2〇%PL強度的減少。因 此’期望將結合溫度保持在l〇〇〇°C以下。在Al2〇3基材上 生成以GaN為主的材料在低於1〇〇crc的溫度下不為順性。 用來製造供寬帶間隙半導體用之高反射率D-DBRs的介電 本纸張又寬適用令國國家標A (CNSM4"·規格X 297公t ) Ϊ3 --------------裝 it (請先閱讀背面之注意事項再填寫本頁) ιδ1· ;線· 經濟部智慧財產局員工消費合作社印製 442982 A7 ---SZ___ 五、發明說明（11 ) 材料在低於lootrc下典型為非順性β因此，結合/支撐基 材與/或中間結合在這些溫度下為順性是重要的β (猜先M讀背面之沒意事項再填寫本頁) 溶點是一個判定材料順性之性質。例如，對於下列材 料 ’ GaAs(Tm=1510K)、GaP(Tm=1750K)、以及 ιηΡ (Tm=133OK) ’可以瞭解順性的相對次序是Ιηρ、GaAs、Gap， 而InP是具有最大順性者。材料一般在低於熔點的溫度下 會進行可1延展/脆性轉變。在高温下這些材料的順性必須 以其中一元素的解吸附作用來被平衡。即使InP在1〇〇〇艺 下為順性’但材料會在該溫度下劇烈地分解，其係因為磷 的解吸附作用的緣故。與此類材料之結合應該被限制在比 結合期間於周圍壓力下之解吸附作用溫度約兩倍的溫度 下。因此，材料之選擇必須與所要求的順性與結合溫度兩 者皆相容。 經濟部智慧財產局員工消費合作社印製 -t · 非常薄的基材也可以是順性*例如<50仁m之薄石夕為 順性’因為即使是在高曲度半徑處，若基材非常薄則應力 小β此技術對於具有高斷裂硬度之材料非常有用，例如矽 (1127(m/mm2)或AlxGayInzN。然而’具有低斷裂硬度之材 料，例如GaAs(2500N/mm2)在操作期間容易斷裂·»對於具 有厚度>50# m的矽，即使小曲度半徑在材料中會造成高 應力，而使材料斷裂。相同的方式會應用到其他可能的基 材選擇物之材料上》 應力與應變之減緩是因為在生成於A1203上之GaN_ 的高錯配合應力，以及在AlxGayInzN與其他最適合的基材 物質間的熱膨脹係數（CTE)而惡化》與其他被晶圓結合之 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公漦） 14 經濟部智慧財產局員工消費合作社印製 A7 ____K五、發明說明（l2 ) 半導體材料對照’在AlxGayInzN與其他半導體材料之間的 CTE錯配合比較大；應力藉由沿著纖鋅礦材料之a#c平面 之不同的CTE錯配合而被合成。在晶圓結合至不同基材 (GaAs CTE=5.8、GaP CTE=6.8、InP=4.5X 10.V°C)上之GaN 中的應力（CTE=5.59，a-平面/3.ΠΧ ΙΟ.6，c-平面/。〇 )需要 以局部的應力緩減為條件，因為主基材的CTE錯配合應該 緊密地配合兩GaN平面之錯配合〇此應力應該在順性材料 中，或是藉由提供局部應力缓減，例如將至少一面結合界 面形成圖案之方式而被適應，該順性材料係於中間結合層 中是軟的或在結合溫度下結合界面處為液體。中間結合層 選自一個包括含有鹵化物（例如CaFJ、ZnO、銦（In)、錫 (Sn)、鉻（Cr)、金（Au)、鎳（Ni)、銅（Cu)及 E -VI材料之合 金與介電體之群組。 電流分布對於以GaN為主的元件是另一個主要的關 聯。在p-形材料中的橫向電流分布為〜30x，小於在η-型材 料中的橫向電流分布。雖然在主動層之兩側上製造高反射 率的鏡子對於一良好的空腔是必須者，但橫向Ρ-層電流分 布之問題會因為D-DBRs的絕緣本質而變得更嚴重。一種 在P-層中改進電流分布之方式是製造導電透明半導體之複 合DBR與介電積材。該積材的半導體部分藉由增加p_層的 厚度而改善電流分布，而介電基材改進低半導體反射率， 而達到高於99%的總鏡子反射率。雖然因為n_型層具有較 高的導電度故不是很重要’但此相同的步驟可以被應用到 η-型鏡子上= 裝--------訂---------線 (請先閱讀背面之沒意事項再填寫本頁) 衣紙張尺度適用命國國家標m ;CMS)A4規烙（210 X 297公龙） 15 442 9 8 2 a? ___一 ___B7_____ 五、發明說明（13 ) 電流聚集層之加入會藉由僅將電流導入空腔中而進一 步改善電流分布，並且對於VCSEL會是必須的β該電流 聚集層可以被用到帶有或未帶有複合半導體/介電DBR之 垂直空腔光電子結構上，並且可以被加到一複合鏡子之半 導體部分中。雖然電流聚集層會被包括在封閉層之ρ_與η_ 層兩層中’但因為較低的導電度，故此在ρ-封閉層中是最 有效的。 若一 D-DBR被附著到主動區域的兩側上時，則支撐 基材為必要者，因為原本的主基材必須被移除。有數種用 以移除藍寶石基材的方法，該藍寶石典型被作為生長基 材。於下概述的方法僅為可以被用來移除生長基材之技術 的子集，該生長基材以可以是除了藍寶石以外之材料。 在雷射溶化中，一種由Wong，et a〗，與Kelley, et al.，所 揭露具有一波長係對於藍寶石基材會呈透明，但對於相鄰 於基材之半導體層則否之雷射的技術會照亮該結構的背面 (藍寶石側）》雷射能量不能貫透相鄰的半導體層。若雷射 能量足夠，相鄰於藍寶石基材之半導體層會加熱到其分解 點。對於GaN是與藍寶石基材相鄰之層的情況，位於界面 處之層會分解成Ga與N，而留下在界面後的Ga« Ga金屬 接著會被熔化，並且藍寶石基材會被從該層結構的剩餘部 分上移除。相鄰於藍寶石基材之層的分解會視雷射能量、 波長、材料分解溫度、及材料吸收而定。藍寶石基材藉由 此種技術而被移除，而使得D-DBR能夠附著至主動區域 的其他側上。然而，重要的是，VCSEL界面有最小的損 本紙張尺度適用中國國家標準（CNS)A4規格（210 * 297公釐） (請先Mtl背面之注意事項再填寫本頁> 訂---------線丨 經濟部智慧財產局員工消費合作社印製 16 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（ 耗（<0·5%)並非常的平滑’而使空腔的共振特性增加到最 大。此雷射溶化技術具有許多會使雷射界面缺乏VCSel 需要的平坦度之設計變因。此外，VCSELs具有非常緊密 的厚度約束。有數種雷射可以被用來減緩這些問題之方 式。 與犧牲生長基材相鄰之層被界定成一犧牲層，若該層 的厚度會使其將因雷射而被完全地分解·>在文獻（w〇ng，et al.)中所發表的結果表示將會被完全地分解的層厚度為 5 0 0 A ’但是此數值將根據雷射能量、雷射波長、及與基 材相鄰之層的吸收與材料分解溫度。相鄰於犧牲層為阻絕 層之層（相對於該基材）被選擇，其係為阻絕層，以具有較 高的分解溫度或在雷射波長下具有比犧牲層底的吸收。因 為阻絕層具有較高的分解溫度或是低吸收，故其將會被雷 射能量大大地影響。在此結構中’犧牲層被雷射分解，而 在具有較高的分解溫度或較低的吸收的阻絕層處留下一陡 變界面。接著’該阻絕層亦可以被蝕刻、氡化與蝕刻，或 是使用具有不同能量與波長之雷射而分解。 較佳的層組合是 GaN/ALGahN、InGaN/AlxGtxN、 及InGaN/GaN。在GaN/ALGakN組合的情況下，GaN犧牲 層將會因雷射而分解，但AlxGa^N阻絕層將不受到影響。 AlxGa卜XN接著可以運用選擇性濕式化聲姓刻來被蝕刻 掉’以在平滑的AlxGayInzN界面上停止。另一方面，若上 述的GaN層未被完全地分解，留下的GaN可以被蝕刻掉。 因為厚的緩衝層需要在GaN生成的開始，且VCSEL層界面 ’國國家標革（CNS)A4規格（210 X 297公爱} ----------I--裝-------訂·------- -線 (請先閱讀背面之泫意事項再填寫本頁) 17 4429 82 A7 B7 五、發明說明（l5 ) 需要是被控制的厚度且非常的平滑，此技術可以是特別有 用者。 一特別層的厚度可以藉由使用一層或多層犧牲層與阻 絕層來被修裁。藉由雷射熔化與選擇性濕式化學蝕刻，屠 對可以被分解並依序被蝕刻，直至到達所欲的厚度。一較 佳層結合為GaN/AlxGa^N ’在此GaN為犧牲層並且 AkGa^N阻絕層可以被選擇地濕式化學蝕刻。 有另外其他移除生成長材的方法》—種方法是使用可 以運用濕式化學蚀刻而被選擇地蚀刻之A1N » A1N會被用 來作為一犧牲層，在此AlxGayInzN層可以從主基材上藉由 使用A1N選擇性蝕刻被移除，以底切該結構。另一方面， A1N層可以使用濕式氧化方法在升高的溫度下被氧化。接 著，A1N-氧化物可以使用例如HF的蝕刻劑而杜刻掉。在 另一方法中，基材可以被剝離’例如以輕質離子植入材料 中。此種方法會在一定的深度處產生缺陷。當基材被加熱 時’材料會透過錯位而選擇地裂開，並且基材被與主動層 分離。經由化學蝕刻劑底切ZnO或其他介電緩衝層可以被 用來從AlxGayInzN層上移除基材。此技術可以被應用到2_ D或3-D生長技術（例如Si02或其他在ELOG中所使用的介 電體），在此AlxGayInzN層橫過基材是連績的或是僅在經 形成圖案區塊t為連續的。-ϋ II Order --------- Line 丨 Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 5 Printed by the Consumers’ Cooperative of the Ministry of Economic Affairs ’Intellectual Property Bureau Printed A7 ^ ------- B7____ 5 (6) The invention description (6) is used to bond the main substrate to the mirror assembly. The sacrificial substrate is removed. An arbitrary mirror stack is attached to the top of the AlxGayInzN active area. Electrical contacts are added to the n-type and p-type layers. In the case of direct crystal bonding to obtain the desired properties, the choice of the main substrate is an important teaching. Another embodiment includes positioning a wafer bonding interface within the DBR. Description of the ring-shaped ffi group Figure 1 illustrates the theoretical reflectance versus wavelengths of AlN / GaN and Al.30Ga 70N / GaN DBRs. Figure 2 illustrates a preferred embodiment of the present invention. 3A-F schematically illustrate a flowchart corresponding to the present invention. Figures 4A-F diagrammatically describe another flowchart corresponding to the present invention. Figure 5 shows the direct wafer bonding interface between a 7BR and a GaP master substrate deposited on a GaN / Al203 structure. Scanning electron microscope (SEM) cross-sectional view. Figure 6 shows a SEM cross-sectional view of a deposited D * DBR active region with a metal bonded to the main substrate. The substrate has been removed and a second DBR has been deposited on the side of AlxGayInzN relative to the first D-DBR. The seventh peak shows the optical emission spectrum from 400 to 50 nm from the element described in the sixth peak. 3 Typical peaks describe the vertical cavity structure. The ring-shaped lady explained that the dielectric distribution Bragg reflector (D-DBR) is composed of a pair of low-loss dielectric materials. 'Here ^ one of the materials has a low refractive index, and one This paper is used again by the national standard (CNS) A4 specification (210 X 297 public love) ------- I --- I t -------- t ------ -(Please read the note on the back before filling this page) 9 fr AAZ ^ B 2 a A7 ___ B7_______ V. Description of the invention (7) (Jing first read the urgent matters on the back before filling this page) With a high discount __Teach · Special "Some possible dielectric DBR mirrors are based on a silicon dioxide chirped layer paired with titanium dioxide (Ti〇2), hafnium oxide (Zr〇2), oxide button (TjA ^ MUKJif02 ) Can achieve the high reflectivity required by the blue vertical cavity surface-emitting laser (VCSEL), such as > 99 5%, or the one required by the resonant cavity light emitting element (RCLED) ', such as ~ 60% or more high. Because the SiOj / HfC »2 composite material pair can be used to produce mirror composites with a reflectance of more than 99% in the wavelength range of 35-50 nm, the Si02 / Hf〇2 composite material pair With special interest. The D-DBRs made from the alternating Si02 / Hf02 have been shown to be mechanically stable up to 105 eC, and provide deflection for subsequent processing. Printed by the WK Industrial and Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs ^ 1 1-n, a preferred embodiment is shown in Section 2 (a). In the second stage, a first mirror assembly 14, such as a DBR having a high reflectance, is attached to a suitable substrate 12. The mirror block 14 may be composed of one or more of the following materials: a dielectric, a semiconductor, and a metal. The first mirror stack 14 is bonded by a wafer to a person 1: ^ 3/111 generated on a sacrificial substrate to the top p-layer 18b in the active region 18. The AlxGayInzN vertical cavity optoelectronic structure 18 has been designed to have a high gain at a desired wavelength. The crystal-bonding interface 16 must have excellent optical quality with very low scattering. The wafer bonding interface 16 may include an arbitrary intermediate bonding layer (not shown). An arbitrary second mirror fine material 20, such as D-DBR (shown in FIG. 2), is attached to the AlxGavInzN vertical cavity optoelectronic structure 18 on one side opposite to the first mirror stack. The two mirror stacks 20 and the Al-GayInzNi moving region 18 of the n- and p-type layers 18a, 18b will be patterned and etched to provide blocks for ohmic contact. "For a VCSEL, the mirror must have a very high reflectance The paper size is applicable to the national standard (CNS) A4 specification (210 X 297 public love) 10 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs and attached to A7 ______B7_____ V. Description of the invention (8) Emissivity > 99%. For an RCLED, the mirror reflectance requirement is relaxed (> 60%). Another method shown in Figure 2 is for the mirror block 14 to be attached to the AlxGayInzNS moving area 18. The wafer bonding interface 16 is then located between the mirror stack 14 and the main substrate 12. This structure will also have an arbitrary second mirror stack 20. Yet another method to be used in conjunction with the first or second method is to have a direct crystal bond in the middle of one or two mirror stacks. Several possible configurations of the wafer bonding interface 16 are shown in Figure 2. The current concentration can be achieved by inserting an AlxGayInzN layer in the n-type or p-type active area material. Its system can be etched and / Or oxidize to improve current and optical confinement, thereby reducing laser thresholds or modification efficiency. When a D-DBR and / or undoped semiconductor DBR is used, the merging of such layers is important because no current is conducted through them. The cavity can be a single or multiple wavelength cavity 'depending on the thickness of the contact layer required to obtain a suitable low forward voltage. Many of these structural changes are possible. A similar structure can also be manufactured by converting p- and n-type materials. Figures 3A-F schematically illustrate a flowchart corresponding to one embodiment of the present invention. In Figure 3A ', an AlxGayInzN active region is fabricated on a sacrificial substrate such as Al203. In Figure 3B, a first mirror stack is applied to a main substrate. Techniques for attachment include bonding, deposition, and generation. In Figure 3C, the first, sub-bulk is attached to the AlxGayItizN active area via the wafer Han. For a VcSEL, the direct wafer bonding should be (2W * 297 mm) ------------- ^^ _! 11! 1 Order -------- line "Please read the back first Note: Please fill out this page again) 11 'R.)' R.) Employees of the Intellectual Property Bureau of the Ministry of Economic Affairs, printed by the cooperative A7 B7 V. Description of the invention (9) It should be used because the low optical loss is an important factor . In Figure 3D 'the sacrificial substrate is removed. In Figure 3E, any second mirror building block is attached to the top of the AlxGayInzN active area. In Figure 3F, the 'electrical contact' is added to any second mirror building block or AlxGayInzNi moving area. Forming a pattern to define the area of the component and exposing the contact layer can also be performed during processing. The eighth-eighth diagrammatically describes another processing flow. In Fig. 4A, an AlxGayInzN active region is generated over a sacrificial substrate. In FIG. 4B, the first mirror block is attached to the AIxGayInzN active area. In FIG. 4C, a main substrate is attached to the first mirror stack via direct wafer bonding or gold eyebrow bonding. Because the crystal and the bond are outside the optical cavity, the loss due to the crystal is less important. In Figure 4D, the sacrificial substrate is removed. In Fig. 4E, an arbitrary second mirror material is attached to the AlxGayInzN active area. In Figure 4F, the electrical contacts are added to any second mirror block or AlxGayInzN active area. Forming a pattern to define the area of the component and exposing the contact layer can also be performed during the processing flow. The choice of the master substrate for direct wafer bonding is important and is influenced by several properties: clarity, J1, and stress / strain mitigation. The master substrate can be selected from one including Groups of gallium phosphide (Gap), phosphorous arsenide (fGaAs), indium phosphide (InP), or silicon (Si). For Si, the preferred substrate thickness is between 1,000 and 50 to 111. Mass transfer plays an important role in direct wafer bonding. For standard wafer-v to mv direct wafer bonding, or mv to dielectric bonding, this paper standard applies Chinese National Standard (CNS) A4 specification (210 X 297 public love) < Please read the note on the back * (Fill in this page) ^ ------—— Order · ------- — Line · 12 A7 V. Description of the invention (10 to 10) A surface appears significant at a temperature low enough to maintain the quality of the layer Mass transfer. In contrast, AlxGayIiizN and most dielectric sealants do not perform significant mass transfer at a temperature (< 1GGG ° C) consistent with maintaining the integrity of the high In content of the AlxGayIllzN active region. The lack of mass transfer in one or both of the «η materials can impede wafer adhesion. For this model, when both materials exhibit significant mass transfer at the bonding temperature, the combination of the two materials can be rearranged across the interface to form the strongest bond. When only one material exhibits significant mass transfer ' ' the combination of only one material can be aligned with the surface combination of the other material. In this case, it is difficult to form a wafer bond having high mechanical strength. Compliance is the ability of a material to adapt to stress or strain by changing the shape of the atom or mesoscale. For the purposes of the present invention, compliance is defined by the use of materials that have a glare point lower than the junction σ degree, or when the material has a malleable / embrittleable transformation below the bonding temperature, or based on The material is sometimes thinner than ~ 5〇 # 111. For standard GaP, GaAs, and inP substrates, the standard melamine-V wafer bonding is generally performed at a temperature of 400-1000 ×: at this temperature, both substrate systems are compliant. The compliance of at least one bonding material is necessary for wafer bonding because the material has the original surface roughness and / or lacks micro- or macro-level flatness. At a temperature of 100,000, AlxGayInzN structure tempered for 20 minutes in the environment will cause about 20% reduction in PL strength. It is therefore desirable to maintain the bonding temperature below 1000 ° C. GaN-based materials produced on Al203 substrates are not compliant at temperatures below 100crc. The dielectric paper used to make high reflectivity D-DBRs for wide band gap semiconductors is also widely applicable to national standard A (CNSM4 " · Specification X 297 male t) Ϊ3 ------------ --Install it (please read the precautions on the back before filling this page) ιδ1 ·; line · Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 442982 A7 --- SZ___ 5. Description of the invention (11) The material is below the lootrc The following is typically non-compliant β. Therefore, it is important for the bonding / supporting substrate and / or intermediate bonding to be compliant at these temperatures. Β (guess first read the unintentional matter on the back and then fill out this page) The melting point is a judgment The nature of material compliance. For example, for the following materials 'GaAs (Tm = 1510K), GaP (Tm = 1750K), and ιηΡ (Tm = 133OK)', we can understand that the relative order of compliance is Ιηρ, GaAs, Gap, and InP is the one with the largest compliance . Materials generally undergo ductile / brittle transitions at temperatures below the melting point. The compliance of these materials at high temperatures must be balanced by the desorption of one of the elements. Even if InP is compliant at 1000 °, the material will decompose violently at this temperature because of the desorption of phosphorus. Bonding with such materials should be limited to a temperature that is approximately twice the desorption temperature at ambient pressure during bonding. Therefore, the choice of material must be compatible with both the required compliance and bonding temperature. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs-t · Very thin substrates can also be compliant * For example, <50 ren m of thin stone eve is compliant 'because even at high curvature radius, Ruoji Very thin materials with low stress β This technique is very useful for materials with high fracture hardness, such as silicon (1127 (m / mm2) or AlxGayInzN. However, 'materials with low fracture hardness, such as GaAs (2500N / mm2) during operation Easy to break · »For silicon with thickness > 50 # m, even small curvature radius will cause high stress in the material, which will cause the material to break. The same method will be applied to other possible substrate selection materials" Stress The slowdown with strain is due to the high mismatched stress of GaN_ generated on A1203 and the thermal expansion coefficient (CTE) between AlxGayInzN and other most suitable substrate materials. Applicable to China National Standard (CNS) A4 specification (210 X 297 Gong) 14 Printed by A7, Consumer Cooperative of Intellectual Property Bureau, Ministry of Economic Affairs ____K V. Invention Description (l2) Comparison of Semiconductor Materials' in AlxGayInzN and The CTE mismatch between other semiconductor materials is relatively large; the stress is synthesized by different CTE mismatches along the a # c plane of the wurtzite material. The wafers are bonded to different substrates (GaAs CTE = 5.8, GaP CTE = 6.8, InP = 4.5X 10.V ° C) Stress in GaN (CTE = 5.59, a-plane / 3.Π × Ι0.6, c-plane / .〇) need to be relieved with local stress The condition is reduced, because the CTE mismatch of the main substrate should closely match the mismatch of the two GaN planes. This stress should be in a compliant material, or by providing local stress relief, such as patterning at least one side with the interface. The compliant material is adapted to be soft in the intermediate bonding layer or liquid at the bonding interface at the bonding temperature. The intermediate bonding layer is selected from the group consisting of a halogen-containing compound such as CaFJ, ZnO, indium (In) , Tin (Sn), chromium (Cr), gold (Au), nickel (Ni), copper (Cu), and alloys and dielectric groups of E-VI materials. The current distribution for GaN-based components is Another major correlation. The lateral current distribution in p-shaped materials is ~ 30x, which is smaller than that in η-type materials. Current distribution. Although manufacturing high-reflectivity mirrors on both sides of the active layer is necessary for a good cavity, the problem of lateral P-layer current distribution becomes more serious due to the insulating nature of D-DBRs. One way to improve the current distribution in the P-layer is to make a composite DBR and dielectric buildup of a conductive transparent semiconductor. The semiconductor portion of the buildup improves the current distribution by increasing the thickness of the p_ layer, while the dielectric substrate Improved low semiconductor reflectance to achieve a total mirror reflectance above 99%. Although it is not very important because the n-type layer has high conductivity, but this same step can be applied to the η-type mirror. -Line (please read the unintentional matter on the back before filling this page) The size of the paper is applicable to the national standard m; CMS) A4 standard (210 X 297 male dragon) 15 442 9 8 2 a? ___ 一 ___B7_____ V. Description of the invention (13) The addition of the current accumulation layer will further improve the current distribution by only introducing the current into the cavity, and will be necessary for VCSELs. Β This current accumulation layer can be used with or without The vertical cavity optoelectronic structure of the compound semiconductor / dielectric DBR can be added to the semiconductor portion of a compound mirror. Although the current accumulating layer is included in the two layers of the ρ_ and η_ layers of the sealing layer ', it is most effective in the ρ-blocking layer because of its lower conductivity. If a D-DBR is attached to both sides of the active area, the supporting substrate is necessary because the original main substrate must be removed. There are several methods for removing a sapphire substrate, which is typically used as a growth substrate. The methods outlined below are only a subset of the techniques that can be used to remove a growth substrate, which may be a material other than sapphire. In laser melting, a type of laser disclosed by Wong, et a, and Kelley, et al., Has a wavelength that is transparent to sapphire substrates, but not to semiconductor layers adjacent to the substrate. The technology will illuminate the back of the structure (sapphire side). Laser energy cannot penetrate through adjacent semiconductor layers. If the laser energy is sufficient, the semiconductor layer adjacent to the sapphire substrate is heated to its decomposition point. In the case where GaN is a layer adjacent to the sapphire substrate, the layer located at the interface is decomposed into Ga and N, and the Ga «Ga metal left behind the interface is then melted, and the sapphire substrate is removed from this Remove the rest of the layer structure. The decomposition of the layer adjacent to the sapphire substrate depends on the laser energy, wavelength, material decomposition temperature, and material absorption. The sapphire substrate is removed using this technique, allowing the D-DBR to attach to the other side of the active area. However, it is important that the VCSEL interface has the smallest loss. The paper size applies the Chinese National Standard (CNS) A4 specification (210 * 297 mm) (please note the precautions on the back of Mtl before filling out this page). ----- Line 丨 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 16 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs Increase the cavity resonance characteristics to the maximum. This laser melting technology has many design variables that will make the laser interface lack the flatness required by VCSel. In addition, VCSELs have very tight thickness constraints. There are several types of lasers that can be used The way to alleviate these problems. The layer adjacent to the sacrificial growth substrate is defined as a sacrificial layer, and if the thickness of this layer will make it completely decomposed by laser. ≫ In the literature (wong, et The results published in al.) indicate that the thickness of the layer that will be completely decomposed is 5 0 A 'but this value will be based on the laser energy, laser wavelength, and the absorption and material decomposition of the layer adjacent to the substrate Temperature. Adjacent to the sacrificial layer is resistance The layer (relative to the substrate) is selected as a barrier layer to have a higher decomposition temperature or absorption at the laser wavelength than the sacrificial layer bottom. Because the barrier layer has a higher decomposition temperature or It is low absorption, so it will be greatly affected by the laser energy. In this structure, the 'sacrifice layer is decomposed by the laser, and a steep interface is left at the barrier layer with a higher decomposition temperature or a lower absorption. . Then 'the barrier layer can also be etched, sacrificial and etched, or decomposed using lasers with different energy and wavelength. The preferred layer combination is GaN / ALGahN, InGaN / AlxGtxN, and InGaN / GaN. In In the case of the GaN / ALGakN combination, the GaN sacrificial layer will be decomposed by the laser, but the AlxGa ^ N barrier layer will not be affected. AlxGa and XN can then be etched away by using the selective wet-type acoustic engraving. Stop on the smooth AlxGayInzN interface. On the other hand, if the above GaN layer is not completely decomposed, the remaining GaN can be etched away. Because a thick buffer layer needs to be started at the beginning of GaN generation, and the VCSEL layer interface is National Standard Leather (C NS) A4 specification (210 X 297 public love) ---------- I--installation ------- order ---------- line (please read the first one on the back) Please fill in this page on the matter of note) 17 4429 82 A7 B7 V. Invention Description (l5) It needs to be controlled thickness and very smooth, this technology can be particularly useful. The thickness of a special layer can be achieved by using one or more layers. The sacrificial layer and the barrier layer are trimmed. By laser melting and selective wet chemical etching, the pair can be decomposed and etched sequentially until it reaches the desired thickness. A preferred layer combination is GaN / AlxGa ^ N 'where GaN is a sacrificial layer and the AkGa ^ N barrier layer can be selectively wet chemically etched. There are other ways to remove long products "-one method is to use A1N that can be selectively etched using wet chemical etching» A1N will be used as a sacrificial layer, where the AlxGayInzN layer can be removed from the main substrate It is removed by using A1N selective etching to undercut the structure. On the other hand, the A1N layer can be oxidized at an elevated temperature using a wet oxidation method. Next, the A1N-oxide can be etched away using an etchant such as HF. In another method, the substrate can be peeled ', e.g., implanted into the material with light ions. This method produces defects at a certain depth. When the substrate is heated, the material is selectively cracked through dislocation, and the substrate is separated from the active layer. Undercutting ZnO or other dielectric buffer layers via a chemical etchant can be used to remove the substrate from the AlxGayInzN layer. This technology can be applied to 2D or 3-D growth technology (such as Si02 or other dielectrics used in ELOG), where the AlxGayInzN layer is continuous across the substrate or only in the patterned area Block t is continuous.
介電DBRs已經被沉積生成在藍寶石基材上的 AlxGayInzN主動區域上。DBR/AlxGayInzN主動區域結構接 著被晶圓結合至主基材上。在情形1中，DBR/AlxGayInzN 本紙張尺度適用令國國家標準（CNS)A4規格（210 X 297公釐） <請先閱婧背面之注意事項再填寫本頁)Dielectric DBRs have been deposited on AlxGayInzN active regions on sapphire substrates. The DBR / AlxGayInzN active area structure is then bonded to the main substrate by the wafer. In case 1, DBR / AlxGayInzN paper size is applicable to the national standard (CNS) A4 specification (210 X 297 mm) < Please read the precautions on the back of Jing before filling this page)
· n n n n n n n^DJI n n 1 ki I I 經濟部智慧財產局員工消費合作社印製 -n n n ϋ I l n n , 18 A7 A7 五、發明說明（1<5 ) B7 主動區域結構被直接晶圓結合至Gap主基材上（參見第3 圖）。在情形2令，DBR/AlxGayInzN主動區域結構經由一中 間CaF〗層而被晶圓結合至一 Gap主基材上（第3圖，在此中 間層未顯示）。在情形3中，D-DBR在一主基材（GaP)上被 沉積’並被直.接晶圓結合至一 AlxGayInzN主動區域上（第4 圖）。對於情形1與3 ’經結合的面積比情形2小很多，因為 沒有使用中間層》第5圖顯示對於情形i結構之結合界面的 掃描式電子顯微鏡（SEM)橫截面影像。該界面平滑並且在 此倍率下未見到空隙__在情形4中，該 動區域結構經由一層由CrAuNiCu合金所構成的金屬中間 層而被結合至一主基材上。第6圖顯示情形4的SEM橫截 面’藍寶石基材已經被移除，且一第二D-DBR在相對於 第一D-DBR之AlxGayInzN主動區域的側邊上被沉積。對於 所有的元件’ D-DBR積材為Si02/Hf02，並且藍寶石基材 使用雷射熔化技術被移除。第7圊顯示來自第6圖所述之元 件從400-500nm的光學發射光譜=> 典型的高峰為一垂直空 腔結構之特徵。 裝--------訂-------*線 (請先閲讀背面之注意事項再填罵本頁) 經濟部智慧財產局員工消費合作社印製 元件標號對照表 12 基材 14 第一鏡子積材 16 晶園結合界面 18 Α1χΟ\ΙηζΙν^動區域 18a η-型層 18b p-型層 20 第二鏡子積材 本紙張.义变適用中 國國家標丑（CNS).A4規格（210 X 297公釐） 19 -· Nnnnnnn ^ DJI nn 1 ki II Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs-nnn l I lnn, 18 A7 A7 V. Description of the invention (1 < 5) The B7 active area structure is directly bonded to the Gap base material Up (see Figure 3). In case 2, the DBR / AlxGayInzN active area structure is bonded to a Gap master substrate by a wafer via an intermediate CaF layer (Figure 3, not shown in this intermediate layer). In Case 3, D-DBR is deposited on a master substrate (GaP) and bonded directly to an AlxGayInzN active area (Figure 4). For Cases 1 and 3 ', the combined area is much smaller than Case 2, because no intermediate layer is used. Figure 5 shows a scanning electron microscope (SEM) cross-sectional image of the bonding interface for Case i structure. The interface is smooth and voids are not seen at this magnification. In case 4, the dynamic region structure is bonded to a main substrate via a metal intermediate layer composed of a CrAuNiCu alloy. Fig. 6 shows that the SEM cross section of the case 4 'sapphire substrate has been removed, and a second D-DBR is deposited on the side of the AlxGayInzN active region with respect to the first D-DBR. For all components, the D-DBR laminate is Si02 / Hf02, and the sapphire substrate is removed using laser melting technology. Figure 7 shows the optical emission spectrum from 400-500nm from the element described in Figure 6 => typical peaks are characteristic of a vertical cavity structure. Install -------- Order ------- * line (please read the precautions on the back before filling in this page) Printed component labeling comparison table for employees' cooperatives of the Intellectual Property Bureau of the Ministry of Economy 12 Substrate 14 The first mirror building material 16 The crystal garden bonding interface 18 Α1χΟ \ ΙηζΙν ^ Motion area 18a η-type layer 18b p-type layer 20 The second mirror building material This paper. Yichang applies to China National Standards (CNS). A4 specifications (210 X 297 mm) 19-