TW439273B - Cylindrical capacitor structure and fabricating method - Google Patents

Cylindrical capacitor structure and fabricating method Download PDF

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Publication number
TW439273B
TW439273B TW87108987A TW87108987A TW439273B TW 439273 B TW439273 B TW 439273B TW 87108987 A TW87108987 A TW 87108987A TW 87108987 A TW87108987 A TW 87108987A TW 439273 B TW439273 B TW 439273B
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Taiwan
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semiconductor substrate
lower electrode
layer
insulating layer
patent application
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TW87108987A
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Chinese (zh)
Inventor
Jin-Lung Wu
Chuan-Fu Wang
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United Microelectronics Corp
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Publication of TW439273B publication Critical patent/TW439273B/en

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Abstract

This invention is about the cylindrical capacitor structure and fabricating method. The characteristic of the structure is that the bottom electrode has a horn. The method for forming this structure is described in the following. At first, a semiconductor substrate is provided, on which the insulating layer and node contact window are formed. Then, the conducting material is deposited and a photolithography etching process is performed. A dry etching is used to etch part of conducting material by using plasma gas containing higher chlorine mole number than that of hydrogen bromide and, through the length of time to control the etching degree. A conducting layer that includes a protuberant structure with trapezoid cross section is formed. A spacer is formed on the side edge of protuberant structure. The plasma gas stated above is used to perform the dry etching process onto part of conducting layer by using the spacer as a mask and insulating layer as stop layer so as to form bottom a electrode, which includes a horn, located on the node contact window and part of insulating layer. After that, the spacer is removed and, on the bottom electrode, a dielectric layer and an upper electrode are sequentially formed.

Description

- j 2864iwf.doc/006 ^ η B7 五、發明説明(/ ) 本發明是有關於一種電容器之結構及製造方法,且特 別是有關於一種圓筒形電容器(Cylinderical Capacitor)之結 構及製造方法。 當電腦微處理器功能逐漸增強,軟體所進行的程式與 運算越來越龐大時,記憶體的電容需求也就越來越高。而 隨著動態隨機存取記憶體積集度的增加,目前所發展的記 憶胞係由一個轉移場效電晶體與一個儲存電容器所構成。 在傳統動態隨機存取記憶體的儲存電容量少於1百萬 位元時,於積體電路製程中,主要是利用二度空間的電容 器來實現,亦即泛稱的平坦开彡電容器(Planar Type Capacitor)。由於一平坦形電容器需佔用半導體基底相當大 的面積來儲存電荷,故不適合應用於高度的積集化。高度 積集化的動態隨機存取記憶體,例如大於4百萬位元的儲 存電容量者,需要利用三度空間的電容器來實現,例如所 謂的堆疊型(Stack Type)電容器,而圓筒形電容器屬於其中 的一種。 請參照第1A~1C圖,其繪示習知一種圓筒形電容器之 製造流程剖面示意圖。 經濟部中央標準局員工消費合作社印製 —^---Π---t— (請先閱讀背面之注意事項再填寫本頁) 首先,請參照第1A圖,提供半導體基底10,其中已 形成有源/汲極區20。其次,在半導體基底10上,形成絕 緣層30。接著,在基底10上和絕緣層30中,形成節點接 觸窗40,其底端接觸源/汲極區20。然後,在絕緣層30和 節點接觸窗40上,先沉積一層導電材料,例如多晶矽, 後使用微影蝕刻技術,蝕刻部分此導電材料,形成具有凸 3 本紙張尺度適用中國國家標準(CNS ) A4規格(210X 297公釐) 2864twf.doc/006 2864twf.doc/006 經濟部中央標準局貝工消費合作社印5Ϊ A7 ___—__ B7 五、發明説明(\ ) ~~ " 出部分60的導電層50,其凸出部分60對應於節點接觸窗 40上方。接著’以化學氣相沉積法(Chemical Vap〇r Deposition ; CVD),沉積一層絕緣材料’例如二氧化矽。 然後,蝕刻部分此絕緣材料,直到導電層5〇暴露出來, 因而在凸出60的側邊形成間隙壁7〇。 接著,請參照第1B圖,使用乾蝕刻方式,以間隙壁7〇 作爲罩幕、絕緣層30爲終止層(stop Layer),蝕刻部分導 電層50。接著’蝕刻去除間隙壁7〇’形成圓筒型下電極8〇, 其凹下部分90對應於節點接觸窗40上方。 接著’請參照第1C圖,以化學氣相沉積法,沉積一 層薄的介電材料,例如二氧化政,在下電極和絕緣層3〇 上,形成介電層1〇〇。最後,沉積—層導電材料,例如多 晶矽’在介電層100上’形成上電極110。 由上述可知’習知技藝僅利用下電極8〇的圓筒型結 構’沒有利用下電極80表面局部起伏的變化。 有鑑於此,本發明之目的就是在提供一種圓筒形電容 器的結構及製造方法,經由在下電極中產生有突角(Horn) 的結構’可以增加電容器的表面面積,增大電容量。 根據本發明之上述目的,提出一種圓筒形電容器之結 構,此結構包括一半導體基底、一絕緣層、一節點接觸窗、 一具有第一突角的圓筒形下電極、一具有第二突角的介電 層、以及一上電極。在半導體基底中’有源/汲區,且絕緣 層位於半導體基底上。在絕緣層側邊和半導體基底上,有 節點接觸窗,節點接觸窗與源/汲區電性接觸。在絕緣層上, 4 本紙張尺度通用中國國家----- {諸先閲讀背面之注意事項再填寫本頁) 裝 訂 *·_ 1 A7 2864twf.doc/006 B7 五、發明説明(3) 有一圓筒形下電極,圓筒形下電極的頂端接近其凹入部分 側壁處包括一第一突角,且圓筒形下電極至少覆蓋在節點 接觸窗上方。在下電極上,有一介電層,介電層包括一第 二突角。在介電層上,有一上電極。 根據本發明之上述目的,提出一種圓筒形電容器之製 造方法=首先,提供一半導體基底,其中已形成有一源/汲 極區。其次,在半導體基底上,形成一絕緣層。接著,在 半導體基底上和絕緣層側邊,形成一節點接觸窗,節點接 觸窗的底端與源/汲極區電性接觸。接著,沉積一導電材料。 然後,進行一微影蝕刻步驟,使用能造成梯形剖面的一第 一蝕刻劑,藉由時間長短控制飩刻的程度,去除部分該導 電材料,則未被去除的部分導電材料,在絕緣層上和節點 接觸窗上形成一導電層,導電層包括一凸出結構。接著, 在凸出結構側邊,形成一間隙壁。然後,進行一乾式蝕刻 步驟,以間隙壁作爲罩幕,使用能造成正向傾斜輪廓的一 第二蝕刻劑,並以絕緣層爲終止層,去除部分導電層,則 未被去除的部分導電層形成一下電極,下電極包括一第一 突角。接著,去除間隙壁。然後,在下電極上,形成一包 括一第二突角的介電層。最後,在介電層上,形成一上電 極。 爲讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂,下文特舉一較佳實施例,並配合所附圖式,作詳 細說明如下: 圖式之簡單說明: 5 1 士"-^^^1 ^—^1 ^—^1 1 0¾-s (#先閱讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) i43 92 7 3 2864twf, doc/006 五、發明説明(Y ) 第1A-1C圖繪示習知一種圓筒形電容器之製造流程剖 面示意圖;以及 第2A-2D圖繪示依照本發明一較佳實施例,一種圓筒 形電容器之製造流程剖面示意圖。 圖式之標記說明: 10 、 120 : 半導體基底 20 、 130 : 源/汲極區 30 、 140 : 絕緣層 40 、 150 : 節點接觸窗 50 、 160 : 導電層 60 、 170 : 凸出部分 70 、 180 : 間隙壁 80 ' 190 : 下電極 90 :凹下i 部分 100 ' 210 :介電層 110 ' 230 :上電極 200 :第一突角 220 :第二 突角 --:---^---裝------訂------沭 (請先閱讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 實施例 請參照第2A〜2D圖,其繪示依照本發明一較佳實施 例,一種圓筒形電容器之製造流程剖面示意圖。 首先,請參照第2A圖,提供半導體基底120,其中 已形成有源/汲極區130。其次,在半導體基底120上,形 成絕緣層140。接著,在半導體基底120上,形成節點接 本紙伕尺度適用中國國家標準(CNS ) A4規格(2丨0X297公楚) A7 B7 4 3 B 3 2864iwf,d〇c/006 五、發明説明(γ) 觸窗150。節點接觸窗150,在絕緣層140側邊,且其底端 接觸源/汲極區130。其次,在絕緣層14〇和節點接觸窗15〇 上進fT沉積一層厚度約1微米的導電材料,例如多晶砂。 接著,進行微影步驟,例如覆蓋一層厚度約7〇5〇埃的光 阻;然後,進行乾式蝕刻步驟,使用能造成正向傾斜輪廓 的蝕刻劑,例如含氯氣較溴化氫多的蝕刻劑或是含氯氣的 蝕刻劑里控制蝕刻的程度,蝕刻部分此導電 材料約2500埃的深度,形成導電層160 ^微影步驟定義導 電層160具有厚度約2500埃的凸出部分no,且使得後續 製程形成下電極190時’下電極190至少覆蓋在節點接觸 窗150上。上域乾式蝕刻步驟使用能造成梯形剖面輪觸的 數羞!I劑v因而凸出部分170的側壁是正向傾斜的。 接著’請參照第2B圖,使用低壓化學氣相沉積法 (LPCVD)沉積一絕緣材料,例如氧化矽。然後,進行乾式 触刻步驟’以導電層160爲終止層,去除部分此絕緣材料。 因爲在凸.出部_分170的側壁上此絕緣材料部分較其它部分 爲厚,在凸出部分Π0的側壁未被去除的此絕緣材料部分 形成間隙壁180。 接著,請參照第2C圖,進行乾式蝕刻步驟,以間隙 壁180作爲罩幕、絕緣層140做爲終止層,使用例如氯氣 與溴化氫、或是氯氣、或是溴化氫的反應氣體,去除部分 導電層160,則未被去除的部分導電層160形成圓筒型下 電極190,下電極190覆蓋在節點接觸窗150上。因爲間 隙壁180的保護和具有梯形剖面的凸出部分170,使得下 7 本紙张尺度適用中國國家揉準(CNS ) A4規格(210X29?公嫠) (請先閲讀背面之注意事項再填寫本頁) 丁 經濟部中央標準局貝工消費合作社印製 2 864twf. doc/006 2 864twf. doc/006 經濟部中央標準局員工消費合作社印製 A7 ---------B7____ 五、發明説明(ό ) ~ 電極190有第〜突角200彳第一突角200在下電極190的 頂端且接近下電極1卯的凹入部分側壁處。第一突角200 將f加下電極19〇_面面積,此爲本發明的特徵。然後, 進刻步·,驟’例如使用濕式蝕刻法和稀釋的氫氟酸溶 液’去除間隙壁18〇。 接著1 ’請參照第2D圖,以化學氣相沉積法,沉積一 層薄的介電材料,例如氧化矽/氮化矽/氧化矽(ΟΝΟ),在下 電極190和絕緣層140上,形成介電層210,包括第二突 角220 ’第二突角220對應於第一突角200上方。最後, 沉積—導電材料,例如多晶矽,在介電層210上,形成上 電極230。 請繼續參照第2D圖,說明本發明一較佳實施例,一 種圓Μ形電;容器之結構,此結構包括半導體基底12〇、絕 緣層140、節點接觸窗ι5〇、具有第一_ 2〇〇的圓筒形下 電極190、具有第二突角22〇的价·電層21〇、以及—上電極 230 °在半導體基底12〇中,有源7Μ" 130,且絕緣層140 位於半導體基底120上。在絕緣層140側邊和半導體基底 120上’有節點接觸窗15〇,節點接觸窗150與源/汲區130 電性接觸。在絕緣層140上,有圓筒形下電極190,下電 極190的頂端接近其凹入部分側壁處包括第一突角200, 且下電極190至少覆蓋在節點接觸窗150上。在下電極190 上,有介電層210,介電層包括第二突角220。在介電層210 上,有上電極230。 由上述本發明較佳實施例可知,第一突角200、第二 8 ---^---τ;----裝------訂 (讀先聞讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家棣半(CNS ) Α4規格(2丨0X297公釐) 2864twf.d〇c/006 A7 B7 五、發明説明(勺) 突角220使得本發明之圓筒型電容器有較習知技藝大的表 面面積,可以增大電-窖 雖然本發明已以一較佳實施例揭露如上,然其並非用 以限定本發明,任何熟習此技藝者,在不脫離本發明之精 神和範圍內,當可作各種之更動與潤飾,因此本發明之保 護範圍當視後附之申請專利範圍所界定者爲準。 (請先閱讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 本紙張尺度適用中國國家栋準(CNS ) A4規格(210X297公釐)-j 2864iwf.doc / 006 ^ η B7 V. Description of the Invention (/) The present invention relates to the structure and manufacturing method of a capacitor, and in particular to the structure and manufacturing method of a cylindrical capacitor. As computer microprocessors become more powerful and programs and calculations performed by software become more and more massive, the capacitance requirements of memory will also increase. With the increase of the dynamic random access memory volume concentration, the currently developed memory cell system consists of a transfer field effect transistor and a storage capacitor. When the storage capacity of the traditional dynamic random access memory is less than 1 million bits, in the integrated circuit process, it is mainly realized by using a capacitor with a two-dimensional space, which is also known as a Planar Type capacitor. Capacitor). Since a flat capacitor requires a relatively large area of the semiconductor substrate to store charges, it is not suitable for high accumulation. Highly-accumulated dynamic random access memory, such as those with a storage capacity greater than 4 million bits, need to be realized using three-dimensional capacitors, such as so-called stack type capacitors, and cylindrical Capacitors are one of them. Please refer to FIGS. 1A to 1C, which are cross-sectional schematic diagrams showing the manufacturing process of a conventional cylindrical capacitor. Printed by the Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs — ^ --- Π --- t— (Please read the notes on the back before filling out this page) First, please refer to Figure 1A to provide a semiconductor substrate 10, which has been formed Active / drain region 20. Next, on the semiconductor substrate 10, an insulating layer 30 is formed. Next, on the substrate 10 and in the insulating layer 30, a node contact window 40 is formed, and a bottom end thereof contacts the source / drain region 20. Then, a layer of conductive material, such as polycrystalline silicon, is deposited on the insulating layer 30 and the node contact window 40, and then a portion of this conductive material is etched using a lithographic etching technique to form a convex shape. The paper size is applicable to the Chinese National Standard (CNS) A4. Specifications (210X 297 mm) 2864twf.doc / 006 2864twf.doc / 006 Printed by the Shellfish Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 5Ϊ A7 ___—__ B7 V. Description of the invention (\) ~~ " Conductive layer of part 60 50, the protruding portion 60 corresponds to the node contact window 40 above. Next, 'chemical vapor deposition (CVD) is used to deposit a layer of insulating material' such as silicon dioxide. Then, a part of this insulating material is etched until the conductive layer 50 is exposed, so that a spacer 70 is formed on the side of the protrusion 60. Next, referring to FIG. 1B, a part of the conductive layer 50 is etched by using a dry etching method, using the spacer 70 as a mask, and the insulating layer 30 as a stop layer. Next, the spacer wall 70 is removed by etching to form a cylindrical lower electrode 80, and the concave portion 90 thereof corresponds to the node contact window 40 above. Next, please refer to FIG. 1C, and deposit a thin layer of a dielectric material, such as dioxide, by a chemical vapor deposition method, and form a dielectric layer 100 on the lower electrode and the insulating layer 30. Finally, a layer of conductive material, such as polysilicon, is formed on the dielectric layer 100 to form an upper electrode 110. From the above, it is known that the "conventional technique uses only the cylindrical structure of the lower electrode 80" without using the local fluctuation of the surface of the lower electrode 80. In view of this, an object of the present invention is to provide a structure and a manufacturing method of a cylindrical capacitor, which can increase the surface area of a capacitor and increase the capacitance through a structure having a Horn at the lower electrode. According to the above object of the present invention, a structure of a cylindrical capacitor is proposed. The structure includes a semiconductor substrate, an insulating layer, a node contact window, a cylindrical lower electrode having a first protruding angle, and a second protruding structure. Corner dielectric layer, and an upper electrode. In the semiconductor substrate, an active / drain region is provided, and an insulating layer is located on the semiconductor substrate. On the side of the insulating layer and on the semiconductor substrate, there is a node contact window, and the node contact window is in electrical contact with the source / drain region. On the insulation layer, 4 paper sizes are common to the Chinese country ---- {Read the precautions on the back before filling this page) Binding * · _ 1 A7 2864twf.doc / 006 B7 V. Description of the invention (3) There is a The cylindrical lower electrode includes a first protruding angle near a top end of the cylindrical lower electrode near a side wall of the concave portion, and the cylindrical lower electrode covers at least the contact window of the node. On the lower electrode, there is a dielectric layer, and the dielectric layer includes a second protrusion. On the dielectric layer, there is an upper electrode. According to the above object of the present invention, a method for manufacturing a cylindrical capacitor is proposed. First, a semiconductor substrate is provided, in which a source / drain region has been formed. Secondly, an insulating layer is formed on the semiconductor substrate. Next, a node contact window is formed on the semiconductor substrate and the side of the insulating layer, and the bottom end of the node contact window is in electrical contact with the source / drain region. Next, a conductive material is deposited. Then, a lithography etching step is performed, using a first etchant that can cause a trapezoidal profile, and controlling the degree of engraving by the length of time to remove a portion of the conductive material, and the portion of the conductive material that has not been removed is on the insulating layer A conductive layer is formed on the contact window with the node, and the conductive layer includes a protruding structure. Then, a side wall is formed on the side of the protruding structure. Then, a dry etching step is performed, using the gap wall as a mask, using a second etchant that can cause a positive slope profile, and using the insulating layer as a termination layer, removing a part of the conductive layer, and the part of the conductive layer that has not been removed A lower electrode is formed, and the lower electrode includes a first protruding angle. Next, the spacer is removed. Then, a dielectric layer including a second bump is formed on the lower electrode. Finally, an upper electrode is formed on the dielectric layer. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is described below in detail with the accompanying drawings as follows: A brief description of the drawings: 5 1 person "-^^^ 1 ^ — ^ 1 ^ — ^ 1 1 0¾-s (#Please read the notes on the back before filling this page) The paper size printed by the Staff Consumer Cooperatives of the Central Bureau of Standards of the Ministry of Economic Affairs applies the Chinese national standard ( CNS) A4 specification (210X297 mm) i43 92 7 3 2864twf, doc / 006 V. Description of the invention (Y) Figures 1A-1C are schematic cross-sectional diagrams showing the manufacturing process of a conventional cylindrical capacitor; and 2A-2D The figure shows a schematic sectional view of a manufacturing process of a cylindrical capacitor according to a preferred embodiment of the present invention. Symbols of the drawings: 10, 120: semiconductor substrate 20, 130: source / drain region 30, 140: insulating layer 40, 150: node contact window 50, 160: conductive layer 60, 170: protruding portions 70, 180 : Bulkhead 80 '190: lower electrode 90: recessed i part 100' 210: dielectric layer 110 '230: upper electrode 200: first protrusion angle 220: second protrusion angle-: --- ^ --- Install ------ order ------ 沭 (Please read the precautions on the back before filling out this page) For the printed example of the employee consumer cooperative of the Central Standards Bureau of the Ministry of Economic Affairs, please refer to Figures 2A to 2D. A schematic cross-sectional view showing a manufacturing process of a cylindrical capacitor according to a preferred embodiment of the present invention. First, referring to FIG. 2A, a semiconductor substrate 120 is provided, in which an active / drain region 130 has been formed. Next, on the semiconductor substrate 120, an insulating layer 140 is formed. Next, on the semiconductor substrate 120, a node connection paper is formed, and the size of the paper is applicable to the Chinese National Standard (CNS) A4 specification (2 丨 0297). A7 B7 4 3 B 3 2864iwf, doc / 006 5. Description of the invention (γ) Touch the window 150. The node contacts the window 150 on the side of the insulating layer 140 and the bottom end thereof contacts the source / drain region 130. Secondly, a layer of conductive material, such as polycrystalline sand, is deposited on the insulation layer 14 and the node contact window 15 to a thickness of about 1 micron. Next, a lithography step is performed, such as covering a layer of photoresist with a thickness of about 7050 angstroms. Then, a dry etching step is performed using an etchant that can cause a positive tilt profile, such as an etchant containing more chlorine than hydrogen bromide. Or, the degree of etching is controlled in an etchant containing chlorine gas, and the conductive material is etched to a depth of about 2500 angstroms to form a conductive layer 160. The lithography step defines that the conductive layer 160 has a protruding portion no of about 2500 angstroms and makes subsequent When the lower electrode 190 is formed in the process, the lower electrode 190 covers at least the node contact window 150. The upper-field dry etching step uses a number that can cause trapezoidal cross-section contact! The agent v thus the side wall of the protruding portion 170 is inclined forward. Next, referring to FIG. 2B, a low-pressure chemical vapor deposition (LPCVD) method is used to deposit an insulating material, such as silicon oxide. Then, a dry-etching step is performed, with the conductive layer 160 as a termination layer, and a part of this insulating material is removed. Since the insulating material portion is thicker than the other portions on the side wall of the protruding portion 170, the insulating material portion on the side wall of the protruding portion Π0 which has not been removed forms a gap 180. Next, referring to FIG. 2C, a dry etching step is performed. The partition wall 180 is used as a cover and the insulating layer 140 is used as a termination layer. For example, a reaction gas such as chlorine gas and hydrogen bromide, or chlorine gas, or hydrogen bromide is used. If a part of the conductive layer 160 is removed, the part of the conductive layer 160 that has not been removed forms a cylindrical lower electrode 190, and the lower electrode 190 covers the node contact window 150. Because of the protection of the partition wall 180 and the protruding portion 170 with a trapezoidal cross section, the next 7 paper sizes are applicable to the Chinese National Standard (CNS) A4 size (210X29?). (Please read the precautions on the back before filling this page ) Printed by the Shelling Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 2 864twf. Doc / 006 2 864twf. Doc / 006 Printed by the Consumers Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs A7 --------- B7____ V. Description of the Invention The electrode 190 has a first protrusion angle 200 彳, and the first protrusion angle 200 is at the top of the lower electrode 190 and near the side wall of the concave portion of the lower electrode 1 卯. The first protrusion angle 200 adds f to the area of the lower surface of the electrode, which is a feature of the present invention. Then, a step "step" is performed, such as using a wet etching method and a diluted hydrofluoric acid solution, to remove the partition wall 180. Next, please refer to FIG. 2D, and deposit a thin layer of dielectric material, such as silicon oxide / silicon nitride / silicon oxide (NO), by chemical vapor deposition method, and then form a dielectric on the lower electrode 190 and the insulating layer 140. The layer 210 includes a second protruding angle 220 ′. The second protruding angle 220 corresponds to the first protruding angle 200 above. Finally, a conductive material, such as polycrystalline silicon, is deposited on the dielectric layer 210 to form an upper electrode 230. Please continue to refer to FIG. 2D to describe a preferred embodiment of the present invention, a circular M-shaped electric container structure, which includes a semiconductor substrate 120, an insulating layer 140, a node contact window ι50, and a first _ 2〇. 〇 cylindrical lower electrode 190, valence · electrical layer 21 with second protrusion angle 22, and-upper electrode 230 ° In the semiconductor substrate 120, active 7M " 130, and the insulating layer 140 is located on the semiconductor substrate 120 on. A node contact window 150 is provided on the side of the insulating layer 140 and on the semiconductor substrate 120. The node contact window 150 is in electrical contact with the source / drain region 130. On the insulating layer 140, there is a cylindrical lower electrode 190, a top end of the lower electrode 190 near the side wall of the concave portion includes a first protruding angle 200, and the lower electrode 190 covers at least the node contact window 150. On the lower electrode 190, there is a dielectric layer 210, and the dielectric layer includes a second protruding corner 220. On the dielectric layer 210, there is an upper electrode 230. According to the above-mentioned preferred embodiments of the present invention, it is known that the first protruding angle 200, the second 8 --- ^ --- τ; ---- install -------- order (read the precautions on the back and read (Fill in this page) The dimensions of this paper are applicable to the Chinese National Standard Half (CNS) A4 specification (2 丨 0X297 mm) 2864twf.d〇c / 006 A7 B7 V. Description of the invention (spoon) The protruding angle 220 makes the cylindrical type of the present invention The capacitor has a larger surface area than conventional techniques, which can increase the electric cellar. Although the present invention has been disclosed above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art will not depart from the present invention. Within the spirit and scope, various modifications and retouching can be made, so the scope of protection of the present invention shall be determined by the scope of the attached patent application. (Please read the notes on the back before filling out this page) Printed by the Consumer Cooperatives of the Central Bureau of Standards of the Ministry of Economic Affairs This paper size applies to China National Building Standard (CNS) A4 (210X297 mm)

Claims (1)

經濟部中央標率局員工消费合作社印製 N= 4 3 9 2 7 3 2864twf.doc/006 合 f Bo C8 __D8 六、申請專利範圍 1·—種圓筒形電容器式結構,包括: 一半導體基底; 一源/汲區,位於該半導體基底中; 一絕緣層,位於該半導體基底上; 一節點接觸窗,位於該絕緣層中,露出該半導體基底, 且與該源/汲區電性接觸; —圓同形下電極,包括一第-/¾角,該圓筒形下電極 位於該絕緣層上,與該節點接觸窗電性接觸,而該第一突 角位於該圓筒形下電極的頂端; 一介電層,包括一第二突角,該介電層位於該下電極 上,其中該第二突角對應於該第一突角上方;以及 一上電極,位於該介電層上。 2. 如申請專利範圍第1項所述之結構,其中該下電極 包括多晶矽。 3. 如申請專利範圍第1項所述之結構,其中該介電層 包括二氧化矽。 4. 如申請專利範圍第1項所述之結構,其中該上電極 .包括多晶矽。 5. —種圓筒形電容器之製<方法\包括: 提供一半導體基底,該半導體塞底中已形成有一源/汲 極區, 形成一絕緣層,在該半導體基底上; 形成一節點接觸窗,在該半導體基底上和該絕緣層 中,且該節點接觸窗與該源/汲極區電性接觸; 本紙張尺度適用中國國家橾準(CNS ) A4说格(210X297公釐) (请先聞讀背而之注意事項再填寫本頁) 裝· 訂Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs N = 4 3 9 2 7 3 2864twf.doc / 006 Hef Bo C8 __D8 VI. Application for patent scope 1 · A kind of cylindrical capacitor structure, including: a semiconductor substrate A source / drain region in the semiconductor substrate; an insulating layer on the semiconductor substrate; a node contact window in the insulating layer that exposes the semiconductor substrate and is in electrical contact with the source / drain region; -A circle-shaped lower electrode including a first-/ ¾ angle, the cylindrical lower electrode is located on the insulating layer, and is in electrical contact with the node contact window, and the first protruding angle is located at the top of the cylindrical lower electrode A dielectric layer including a second protruding corner, the dielectric layer is located on the lower electrode, wherein the second protruding corner corresponds to the first protruding angle; and an upper electrode is located on the dielectric layer. 2. The structure described in item 1 of the patent application scope, wherein the lower electrode comprises polycrystalline silicon. 3. The structure as described in item 1 of the patent application scope, wherein the dielectric layer comprises silicon dioxide. 4. The structure described in item 1 of the scope of patent application, wherein the upper electrode comprises polycrystalline silicon. 5. A method of manufacturing a cylindrical capacitor < Method: comprising: providing a semiconductor substrate, a source / drain region has been formed in the bottom of the semiconductor plug, forming an insulating layer on the semiconductor substrate; forming a node contact Window, on the semiconductor substrate and in the insulating layer, and the node contact window is in electrical contact with the source / drain region; this paper size applies to China National Standard (CNS) A4 grid (210X297 mm) (please First read the precautions before filling in this page) 1=4 J u J t'l . doc 0 U2 8987號專利範幽修正本 A8E}8C8D8 頌绩委員明示Ρ年—月M—指泛 . 正本有無更實質内客KLS古准予修正。 經濟部智慧財產局員工消費合作社印製 六、申請專利範圍 ^一種圓筒形電容器之結構,包括: 一半導體基底; 一源/汲區,位於該半導體基底中; 一絕緣層,位於該半導體基底上; 一節點接觸窗,位於該絕緣層中,露出該半導體基底, 且與該源/汲區電性接觸; 一圓筒形下電極,包括一第一突角,該圓筒形下電極 位於該絕緣層上,與該節點接觸窗電性接觸,而該第一突 角位於該圓筒形下電極的頂端; 一介電層,包括一第二突角,該介電層位於該下電極 上,其中該第二突角對應於該第一突角上方;以及 一上電極,位於該介電層上。 2. 如申請專利範圍第1項所述之結構,其中該下電極 包括多晶砂。 3. 如申請專利範圍第1項所述之結構,其中該介電層 ·' 包括二氧化砂。 4. 如申請專利範圍第1項所述之結構,其中該上電極 包括多晶砂。 5. —種圓筒形電容器之製造方法,包括: 提供一半導體基底,該半導體基底中已形成有一源/汲 極區; 形成一絕緣層,在該半導體基底上; 形成一節點接觸窗,在該半導體基底上和該絕緣層 中,且該節點接觸窗與該源/汲極區電性接觸; 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) ^ I I- - IV 1 - Ε >1 I I 1 I I . ^ I ^ i I I I ^ J n I I ^ I I » · (請先Μ讀背面之注意事項再填寫本頁) 2X64twn d〇c/U02 A8 B8 C8 D8 六、申請專利範圍 沉積一導電材料; 進行一微影蝕刻步驟,使用能造成正向傾斜輪廓的一 第一電漿氣體,藉由時間長短控制蝕刻的程度,去除部分 該導電材料,則未被去除的部分該導電材料,在該絕緣層 上和該節點接觸窗上形成一導電層,該導電層包括一具有 梯形剖面的凸出結構: 形成一間隙壁,在該凸出結構側邊; 進行一乾式蝕刻步驟,以該間隙壁作爲罩幕、該絕緣 層做爲終止層,去除部分該導電層,則未被去除的部分該 導電層形成一圓筒形下電極,該下電極包括一第一突角, 且該下電極覆蓋在該節點接觸窗上方; 去除該間隙壁; 形成一介電層,在該下電極上,該介電層包括一第二 突角;以及 形成一上電極,在該介電層上。 6. 如申請專利範圍第5項所述之製造方法,其中該導 電層包括多晶矽。 7. 如申請專利範圍第5項所述之製造方法,其中該微 影蝕刻步驟的蝕刻劑包括氯氣較溴化氫多的氣體。 8. 如申請專利範圍第5項所述之製造方法,其中該微 影蝕刻步驟的蝕刻劑包括氯氣。 9. 如申請專利範圍第5項所述之製造方法,其中該凸 出的厚度約2500埃。 10. 如申請專利範圍第5項所述之製造方法,其中形成 (請先閱讀背面之注意事項再填寫本頁) .裝--------訂---------線. 經濟部智慧財產局員工消费合作社印製 本紙張尺度適用中國國家標準 (CNS)A4規格(210 X 297公釐)1 = 4 J u J t'l. Doc 0 U2 No. 8987 Amendment to Patent Fanyou A8E} 8C8D8 The Song Ji Committee expresses that P year—month M—refers to the pan. Whether the original version is more substantive and can be amended by KLS. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 6. Scope of patent application ^ A cylindrical capacitor structure includes: a semiconductor substrate; a source / drain region located in the semiconductor substrate; an insulating layer located on the semiconductor substrate Upper; a node contact window, located in the insulating layer, exposing the semiconductor substrate, and in electrical contact with the source / drain region; a cylindrical lower electrode including a first protruding angle, the cylindrical lower electrode located at the The insulating layer is in electrical contact with the contact window of the node, and the first protruding corner is located at the top of the cylindrical lower electrode; a dielectric layer includes a second protruding corner, and the dielectric layer is located on the lower electrode. Wherein the second protruding angle corresponds to above the first protruding angle; and an upper electrode is located on the dielectric layer. 2. The structure described in item 1 of the patent application scope, wherein the lower electrode comprises polycrystalline sand. 3. The structure as described in item 1 of the scope of patent application, wherein the dielectric layer includes a sand dioxide. 4. The structure described in item 1 of the patent application scope, wherein the upper electrode comprises polycrystalline sand. 5. A method for manufacturing a cylindrical capacitor, comprising: providing a semiconductor substrate having a source / drain region formed in the semiconductor substrate; forming an insulating layer on the semiconductor substrate; forming a node contact window; On the semiconductor substrate and in the insulation layer, and the node contact window is in electrical contact with the source / drain region; this paper size applies to China National Standard (CNS) A4 specification (210 X 297 mm) ^ I I-- IV 1-Ε > 1 II 1 II. ^ I ^ i III ^ J n II ^ II »· (Please read the precautions on the back before filling this page) 2X64twn d〇c / U02 A8 B8 C8 D8 VI. The scope of the patent application is to deposit a conductive material; perform a lithography etching step, use a first plasma gas that can cause a positive tilt profile, and control the degree of etching by the length of time, and remove a portion of the conductive material, but the remaining Part of the conductive material forms a conductive layer on the insulating layer and the contact window of the node. The conductive layer includes a protruding structure with a trapezoidal section: forming a gap wall on the side of the protruding structure; performing a dry type In the step of engraving, the gap wall is used as a cover and the insulating layer is used as a termination layer. A part of the conductive layer is removed, and the unremoved part of the conductive layer forms a cylindrical lower electrode. The lower electrode includes a first protruding corner. And the lower electrode covers the contact window of the node; removing the spacer; forming a dielectric layer on the lower electrode, the dielectric layer including a second corner; and forming an upper electrode on the dielectric On the electrical layer. 6. The manufacturing method according to item 5 of the scope of patent application, wherein the conductive layer comprises polycrystalline silicon. 7. The manufacturing method according to item 5 of the scope of patent application, wherein the etchant of the lithographic etching step includes a gas having more chlorine gas than hydrogen bromide. 8. The manufacturing method according to item 5 of the scope of patent application, wherein the etchant of the lithographic etching step includes chlorine gas. 9. The manufacturing method according to item 5 of the scope of patent application, wherein the thickness of the protrusion is about 2500 angstroms. 10. The manufacturing method described in item 5 of the scope of patent application, which is formed (please read the precautions on the back before filling out this page). Loading -------- Order --------- Printed on paper by the Consumers' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. The paper size applies to the Chinese National Standard (CNS) A4 (210 X 297 mm).
TW87108987A 1998-06-06 1998-06-06 Cylindrical capacitor structure and fabricating method TW439273B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113013331A (en) * 2019-12-19 2021-06-22 力晶积成电子制造股份有限公司 Semiconductor structure and manufacturing method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113013331A (en) * 2019-12-19 2021-06-22 力晶积成电子制造股份有限公司 Semiconductor structure and manufacturing method thereof
CN113013331B (en) * 2019-12-19 2024-04-05 力晶积成电子制造股份有限公司 Semiconductor structure and manufacturing method thereof

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