TW434864B - Manufacturing method for copper metal damascene interconnect - Google Patents

Manufacturing method for copper metal damascene interconnect Download PDF

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TW434864B
TW434864B TW87104319A TW87104319A TW434864B TW 434864 B TW434864 B TW 434864B TW 87104319 A TW87104319 A TW 87104319A TW 87104319 A TW87104319 A TW 87104319A TW 434864 B TW434864 B TW 434864B
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Taiwan
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layer
copper metal
manufacturing
metal
inlay
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TW87104319A
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Chinese (zh)
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Syun-Ming Jang
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Taiwan Semiconductor Mfg
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Abstract

An improved process for copper metal damascene interconnect which employs the barrier metal or suitable dielectric to completely encapsulate the copper metal so as to prevent the diffusion of the copper metal from influencing the device characteristics. The processes includes the following steps: firstly, covering an insulation layer on a semiconductor substrate; and, forming the damascene opening comprising the interconnect cavities and the contacts to expose part of the substrate surface; and, forming the first barrier layer on the bottom of said damascene opening and the sidewall surface and filling up the damascene opening with a copper metal layer so as to simultaneously form the interconnect and the contact plug structure; next, conducting a back etching process to make the height of copper metal surface lower than that of the first insulation layer; then, forming the second barrier layer to cover the insulation layer and the metal surface; conducting a chemical mechanical polishing process to remove the portion of the second barrier layer on top of the insulation layer for achieving a flat surface. Therefore, the copper metal can be completely encapsulated by the first and the second barrier layer so as to effectively prevent the diffusion of the copper metal to improve the device characteristics.

Description

434864 Α7 Β7 經濟部中央標隼局員工消費合作社印裝 五、發明説明(1 ) 本發明係有關於半導體積體電路的製造,且特別是 有關於一種以銅金屬製作鎮崁式内連導線構造 (damascene interconnect structure)的改良製程,其利用適“阻絕層將鋼金屬完全包住,以防止鋼金屬擴散而影響 元件的性質。 不論何種電子元件均少不了用來傳輸電訊的金屬導 線,半導體積體電路元件亦然,各個元件必須藉由適當 的内速導線(interconnect)作電性連接,方得以發揮所欲 達成之功能。在今日多層内連導線製程中,除了製作各 層導線圖案之外,更須藉助接觸窗(c〇ntact/via)構造,以 作為元件接觸/區與導線之間,或是多層導線之間聯繫的 通道,因此各層導線與接觸窗之間的整合極其重要。 傳統製造內達導線的方法,大致分為形成接觸插益構造 和形成導線圖案兩個階段,以下即參照第丨八至1C圖的 杳J面圖,說明其詳細步驟。首先,如第丨八圖所示者,提 供一半導體基底10,例如是一石夕晶圓,其上方可以形成 任何所需的半導體元件,此處為了簡化起見,僅以一平 整的基底10表示之。接著,在基底1〇的表面上覆蓋一 、愚緣層12 ’例如,使用四乙氧基石夕甲烧(TE〇s)為原料, 並以化學氣相沈積(CVD)程序而形成一氧化層12。藉由 微影成像和蝕刻程序,定義出絕緣層12的圖案,形成露 出部分半導體基底1〇的接觸窗u。接下來,如第1B圖所示者,在接觸窗13内形成一 轉構造(_)14,例如先以〔抓轉沈積—鎢金屬層, -4- 本紙張尺度適用CNS > Λ4規格(——-----— (請先閲讀背面之注意事項冬填寫本頁) ..袈· 訂 -1. 經濟部中央標準局員工消費合作社印製 484864 A7 __B7 五、發明説明(2) 填滿接觸窗U並延伸覆蓋於絕緣層12表面上,再㈣ ㈣處理而留下-鶴插塞構造14。通常,為了避免金 元素擴散而污染元件’並且提高鶴金屬層與基底的黏著 性,-般亦會在沈積鶴金,屬層之前,先以㈣氣相沈積 程序氮化鈦層(未顯示),當作所謂的擴 览阻絕層(diffusion barrier layer) 〇 接著’以雜程序形成-金屬層u於插塞Μ和絕 緣層12表面上。然後,施行微影成像和蝕刻程序,定義 出如第⑴圖所示之金屬一層圖案15a,即完成内^導線構 造的製作。很明顯地,上述傳統的内連導線製程,由於 接觸窗構造與導線圖案係分別製作而成,需要各別的沈 積和定義圖案程序,使得整體製程步驟極其繁複’在當 前電路設計日益複雜化的蝎勢下,將增加製造的時間和 成本,不利於生產線的應用。 因此,為改善上述傳統製程方法的缺點,一種鑲崁 式(damascene)内連導線製程被提出,其先於基底上的介 電層中,形成接觸窗和内連導線圖案的凹槽,然後以一 導電層填滿接觸窗和內連導線圖案凹槽,同時製作出接 觸振拴和内連導線構造,達到簡化製程步驟的效果。為 了更進一步說明,請參見第2A至2B圖的剖面示意圖, 說明習知鑲崁式内連導線構造的製造方法。 首先,如第2A圖所示者,提供一半導體基底1〇, 例如是一矽晶圓,其上方可以形成任何所需的半導體元 件’而此處同樣為了簡化起見,僅以一平整的基底1〇表 _5_ 冬紙張尺度適用中國國家標準(CNS ) A4規格(210X297公费_ > (請先閲讀背面之注意事項再填寫本頁) 、-β •--1 II 111 經濟部中央標準局員工消費合作社印製 43 4 A7 B7 五、發明説明(3) 不之。在基底ίο表面上覆蓋一絕緣層12,並以適當微 影成像和蝕刻程序,在其中形成包含内連導線凹槽17和 接觸窗18的鑲炭式開口 19,露出部分基底⑺的表面。 之後,進行内連'導線和療廣窗的製程步驟。例如,先以 氣艘或沈Λ灌序形成一導電層,例如是一鋁金屬層,以 填滿接觸窗内連導線凹槽17,並且延伸覆篕在絕 緣層12表面上。接著,如第2]6圖所示者,以回蝕刻 back)或化學性機械研磨(CMp)處理’去除絕緣層i2上方 的導電金屬層,而留下金屬插塞W和内連導線15,製 得所需之鑲崁式内連導線構造。 上述鑲级式内連導線構造的製程,由於先在絕緣層 中形良内連導線凹槽和接觸窗,使得金屬内連導線和接 觸插拴可同時形成於其中,不僅具有簡化製程步驟的功 效果,也可改善傳統製程中因金屬内連導線和接觸插拴 材質不J§] ’所導致黏著性不佳的問題。基本上,以鋁金 屬材料製作上述鑲崁式内連導線製程,已可獲致相當良 好的功效。然而,為了因應半導體元件朝向更快速、更 精細的發展趨勢’許多研究者仍努力於發展更佳的導線 技術。其中,鋼金屬由於具有高傳導性、高延展性等優 點’是頗受矚目的技術之一。 事實上,以銅金屬取代上述的鋁金屬來製作鑲崁式 内連導線,在製程上並不特別困難,但是由於銅金屬的熱 敬散特性,若無適當地保護阻絕,很容易造成各導線之間 的遍電(leakage),而導致元件性質的劣化(degradation)。 本紙張尺度適用中國國家標準(CNS ) Λ4規格(210X 297公犮) (請先閱讀背面之注意事項再填寫本百) ;裝·434864 Α7 Β7 Printed by the Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs. 5. Description of the Invention (1) The present invention relates to the manufacture of semiconductor integrated circuits, and in particular to a ballast-type interconnected wire structure made of copper metal. (damascene interconnect structure) is an improved process that uses a suitable "barrier layer" to completely cover the steel metal to prevent the steel metal from diffusing and affecting the properties of the component. No matter what kind of electronic component, the metal wire used to transmit telecommunications, semiconductor semiconductor The same is true for the body circuit components. Each component must be electrically connected by a suitable internal speed wire (interconnect) in order to perform the desired function. In today's multilayer interconnection wire manufacturing process, in addition to making the layers of wire patterns, The contact window (contact / via) structure must be used as the communication channel between the component contact / area and the conductor, or the multilayer conductor, so the integration between the conductors of each layer and the contact window is extremely important. Traditional manufacturing The method of inner wire is roughly divided into two stages: forming contact plug structure and forming wire pattern. Illustrate the detailed steps according to the 杳 J planes of FIGS. VIII to 1C. First, as shown in FIG. VIII, a semiconductor substrate 10 is provided, such as a Shi Xi wafer, and any desired For the sake of simplicity, a semiconductor device is represented here only by a flat substrate 10. Next, a surface of the substrate 10 is covered with a thin layer 12 ', for example, using tetraethoxylithium sintering (TE. s) is used as a raw material, and an oxide layer 12 is formed by a chemical vapor deposition (CVD) process. The pattern of the insulating layer 12 is defined by a lithography imaging and etching process to form a contact window u exposing a part of the semiconductor substrate 10 Next, as shown in FIG. 1B, a rotation structure (_) 14 is formed in the contact window 13, for example, [gravity deposition—tungsten metal layer, -4- CNS > Λ4 specification applies to this paper size (——-----— (Please read the precautions on the back and fill in this page first) .. 袈 · Order-1. Printed by the Staff Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 484864 A7 __B7 V. Description of Invention (2) Fill the contact window U and extend to cover the surface of the insulating layer 12, and then ㈣ ㈣ And left-crane plug structure 14. Generally, in order to avoid the diffusion of gold elements to contaminate the element 'and to improve the adhesion of the crane metal layer to the substrate, it will generally be deposited in the gas phase before it is deposited in the crane gold. The deposition procedure is a titanium nitride layer (not shown) as a so-called diffusion barrier layer. Then, a 'heterogeneous procedure is formed-a metal layer u is on the surface of the plug M and the insulating layer 12. Then, a micro layer is performed. The shadow imaging and etching procedures define the metal layer pattern 15a as shown in the second figure, which completes the production of the inner conductor structure. Obviously, the above-mentioned traditional interconnect conductor process is different due to the contact window structure and the conductor pattern. The production requires separate deposition and definition pattern procedures, making the overall process steps extremely complicated. Under the current scorpion of increasingly complicated circuit designs, it will increase manufacturing time and cost, which is not conducive to the application of production lines. Therefore, in order to improve the shortcomings of the above-mentioned traditional manufacturing method, a damascene interconnecting wire manufacturing process is proposed, which forms a contact window and a groove of the interconnecting wire pattern in the dielectric layer on the substrate, and then A conductive layer fills the contact window and the grooves of the interconnecting conductor pattern, and simultaneously produces the contact vibrating bolt and the interconnecting conductor structure, thereby achieving the effect of simplifying the process steps. For further explanation, please refer to the cross-sectional schematic diagrams in FIGS. 2A to 2B to explain the manufacturing method of the conventional inlay-type interconnecting wire structure. First, as shown in FIG. 2A, a semiconductor substrate 10 is provided, for example, a silicon wafer, and any desired semiconductor element can be formed thereon. Here again, for simplicity, only a flat substrate is used. 1〇Table_5_ Winter paper size applies to China National Standard (CNS) A4 specifications (210X297 public expense_ > (Please read the precautions on the back before filling out this page), -β • --1 II 111 Central Bureau of Standards, Ministry of Economic Affairs Printed by the employee consumer cooperative 43 4 A7 B7 V. Description of the invention (3) No. The surface of the substrate is covered with an insulating layer 12 and an appropriate lithography imaging and etching procedure is performed to form a groove 17 containing interconnecting wires therein. And the carbon-inlaid opening 19 of the contact window 18, exposing a part of the surface of the base ridge. Then, the process steps of interconnecting the wires and the therapeutic window are performed. For example, a conductive layer is first formed by a gas vessel or a Shen Λ sequence, such as It is an aluminum metal layer to fill the contact window connecting wire grooves 17 and extend to cover the surface of the insulating layer 12. Then, as shown in Fig. 2] 6, etch back) or chemical machinery Grinding (CMp) treatment 'Remove insulation layer i 2 above the conductive metal layer, leaving the metal plug W and the interconnecting wire 15 to obtain the desired inlay-type interconnecting wire structure. In the above-mentioned manufacturing process of the inlay-type interconnection wire structure, since the groove and the contact window of the interconnection wire are well formed in the insulation layer, the metal interconnection wire and the contact plug can be formed at the same time, which not only has the function of simplifying the process steps. The effect can also improve the problem of poor adhesion caused by the material of the metal interconnecting wires and contact plugs in the traditional process. Basically, the process of making the above-mentioned inlay-type interconnecting wire made of aluminum metal material has achieved quite good results. However, in response to the trend toward faster and finer semiconductor components, many researchers are still striving to develop better wire technology. Among them, steel is one of the technologies that have attracted much attention because of its advantages such as high conductivity and high ductility. In fact, it is not particularly difficult to produce inlay-type interconnected conductors by replacing copper metal with the above-mentioned aluminum metal, but due to the heat dissipation characteristics of copper metal, it is easy to cause each conductor without proper protection and blocking. Leakage in between leads to degradation of component properties. This paper size applies to Chinese National Standard (CNS) Λ4 specification (210X 297 cm) (please read the precautions on the back before filling this one hundred);

434B A7 -------—___ 五、發明説明(4) 因此’ 一般在填入鋼金屬層之前,會如第3圖所示者, 先在鑲崁式開口 19的底_部和側壁表面上’形成一薄的阻 絕層11 ’例如考氮化矽層,或是Ta、TaN、WN、TiN 等’用以防止銦離子因播鲭如熱而據散出去,造成元件 性質的劣化。然而’上述阻絕層U僅圍繞銅金屬的底部 和甸·壁’其上表面仍然可能因缺乏阻絕層11而有銅離子 擴散出去。因此,有待更進一步謀求改善之策,以提昇 元件悝質。 有鑑於此,本發明之一個目的,在提供一種鑲崁式 内連導線構造(damascene interconnect structure)的改良製 程’其能簡化製程步驟,從而提昇整體生產效率。 本發明另一個目的,在提供一種銅金屬鑲崁式内連導線 構造的改良製程’其能提供有效阻絕,防止銅金屬因擴 散而影響元件的性質。 經濟部中决標準局員工消費合作社印製 為達成上述目的’本發明提出一種以銅金屬製作鑲 嵌式内連導線構造的改良製程,其利用阻絕金屬層 (barrier metal)或適當介電層將銅金屬完全包住,藉以防 止銅金屬擴散。更進一步說,該改良製程係包括下列步 驟:形成一絕緣層覆於一半導體基底上,並且在絕緣層 中形成包含内連導線凹槽和接觸窗的鑲崁式開口,露出 部分半導體基底的表面;形成第一阻絕層(barrjer iayer), 覆於鑲崁式開口的底部和側壁表面上;形成一銅金屬層 填入鑲崁式開口内,以製成内連導線和接觸拾構造;施 行一回蝕刻程序(etch back),使得鋼金屬層的表面高度低 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) 經濟部中央標準局員工消費合作社印製 4 3 4η :, Α7 ~——_________ Β7 五、發明説明(5 ) —— — 於第一絕緣層者;形成第二阻絕層,覆於銅金屬層和絕 緣層表面上’其與第一阻絕層共同將銅金屬層完全包 覆’以及施行-4匕學性攙械研磨程序,上乂去除第二 阻絕層位於絕料上方的部分,而得到—平坦的表面^ 元成銅金屬鎮炭式内—連導線的製程。 . 根據本發明的較佳實施例,上述絕緣層係沈積多層 材料-相同或相異的氧化物所構成的氣化物叠層⑽⑽ byer),而上述第一和第二阻絕層可為氮化矽層,或是阻 絕金層射—^㈣❿其材質包括丁卜獅、…^ 或ΤιΝ。至於施於銅金屬層的回蝕刻程序,可以是一使 用以2氣體的乾式餘刻程序㈣咖㈣)”戈是一使用 HNO3溶液的濕式蝕刻程序(wet etching)。 為了讓本發明之上述和其他目的、特徵、及優點能 更明顯易僅’下文特舉一較佳實施例,並配合所附圖式, 作詳細說明如下: 圖式之簡單說明 第1A至1C圖均為剖面圖,顯示傳統製作接觸窗和 内連導線的流程; 第2A至2B圖均為剖面圖,顯示習知鑲崁式内連導 線構造的製造流程; 第3圖為剖面圖,顯示—習知鋼金屬鑲崁式内連導 線構造;以及 第4A至4D圖均為剖面圖,顯示依據本發明銅金屬 鑲崁式内連導線改良製程一較佳實施例。 (請先閲绩背面之注意事頃再填寫本贫) "-裝—-----訂 本紙張尺度適用中國國家標準(CNS ) Λ4规格(2丨OX297公舞)434B A7 ---------___ V. Description of the invention (4) Therefore 'Before filling the steel metal layer, as shown in Figure 3, the bottom part of the inlay opening 19 and 'A thin barrier layer 11' is formed on the surface of the side wall, such as a silicon nitride layer, or Ta, TaN, WN, TiN, etc. . However, the above-mentioned barrier layer U only surrounds the bottom and the wall of the copper metal, and its upper surface may still have copper ions diffused out due to the lack of the barrier layer 11. Therefore, further improvement measures are needed to improve the quality of components. In view of this, an object of the present invention is to provide an improved process of a damascene interconnect structure, which can simplify the process steps and thereby improve the overall production efficiency. Another object of the present invention is to provide an improved process for the construction of a copper metal inlay-type interconnecting wire structure, which can provide effective barriers and prevent the copper metal from affecting the properties of the device due to the diffusion. Printed by the Consumers' Cooperative of the Bureau of Decision and Standards of the Ministry of Economic Affairs to achieve the above-mentioned purpose, the present invention proposes an improved process for making inlaid interconnected wire structures made of copper metal, which uses a barrier metal layer or an appropriate dielectric layer to convert copper The metal is completely enclosed to prevent copper metal from diffusing. Furthermore, the improved manufacturing process includes the following steps: forming an insulating layer overlying a semiconductor substrate, and forming a mosaic opening including an interconnecting wire groove and a contact window in the insulating layer, exposing part of the surface of the semiconductor substrate Forming a first barrier layer (barrjer iayer) covering the bottom of the inlay opening and the surface of the side wall; forming a copper metal layer to fill the inlay opening to make interconnected wires and contact pick-up structures; The etch back process makes the surface height of the steel metal layer low. The paper size is applicable to Chinese National Standard (CNS) A4 (210X297 mm). Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs. 4 3 4η:, Α7 ~ ——_________ Β7 V. Description of the invention (5) —— For the first insulating layer; forming a second barrier layer, covering the copper metal layer and the surface of the insulating layer ', which together with the first barrier layer completely completes the copper metal layer Coating 'and the implementation of the -4 mechanical mechanical grinding procedure, the upper part removes the part of the second barrier layer above the insulating material, and obtains-a flat surface ^ Yuancheng copper metal ball type — The process of connecting wires. According to a preferred embodiment of the present invention, the above-mentioned insulating layer is a multi-layer material-a gaseous laminate (byer) composed of the same or different oxides, and the first and second barrier layers may be silicon nitride. Layer, or block the gold layer from shooting— ^ ㈣❿ The material includes Ding Shi, ... ^ or TiN. As for the etch-back process applied to the copper metal layer, it may be a dry-etching process using 2 gas (Caffeine). "Ge is a wet etching process using HNO3 solution. In order to make the above of the present invention And other purposes, features, and advantages can be more obvious and easy. Only a preferred embodiment is given below, and in conjunction with the accompanying drawings, the detailed description is as follows: Brief description of the drawings. Figures 1A to 1C are sectional views, Shows the traditional process of making contact windows and interconnecting wires; Figures 2A to 2B are cross-sectional views showing the manufacturing process of the conventional inlay-type interconnecting wire structure; Figure 3 is a sectional view showing the conventional steel-metal inlay-type The structure of the interconnecting wires; and Figures 4A to 4D are cross-sectional views showing a preferred embodiment of the improved process of copper metal inlay-type interconnecting wires according to the present invention. (Please read the notes on the back of the report before filling out the poverty ) " -Packing --------- The paper size of the book is applicable to the Chinese National Standard (CNS) Λ4 specification (2 丨 OX297 公 舞)

經濟部中央標準局員工消費合作社印製 4348 6 4 A7 __—________ B7 五、發明説明(6 ) " ~''—一—- 實施例 =先,如第4Α圖所示者,提供一半導體基底2〇, 例如疋發日日圓,其上方可以形成任何所需的半導體元 件,而此處同樣為了簡化起見,僅以一平整的基底2〇表 示之。在基底20上覆蓋一絕緣層22,並在其中形成包 含内連導線凹槽23和接觸窗24的鑲崁式開口 25,露出 部分基底20的表面。例如,先沈積多層材料相同或相異 的氧化物,構成一氧化物疊層(stacked kyer)當作上述絕 緣層22,然後以適當微影成像和蝕刻程序,在氧化物疊 層中逐次定義出内連|線凹槽—23和接觸窗24。 接著,以沈精或錢鍵程序形成一阻絕層(ba出打 layer)26 ,覆於上述鑲崁式開口 25的底部和側壁表面上, #其可以是一介電層,例如式氮化矽層,也可以是適當的 阻絕金屬層,其材質例如是:了a、TaN、WN、或TiN。 之後,進行内—連導線和接_觸窗的製程步驟:先濺鍍形成 一銅金屬層28,以填滿接觸窗24和内連導線凹槽23 , 並且延伸覆蓋在絕緣層22表面上;然後以化學性機械研 磨(CMP)程序’去除絕緣層22上方的銅金屬層28,而留 下在鑲崁式開口 25内的金屬插塞和内連導線構造。 接下來’請參見第4B圖,施行一銅金屬的回钮刻程 序’例如是一使用〇λ2氣體的乾式蝕刻程序(dry etching),或是一使用ΗΝ03溶液的濕式蝕刻程序(wet etching),藉此使得剩餘的銅金屬層28a其表面高度低於 絕緣層22者。接著,再以沈積或濺鍍程序形成另一阻、地 (請先閱讀背面之注$項再填寫本頁) 丁 · 、-=* 1. 本紙張尺度適用中國國家標準(€奶)六4規格(2丨0乂297公漤) 434BS4 A7 B7 ............. _ 五、發明説明(7 ) ~~ 層30,覆於上述銅金屬層28a和絕緣層22表面上,藉以 和阻絕層26共同將銅金屬層2sa莫免包霉u,如第4C 圖所示者。同樣地,此一卩早絕層3〇可以是一介電層,例 如式氡化矽層’也可以是適當的]I且纟|金屬層,其材質例 如是:Ta、TaN、WN、或 TiN。 請參見第4D圖,施行一化學性機械研磨程序 (CMP),以磨除此一阻絕層3〇位於絕緣層22上方的部 分’而剩下位於鑲崁式開口 25中的部分3〇a,即完成本 發明之銅金屬鑲崁式内連導線的製程,很顯然地,本發 明之改良製程’由於利用適當的阻絕介電層或金屬層, 將銅金屬層完全地包覆起來,因此可防止銅I子擴散而 造成漏電流,有—蘇提昇元件之性質,充分具有產業利用 性。 本發明雖然已以一較佳實施例揭露如上,然其並非 用以限疋本發明,任何熟習此技藝者,在不脫離本發明 之精神和範圍内,當可作些許之更動與潤飾,因此本發 明之保s蔓範圍當視後附之申請專利範圍所界定者為準。 (請先閱讀背面之注意事項再填寫本頁〕 *·1Τ 疒 經濟部中央標隼局員工消費合作社印製 本紙張尺度適用中g|g|豕操準(CNS ) Λ4規格(.加公楚)Printed by the Consumer Cooperatives of the Central Bureau of Standards of the Ministry of Economic Affairs 4348 6 4 A7 __—________ B7 V. Description of the Invention (6) " ~ '' — 一 —- Example = First, as shown in Figure 4A, provide a semiconductor The substrate 20, such as a Japanese yen, can be used to form any desired semiconductor element, and here again, for the sake of simplicity, it is represented by a flat substrate 20 only. An insulating layer 22 is covered on the substrate 20, and a mosaic opening 25 including an interconnecting conductor groove 23 and a contact window 24 is formed therein to expose a part of the surface of the substrate 20. For example, multiple layers of the same or different oxides are deposited first to form a stacked kyer as the above-mentioned insulating layer 22, and then the appropriate lithography imaging and etching procedures are used to sequentially define the oxide stack. Inline | line groove—23 and contact window 24. Then, a barrier layer 26 is formed by the immersion or coin procedure, covering the bottom of the inlay opening 25 and the surface of the side wall. #It may be a dielectric layer, such as silicon nitride. The layer may also be a suitable barrier metal layer, and the material is, for example, a, TaN, WN, or TiN. After that, the process steps of interconnecting wires and contact windows are carried out: firstly, a copper metal layer 28 is formed by sputtering to fill the contact window 24 and the interconnecting wire grooves 23, and extend to cover the surface of the insulating layer 22; A chemical mechanical polishing (CMP) process is then used to remove the copper metal layer 28 above the insulating layer 22, leaving the metal plugs and interconnect structures within the damascene opening 25. Next, please refer to FIG. 4B to perform a copper metal button-returning process. For example, a dry etching process using 0λ2 gas, or a wet etching process using ΗΝ03 solution. Therefore, the surface height of the remaining copper metal layer 28a is lower than that of the insulating layer 22. Then, another layer of resistance and ground is formed by the deposition or sputtering process (please read the note on the back before filling this page) Ding,,-= * 1. This paper size is applicable to Chinese national standard (milk) 6 4 Specification (2 丨 0 乂 297mm) 434BS4 A7 B7 ......... _ V. Description of the invention (7) ~~ Layer 30, covering the above-mentioned copper metal layer 28a and insulation layer 22 On the surface, the copper metal layer 2sa and the barrier layer 26 are used together to prevent mold infection, as shown in FIG. 4C. Similarly, the early insulation layer 30 may be a dielectric layer, such as a siliconized silicon layer, or may be appropriate] and a metal layer whose material is, for example, Ta, TaN, WN, or TiN. Referring to FIG. 4D, a chemical mechanical polishing process (CMP) is performed to remove the portion of the barrier layer 30 above the insulating layer 22 and the portion 30a of the damascene opening 25 is left. That is to say, the process of the copper metal inlay-type interconnecting wire of the present invention is completed. Obviously, the improved process of the present invention is because the copper metal layer is completely covered by using an appropriate blocking dielectric layer or metal layer. It prevents the leakage current caused by the diffusion of copper Ions. It has the properties of Su-lifting element, which is fully industrially applicable. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make some changes and decorations without departing from the spirit and scope of the present invention. The warranty scope of the present invention shall be determined by the scope of the attached patent application. (Please read the precautions on the back before filling this page] * · 1Τ Printed by the Consumer Standards Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs This paper is applicable in g | g | )

Claims (1)

434864 AS Βδ C8 D8 經434864 AS Βδ C8 D8 央 標 準 局 員 消 費 合 作 社 印 製 六、申請專利範圍 1. 一種銅金屬鑲崁式内 . ’運導線(damascene mterC〇nneCt)的製造方法,包括下列步驟: 形成一絕緣層覆於一半導體I危 .^ ± ^ 干守股暴底上’並在該絕緣層 中形成包含内連導線凹槽和接觸 矛接觸_的鑲崁式開口,露出 部分該半㈣:&底料s; ^ 1 形成第一阻絕層(barter 、 4bamei· layei〇,覆於該鑲崁式開口 的底部和側壁表面上; 形成一鋼金屬層填人該鑲炭式開口内,以製成内連 導線和接觸拾構造; >施行回银刻程序(etchback),使得該銅金属 層的表 面高度低於該第一絕緣層者; 形成第二阻絕層,覆於該銅金屬層和該絕緣層表面 上’其與該第—阻絕層共同將該鋼金屬層完全包覆;以及 施行一化學性機械研磨程序(CMp) 絕層位於該絕緣層上方的部分,而得:卜::的=阻 完成銅金屬鑲崁式内連導線的製程。 2.如申請專利範圍第1項所述一種銅金屬鑲崁式内 連導線的製造方法,其中該半導體基底係一矽晶圓。 3·如申請專利範圍第1項所述一種鋼金屬鑲崁式内 連導線的製造方法,其中該絕緣層係沈積多層材料相同 或相異的氧化物所構成的氧化物疊層(stacked iayer)。 4·如申請專利範圍第1項所述一種銅金屬鑲崁式内 連導線的製造方法,其中該第一和第二阻絕層係氮化矽 層。 -Π- 本紙張尺度適用中國國家標準(CNS ) A4規格(2丨0X297公赛) 434864 AS B8 C8 ------ D8 六、申請專利範園 、.5·如申請專利範圍第1項所述一種銅金屬鑲崁式内 連導線的製造方法,其中該第一和第二阻絕層係為阻絕 金屬層(barrier metal)。 6·如申請專利範圍第5項所述—種鋼金屬鐵崁式内 連導線的製造方法,其中該阻絕金屬層的材質為Ta、 TaN、WN、或 TiN。 7, 如申請專利範圍第1項所述一種鋼金屬鑲崁式内 連導線的製造方法,其中該回钱刻程序係一使用%氣 體的乾式姓刻程序(dry etching)。 8. 如申凊專利範圍第1項所述一種鋼金屬鑲崁式内 連導線的製造方法,其中該回敍刻程序係一使用hno3 溶液的濕式蝕刻程序(wet eiching)。 --------f-装------釘 (請先閲讀背面之泣意事項i填寫ps·) 經濟部中央標準局員工消費合作社印製 2- 本紙張尺度逋用中國國家襟準(CNS ) A4規格(210 X 297公釐)Printed by the Central Standards Bureau Consumer Cooperative 6. Application for patent scope 1. A copper metal inlay type. The method of manufacturing a damascene mterConnCt includes the following steps: forming an insulating layer overlying a semiconductor. ^ ± ^ on the bottom of the thigh and forming a mosaic-type opening in the insulating layer that includes the groove of the interconnecting wire and the contact of the spear to expose a part of the half: & primer s; ^ 1 forming the first A barrier layer (barter, 4bamei · layei〇, covering the bottom of the inlay opening and the surface of the side wall; forming a steel metal layer to fill the carbon inlay opening to make interconnected wires and contact pick-up structures; > implement a silver etchback process so that the surface height of the copper metal layer is lower than the first insulating layer; forming a second barrier layer covering the copper metal layer and the surface of the insulating layer The first-barrier layer together completely covers the steel metal layer; and a chemical mechanical polishing process (CMp) is performed on the portion of the insulating layer above the insulating layer, and the result is: bu :: == copper metal inlay type Inside Manufacturing process of wires. 2. A method for manufacturing a copper metal inlay-type interconnect wire as described in item 1 of the scope of patent application, wherein the semiconductor substrate is a silicon wafer. 3. As described in item 1 of the scope of patent application A method for manufacturing a steel-metal inlay-type interconnecting wire, wherein the insulating layer is an oxide stacked iayer composed of multiple layers of the same or different oxides. 4. As described in item 1 of the scope of the patent application A manufacturing method of copper metal inlay-type interconnecting wires, wherein the first and second barrier layers are silicon nitride layers. -Π- This paper size is applicable to China National Standard (CNS) A4 specification (2 丨 0X297). 434864 AS B8 C8 ------ D8 VI. Patent Application Fanyuan, .5 · A method for manufacturing copper-metal inlay-type interconnected wires as described in item 1 of the scope of patent application, wherein the first and second The barrier layer is a barrier metal layer. 6. As described in item 5 of the scope of the patent application—a method for manufacturing a steel-metal-iron-type interconnected wire, wherein the material of the barrier metal layer is Ta, TaN, WN , Or TiN. 7, if applying for special A method for manufacturing a steel-metal inlay-type interconnected wire as described in the first item of the scope, wherein the rebate engraving procedure is a dry etching process using% gas. The method for manufacturing a steel-metal inlay-type interconnected wire, wherein the engraving process is a wet eiching process using a hno3 solution. -------- f- 装 --- --- Nails (please read the sour items on the back and fill in the ps ·) Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs 2- This paper size is in accordance with China National Standard (CNS) A4 (210 X 297 mm) )
TW87104319A 1998-03-23 1998-03-23 Manufacturing method for copper metal damascene interconnect TW434864B (en)

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