經濟部中央梯率局貝工消费合作社印* ύ 3 2J1 9 ^ at _ Β7 五、發明说明（） 圖式之簡單說明： 圖一、傳統電流源對電容器充放電振盪器 圖二、圖一所示之電路圖中⑴節點101處⑵節點102處（3)節點103 處電壓波形對時間之關係圖 圖三、新發明「小面積低功率低頻振盪器之一」電路圖 圖四、新發明「小面積低功率低頻振盪器之二」電路圖 傳統的振盪器多以電感器-電容器或電阻器-電容器相互連接的方 法，達成諧振的目的。以此種方式所製做出的振盪器’其振盪頻率 多在數十千赫茲以上。如果想要以電感器-電容器或電阻器-電容器 相互連接的方法來達成振盪頻率在一千赫蔽以下的目的，一般不是 加大電感器、電容器、或電阻器的値，不然就是使用除頻器使振盪 頻率降低。無論透過那種方法，都將導致電路面積的增加1消耗更 多電能，提高生產成本。這對強調小面積、低功率的積體電路而言， 無疑是個致命的傷害。因此，如何設計一個具有小面積及低功率的 低頻振盪器，且可實現於積體電路上，爲此發明之目的。 傳統藉由定電流源對一電容器作充、放電的振盪器’如第一圖所示， 其包含一個電容器U，兩個開關21及22，兩個分別可產生Ic和ID 大小電流的定電流源31及32，一個史密司觸發器4〗’及一個反向 ---------V.------.^1.-----^. (請先閱讀背面之注意事項再填寫本頁) 經濟部中央橾準局貝工消費合作社印家 4 327 7 9 ! ΒΊ 五、發明説明（） 器42。假設開始動作時，節點101處的電壓爲零，此時開關21開啓， 開關22關閉，電流源31以Ic大小的電流對電容器11開始充電，使 得節點101處的電壓上升。當該節點電壓到達史密司觸發器41的高 態轉換電壓（VIH)時，史密司觸發器41輸出低電位（V&)，開啓 開關22，電流源32開始以ID大小的電流對電容器11作放電的動作； 同時間，史密司觸發器41輸出的低電位透過反相器42輸出高電位 (VQH)，以關閉開關21，電流源31停止對電容器11充電。由於電 流源32不斷對電容器11汲出電荷，節點101處的電壓開始下降。 當該節點電壓到達史密司觸發器41的低態轉換電壓（VILJ時，史 密司觸發器41輸出高電位，開啓開關21，電流源31開始對電容器 11作充電的動作；同時間，史密司觸發器41輸出的高電位透過反 相器42輸出低電位，以關閉開關22，電流源32停止對電容器11放 電。因此節點101處的電壓開始上升。如此週而復始，產生振盪。 其振盪電壓波形如第二圖所示。 傳統藉由電流源對電容器充放電的振盪器，其振盪週期決定於充電 電流源31、放電電流源32、和電容器11的大小，如果要應用在低 頻上，充電電流源31和放電電流源32需儘量的小，電容器11則必 需儘量的大。然而，對於一般的積體電路設計而言，定電流源很難 本紙乐尺度適用中®固家橾準（CNS)A4規格（2丨0X297公釐) (請先閱讀背面之注意事項再填寫本頁) - 訂 經濟部中央揉率局貝工消费合作社印ιί 132779 五、發明说明（） 設計在0,1微安培（10·6Α)以下’且電容器如果設計値在10微微法 拉（10.i2F)以上，將占很大的面積，造成生產成本的增加。欲以傳 統電流源對電容器充放電振盪器產生低頻振盪’通常之解決方法爲 使用數級之除頻電路來達到所需之振盪頻率。如此做的話’除了浪 費晶片面積外，亦造成不必要的電能損耗。對曰益要求小面積、低 功率的積體電路而言，實爲不當之作法，因此有創作本發明之動機。 底下配合圖式，就本發明之電路、原理、及功效說明如下： 請參閱第三圖所示，本創作係爲「小面積低功率之低頻振盪器」，其 包含=個電容器11，四個開關21、22、23 '及24，四個分別可產 生L、ID1 ' 、及ID2大小電流的定電流源31、32、33 '及34，一 個史密司觸發器41，及一個反向器42。假設開始動作時，節點1〇1 處的電壓爲零，此時開關21及23開啓’開關22及24關閉，電流 源31及33對電容器11開始以（IC1 - ΙΩ)大小的差値電流充電，使 得節點101處的電壓上升。當該節點電壓到達史密司觸發器41的高 態轉換電壓（VIH)時，史密司觸發器41輸出低電位（V0L)，開啓 開關22及24，電流源32及Μ以（ID1 - ΙΜ)大小的差値電流開始 對電容器11作放電的動作；同時間，史密司觸發器41輸出的低電 位匕過反相器42輸出爲高電位（VOH) ’關閉開關21及23，電流源 31及33停止對電容器11充電。由於電流源32及34不斷對電容器 L紙張纽適用( CNS )八4祕(210X297公釐] (#先閲讀背面之注意事項再填寫本頁) 訂- Α7 Β7 432779 五、發明说明（） 11汲出電荷，節點101處的電壓開始下降。當該節點電壓到達史密 司觸發器41的低態轉換電壓（vIL)時，史密司觸發器4丨輸出高電 位，開啓開關21及23，電流源31及33開始對電容器11開始以（iQ -IC2)大小的差値電流作充電的動作；同時間，史密司觸發器41輸 出的高電位透過反相器42輸出爲低電位，關閉開關22及24，使電 流源32及34停止對電容器11放電。因此節點1〇1處的電壓開始上 升。如此週而復始’產生振盪。其振盪電壓波形亦如第二圖所示》 新發明和傳統電流源對電容器充放電振盪器不同的是，新發明分別 藉由（IC1 - IC2)及（ID1 - ID2)大小的差値電流對電容器11作充' 放 電的動作，而傳統電路則以Ic和ID大小的電流對電容器11作充、 放電的動作。在電容器11電容値大小不變的前提下，對該電容器充、 放電的電流愈小，所得之振盪週期愈長，即振盪頻率愈低。呈如前 述，對於一般的積體電路設計，定電流源很難設計在0.1微安培以 下，即使將定電流源設計在αι微安培以下，其電路將變得非常複 雜，而失去小面積、低功率的要求。透過設計兩組電流大小相近之 電流源，其相差之値將可以控制到奈安培（1〇·9Α)以下，以此大小 之電流來對電容器作充、放電的動作，可使振褒頻率降低。新發明 之振盪電路，較傳統振盪電路多了兩組電流源及兩組開關，其所占 本紙乐尺度適用中困國家梂準（CNS>A4规格（2!〇><297公Λ ) (請先閲讀背面之注意事項再填寫本頁) - -1--- 經濟部中央橾準扃員工消費合作社印製 經濟部中央標率局貝工消费合作社印製 432779 五、發明説明（） 面積大小較之傳統電路輸出高頻振盪波形後’再經由數級的除頻器 使之頻率降低所占的面積要小的多°且傳統電路振盪出高頻訊號即 需損耗較大的功率，而新發明之振盪電路由於本身即振盪出低頻的 訊號，其所消耗的功率天生較少。 第四圖所示爲本發明之改變，雖電容器u之連接方法改變，但振盪 原理類似，亦以差値電流（IC1 _ IC2 )、（ -〖D2 )分別對電容器11做 充、放電荷，輸出波形亦如第二圖所示。 綜上所述，本發明可爲從事積體電路設計者在小面積、低功率的前 提下提供一低頻振盪電路。由於小面積的原故’所以可以使生產成 本降低；又由於低功率的損耗，可節省應用產品之能源’此皆爲本 發明之優點。 由於本發明已配合圖示詳細敘述其工作及設計原理’凡習有專長的 人均可透過本說明而從事本發明之製造及生產。爲保護發明人權利’ 根據專利法提出專利申請。尙祈貴審查委員能詳予審查，並能早 曰賜准本案專利，實感德便。 本纸張尺度遘用中网W家樣率（CNS M4現格（2丨0X297公釐） (請先閱讀背面之注意事項再填寫本頁) 訂 線Printed by the Bayer Consumer Cooperative of the Central Slope Bureau of the Ministry of Economic Affairs * ύ 3 2J1 9 ^ at _ Β7 V. Description of the invention () Brief description of the figure: Figure I, Traditional current source-capacitor charge-discharge oscillator Figure II, Figure I The circuit diagram shown is the relationship between the voltage waveform at time at node 101 and node 102 (3) at node 103. Figure 3. The new invention "small area low-power low-frequency oscillator" Circuit diagram Figure 4. The new invention "small area "Low power low frequency oscillator II" circuit diagram Traditional oscillators often use inductor-capacitor or resistor-capacitor interconnection methods to achieve the purpose of resonance. Oscillators' made in this way often have oscillation frequencies above tens of kilohertz. If the inductor-capacitor or resistor-capacitor interconnection method is used to achieve the purpose of oscillating frequency below 1 kHz, generally it is not to increase the chirp of the inductor, capacitor, or resistor, or to use frequency division Reduce the oscillation frequency. No matter which method is adopted, it will lead to an increase in the circuit area1, consume more power, and increase production costs. This is undoubtedly fatal to integrated circuits that emphasize small area and low power. Therefore, how to design a low-frequency oscillator with a small area and low power, which can be implemented on an integrated circuit, is the purpose of this invention. Traditionally, a capacitor is charged and discharged by a constant current source. As shown in the first figure, it includes a capacitor U, two switches 21 and 22, and two constant currents that can generate Ic and ID currents, respectively. Sources 31 and 32, a Smith Trigger 4 'and a reverse --------- V .------. ^ 1 .----- ^. (Please read first Note on the back, please fill in this page again.) 4) 327 7 9! Assume that the voltage at the node 101 is zero at the beginning of the operation. At this time, the switch 21 is turned on and the switch 22 is turned off. The current source 31 starts to charge the capacitor 11 with a current of Ic, so that the voltage at the node 101 rises. When the node voltage reaches the high-state transition voltage (VIH) of the Smith trigger 41, the Smith trigger 41 outputs a low potential (V &), the switch 22 is turned on, and the current source 32 starts to apply a current of an ID magnitude to the capacitor. At the same time, the low potential output from the Smith trigger 41 is output to the high potential (VQH) through the inverter 42 to close the switch 21, and the current source 31 stops charging the capacitor 11. As the current source 32 continuously draws charge to the capacitor 11, the voltage at the node 101 starts to drop. When the node voltage reaches the low-state transition voltage (VILJ of the Smith trigger 41), the Smith trigger 41 outputs a high potential, turns on the switch 21, and the current source 31 starts to charge the capacitor 11. At the same time, The high potential output from the flip-flop 41 is output through the inverter 42 to output a low potential to turn off the switch 22, and the current source 32 stops discharging the capacitor 11. Therefore, the voltage at the node 101 starts to rise. This cycle is repeated, and an oscillation voltage is generated. The waveform is shown in the second figure. The oscillation period of the capacitor charged and discharged by the current source traditionally depends on the size of the charging current source 31, the discharging current source 32, and the capacitor 11. If it is to be applied at low frequencies, charge The current source 31 and the discharge current source 32 must be as small as possible, and the capacitor 11 must be as large as possible. However, for general integrated circuit design, it is difficult to apply a constant current source to this paper. ) A4 specification (2 丨 0X297 mm) (Please read the notes on the back before filling out this page)-Ordered by the Central Labor Bureau of the Ministry of Economic Affairs, the Paicon Consumer Cooperative, 132779 V. Invention Ming () designed below 0,1 microampere (10 · 6A) 'and if the capacitor is designed to be more than 10 picofarad (10.i2F), it will occupy a large area, resulting in an increase in production costs. To use traditional current The source generates low-frequency oscillations to the capacitor charge-discharge oscillator. The usual solution is to use a frequency divider circuit of several stages to achieve the required oscillation frequency. In doing so, in addition to wasting chip area, it also causes unnecessary power loss. For Yiyi, which requires a small area and low power integrated circuit, it is an improper method, so there is a motive for creating the present invention. With the drawings below, the circuit, principle, and effect of the present invention are explained as follows: As shown in the three figures, this creation is a "small-area low-power low-frequency oscillator", which includes = capacitors 11, four switches 21, 22, 23 ', and 24, and four can generate L, ID1', and ID2 constant current sources 31, 32, 33 'and 34, a Smith trigger 41, and an inverter 42. Assume that the voltage at node 10 is zero at the beginning of the operation, and at this time switch 21 And 23 on 'switch 22 24 is turned off, and current sources 31 and 33 start charging capacitor 11 with a differential current of (IC1-1Ω), which causes the voltage at node 101 to rise. When the node voltage reaches the high-state transition voltage of Smith trigger 41 ( VIH), the Smith trigger 41 outputs a low potential (V0L), turns on the switches 22 and 24, and the current source 32 and M starts to discharge the capacitor 11 with a differential current of (ID1-IM); at the same time The low potential of the Smith trigger 41 and the output of the inverter 42 are high potential (VOH). The switches 21 and 23 are turned off, and the current sources 31 and 33 stop charging the capacitor 11. Because the current sources 32 and 34 are constantly charging Capacitor L Paper Button Application (CNS) Eighty Four Secrets (210X297 mm) (#Read the precautions on the back before filling this page) Order-Α7 Β7 432779 V. Description of the invention (11) The charge is drawn and the voltage at node 101 starts decline. When the node voltage reaches the low-state transition voltage (vIL) of the Smith trigger 41, the Smith trigger 4 丨 outputs a high potential, turns on the switches 21 and 23, and the current sources 31 and 33 start to start the capacitor 11 with ( iQ -IC2) The differential current of the magnitude is used for charging. At the same time, the high potential output of the Smith trigger 41 is output to the low potential through the inverter 42. The switches 22 and 24 are closed to stop the current sources 32 and 34. The capacitor 11 is discharged. Therefore, the voltage at node 101 starts to rise. This cycle starts and starts again '. Its oscillating voltage waveform is also shown in the second figure. The difference between the new invention and the traditional current source for capacitor charge-discharge oscillators is that the new invention uses (IC1-IC2) and (ID1-ID2) differential current pairs. The capacitor 11 performs a charging and discharging operation, while the conventional circuit performs a charging and discharging operation on the capacitor 11 with a current of Ic and ID. On the premise that the capacitance of the capacitor 11 is constant, the smaller the current for charging and discharging the capacitor, the longer the obtained oscillation period, that is, the lower the oscillation frequency. As mentioned above, for general integrated circuit design, it is difficult to design the constant current source below 0.1 microamperes. Even if the constant current source is designed below αι microamperes, its circuit will become very complicated, losing a small area and low Power requirements. By designing two sets of current sources with similar current magnitudes, the difference between them can be controlled below ampere (10 · 9A). Using this magnitude of current to charge and discharge the capacitor can reduce the vibration frequency . The newly invented oscillating circuit has two sets of current sources and two sets of switches compared with the traditional oscillating circuit. Its occupied paper scale is applicable to the standards of the middle and poor countries (CNS > A4 specification (2! 〇 > < 297)) (Please read the precautions on the back before filling out this page)--1 --- Printed by the Central Consumers ’Cooperative of the Ministry of Economic Affairs and printed by the Consumers’ Cooperative of the Ministry of Economic Affairs Printed by the Shell ’s Consumer Cooperatives of the Central Standards Bureau 432779 5. Description of the invention () Area Compared with the traditional circuit outputting high-frequency oscillating waveforms, the area occupied by the frequency reduction by several stages of frequency divider is much smaller, and the traditional circuit oscillates high-frequency signals, which requires greater power loss, and The newly invented oscillating circuit oscillates low-frequency signals by itself, which consumes less power. The fourth figure shows the change of the present invention. Although the connection method of the capacitor u is changed, the oscillating principle is similar, but also worse. The current (IC1 _ IC2) and (-〖D2) charge and discharge the capacitor 11 respectively, and the output waveform is also shown in the second figure. In summary, the present invention can be used by designers of integrated circuits in small Area, low power front It is provided to provide a low-frequency oscillation circuit. Because of the small area, it can reduce the production cost; and because of the low power loss, it can save the energy of the applied products. This is all the advantages of the present invention. Describe its work and design principles in detail: 'Everyone who has expertise can engage in the manufacture and production of the invention through this description. To protect the rights of the inventor', a patent application is filed in accordance with the Patent Law. And I can grant the patent in this case as soon as possible, and it is very convenient. This paper size uses the sample rate of China Net W (CNS M4 now (2 丨 0X297 mm) (Please read the precautions on the back before filling this page) Order