TW432724B - The photodiode manufacturing process of active pixel sensor - Google Patents

Abstract

The present invention reveals a photodiode manufacturing process of active pixel sensor used in a semiconductor substrate, mainly by forming a TEOS passivation layer covering the semiconductor substrate to protect the surface of the semiconductor substrate in the doped region of the photodiode during the etching step in forming the insulated sidewall layer of the transistor to avoid the damage in the etching step. Thereby the leakage current can be reduced so that an accurate and clear picture can be shown on the image sensor after the image transformation of the electrical signal.

Description

V. Description of the invention ¢ 1) The present invention relates to a photodiode system, and more particularly to a photodiode system of an active pixel sensing unit capable of reducing leakage. In general, in addition to charge coupled devices (CCDs), there are also active pixel sensors formed by using NMOS transistors in standard CMOS processes and photodiodes. Unit (active pixel sensor, APS). Generally speaking, an active pixel sensing unit is composed of a photodiode and a plurality of transistors to form reset, readout, and amplification operations. Here, please refer to FIG. 1, which is a circuit diagram of an active pixel sensing unit 10. As shown in the figure, an NMOS transistor 14 (reset transistor) has a drain coupled to a fixed bias. Voltage source V cc, whose source is coupled to the cathode of a photodiode 12, and the anode of the photodiode 12 is connected to a ground point, and its cathode is connected to another NMOS transistor 16 (source follows Source f ο 1 1 ower). In addition, the drain of the NMOS transistor 16 is coupled to the fixed bias source Vcc, and its source is connected to the non-pole of another NMOS transistor 18 (selected column transistor). The action of this active pixel sensing unit can be divided into three: (a) signal readout step; (b) image integration; (c) reset step It is completed by the aforementioned transistors, which will not be repeated here. Generally, in practical applications, a plurality of active pixel sensing units are arranged in the form of an array to become a pixel sensing element, each of which is a photodiode

V. Description of the invention⑵ ~ ---- 'The active pixel sensing unit mainly uses the intensity of the light sensed by the light :: polar body 12 to convert it into an electrical signal, and then the source of the crystal 18 Output (the entire readout action is as a source follower). Since the intensity of the sensed light is represented by the read-out electrical signal, it must be very particular about its accuracy, so as to display a very accurate and clear image sensor on the image sensor after the image integration action. Day surface. Here, please refer to FIGS. 2A to 2D, which are cross-sectional views of the manufacturing process of a conventional photovoltaic diode and a reset transistor connected in series; please refer to FIG. 2A, which is formed on a silicon substrate 20. A field oxide layer FOX, and a gate structure 22 formed therebetween, including a gate oxide layer 221 and a gate electrode 222; furthermore, 'formed in a silicon substrate 20 near both sides of the gate structure 22- The doped N-type source / drain region 24 is doped with N-type ions on one side of the N-type source / drain region 24 to form a cathode doped region 26 of the photodiode. Next, referring to FIG. 2B, an oxide layer 28 is formed on the surface of the silicon substrate 20 and the gate structure 22. Then, the oxide layer 28 is etched to form an insulating sidewall layer 281 on the sidewall of the gate structure 22. As shown in Figure 2C. Next, referring to FIG. 2D, a heavily doped region 25 of the source / drain is formed in the lightly doped N-type source / drain region 24 to form an NMOS electrical crystal 29. However, in the process of forming the insulating sidewall layer 281 of the NMOS transistor 29, the oxide layer 28 covering the surface of the photodiode cathode doped region 26 must be etched at the same time. This step can easily cause the photodiode cathode doped region. The silicon substrate 20 on the 26 surface has a defect, as shown by the surface A in Figs. 2C and 20, so it is easy to generate a leakage current (1 eaka ge);

^ 1327 £ 4

The measured leakage current has a voltage drop of 73.8mV per second. In addition, since the current flowing through the photodiode is extremely small, if the leakage current occurs again, it will be more likely to affect its conversion. The telecommunications signal, so the integrated image day and time is not accurate and clear. ^ In view of this, the object of the present invention is to provide an optoelectronic unipolar structure of an active pixel sensing unit, which first deposits a protective layer on the cathode of the photodiode before forming the insulating sidewall layer of the gate electrode. In order to prevent defects on the surface of the semiconductor substrate forming the photodiode cathode doped region, the leakage current of the device is reduced, and noise that may be generated is reduced, thereby showing a precise and clear daylight surface. In order to achieve the purpose of the present invention, a photodiode system of an active pixel sensing unit is provided. The process includes the following steps: First, a gate structure is formed on the surface of the semiconductor substrate. Next, a source / drain doping is formed. In the semiconductor substrate on both sides of the gate structure. Forming an ion-doped region in the semiconductor substrate adjacent to the source / drain, forming a protective layer to cover the gate structure and the surface of the semiconductor substrate, and defining a pattern of the protective layer 'for the gate An insulating sidewall layer is formed on the sidewall of the electrode structure. Among them, the above-mentioned protective layer is a TEOS layer, which is formed by using a low-pressure chemical vapor deposition (LPCVD) method using tetraethoxysilicate as a reactant. In order to make the above-mentioned objects, features, and advantages of the present invention more comprehensible ', a preferred embodiment is given below, and will be described in detail with reference to the accompanying drawings.

5. Explanation of the invention on page 6 (4) The description is as follows: The first diagram is a circuit diagram of an active pixel sensing unit; the second diagram 2A to 2D is a conventional photodiode connected to it A cross-sectional view of the manufacturing process of the reset transistor; and FIGS. 3A to 3H are cross-sectional views of the manufacturing process of the photodiode according to the present invention and the reset transistor connected in series. DESCRIPTION OF SYMBOLS 1 0 ~ active pixel sensing unit 1 2 ~ photodiode 14, 16, 18 ~ NMOS transistor Vcc ~ fixed bias source 20, 30 ~ broken substrate 2 2, 3 1 ~ gate structure 2 2 1 , 3 1 1 to gate oxide layer 22 2, 31 2 to gate electrode 24, 32 to lightly doped regions of source / drain 2 5, 3 5 to source /; and heavily doped regions 26, 33 to optoelectronics Cathode doped region of the diode 2 8 ~ oxide layer 281 ~ insulating sidewall layer 29 ~ NMOS transistor FOX ~ field oxide layer

V. Description of the invention (5) A ~ silicon substrate PR1 on the surface of the cathode doped region 26 ~ first photoresist layer PR2 ~ second photoresist layer PR3 ~ third photoresist layer 34 ~ TE〇S layer ~ TE〇s protection Examples of the layer 340 ~ insulating sidewall layer are described herein with reference to FIGS. 3A to 3G for a more detailed understanding of the manufacturing process of the photodiode and the transistor connected in series according to the present invention, which can reduce leakage current; first, Please refer to FIG. 3A, a silicon substrate 30 is provided, and a field oxide layer FOX is formed on the surface of the silicon substrate 30 by a local oxidation method (LOCOS) to isolate the device region. Next, a gate structure 31 is formed on the surface of the silicon substrate 30. The gate structure 31 includes a gate oxide layer 311, such as a silicon dioxide layer, and a gate electrode 31 2 ′, such as a polycrystalline silicon gate electrode. Next, referring to FIG. 3B, a source / non-doped region is formed in the semiconductor substrate on both sides of the gate structure; for example, a patterning is formed before the surface of the Shixi substrate 30 The first photoresist layer pR1, and then using the first photoresist layer PR1 as a mask, an N-type ion is implanted by an ion implantation method, such as erbium ion, which is implanted in a silicon substrate 30 to form A lightly doped region 32 of a source / drain. After that, the first resist layer PR1 is removed with a photoresist removing solution (not shown in the figure).

V. Description of the invention (6) tb · \ J; please refer to FIG. 3C again, and then form a second photoresist layer pR2 on the surface of the silicon substrate 30, and use the photoresist layer PR2 as a cover. The substrate is implanted with N, and is implanted into the silicon substrate 30, such as arsenic ions, to form a type ion-doped region as the cathode-doped region 33 of the photodiode. Section Next, the second photoresist layer PR2 is removed, and a protective layer is formed on the gate structure and the surface of the semiconductor substrate; for example, please refer to 3D = using tetraethoxysilicate as a reactant 'Use low-pressure chemical vapor deposition as' to form a TEOS (Tetra-Ethyl-Ortho-Silicate) layer 34 as a second protective layer, and comprehensively cover the entire silicon substrate 30 (including the gate structure you follow immediately.) The protective layer is patterned so that an insulating sidewall layer and a patterned protective layer are formed on the front wall of the gate structure; for example, please; photoresist gamma, and then, as shown in Figure 3F, In this case, a pair of TEOS layers 34 were subjected to dry etching to form a surface of the silicon substrate 30 above the cathode doped region 33 of the photoelectrode body. An insulating sidewall layer 340 is formed on the side wall of the gate structure 31. After that, a step of forming a heavily doped source / drain region of the transistor is performed. For example, refer to FIG. 3G. The photoresist layer, the TEOS protective layer 34, the gate structure 31 and its insulating sidewall layer 34 are masks. A ping ion is implanted into the aforementioned lightly doped source / drain region 32 to form a heavily doped source / drain region 3 5. Next, please refer to FIG. 3H to remove the photoresist solution Resistance layer pr 3

V. Description of the invention (7) After removal, the essence of the present invention is to carry out # the semiconductor substrate (damage) with a TEOS protective layer, because the sensor (i mage) which may be generated and the flow through experimental measurement 73.8 mV, as far as the measured device is concerned, although the present invention limits the invention, within the scope of God and God, when viewed as follows, a flat silicon substrate surface is formed as shown in Figure 3H. Optoelectronics of the active pixel sensing unit Diode system process, its main step is to create the insulating sidewall layer of the transistor, the formation of a benefit to protect the formation of the surface of the photodiode ion-doped region 'from the damage of the etching step to reduce leakage Current, that is, reducing noise due to electrons / holes, so that after image conversion,

SenS〇r) presents a precise and clear daytime surface. " According to the present invention, the pressure drop per second of the photodiode produced by the t system is 47 ^, and the electric bamboo is 47 '2m \' Compared with the conventional, it is reduced by 36%. & 夭 can be described as effective. The old $ ~ mind image has been exposed in the preferred embodiment as above, lack of any familiarity with this technical reference ..., " Asian use μ can be used to make changes and smooth, so the present invention :; two: patent scope The ones defined shall prevail. " Guarantee

Claims (1)

6. Scope of Patent Application 1. A photodiode system of an active pixel sensing unit is used on a semiconductor substrate and is connected to a transistor element, including the following steps: forming a gate structure on the surface of the semiconductor substrate Forming a lightly doped source / drain doped region in the semiconductor substrate on both sides of the gate structure; forming an ion doped region in the semiconductor substrate adjacent to the lightly doped source / drain electrode Forming a patterned protective layer covering the ion-doped region and forming an insulating sidewall layer on the sidewall of the gate structure; and using the insulating sidewall layer as a mask to form a source / drain rich doping Area. 2. The method according to item 1 of the scope of patent application, wherein the semiconductor substrate is a second substrate. 3. The method according to item 1 of the scope of patent application, wherein the gate structure includes a gate electrode and a gate oxide layer. 4. The method according to item 1 of the scope of patent application, wherein the doped ions in the ion doped region have the same electrical properties as the source / drain electrical properties. 5. The method according to item 1 of the scope of patent application, wherein the protective layer is a TEOS layer formed by using a tetraethoxysilicate as a reactant and a low pressure chemical vapor deposition method. 6. The method according to item 1 of the scope of patent application, wherein forming a patterned protective layer further comprises the following steps: 6. The scope of the patent application forms a patterned photoresist layer on the surface of the protective layer: and the protective layer is etched to form an insulating sidewall layer on the sidewall of the gate structure, and is formed over the ion doped region A patterned protective layer. 7. The method according to item 6 of the patent application scope, wherein t, the insulating sidewall layer and the patterned protective layer are formed by dry etching the protective layer using a fluorocarbon plasma. 8. The method according to item 6 of the patent application scope, further comprising removing the photoresist layer after forming the insulating sidewall layer. Page 12