TW431114B - Hardware structure and formation for inverse quantization and multi-channel processing of MPEG-II audio signal decoding - Google Patents
Hardware structure and formation for inverse quantization and multi-channel processing of MPEG-II audio signal decodingInfo
- Publication number
- TW431114B TW431114B TW88105720A TW88105720A TW431114B TW 431114 B TW431114 B TW 431114B TW 88105720 A TW88105720 A TW 88105720A TW 88105720 A TW88105720 A TW 88105720A TW 431114 B TW431114 B TW 431114B
- Authority
- TW
- Taiwan
- Prior art keywords
- fifo registers
- adder
- hardware structure
- inverse quantization
- subtractor
- Prior art date
Links
Landscapes
- Compression, Expansion, Code Conversion, And Decoders (AREA)
Abstract
The present invention relates to a hardware structure, consisting of 5 sets of serial FIFO registers, a multiplier, a single register, and two adder-subtractors, suitable for inverse quantization and multi-channel processing of MPEG-II audio signal decoding. The first set of FIFO registers is used to receive outputs of the first adder-subtractor and the second set of FIFO registers is used to receive outputs of either the second adder-subtractor or the first set of FIFO registers. The third set of FIFO registers is used to receive outputs of either the single register or the second set of FIFO registers. The single register is used to receive the calculation result of the multiplier and output the calculation result to a buffer zone, the first adder-subtractor, the second adder-subtractor, or the third set of FIFO registers. Based on the hardware structure, inverse quantization can achieve a high output rate and, through efficient and flexible allocation of the multi-channel data, multi-channel processing allows the hardware structure to have a fixed output volume that will not vary along with various dematrixing models.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW88105720A TW431114B (en) | 1999-04-09 | 1999-04-09 | Hardware structure and formation for inverse quantization and multi-channel processing of MPEG-II audio signal decoding |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW88105720A TW431114B (en) | 1999-04-09 | 1999-04-09 | Hardware structure and formation for inverse quantization and multi-channel processing of MPEG-II audio signal decoding |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW431114B true TW431114B (en) | 2001-04-21 |
Family
ID=21640241
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW88105720A TW431114B (en) | 1999-04-09 | 1999-04-09 | Hardware structure and formation for inverse quantization and multi-channel processing of MPEG-II audio signal decoding |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TW431114B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE202017102446U1 (en) | 2016-05-17 | 2017-06-09 | Lee Chi Enterprises Co., Ltd. | Seatpost with connecting bracket and connecting bracket for the same |
-
1999
- 1999-04-09 TW TW88105720A patent/TW431114B/en not_active IP Right Cessation
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE202017102446U1 (en) | 2016-05-17 | 2017-06-09 | Lee Chi Enterprises Co., Ltd. | Seatpost with connecting bracket and connecting bracket for the same |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| DE602004022766D1 (en) | Bass-management-systeme | |
| TW346573B (en) | Multiprocessor operation in a multimedia signal processor | |
| EP0919953A3 (en) | Audio-video decoding system | |
| PL1621047T3 (en) | Audio signal generation | |
| EP0731615A3 (en) | Video decoding device for decoding video data in synchronism with a system clock | |
| EP1190336A4 (en) | Internet radio receiver and interface | |
| MXPA06003627A (en) | Compatible multi-channel coding/decoding. | |
| DE69620984D1 (en) | Noise estimation and noise reduction device for video signal processing | |
| GB2417112A (en) | Reducing cpu and bus power when running in power-save modes | |
| WO2003103337A3 (en) | Methods and apparatus for sub-harmonic generation, stereo expansion and distortion | |
| WO1998043379A3 (en) | Data transfer system, transmitter and receiver | |
| NO963571D0 (en) | Digital signal receiver that can receive data that is encrypted and sent in direct processing | |
| TW431114B (en) | Hardware structure and formation for inverse quantization and multi-channel processing of MPEG-II audio signal decoding | |
| EP1176753A3 (en) | Method and system for sychronizing serial data | |
| MY147569A (en) | Method and apparatus for isolating noise from a tuner in a television signal receiver | |
| ATE317567T1 (en) | DIGITAL BUS SYSTEM | |
| ATE259121T1 (en) | RESYNCHRONIZER WITH CLOCK SIGNAL OF BIT PARTS FOR HIGH-SPEED MESSAGE TRANSMISSION SYSTEM M | |
| HK1038424A1 (en) | Data encoding/decoding device and apparatus using the same | |
| MXPA04001917A (en) | Sequence counter for an audio visual stream. | |
| ATE457489T1 (en) | SIGNAL PROCESSING SYSTEM | |
| KR970010086B1 (en) | Apparatus for transmitting multiplexed bit stream with moving image & audio signal for use in decoding system | |
| KR930006533B1 (en) | Coder and decoder of digital tv | |
| SE9601813L (en) | Device for digital signal processing of audio signals with different sampling frequencies | |
| YU69602A (en) | Fast codec having high compression ratio and minimum resources required thereof | |
| JPS57150217A (en) | Digital signal processing circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GD4A | Issue of patent certificate for granted invention patent | ||
| MM4A | Annulment or lapse of patent due to non-payment of fees |