TW430987B - Manufacture method of DRAM capacitor - Google Patents

Manufacture method of DRAM capacitor

Info

Publication number
TW430987B
TW430987B TW087113894A TW87113894A TW430987B TW 430987 B TW430987 B TW 430987B TW 087113894 A TW087113894 A TW 087113894A TW 87113894 A TW87113894 A TW 87113894A TW 430987 B TW430987 B TW 430987B
Authority
TW
Taiwan
Prior art keywords
insulated
layer
opening
layers
conduction
Prior art date
Application number
TW087113894A
Other languages
Chinese (zh)
Inventor
Jin-Lung Wu
Chiuan-Fu Wang
Original Assignee
United Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by United Microelectronics Corp filed Critical United Microelectronics Corp
Priority to TW087113894A priority Critical patent/TW430987B/en
Application granted granted Critical
Publication of TW430987B publication Critical patent/TW430987B/en

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Abstract

A manufacture method of DRAM capacitor is introduced. Provide a substrate on which is already formed gate, source/drain and sequentially covered with the first and second insulated layers. The first insulated layer is formed with a first opening to expose the source/drain area and the second insulated layer is formed with a second opening to expose the first opening. Then make a conduction layer on the second insulated layer to fill in the first opening and touch the source/drain area and fill substantially in the second opening. Form the third insulated layer to cover the conduction layer and fill in the second opening. Remove a part of the third insulated and conduction layers till exposing the second insulated layer. Then remove a part of the second and third insulated layers such that a certain thickness is kept on the first insulated layer and partial sidewall of the conduction layer is exposed. Form a conductive spacer on the exposed sidewall of the conduction layer and then remove the second and third insulated layers to expose the surface of bottom electrode of the capacitor.
TW087113894A 1998-08-24 1998-08-24 Manufacture method of DRAM capacitor TW430987B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW087113894A TW430987B (en) 1998-08-24 1998-08-24 Manufacture method of DRAM capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW087113894A TW430987B (en) 1998-08-24 1998-08-24 Manufacture method of DRAM capacitor

Publications (1)

Publication Number Publication Date
TW430987B true TW430987B (en) 2001-04-21

Family

ID=21631118

Family Applications (1)

Application Number Title Priority Date Filing Date
TW087113894A TW430987B (en) 1998-08-24 1998-08-24 Manufacture method of DRAM capacitor

Country Status (1)

Country Link
TW (1) TW430987B (en)

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Legal Events

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GD4A Issue of patent certificate for granted invention patent