TW429475B - Method for forming interlayer insulative layers of semiconductor device - Google Patents

Method for forming interlayer insulative layers of semiconductor device

Info

Publication number
TW429475B
TW429475B TW088120748A TW88120748A TW429475B TW 429475 B TW429475 B TW 429475B TW 088120748 A TW088120748 A TW 088120748A TW 88120748 A TW88120748 A TW 88120748A TW 429475 B TW429475 B TW 429475B
Authority
TW
Taiwan
Prior art keywords
layer
forming
interlayer insulative
semiconductor device
interlayer
Prior art date
Application number
TW088120748A
Other languages
Chinese (zh)
Inventor
Yasushi Yamazaki
Original Assignee
Nippon Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co filed Critical Nippon Electric Co
Application granted granted Critical
Publication of TW429475B publication Critical patent/TW429475B/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76819—Smoothing of the dielectric
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76828—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. thermal treatment

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

The method for forming interlayer insulative layers of a semiconductor device comprises the steps of forming the first interlayer insulative layer on a semiconductor substrate, forming a conductive layer on the first insulative layer, forming the first wiring layer by patterning the conductive layer via a photolithography process, forming the second interlayer insultive layer on the the first interlayer insulative layer and the first wiring layer, flattening a surface of the second interlayer insulative layer by a chemical and mechanical polishing method, and heat-treating the second interlayer insulative layer in a nitrogen or oxygen atmosphere at 850 DEG C to 900 DEG C.
TW088120748A 1998-11-30 1999-11-25 Method for forming interlayer insulative layers of semiconductor device TW429475B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10340260A JP2000164713A (en) 1998-11-30 1998-11-30 Formation of interlayer insulating film in semiconductor device

Publications (1)

Publication Number Publication Date
TW429475B true TW429475B (en) 2001-04-11

Family

ID=18335246

Family Applications (1)

Application Number Title Priority Date Filing Date
TW088120748A TW429475B (en) 1998-11-30 1999-11-25 Method for forming interlayer insulative layers of semiconductor device

Country Status (3)

Country Link
JP (1) JP2000164713A (en)
KR (1) KR20000035750A (en)
TW (1) TW429475B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114683162B (en) * 2020-12-29 2023-09-12 中芯集成电路（宁波）有限公司 Planarization process method

Also Published As

Publication number Publication date
KR20000035750A (en) 2000-06-26
JP2000164713A (en) 2000-06-16

Similar Documents

Publication Publication Date Title
EP1063686A3 (en) Method of silicide formation in a semiconductor device
AU2003301057A8 (en) Methods of forming semiconductor mesa structures including self-aligned contact layers and related devices
EP0363689A3 (en) Semiconductor devices manufacture using selective epitaxial growth and poly-si deposition in the same apparatus
TW200608519A (en) Semiconductor device and manufacturing method therefor
EP0406025A3 (en) Method for fabricating a semiconductor device in which an insulating layer thereof has a uniform thickness
TW337590B (en) Manufacture of semiconductor device having reliable and fine connection hole
EP1148543A3 (en) Semiconductor device and process of manufacturing the same
EP0371861A3 (en) High density semiconductor structure and method of making the same
EP1289004A3 (en) Semiconductor device manufacturing method
TW429475B (en) Method for forming interlayer insulative layers of semiconductor device
TW346664B (en) Mixed-mode IC separated spacer structure and process for producing the same
TW429523B (en) Method of manufacturing semiconductor device
EP1006566A3 (en) Film forming equipment
TW373314B (en) Method for forming multi-layered wiring in semiconductor device
WO2002013240A3 (en) Method for forming aluminum lines over aluminum-filled vias in a semiconductor substrate
TW350973B (en) Semiconductor and semiconductor layout
KR970007829B1 (en) Fabricating method of semiconductor device
TW324836B (en) The manufacturing process of self-aligned silicide, CMP, self-aligned silicide semiconductor
KR970003616A (en) Method of forming interlayer insulating film of semiconductor device
TW344104B (en) Method for reducing pattern alignment deviation in multi-layer metal production process
GB2381382A (en) Method of producing an organic light-emissive device
TW339465B (en) The method for planarization metal interdielectric layer
JPS6412551A (en) Formation of multilayer interconnection
JP2741799B2 (en) Method for manufacturing semiconductor device
KR970000705B1 (en) Multi-level metalizing method of semiconductor device

Legal Events

Date Code Title Description
GD4A Issue of patent certificate for granted invention patent
MM4A Annulment or lapse of patent due to non-payment of fees