TW424279B - Chemical etching method for removing hard mask in semiconductor process - Google Patents

Chemical etching method for removing hard mask in semiconductor process Download PDF

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Publication number
TW424279B
TW424279B TW88114506A TW88114506A TW424279B TW 424279 B TW424279 B TW 424279B TW 88114506 A TW88114506 A TW 88114506A TW 88114506 A TW88114506 A TW 88114506A TW 424279 B TW424279 B TW 424279B
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Taiwan
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etching
silicon
etching method
hard mask
wet
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TW88114506A
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Chinese (zh)
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Ruei-Jen Huang
Yi-Yu Shiu
Jian-Luen Yang
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United Microelectronics Corp
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Abstract

The present invention discloses a chemical etching method for removing a hard mask in a semiconductor process, particularly for etching SiON. The method is implemented by two steps: removing SiON by a low energy dry etching, and completely removing the SiON by a hot phosphoric acid wet etching. The above mentioned method can increase the etching rate of SiON for further carrying out the HSG step. The present invention not only can generate better etching effects for SiON hard mask, but also can be used for other thin hard mask such as SiN film in etching process.

Description

42^279- 五、發明說明(1) 5-1發明領域:42 ^ 279- V. Description of the invention (1) 5-1 Field of invention:

本發明係有關於一 學蝕刻方法。 稜铃半 導體製程中去除硬光罩的化 5-2發明背景 在隨機記憶體的製程ψ 〇 程中,隨著製程技術的進:,尤其在動態隨機記憶體的製 寸會愈來愈趨向於極小北的,可以預見的,未來的元件尺 勺原子尺寸。 目前生產線上的線寬p % &制^ S + 4次微米的寬度,如〇. 18微米 。:tn 半導體之高積集度邁進。回顧近 十數年,自有電腦的產生以來,因隨機記憶體(Ram)廣泛 的使用於各相,使得f求量快速增加。特別是應用 於電腩硬體之寊讯產業。同時更不只使用於資訊產業,一 般亦應用於大型積體電路(LSI)與極大型積體電路(VLSI) 及超大型積體電路(ULSI)方面。無疑地,即使下一個世紀 來臨,隨機記憶體(RAM)之製程技術仍然佔有資訊產業中 相當重要的地位。 在製程中,化學上的蝕刻技術(Chemical以仏化“是 其中不可或缺的步驟之一。〆般傳統上對於所s胃的硬光罩 層(Hard Mask)去除時,如氮化矽(S 13化)、氮氧矽化合物 (SiON)及氧化矽(Si02),多以加熱至800 ^的熱磷酸(IPO4The present invention relates to a method for etching. 5-2 Invention of removing the hard mask in the process of the prism bell semiconductor. BACKGROUND OF THE INVENTION In the process of the random memory process, as the process technology advances, especially in the dynamic random memory process, it will increasingly tend to Extremely small, foreseeable, atomic dimensions of future elements. The current line width p% & system ^ S + 4 micron width, such as 0.18 microns. : Tn Semiconductor's high degree of accumulation is moving forward. Looking back on the past ten years or so, since the birth of the computer, the amount of f has increased rapidly due to the widespread use of random memory (Ram) in each phase. Especially used in the telecommunications industry of electronic hardware. At the same time, it is not only used in the information industry, it is also commonly used in large integrated circuit (LSI), very large integrated circuit (VLSI), and ultra large integrated circuit (ULSI). Undoubtedly, even in the next century, the process technology of random memory (RAM) still occupies a very important position in the information industry. In the process, chemical etching technology (Chemical to chemical conversion) is one of the indispensable steps. Generally, when the hard mask of the stomach is removed, such as silicon nitride ( S13), silicon oxynitride (SiON) and silicon oxide (Si02), most of which are heated phosphoric acid (IPO4) heated to 800 ^

笫4頁 五、發明說明(2) )作為製程中的银刻液以進行去除。 絕緣Ϊ若以氧切作為硬光罩時,其缺點是在電容下層的 層栌疋虱化矽,且此薄氮化矽層較易在除去氧化石夕 或電容的過蝕(0veretching)時,也會同時—併被去 于、故製程上多以氮化矽或氮氧矽化合物作為硬光罩之使 用。 、/如上所述,儘管氮氧矽化合物對整體製程較好;但在 ,行去除氮氧矽化合物的過程時,若無法將氮氧矽化合物 完全去除,會進而阻礙半球狀結晶的長成。而一般氮氧矽 化合物通常可以濕蝕刻法,如熱磷酸,或乾蝕刻法去除。 ,長時間的熱磷酸作用,亦不易長成所需尺寸的半球狀結 f ’更會降低電容。故為嘗試獲得較好的選擇性半球狀結 ,,以熱磷酸之濕蝕刻法完成蝕刻製程。但熱磷酸蝕刻氮 氧石夕化合物的時間约為8 0埃/分鐘,故去除氮氧矽化合物 會消耗相當長的時間。 由於傳統方法會產生不良的選擇性半球狀結晶,因其 含能之原子(Energetic Atoms)或原子團(Radicals)會穿 透過矽(a - S i 1 i c ο η )原子表面’使得矽原子無法遷移而形 成選擇性半球狀結晶。此緩慢的敍刻速度與不良選擇性半 球狀結晶的產生’確會嚴重影響製程之高要求與高良率。 正如以上所述’有鑑於改善與提高隨機動態記憶體(DRAM) 之製程技術的需求,因此,亟待一新製程方法及其結構之 提出,以改善上述之問題’並改善元件品質及其製造效率 五、發明說明(3) 5-3發明目的及概述 舳列Ϊΐΐ述之發明背景中,傳統以濕韻刻法的熱磷酸以 蝕更先罩所產生的諸多缺點,本發明以兩步驟據以實施 如能量的乾韻刻法去除氮氧砍化合物,並再以濕蝕 划法兀王清除氮氧矽化合物。 本發明係一種於動態隨機存取記憶體製程中除去一氮 氧夕化δ物的方法,其步驟為·以低能量的乾姓法钱刻 氮氧矽化合物,使得氮氧矽化合物的厚度達到约少於1 〇 〇 埃。而上述之低能量的乾蝕刻法是以高氮氧矽化合物/二 2砍^刚爪〇2)蚀刻選擇比的電装兹刻法。最口後以熱 二li iP〇4\之、濕蝕刻法蝕刻剩餘厚度約不到100埃的氮氧 |s . !_n ,藉以完全清除氮氧矽化合物。濕蝕刻的時間約 ν於300秒且濕蝕刻的蝕刻率約為每分鐘8〇埃。 法 ίΐ:餘ΓίΠ以增加氮氧梦化合物之麵料,隨後並 =Ξ;ίΓ晶的步驟。且本發明亦更包侧 矽斗ί ί以上戶ί ΐ之方法’本發明提供了-種以增加氮氧 Γ如银刻之時間少於300秒。且無含能 ::與原子團之產纟,進而不會穿透過矽原子表面 球狀結晶。本發明不只應用於 w化合物’亦可應用於餘刻製程的氮化石夕、氮氧石夕化笫 Page 4 5. Description of the invention (2)) As the silver engraving solution in the process for removal. The disadvantage of using an oxygen cut as a hard mask for the insulation layer is that the silicon layer is ticked in the layer below the capacitor, and this thin silicon nitride layer is easier to remove oxidized oxide or capacitor over-etching (0veretching). It will also be used at the same time-and therefore, silicon nitride or silicon oxynitride compounds are often used as hard masks in the manufacturing process. As mentioned above, although the oxynitride compound is better for the overall process, if the oxynitride compound cannot be completely removed during the process of removing the oxynitride compound, it will further hinder the growth of hemispherical crystals. Generally, silicon oxynitride compounds can be removed by wet etching, such as hot phosphoric acid, or dry etching. For a long time, the effect of hot phosphoric acid is not easy to grow into a hemispherical junction f 'of the required size, and the capacitance will be reduced. Therefore, in order to try to obtain a better selective hemispherical junction, the wet etching method of hot phosphoric acid is used to complete the etching process. However, the time for hot phosphoric acid to etch the oxynitride compound is about 80 Angstroms / minute, so it will take a considerable time to remove the oxynitride compound. The traditional method will produce bad selective hemispherical crystals, because its energetic atoms (Radicals) will penetrate through the surface of silicon (a-S i 1 ic ο η), making silicon atoms unable to migrate Instead, selective hemispherical crystals are formed. This slow engraving speed and the generation of poorly selective hemispherical crystals' will indeed seriously affect the high requirements and high yield of the process. As mentioned above, “In view of the need to improve and improve the process technology of random dynamic memory (DRAM), it is urgent to propose a new process method and structure to improve the above problems” and improve component quality and manufacturing efficiency. V. Description of the invention (3) 5-3 Purpose of the invention and summary of the background of the invention In the background of the invention described in the traditional wet phosphoric acid phosphoric acid etching method to cover many disadvantages, the present invention is based on two steps The dry-etching method such as energy is used to remove the nitrogen-oxygen compound, and then the wet-etching method is used to remove the nitrogen-oxygen compound. The invention relates to a method for removing a nitroxyl δ substance in a dynamic random access memory system. The steps are as follows: the nitrogen oxide silicon compound is carved with a low-energy dry surname, so that the thickness of the nitrogen oxide silicon compound reaches About less than 100 Angstroms. The above-mentioned low-energy dry etching method is a densification etching method with a high nitrogen oxide silicon compound / silicon claw 2) etching selection ratio. At the end, the oxynitride | s.! _N with a thickness of less than about 100 angstroms is etched by a wet etching method using thermal lithography, so as to completely remove the silicon oxynitride. The wet etching time is about ν in 300 seconds and the etching rate of the wet etching is about 80 angstroms per minute. Method ίΐ: Yu ΓίΠ to increase the fabric of nitrogen and oxygen compounds, followed by ==; ΓΓ crystal step. In addition, the present invention also includes a method of silicon buckets, and the above method. The present invention provides a method to increase nitrogen and oxygen, such as the time of silver engraving, which is less than 300 seconds. And there is no energetic :: and plutonium production, so it will not penetrate through the spherical crystals on the surface of silicon atoms. The present invention is not only applied to the compound w ', but can also be applied to nitrite and oxynitride in the remaining processes.

第6頁 發明說明⑷ a物頰的薄硬光罩。 明顯本與其他目#,特徵和優點更能 細說:Μ,下文特列出較佳實施例並配合所附圖式,作詳 〕~4圖式簡單說明: 第一圖式本發明之實施流程圖。 第二Α至第二D圖式本發明之主要蝕刻部份圖。 本發明圖中主要部份之代表符號: 21 氮氧矽化合物 22 半球狀結晶 21〇 半導體底材 211 淺溝渠隔離(Shallow Trench Isolation) 212 間極(Gate) ’亦或字元線(Word Line) 213 位元線 214 電容接觸窗(Capacitor Contact),亦或結點接 觸窗(Capacitor Contact) 215 無晶型石夕(Amorphous-Silicon),亦為電容(Page 6 Description of the invention ⑷ a thin hard mask on the cheek. Obviously this and other items #, the features and advantages can be explained in more detail: M, the preferred embodiments are listed below in conjunction with the attached drawings, for details] ~ 4 diagrams briefly explain: The first diagram of the implementation of the present invention flow chart. The second A to the second D patterns are the main etching parts of the present invention. The representative symbols of the main part of the figure of the present invention: 21 oxynitride silicon compound 22 hemispherical crystal 21 semiconductor substrate 211 Shallow Trench Isolation 212 Gate 'or word line 213 bit line 214 Capacitor Contact, or Capacitor Contact 215 Amorphous-Silicon, also a capacitor (

Capacitor) 21 6 A ' 2 1 6B 内介電層(I nter-Layer Di e 1 ectr i c)Capacitor) 21 6 A '2 1 6B Inner-Layer Di e 1 ectr i c)

424279 五 發明說明(5) 〜5發明詳細說明 範結構:j i發明:ξ ί。本發明的描述會先配合以-示 製造和本發明的優點會在之後描述。 敎彳土方法會於隨後討論。 會限雖然本發明以—個實施例來說明,,此描述不 嘗限制本發明的範圍或應用。而相ι个 ίΓ二:Γ瞭較,主要的部份可能以相關的部份 這此 I發明的半導體兀件不會限制結構的說明。 證明本發明和呈現的較佳實施例之實用性 在隨機記憶體,特別是動態隨機記憶體,於蝕刻電容 的1程,,本發明以兩步驟據以實施,如第一圖之流程所 =·如第一圖1 〇 1之先以低能量的乾蝕刻法去除氮氧矽化 。物,二是再以第一圖102之濕蝕刻法完全清除氮氧矽化 合物。最後進行如第一圖1〇3之半球狀結晶過程。此外並 提供第二圖以作詳細說明。圖中之標號分別為:21為氮氧 石夕化合物,2 2為半球狀結晶,2 1 0為半導體底材,2 11為淺 溝渠隔離(Shallow Trench Isolation),212 為閘極(Gate )’亦或字元線(Word Line),213為位元線,214為電容接 觸窗(Capacitor Contact),亦或結點接觸窗(Capacit〇r424279 Fifth invention description (5) ~ 5 invention detailed description Fan structure: j i invention: ξ ί. The description of the present invention will first be described in conjunction with the manufacturing and the advantages of the present invention will be described later. The earth-moving method will be discussed later. Limitations Although the present invention is illustrated by one embodiment, this description does not limit the scope or application of the present invention. In contrast, the main parts may be related parts. The semiconductor elements of the invention do not limit the description of the structure. To prove the practicability of the present invention and the preferred embodiment presented in random memory, especially dynamic random memory, in the process of etching the capacitor, the present invention is implemented in two steps, as shown in the flow of the first figure = · Remove nitrogen oxide silicide by low energy dry etching method as shown in the first figure 101. Second, the wet-etching method of the first figure 102 is used to completely remove the silicon oxynitride compound. Finally, the hemispherical crystallization process as shown in the first figure 103 is performed. In addition, a second figure is provided for detailed explanation. The symbols in the figure are: 21 is the oxitride compound, 22 is a hemispherical crystal, 2 10 is a semiconductor substrate, 2 11 is Shallow Trench Isolation, and 212 is a gate. Or word line, 213 is bit line, 214 is capacitive contact window (Capacitor Contact), or node contact window (Capacit〇r

Contact) , 215為無晶型矽(Amorphous-Silicon),亦為 電容(Capacitor),以及216A,216B為内介電層(Contact), 215 is Amorphous-Silicon, also Capacitor, and 216A, 216B are internal dielectric layers (

第8頁 42421 § 五、發明說明(6) ;Page 42 42421 § V. Description of the invention (6);

Inter-Layer Dielectric)。 故在第二A圖中,以低能量,高氮氧矽化合物/二氧化 矽(SiON/Si〇2)蝕刻選擇比的電漿氣體作為乾^刻法去除 位於無晶型矽之電容21 5上,厚度達800埃的氮氧梦化合物 層2 ί ’且大部份的氮氧矽化合物硬光罩,可被乾鉍刻法的 低能原子團清除。然所剩氮氧矽化合物層的厚度要少於 1 0 0埃。 又、 第二Β圖中’使用熱磷酸的濕蝕刻法β此熱磷酸能移 去厚度不到1 00埃的剩下氮氧矽化合物層21。故製程時間 要少於傳統技術的800秒,約只有3 0 0秒。此時熱磷酸的蝕 刻率約為每分鐘可蝕刻80埃》且最後可完全清除氮氧矽化 合物層2 1 ’如第二C圖,而不影響無晶型矽之電容2丨5。 如第二D圖’將非晶質矽(Amorphous Silicon)置入 低壓化學氣向沉積反應爐(LPCVD)中,以0.5至1托耳(torr ),510 °C到5 50 °C的條件下處理,之後以沉—丨濕式清潔法 ’且以稀釋濃度為1%的氫氟酸(Diiute HF)清除所含之自 然氧化層(Native Oxide Layer )。之後再載入化學氣相沉 積反應爐中。反應爐已加熱並維持在7 〇 〇。〇至8 〇 〇。〇,此時 送入晶片預熱之’待約60秒後,即開始導入矽乙烷(Si2H6) 氣體’且其通入氣體之壓力保持在1〇_5托耳(T〇rr)。即原 先未通入虱體%約1〇-8托耳(T〇rr)之間。通入氣體之流 量約為1 0seem(標準每分鐘每立方公分)。同時晶片繼續升 溫’溫度約在6 0 0 cC 。最後如前述第二D圖所示,此過程 中可使晶片表面長出半球狀結晶,故稱半球狀結晶法。Inter-Layer Dielectric). Therefore, in Figure A, the plasma gas with low energy and high nitrogen oxide silicon compound / silicon dioxide (SiON / SiO2) etching selection ratio is used as a dry etching method to remove the capacitor located in the amorphous silicon 21 5 On the other hand, the oxynitride layer 2 with a thickness of 800 angstroms and most of the oxynitride silicon hard mask can be removed by the low-energy atomic group of the dry bismuth etching method. However, the thickness of the remaining oxynitride layer is less than 100 angstroms. In the second figure B, the wet etching method using thermal phosphoric acid β, this thermal phosphoric acid can remove the remaining silicon oxynitride layer 21 having a thickness of less than 100 angstroms. Therefore, the process time is less than 800 seconds of traditional technology, and only about 300 seconds. At this time, the etching rate of the hot phosphoric acid is about 80 angstroms per minute, and the oxynitride layer 2 1 ′ can be completely removed at the end as shown in the second C figure, without affecting the capacitance of the amorphous silicon 2 5. As shown in the second figure D, Amorphous Silicon is placed in a low-pressure chemical gas deposition reactor (LPCVD) under the conditions of 0.5 to 1 torr and 510 ° C to 5 50 ° C. After the treatment, the natural oxide layer (Native Oxide Layer) was removed by using a “dii—wet cleaning method” and a dilute concentration of 1% hydrofluoric acid (Diiute HF). It was then loaded into a chemical vapor deposition reactor. The reaction furnace has been heated and maintained at 700. 〇 to 8 〇. 〇 At this time, after the wafer is preheated, ‘after about 60 seconds, the introduction of silicon (Si2H6) gas’ is started, and the pressure of the inlet gas is maintained at 10-5 Torr. That is, the lice body had not penetrated between about 10-8 Torr. The gas flow rate is about 10 seem (standard per cubic centimeter per minute). At the same time, the temperature of the wafer continues to rise to about 600 cC. Finally, as shown in the aforementioned second D diagram, during this process, hemispherical crystals can be grown on the wafer surface, so it is called a hemispherical crystal method.

五 '發明說明(7) 1-- 根據以上所述之方法,本發明提供了—種以增加氮氧 矽化合物之蝕刻率’如蝕刻之時間少於3〇〇秒。且無含能 原子與原子團之產生,進而不會穿透過矽原子表面,矽原 子因,可遷移形成選擇性半球狀結晶.本發明不只能有效 清除氮氧矽化合物’且如氮化矽類的薄硬光罩亦可於電容 #刻的製私使用。且可具體地增加餘刻率。更可提高晶圓 廠之整體產能(Throughput)。 —般濕蝕刻(WetEtching)的化學反應屬於液相與固相 的反應。當濕钱刻進行時’溶液的反應物將利用擴散效應 (Diffusion ),通過一厚度相當薄的邊界層(B〇undary L a y e r)’以達被银刻薄膜的表面《然後,這些反應物將與 薄膜表面的分子產生化學反應’生成各種生成物。而這些 位於薄膜表面的生成物’也將利用擴散效應通過邊界層到 溶液裡,並隨著溶液排除。 同時濕蝕刻的進行是沒有固定方向性的,亦就是所謂 的等向性#刻。濕钱刻反應的主管參數有:溶液密度、触 刻時間、反應溫度及溶液的攪拌方式等四項。溫濕蝕刻本 身屬於一種化學反應’所以蝕刻溶液的濃度愈高,或是溫 度愈高,移除薄膜的速度亦愈快。 而在此處’通常所謂的乾敍刻(Dry Etching)多以電 漿(P1 asma)技術進行,而非以濕的溶液來進行薄膜侵蝕的 技術。因蝕刻反應不涉及溶液,故稱之為乾蝕刻。而其優 點為可進行非等向(An i sot ropy)性敍刻。對於乾飯刻而言 ’其選擇性(S e 1 e c t i v i t y )要比濕触刻法來的差。除此之V. Description of the invention (7) 1-- According to the method described above, the present invention provides a method to increase the etching rate of the silicon oxynitride compound, such as the etching time is less than 300 seconds. And there is no generation of energetic atoms and atomic groups, and it will not penetrate through the surface of silicon atoms. Silicon atoms can migrate to form selective hemispherical crystals. The present invention can not only effectively remove silicon oxynitride compounds, but also silicon nitride-based Thin hard reticle can also be used for private use. And the remaining rate can be specifically increased. It can also improve overall throughput of the fab. —The chemical reaction of wet etching is a reaction between liquid phase and solid phase. When wet money is engraved, 'the reactants of the solution will use the diffusion effect (Diffusion) to pass through a relatively thin boundary layer (BOOundary Layer)' to reach the surface of the silver engraved film "then, these reactants will Produces chemical reactions with molecules on the surface of the film to produce various products. And these products on the surface of the thin film will also use the diffusion effect to pass through the boundary layer into the solution and be eliminated with the solution. At the same time, the wet etching process has no fixed directionality, which is the so-called isotropic #etching. The main parameters of the wet coin reaction are: solution density, contact time, reaction temperature, and solution stirring method. The temperature and humidity etching itself is a kind of chemical reaction ’, so the higher the concentration of the etching solution, or the higher the temperature, the faster the film is removed. Here, the so-called Dry Etching is usually performed by plasma (P1 asma) technology instead of wet film etching technology. Because the etching reaction does not involve a solution, it is called dry etching. The advantage is that it can be anisotropic (An i sot ropy). For dry rice engraving, its selectivity (S e 1 e c t i v i t y) is worse than that of wet touch engraving. Except this

第10頁 424¾.卞§Page 10 424¾. 卞 §

句性亦是衡量乾蝕刻好 f愈快,表示產量愈大 品質的控制愈完善,晶 外’敍刻速率(Ething Rate)與均 壞的主要依據。若乾钕刻的姓刻速 ,蝕刻的均勻性愈高,則代表晶片 片的良率(Yield)愈好。 〕车:二:上戶ϋ 2 Ϊ办,—種只有钱刻隨機記憶體(RAM ^丰,體中,預備作為電容使用的無晶型矽上的氮氧矽化 合物(SiON),並進而長成半球狀結晶的方法,或是進一步 银刻動態隨機記憶體(DRAM)半導體中,預備作為電容使用 的無晶型矽上的氮氧矽化合物(Si0N)並進而長成半球狀結 晶的方法,可包含了: 一進行乾#刻法; 二再進行濕蝕刻法。 綜合兩法之優點,以共同進行化學敍刻製程。其優點 是可藉以増加氮氧矽化合物之蝕刻率’並產生較好的半球 狀結晶尺寸。 而所提出的乾蝕刻法包含了低能量乾蝕刻法。而另〜 種的濕蝕刻法就包含了熱磷酸(H3P〇4)触刻法。且本發明的 應用範園亦更包含了敍刻IL化石夕。 根據以上所述,僅為本發明之較佳實施例而已,並非 用以限定本發明之申請專利範圍;凡其它未脫離本發明所 揭示之精神下所完成之等效改變或修飾1均應包含在下逑 之申請專利範圍内。Sentence is also the main basis for measuring the better dry etching, the faster f, which means the larger the output, the better the quality control, the extra-crystal's Eating Rate and the average damage. The surname speed of several neodymium engravings, the higher the uniformity of the etching, the better the yield of the wafer. 〕 Car: Two: Ueto ϋ 2 Ϊ, a kind of RAM with only money engraved in RAM (RAM ^ Feng, in the body, prepare silicon oxynitride (SiON) on amorphous silicon used as a capacitor, and further grow A method of forming a hemispherical crystal, or a method of further preparing a silicon oxynitride (Si0N) on amorphous silicon used as a capacitor in a silver-etched dynamic random memory (DRAM) semiconductor, and then growing into a hemispherical crystal. It can include: a dry etching process; a wet etching process. The advantages of the two processes are combined to carry out the chemical engraving process. The advantage is that the etching rate of the nitrogen oxide silicon compound can be increased and a better result can be generated. The size of the hemispherical crystal. The proposed dry etching method includes a low-energy dry etching method. The other wet etching method includes a thermal phosphoric acid (H3P04) touch engraving method. The application park of the present invention It also contains the description of the fossil of the IL. According to the above, it is only a preferred embodiment of the present invention, and is not intended to limit the scope of the patent application of the present invention; all others can be completed without departing from the spirit disclosed by the present invention. Equivalent change 1 or modifications should be included within the scope of the following patent application of Alex.

第11頁Page 11

Claims (1)

4 24279 '4 24279 '' ,一種於半導體製程中去除硬光罩層的化學蝕刻方法,龙 令該蝕刻方法至少包含: /、 以低能量的乾蝕刻法蝕刻該硬光罩,使得該硬光 厚度達到約少於1 〇 〇埃;及 ’ 以濕ϋ刻法蚀刻剩餘厚 藉以完全清除該硬光罩,該 該濕蝕刻的蝕刻率約.為每分 刻法可於製程中藉以增加該 製程半球狀結晶的產生。 度約不到1 0 0埃的該硬光罩, 濕蝕刻的時間約少於3 0 〇秒且 鐘8 0埃;該乾蝕刻法與該濕、蚀 硬光罩之蝕刻率,並以利後續 其中上述之方法包含飯 2·如申請專利範圍第1項之方法 刻氮氧石夕型硬光罩。 3 -如申請專利範圍第工項之方法,其中上述低能量的乾齒 /法至少包含高氮氧矽化合物/二氧化矽(si〇N/Si〇^蝕 選擇比的電漿蝕刻法。 其中上述濕I虫刻法至少 其中上述之方法更包含 4_如申請專利範圍第1項之方法 包含熱磷酸(h3po4)蝕刻法。 5.如申請專利範圍第1項之方法 蝕刻氮化矽型硬光罩。A chemical etching method for removing a hard mask layer in a semiconductor process. The etching method at least includes: /, etching the hard mask with a low-energy dry etching method, so that the thickness of the hard light reaches about less than 1 〇 Angstroms; and 'The remaining thickness of the wet etch is used to completely remove the hard mask, and the wet etch has an etching rate of about. The minute etch method can be used to increase the production of hemispherical crystals in the process. The hard mask with a degree of less than 100 angstroms has a wet etching time of less than 300 seconds and 80 angstroms; the dry etching method and the etching rate of the wet and etched hard masks are beneficial The above-mentioned method includes the following steps: 2. The oxynitride-type hard photomask is engraved according to the method in the first item of the patent application scope. 3-The method according to the first item of the scope of patent application, wherein the above-mentioned low-energy dry tooth / method includes at least a plasma etching method with a high nitrogen oxide silicon compound / silicon dioxide (si0N / Si〇 ^ etch selection ratio. At least one of the above wet I insect engraving methods includes the above-mentioned method 4_ If the method of the scope of patent application No. 1 includes a thermal phosphoric acid (h3po4) etching method. Photomask. 第12頁 六、申請專利範圍 的方法,其中該蝕刻方法至少包含·· 以低能量的乾蝕刻法蝕刻該氮氧矽化入 氧矽化合物的厚度達到約少於1〇〇埃;及。物,使得該氮 以熱磷酸(HsP〇4 )之濕蝕刻法蝕刻剩餘 ::該氮氧矽化合物’藉以完全清除該氮氧石广化人不物到 :童=的:秒且該濕㈣的物:為 〇矣’该乾蝕刻法與該濕蝕刻法可藉以增加氮氧矽化合 物之银刻率,隨後並繼續進行產生半球狀結晶的步驟。 7,如申請專利範圍第6項之方法,其中上述低能量的乾蝕 J法至少包含高氮氧矽化合物/二氧化矽(si 0N/si 02)蝕刻 選擇比的電漿蝕刻法。 8.如令請專利範圍第6項之方法,其中上述之方法更包含 钱刻氮化矽型硬光罩。 、Page 12 6. A method of applying for a patent, wherein the etching method includes at least a low-energy dry etching method to etch the silicon nitride oxide into silicon oxide compound to a thickness of less than about 100 angstroms; and Material, so that the nitrogen is etched by the wet etching method of hot phosphoric acid (HsP〇4) :: the oxynitride compound is used to completely remove the oxynitride. : 矣 ′ The dry etching method and the wet etching method can be used to increase the silver etching rate of the silicon oxynitride compound, and then the step of generating hemispherical crystals is continued. 7. The method according to item 6 of the patent application range, wherein the above-mentioned low-energy dry etching J method includes at least a plasma etching method with a high nitrogen oxide silicon compound / silicon dioxide (si 0N / si 02) etching selection ratio. 8. If the method according to item 6 of the patent is requested, the above-mentioned method further includes a silicon etched silicon nitride type hard mask. ,
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