A7 B7 1 5 五、發明説明（ 主J發明之領域及背斧： 當欲使用測試平台測試—待測物是否為功能正常，首关 冽4平台必須先自我測試内部之機件是否正常。測試平台 如測試航空用之電機裝置，此類測試平台内部有相當多: 7關’這些開關主要有雙刀單投開關，單刀雙投開關等。 小系統之測試平台大約有5〇〇〜6 0 0個開關，而大系统之 測試平台大約有2_:3_個開關。在大系統之測試平台 在先自我測試内部之開關所耗費之時間大約要兩小時。譬 如一架大型飛機起飛之前即需要對飛機内部之各項 置偵測是否正常’妈若測試平台自我測試之時間太過冗 長J必肩延長飛機起飛之時間。由於傳統之測試方法是 針？：一開關測試其『連通』（0N)狀態及斷路』（off)A7 B7 1 5 V. Description of the invention (Master J's field of invention and back axe: When you want to use the test platform to test-whether the object to be tested is functioning properly, you must first test whether the internal parts are normal. Test There are quite a lot of platforms for testing electrical equipment for aviation. There are quite a lot of these types of test platforms: 7-off 'These switches are mainly double-pole single-throw switches, single-pole double-throw switches, etc. The test platform for small systems is about 500 ~ 60. 0 switches, and the large system test platform has about 2_: 3_ switches. The time it takes for the large system test platform to self-test the internal switches first takes about two hours. For example, a large aircraft needs to take off before it takes off Is it normal to detect the internal settings of the aircraft? If the test platform's self-test time is too long, J must extend the take-off time of the aircraft. Because the traditional test method is needle ?: A switch to test its "connectivity" (0N ) Status and Open Circuit "(off)
^態是否正常，故一N個開關而言，總共測試次數為2N 次，且為單一開關作測試，其電路結構負擔增加。故如何 減少自我測試之時間是需要的。 其目的釦祐早· 本發明之主要目的係減少測試平台針對内部雙刀單投開 關自我測試之時間。 本發月之再目的係減化測試平台内之雙刀單投開關測 試電路結構。 為達成上述< 目的，本發明雙刀單投開關測試電路結構 在每f刀單投開關之高輸入端及低輸入端，分別與前一 個開關< 南輸出端及低輸出端串接，但第一個開關之高輸 娜尺度^~~--— (請先閲讀背面之注項再填寫本頁 I" ί1-1·裝 訂-------,___ ^#部中女^.半.^1^.1法於合 ei!.The state is normal, so for an N switch, the total number of tests is 2N, and the test for a single switch increases the circuit structure burden. Therefore, how to reduce the time of self-test is needed. The purpose of the invention is to reduce the time. The main purpose of the present invention is to reduce the test platform's self-test time for the internal double-pole single-throw switch. The purpose of this month is to reduce the structure of the double-pole single-throw switch test circuit in the test platform. In order to achieve the above-mentioned object, the double-pole single-throw switch test circuit structure of the present invention is connected in series with the south switch and the low-output end of the previous switch at the high input and low input of each f-pole single-throw switch. But the first switch's high-definition scale ^ ~~ --- (Please read the note on the back before filling in this page I " 1-1 · Binding -------, ___ ^ # 部 中 女 ^ .Half. ^ 1 ^ .1Method Yuhe ei !.
·HI t - - I 4 2 4- ] 5 1 4 A7 -—------------B 7 五、發明説明（）） 一 入％與低輸入端與一測量電阻裝置串接。另外每一開關之 向輸出端及低輸出端與一測試用電阻並接。· HI t--I 4 2 4-] 5 1 4 A7 ------------- B 7 V. Description of the invention ()) One input% and low input terminal and one measuring resistance device Concatenation. In addition, the directional output and low output of each switch are connected in parallel with a test resistor.
在測試上述之電路結構之每一雙刀單投開關是否運作正 常，首先先將所有雙刀單投開關設定『斷路』（〇FF)，狀 態，接著量測電阻値是否為無限大或接近無限大？若是則 確知第1開關『斷路』（〇FF )狀態正常。接著依序將最接 近測量電阻裝置且仍為『斷路』（0FF)狀態之雙刀單投開 關段足『連通』（0N )狀態，並量測電阻値是否正確？以測 知該開關『連通』（ON)狀態是否正常，且確定下一個連接 之開關『斷路』（〇FF )狀態是否正常。如此之測試方 式’在一般開關皆正常之程序，僅要N + i次，較傳統之2N 次節省近一半之次數，且測試線路也因而簡化，能節省測 試平台内之線路。 由於本發明確有增進功效，故依法申請發明專利。 圖式簡簞説明： 第1圖係測試平台使用時之簡易示意圖。 第2圖係本發明關於雙刀單投開關測試電路結構。 第3圖係本發明關於對該電路結構測試之方法。 圖號説明： 雙刀單投開關測試電路結構1 〇 雙刀單投開關20 高輸入端21 本紙張纽;种韻 $料.( 210x297/if ) -- -----I ---- _ri __—1------- 丁 ---_ ____ _ Ax • f + 「 (誚先閱讀背面之注意事項再填寫本頁) 424ΐ5ί ^ Α7 高輸出端23 咼閘刀2 5 測試用電阻3 〇 儀器71 待測物用輸出入淳γ 6 待測物8 0 Β7 '發明説明（彡） 低輸入端2 2 低輸出端2 4 低閘刀2 6 測試平台7 0 測量電阻裝置7 3 電腦用輸出入蟑7 7 電腦90 控J秦具體實例之評細説明： 請參見第1圖有關一測試平台7〇使用時之簡易示意圖。 ，試平台70内部主要具有複數之儀器71，以及複數個雙刀 單投開關20 (圖中僅顯示雙刀單投開關2〇，亦可能包含其 他種開關’但圖未示），另外待測物用輸出入埠76係與待 測物8 0相接用，而電腦用輸出入埠77係與電腦9〇連接，其 中内部有相當多之線路連接上述之構件，由㈣於測試平、 台^如何測試待測物80，以及如何以電腦9〇控制該等測試 功能並非本發明探討之主題，故對於整個測試平台詳細 架構並不在此探討。 本發明是針對測試平台7 〇内部之雙刀單投開關測試電路 、·《構1 0提出一個新的架構，使得測試平台7 〇對於複數個雙 刀早投開關20是否正常之自我測試之時間能夠減少。請參 見第2圖之雙刀單投開關測試電路結構丨〇。 每一雙刀單投開關20具有一高輸入端21，一低輸入端 22，—高輸出端23，一低輸出端24，一高閘刀25以及一 _尺度璁用中明家標·，2,_屬_ -------..——Ί装------訂 ί (詞先閱讀背面之注意事項再填Κ?本頁) ί·'···.:;!·ϊΐΓ‘·=~ 々.找^而幻' Τ-消贽 Αε ΪΪΓ^印·»·:4 42415] A7 B7 五、發明说明（斗 低閘刀2 6，其中高閘刀2 5及一低閘刀2 6具同步開關作用， 使得雙刀單投開關2 0具有兩種狀態，一種為r連通』 (ON )狀態，此時高輸入端21與高輸出端23成連通狀態且 低幸則入2 2與低輸出端2 4亦成連通狀態，另—種為『斷 路』（OFF) ’狀態’此時高輸入端21與高輸出端23成斷路 狀態且低輸入端2 2與低輸出端2 4亦成斷路狀態。 在線路接法上如第2圖所示，每一開關2 〇之高輸入端2 } 及低輸入端22，分別與前一個開關2〇之高輸出端23及低輸 出端2 4串接，但第一個開關2 〇之高輸入端2 1與低輸入端 2 2與一測量電阻裝置7 3串接，當然最後一個開關2 〇之高輸 出端2 3及低輸出端2 4不再與任一開關2 〇串接。 另外每一開關2 〇之高輸出端2 3及低輸出端2 4與一測試 用®阻3 0並接，在本實施例中，測試用電阻3 〇之電阻値大 小相同並等於2 〇 K。 以下及説明如何以快速之方法測試雙刀單投開關測試電 路結構1 0，由於電腦㈣本來就可控制測試平台7 〇 (傳統之 自我測試亦由電腦90搭配應用程式所完成），故實際上亦 應由電腦9 〇透過執行電腦程式而達成。 叫參見第3圓，先將所有開關2 〇設定〇 f ρ狀態，透過測 里電阻裝置73量測電阻値是否為無限大或接近無限大？若 $的話，則確.知第i開關『斷路』（〇FF)狀態正常，並繼 二下步驟；若不是的話，則確知第1開關^以狀態不正 ^先進行替換不正常之雙刀單投開關2 0後再重新測試。 接著將—計數器n，設定為丨，將第η開關2 〇 (此時為 ⑽尺度进 ---一---_--Η·.装------訂 (銷先閱讀背面之注意事項再4寫本頁) ^24 15 1」矜 A7 B7 訂 Tl' η ϊ\ 消 Λ Vi 印 發明説明（夕） 第1開關）設定Ο N狀態，再量測電阻値，由於第2開關 為OF F狀態，若第1開關之〇N狀態正常以及第2開關之 OFF狀態正常，則此時之電阻値應為2〇κ/η (並連電阻之 方式計算’此時為2 0 Κ )，若電阻値不為2 〇 κ，則確知第 1開關之0 Ν狀態及第2開關之〇 F F狀態至少有一個是不 正常’此時先進行替換不正常之雙刀單投開關2 〇後再重 新測試。 接下來將最接近測量電阻裝置7 3且仍為『斷路』（〇 F F ) 狀態之雙刀單投開關2 0設定『連通』（〇 Ν )狀態，亦即將計 數器η加1，此時η變為2，所以將第2開關設定〇 Ν狀態，再 量測電阻値，由於第3開關為〇 F F狀態，同理第2開關之0 Ν 狀％正常以及第3開關之0 F F狀態正常，則此時之電阻値應 為2 0 Κ / η (此時為1 〇 κ )，若電阻値不為1 〇 κ，即確知第2 開關之⑽狀態及第3開關之OFF狀態至少有一個是不正常。 如此繼續依序將下一開關設定⑽狀態，再量測電阻値直到 量測至最後一個雙刀單投開關2 〇。而電腦程式之流程圖即 表現如第3圖。 需注意的是，上述僅為實施例，而非限制於實施例。譬 如測試用電阻3 0之電阻値大小相同的好處在於計算電阻値 方便，但是測試用電阻3 〇之電阻値大小可不相同，而依照 並連電阻之方.式計算，此不脱離本發明基本架構者，皆應 為本專利所主張之權利範園，而應以專利申請範圍為準。 縱上所陳，本案無論就目的，手段及功效，在在顯示其 迴異於習知技術之特徵，由於本發明確有增進功效，故依 ί - - m I. - I ί. 士卜 ί li - _ _ I I 丁 (対先閱讀背面之注意事項再填i?5本頁) 本紙張尺度过用中國H家標吟(C'KS ) ( 210x 297^^ ) A7 424151 -¾ B7 五、發明説明（G ) 法申請新型專利。懇請 貴審查委員明察，並析早曰賜予 專利，俾嘉惠社會，實感德便。 _ if I it _ __ i n 士.___丁 ( 分 'V* (誚先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中SS家標啥（「NS ) Μ規格（2!〇x297it )In testing whether each double-pole single-throw switch of the above circuit structure works normally, first set all the double-pole single-throw switches to "open" (〇FF), and then measure whether the resistance 値 is infinite or close to infinite. Big? If yes, make sure that the status of the first switch "open circuit" (〇FF) is normal. Then, the two-pole single-throw switch that is closest to the resistance measuring device and still in the "open" (0FF) state is in the "connected" (0N) state, and the resistance is measured correctly? To determine whether the switch "ON" status is normal, and to determine whether the next connected switch "open" (〇FF) status is normal. This test method ’is a normal procedure for general switches. It only takes N + i times, which saves nearly half the number of times compared with the traditional 2N times, and the test circuit is simplified, which can save the lines in the test platform. Since the present invention does have an enhanced effect, an invention patent is applied for in accordance with the law. Brief description of the diagram: The first diagram is a simple diagram when the test platform is used. Fig. 2 is a circuit diagram of a double-pole single-throw switch test circuit according to the present invention. FIG. 3 is a method for testing the circuit structure of the present invention. Drawing number description: Double-pole single-throw switch test circuit structure 1 〇Double-pole single-throw switch 20 high-input end 21 paper buttons; seed rhyme $ material. (210x297 / if)------ I ---- _ri __— 1 ------- Ding ---_ ____ _ Ax • f + "(诮 Please read the notes on the back before filling in this page) 424ΐ5ί ^ Α7 High output end 23 咼 刀 刀 2 5 For testing Resistance 3 〇Instrument 71 I / O for test object 6 Test object 8 0 B7 'Invention (彡) Low input 2 2 Low output 2 4 Low gate 2 6 Test platform 7 0 Measuring resistance device 7 3 Computer input and output cock 7 7 Computer 90 Control of J Qin Detailed description of specific examples: Please refer to Figure 1 for a simple schematic diagram of the use of a test platform 70. The test platform 70 mainly has a plurality of instruments 71 and a plurality of Two double-pole single-throw switches 20 (only two-pole single-throw switches 20 are shown in the figure, and other types of switches may also be included, but not shown). In addition, the I / O port 76 of the device under test is in phase 0 with the device under test 80. It is connected, and the computer's I / O port 77 is connected to the computer 90. Among them, there are quite a few internal lines to connect the above components. How to test the object under test 80 and how to control these test functions with a computer 90 are not the subject of the present invention, so the detailed architecture of the entire test platform is not discussed here. The present invention is directed to the double-blade order inside the test platform 70 Throw switch test circuit, "Architecture 10 proposes a new architecture, so that the test platform 7 can reduce the time for self-testing whether a plurality of double-pole early-throw switches 20 are normal. See Figure 2 for double-pole single-throw Switch test circuit structure 丨 〇. Each double-pole single-throw switch 20 has a high-input terminal 21, a low-input terminal 22, a high-output terminal 23, a low-output terminal 24, a high-gate knife 25, and a _ scale. Use the Zhongming family logo ·, 2, _ 属 _ -------..—— Outfit ------ Order ί (read the notes on the back before filling in the page?) Ί · '···.:;! · ΪΐΓ' · = ~ 々. Find ^ 而 幻 'Τ- 消 贽 Αε ΪΪΓ ^ 印 · »: 4 42415] A7 B7 V. Description of the invention Among them, the high-knife 25 and the low-knife 26 have synchronous switching functions, so that the double-pole single-throw switch 20 has two states, one is the r-connected (ON) state. When the high input terminal 21 and the high output terminal 23 are in a connected state, the low input terminal 2 and the low output terminal 2 4 are also in a connected state. Another type is "OFF" (state). At this time, the high input terminal 21 and The high-output terminal 23 is in an open state, and the low-input terminal 2 2 and the low-output terminal 2 4 are also in an open-circuit state. As shown in Figure 2 on the line connection, the high input 2 of each switch 2} and the low input Terminal 22 is connected in series with the high output terminal 23 and the low output terminal 24 of the previous switch 20, but the high input terminal 2 1 and the low input terminal 2 2 of the first switch 20 and a measuring resistance device 7 3 In series, of course, the high output terminal 23 and the low output terminal 24 of the last switch 2 0 are no longer connected in series with any of the switches 2 0. In addition, the high output terminal 23 and the low output terminal 24 of each switch 2 are connected in parallel with a test resistance 30. In this embodiment, the resistance 値 of the test resistance 3 0 is the same and equal to 2 0K. . The following and explain how to test the double-pole single-throw switch test circuit structure 10 by a fast method. Since the computer can originally control the test platform 7 (the traditional self-test is also completed by the computer 90 with the application program), it is actually It should also be achieved by computer 90 through the execution of computer programs. Refer to the third circle. First set all switches 2 0 to 0 f ρ. Measure whether the resistance 透过 is infinite or nearly infinite through the resistance measuring device 73. If it is $, then it is confirmed that the state of the i-th switch "open circuit" (〇FF) is normal, and then follow the next two steps; if not, then it is known that the first switch ^ is not in the correct state ^ first replace the abnormal double-pole single Retest after turning on the switch 20. Next, set the —counter n to 丨 and set the nth switch 2 〇 (at this time, enter the ⑽ scale ------------equipment --- order (pin first read the back of the (Notes, please write this page again) ^ 24 15 1 ″ 矜 A7 B7 Order Tl 'η ϊ \ Λ Vi Print the description of the invention (Even) 1st switch) Set the 0 N state, and then measure the resistance 値, because the 2nd switch It is the OF F state. If the ON state of the first switch is normal and the OFF state of the second switch is normal, the resistance 此时 at this time should be 20k / η (calculated by means of parallel resistance 'at this time it is 2 0 Κ ), If the resistance 値 is not 2 〇κ, then it is known that at least one of the 0 N state of the first switch and the 0FF state of the second switch is abnormal. At this time, the abnormal double-pole single-throw switch 2 that is abnormal is replaced first. Test again later. Next, set the double-pole single-throw switch 20 closest to the measuring resistance device 73 and still in the "open" (〇FF) state to the "connected" (〇Ν) state, which is also to increase the counter η by 1 at this time. Is 2, so the second switch is set to ON state, and then the resistance is measured. Since the third switch is 0FF state, the same is true for 0% of the second switch and 0FF state of the third switch is normal. The resistance 値 at this time should be 20 κ / η (10 κ at this time). If the resistance 値 is not 10 κ, it is known that at least one of the ⑽ state of the second switch and the OFF state of the third switch is not. normal. Continue to set the next switch in sequence, and then measure the resistance, until the last double-pole single-throw switch 2 is measured. The flow chart of the computer program is shown in Figure 3. It should be noted that the above are merely examples, and are not limited to the examples. For example, the advantage of the same resistance of the test resistor 30 is the convenience of calculating the resistance, but the resistance of the test resistor 30 can be different in size, and calculated according to the parallel resistance formula. This does not depart from the basics of the present invention. Architects should be the right model claimed by the patent, and the scope of patent application shall prevail. Throughout the report, regardless of the purpose, means, and effect of this case, it is showing its characteristics that are different from those of the conventional technology. Since the present invention does improve the efficacy, it is based on ί--m I.-I ί. 士卜 ί li-_ _ II Ding (I read the notes on the back first and then fill in the i? 5 page) This paper has been used in China's standard house (C'KS) (210x 297 ^^) A7 424151 -¾ B7 V. Invention Description (G) Law applies for a new patent. I urge your reviewing committee to make a clear observation and analyze the patents granted earlier. _ if I it _ __ in Shi .___ Ding (minus' V * (诮 Please read the precautions on the back before filling this page) This paper size is applicable to the SS family standard (“NS” Μ specifications (2! 〇x297it )