TW414931B - IC process compatible device fabrication method of the bolometer array - Google Patents

IC process compatible device fabrication method of the bolometer array Download PDF

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TW414931B
TW414931B TW88111349A TW88111349A TW414931B TW 414931 B TW414931 B TW 414931B TW 88111349 A TW88111349 A TW 88111349A TW 88111349 A TW88111349 A TW 88111349A TW 414931 B TW414931 B TW 414931B
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layer
aluminum
metal
titanium
array
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TW88111349A
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Chinese (zh)
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Jeng-San Jou
Meng Ouyang
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Metrodyne Microsystem Corp
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Abstract

This invention provides an IC process compatible device fabrication method of the bolometer array, in which the sensing device is the thermal isolating floating thin plate structure supported by the thin and long pins. The manufacturing characteristics of this invention are shown below. The metallization process of the integrated circuit (IC) is defined as the sacrificial layer design of the thermal sensing device. The material used to support the floating thin plate structure is fabricated by using the planarization technology of the dielectrics in the IC process, in addition, the step coverage problem occurred when manufacturing thin film sensing resistor on top of the floating thin plate structure is resolved. The aluminum or aluminum alloy with high temperature coefficient is selected to manufacture the thin-film sensing resistor. The whole manufacturing process of the bolometer in this invention is then completely compatible with the present commercial IC process.

Description

414931 五、發明說明(丨) 【發明的應用範圍】 本發明係有關一種與積體電路製程相容之紅外線熱感 測器陣列元件製造方法,利用特殊的製程設計,使得整個 紅外線熱感測器的製程完全與現階段商用的積體電路製程 相容,以利製造、生產而降低成本。 【習知相關技術】 紅外線熱感測器(b ο 1 〇 m e t e r )為利用具有高電阻溫度 係數(Temperature Coefficient of Resistance, T C R, % / o C )之材料作為感測電阻,因被測物體之溫度所產生之 紅外線熱輻射量造成感測電阻的阻值變化,透過電訊號讀 取、校正可以計量被測物體之溫度。影響紅外線熱感測器 特性好壞的主要因素為紅外線元件結構的熱傳導(t h e r m a 1 conduction)、熱容(thermal capacitance)及感測材料的 電阻溫度係數。低熱傳導結構的設計及南電阻溫度係數的 材料可以增加感測元件的響應度(r e s ρ ο n s i v i t y ),低熱容 的結構可以增加感測元件的反應速率。簡而言之,低熱導 、低熱容的結構及高電阻溫度係數材料是設計此一元件的 不二法門。 隨著1 9 8 0年代微加工技術之發展,具有高度絕熱效果 (低熱導)的懸浮薄板結構(薄板結構可以降低熱容)使感 測元件之答應度和響應速率大幅提升,紅外線熱感測器的 發展有了更長足的進步。由於利用石夕微加工技術和積體電 路製程可以將感測器微小化、積體化,除了傳統單一元件 的製作外,更提供單石體陣列(monolithic array)製作的414931 V. Description of the invention (丨) [Scope of application of the invention] The present invention relates to a method for manufacturing an infrared thermal sensor array element compatible with the integrated circuit manufacturing process, and uses a special process design to make the entire infrared thermal sensor The manufacturing process is completely compatible with the commercial integrated circuit manufacturing process at the current stage, in order to facilitate manufacturing and production and reduce costs. [Knowledge related technology] Infrared thermal sensor (b ο 1 〇meter) is to use a material with a high temperature coefficient of temperature (Temperature Coefficient of Resistance, TCR,% / o C) as the sensing resistance. The amount of infrared thermal radiation generated by the temperature causes the resistance value of the sensing resistor to change, and the temperature of the measured object can be measured by reading and correcting through electrical signals. The main factors that affect the characteristics of an infrared thermal sensor are the thermal conductivity of the infrared element structure (t h e r m a 1 conduction), the thermal capacitance, and the temperature coefficient of resistance of the sensing material. The design of the low thermal conductivity structure and the material of the south temperature coefficient of resistance can increase the response of the sensing element (r e s ρ ο n s i v i t y), and the structure of the low thermal capacity can increase the response rate of the sensing element. In short, low-conductivity, low-heat-capacity structures, and high-resistance temperature coefficient materials are the only ways to design this component. With the development of micromachining technology in the 1980s, the suspended sheet structure (thin plate structure can reduce heat capacity) with a high thermal insulation effect (low thermal conductivity) has greatly improved the degree of response and response rate of the sensing element. Infrared thermal sensing The development of the device has made more progress. The sensor can be miniaturized and integrated by using Shixi micro-machining technology and integrated circuit manufacturing process. In addition to the traditional single element manufacturing, monolithic array manufacturing is also provided.

414931 五、發明說明(2) 、 , 可行性。由於陣列元件可取得紅外線影像,更延伸此—元 件的應用範圍包括了 :軍事偵防、汽車夜視、醫療檢測、 工業自動化檢測及保全監視方面的溫度分佈之影像計量與 紅外線影像監測等。相關的技術及所使用的感測電阻材& 可參考:Wood et al. ,1988(氧化鈕(VOx)) ; Liu et al 1992(多晶石夕(P〇ly-Si)) ;Hornbeck et al., 1990(非晶 石夕(amorphous Si)) ; Tanaka e t al· ,1995(鈦(Ti)) 〇 在相關陣列元件技術的發展上,犧牲層(s a c r i f i c i a 1 1 a y e r )方法是最常被利用來增加元件密度(降低晶片面積) 及提高元件填充率(fin factor)(所謂的填充率其定義 為懸浮薄板感測面積/畫素(P i X e 1 )面積,其所對應為入射 熱輻射對於感測元件的照射比率)。其製作方式先將電路 的部份在矽晶片上定義製作,再開始製作感測元件部份, 首先製作犧牲層材料及蝕刻定義出形狀,再將結構及感測 電阻材料定義於其上,最後再蝕刻犧牲層將結構釋放出來 即完成此一元件之製作° 習用之犧牲層材料為高分子材料(光阻)、多晶.石夕 (poly-Si)及非晶石夕(amorphos Si),這一些材料雖然相容 於積體電路製程’卻不是直接取自標準的製造流程中,而 是必須特別定義額外添加的步驟(例如厚度),平添製造過 稃中的麻煩。同時在定義這一些犧牲層材料的形狀時s必 須也考慮其邊緣(s i d e w a 1 1 )頃斜度問題,用以克服製作 於其上方的薄膜金屬導線與周遭電性連接時可能面對的階 梯跨越(step coverage)所導致的斷線問題,通常這一問414931 V. Description of the invention (2), Feasibility. As the array element can obtain infrared images, this is further extended-the application range of the element includes: image measurement and infrared image monitoring of temperature distribution in military reconnaissance and defense, automotive night vision, medical inspection, industrial automation inspection and security monitoring. Related technologies and sensing resistors used can be found in: Wood et al., 1988 (VOx); Liu et al 1992 (Poly-Si); Hornbeck et al., 1990 (amorphous Si); Tanaka et al., 1995 (titanium (Ti)). In the development of related array element technology, sacrificia 1 1 ayer method is the most commonly used method. Use to increase element density (reduce chip area) and increase element fill factor (fin factor) (the so-called fill factor is defined as the suspended sheet sensing area / pixel (P i X e 1) area, which corresponds to incident heat Ratio of radiation to the sensing element). The manufacturing method first defines a circuit part on a silicon wafer, and then begins to manufacture a sensing element part. First, a sacrificial layer material and an etching are defined to define a shape, and then a structure and a sensing resistance material are defined thereon. The etching of the sacrificial layer releases the structure to complete the production of this element. The materials of the sacrificial layer used are polymer materials (photoresist), polycrystalline silicon (poly-Si), and amorphous silicon (amorphos Si). Although these materials are compatible with the integrated circuit manufacturing process, they are not directly taken from the standard manufacturing process, but must additionally define additional steps (such as thickness) to add trouble to the manufacturing process. At the same time, when defining the shape of these sacrificial layer materials, s must also consider the slope of its edges (sidewa 1 1), to overcome the step span that the thin-film metal wires fabricated above and the surroundings may face when electrically connected. (Step coverage) disconnection problem, usually this problem

第5頁 414931 五、發明說明¢3) 、 題的解決可以透過熱回流(r e f 1 ow )或調整活性離子蝕刻 (R I E )的參數設定以得到頃斜的邊緣以利導線跨越。然而 具有頃斜邊緣的犧牲層也會犧牲掉部分懸浮薄板的面積, 因而降低其填充率。Page 5 414931 V. Description of the invention ¢ 3) The problem can be solved by thermal reflow (r e f 1 ow) or adjusting the active ion etching (R I E) parameter setting to obtain a beveled edge to facilitate the wire crossing. However, the sacrificial layer with beveled edges also sacrifice the area of a part of the suspended sheet, thereby reducing its filling rate.

至於感測材料的選擇,除了高電阻溫度係數的考量外 ,材料本身的Ι/f雜訊也是另一重要因素。目前習用的感 測材料有:氧化釩(V Ο X )、多晶矽(ρ ο 1 y - S i )、非晶矽 (amorphous Si)、鈦(Ti)以及白金(Pt)等。其中,氧化鈒 的電阻溫度係數在常溫之下高達2 % / °C ,為鋁、鈦及白金 等金屬材料的四至十倍,使得氧化釩因其高電阻溫度係數 而最常被應用於此一類型感測器上。然而,氧化釩材料並 不與積體電路製程相匹配,因此在製作上紅外線感測器的 部份需與其相關的積體電路部份(如:金氧半電晶體等)分 開製造,使得整個製程複雜且成本高昂,而且此一材料的 製作需要精準的控制以得到穩定的薄膜品質和組成,其材 料的Ι/f雜訊也比一般金屬來的高。至於一般積體電路製 程中常見的多晶矽材料或非晶矽材料,雖具有與積體電路 製程相匹配、可降低製造成本的優點,但是多晶矽材料與 非晶矽材料的1 / f雜訊卻太高,應用在紅外線感測器上的 結果並不好 至於割習用之金屬材料以鈦紅外線熱感測器最為常 見,鈦薄膜電阻的溫度係數雖然僅有0 . 2 3 % / °C (相較於氧 化釩僅約為其十分之一),然而金屬鈦本身與積體電路製 程相容,且金屬材料的1 / f雜訊均遠低於其他半導體材料As for the selection of the sensing material, in addition to the consideration of the high temperature coefficient of resistance, the I / f noise of the material itself is another important factor. The currently used sensing materials are: vanadium oxide (V Ο X), polycrystalline silicon (ρ ο 1 y-S i), amorphous silicon, titanium (Ti), and platinum (Pt). Among them, the temperature coefficient of resistance of hafnium oxide is as high as 2% / ° C at room temperature, which is four to ten times that of metal materials such as aluminum, titanium, and platinum. Vanadium oxide is most commonly used for this because of its high temperature coefficient of resistance. Type sensor. However, the vanadium oxide material does not match the integrated circuit manufacturing process, so the part of the infrared sensor to be manufactured needs to be manufactured separately from its related integrated circuit part (such as metal oxide semiconductors, etc.), so that the entire The manufacturing process is complex and costly, and the production of this material requires precise control to obtain stable film quality and composition, and the I / f noise of its material is also higher than that of general metals. As for the polycrystalline silicon material or amorphous silicon material commonly used in general integrated circuit manufacturing processes, although it has the advantage of matching the integrated circuit manufacturing process and can reduce manufacturing costs, the 1 / f noise of polycrystalline silicon materials and amorphous silicon materials is too high. High, the results applied to infrared sensors are not good. Titanium infrared thermal sensors are the most common metal materials used for cutting. Although the temperature coefficient of titanium film resistance is only 0.23% / ° C (compared to (Vanadium oxide is only about one tenth of that), however, titanium metal itself is compatible with integrated circuit manufacturing processes, and the 1 / f noise of metal materials is much lower than other semiconductor materials.

第6頁 五、發明說明(4) (包括氧化釩 (0. 22WK-lcm 接導線 傳導。 雜比(s 感測元 全匹配 熱特性 擇電阻 將更能 【發明 因 程相容 程設計 以提升 本 之紅外 提升紅 牲層係 不需要 為簡化 .根 容之紅 相關的 與底部 綜合上 i g n a 1 件差, ,使之 的情況 溫度係 提升金 之目的 此,本 之紅外 中選用 紅外線 發明之 線熱感 外線元 利用積 另外加 據上述 外線熱 積體電 414931 、多晶矽等),再加上鈦本身的低熱傳導係數 1 ),使其作為支撐浮板的細長支腳上方的連 電路連接時,能有效降低感測元件的固體熱 述之優點,使得鈦紅外線熱感測器整體的訊 to noise ratio, S/N)並不fc匕上述之氧4匕 且基於材料的製作容易與積體電路製程的完 更容易製造。然而若能在不影響元件的相關 下,改進其電阻溫度係數較低的缺點,而選 數較高且與積體電路相容的其他金屬材料, 屬紅外線熱感測器的性能。 與概述】 發明之主要目的在於提供一種與積體電路製 線熱感測器陣列元件製造方法,本發明之製 與積體電路相容且溫度係數高之感測材料, 元件的特性。 另一目的在於提供一種與積體電路製程相容 測器陣列元件製造方法,以一犧牲層之設計 件的填充率,以減少佈局的面積,而且該犧 體電路元件之鋁墊(I/O pad)製程來製作, 以定義,使得整個紅外線感測器製作流程更 之目的,本發明提供一種與積體電路製程相 感測器陣列元件製造方法,將與紅外線元件 路元件上方之金屬層作為紅外線感測器之犧5. Description of the invention on page 6 (4) (including vanadium oxide (0.222WK-lcm connected to the wire for conduction). The ratio (s) of the sensing element is fully matched to the thermal characteristics and the resistance will be better. The infrared enhancement of the red animal layer need not be simplified. The root-related red is related to the igna on the bottom comprehensively, so that its temperature is for the purpose of improving the gold. In this infrared, the infrared thermal line is used. The external line element uses the external line heat accumulation volume (414931, polycrystalline silicon, etc.), plus the low thermal conductivity of titanium itself1), which makes it effective as a connection circuit above the slender legs supporting the floating plate. The advantage of reducing the solid thermal profile of the sensing element makes the overall noise to noise ratio (S / N) of the titanium infrared thermal sensor not fc or the above-mentioned oxygen 4 and it is easy to manufacture based on materials and integrated circuit manufacturing process. End is easier to manufacture. However, if it can improve the shortcomings of the lower temperature coefficient of resistance without affecting the correlation of the components, the choice of other metal materials that are higher and compatible with the integrated circuit is the performance of the infrared thermal sensor. [Summary and Summary] The main object of the invention is to provide a method for manufacturing a linear thermal sensor array element with integrated circuit, which is compatible with the integrated circuit and has a high temperature coefficient of the sensing material and the characteristics of the element. Another object is to provide a method for manufacturing a detector array element compatible with the integrated circuit manufacturing process, which uses a filling rate of a sacrificial layer design to reduce the layout area, and the aluminum pad (I / O of the sacrificial circuit element) pad) manufacturing process to define and make the entire infrared sensor manufacturing process more objective. The present invention provides a method for manufacturing a sensor array element that is integrated with the integrated circuit manufacturing process, and uses the metal layer above the infrared element circuit element as a Sacrifice of Infrared Sensor

第7頁 414931 五、發明說明(5) 牲層,並以積體電路平坦化技術製作感測元件懸浮薄板的 結構材料,以金屬鋁或鋁合金製作感測電阻且利用低熱傳 導係數的鈦或鈦合金作為感測元件與電路的連接導線,使 得整個紅外線熱感測器製程完全與積體電路製程相容,並 提升紅外線元件的填充率以減少佈局的面積。 有關本發明之詳細技術内容及實施例,茲配合圖式說 明如后: 【圖式說明】 第1圖係為單一紅外線熱感測器的上視圖。 第2a圖為在一已具有積體電路元件及金屬内連線之 基底上形成一犧牲層後的晶圓沿著虛線aa方向切開之剖面 圖。 第2b圖為在整個晶圓表面上沈積一第一介電層後的 晶圓之剖面圖。 第2c圖為對晶圓上的鈇或鈦合金金屬層及紹或紹合 金金屬層進行定義蝕刻後,形成感測電阻與支腳連接導線 的晶圓之剖面圖。 第2 d圖為形成一光阻層覆蓋於該感測電阻上,以去 除支腳的銘或紹合金金屬層的晶圓之剖面圖。 第2e圖為在整個晶圓表面上沈積一第二介電層後的 晶圓之剖面.圖ϋ 第2 f圖為在晶圓表面上形成一黑體層後的晶圓之剖 面圖。 第2g圖為對晶圓上的第二介電層與第一介電層進行Page 7 414931 V. Description of the invention (5) Use the integrated circuit flattening technology to make the structural material of the sensing element suspension sheet, use metal aluminum or aluminum alloy to make the sensing resistance and use low thermal conductivity titanium or Titanium alloy is used as the connecting wire between the sensing element and the circuit, making the entire infrared thermal sensor process completely compatible with the integrated circuit process, and increasing the filling rate of the infrared element to reduce the layout area. The detailed technical content and embodiments of the present invention are described below with reference to the drawings: [Illustration of the drawings] FIG. 1 is a top view of a single infrared thermal sensor. Fig. 2a is a cross-sectional view of a wafer cut along the dotted line aa after a sacrificial layer has been formed on a substrate having integrated circuit elements and metal interconnects. Figure 2b is a cross-sectional view of a wafer after a first dielectric layer is deposited on the entire wafer surface. Figure 2c is a cross-sectional view of a wafer on which a rhenium or titanium alloy metal layer and a Shao or Shao alloy metal layer are defined and etched to form a sense resistor and a lead connecting wire. Figure 2d is a cross-sectional view of a wafer formed with a photoresist layer overlying the sensing resistor to remove the inscription of the legs or the metal layer of the alloy. Figure 2e is a cross-section of a wafer after a second dielectric layer is deposited on the entire wafer surface. Figure ϋ Figure 2f is a cross-sectional view of a wafer after a black body layer is formed on the wafer surface. Figure 2g shows the second dielectric layer and the first dielectric layer on the wafer.

414931 五、發明說明(6) 定義蝕刻後,形成至少一接觸窗,暴露出犧牲層的晶圓之 剖面圖。 第2 h圖為對晶圓去除犧牲層後的晶圓之剖面圖。 第3圖係為鋁矽銅的電阻溫度係數之量測數據圖。 第4圖係為晶圓沿著虛線bb方向切開得到之剖面圖。 第5圖係為以本發明製作之紅外線熱感測器陣列元件 的最小填充率對元件設計準則圖。 [發明之詳細說明】 請參閱「第1圖」所示,其係為單一紅外線熱感測器 的上視示意.圖。紅外線元件的懸浮薄板6係由二細長支腳7 支撐並連接到周邊的半導體基底1,而懸浮結構的製作則 是透過定義的接觸窗11 ,將底部的犧牲層(圖中未示)去除 以完成此一高度熱絕緣的結構。為了詳細說明前述懸浮結 構的製程,將「第1圖」沿著虛線aa方向切開,得到如「 第2a〜圖」所示之每一步驟的剖面圖,其中前述每一 步驟的細節詳述如下: 首先在半導體基底1上製作與紅外線元件相關之積體 電路元件2,該積體電路元件2製作完成後,並進一步製作 該積體電路元件2之金屬内連線。金屬内連線的、最後一層 金屬間介電層(IMD)3上覆有最後一道金屬層,整個積體電 路製程中省.略]最後一道金屬層上方的介電保護層 (p a s s i v a t i ο η ),以利後續感測元件之製作。本發明將最 後一道金屬層定義並蝕刻,除了部分保留為電路的輸入出 銘墊外(I / 0 p a d )(圖中未示),其餘定義為紅外線感測器414931 V. Description of the invention (6) Define the cross-sectional view of the wafer after etching to form at least one contact window and expose the sacrificial layer. Figure 2h is a cross-sectional view of the wafer after the sacrificial layer is removed from the wafer. Figure 3 is a measurement data chart of the temperature coefficient of resistance of aluminum silicon copper. FIG. 4 is a cross-sectional view obtained by cutting the wafer along the broken line bb direction. Fig. 5 is a diagram showing the minimum filling rate versus element design criteria for the infrared thermal sensor array element made by the present invention. [Detailed description of the invention] Please refer to "Fig. 1", which is a schematic top view of a single infrared thermal sensor. The suspension sheet 6 of the infrared component is supported by two elongated legs 7 and connected to the surrounding semiconductor substrate 1. The suspension structure is manufactured through a defined contact window 11 to remove the sacrificial layer (not shown) at the bottom to Complete this highly thermally insulated structure. In order to explain the manufacturing process of the suspension structure in detail, the "Figure 1" is cut along the dotted line aa direction to obtain a cross-sectional view of each step as shown in "Figure 2a ~ Figure", wherein the details of each of the foregoing steps are detailed below : First, an integrated circuit element 2 related to an infrared element is manufactured on a semiconductor substrate 1. After the integrated circuit element 2 is manufactured, a metal interconnection of the integrated circuit element 2 is further produced. The metal interconnect, the last intermetal dielectric layer (IMD) 3 is covered with the last metal layer, the entire integrated circuit manufacturing process is omitted. Omit] the dielectric protection layer (passivati ο η) above the last metal layer. To facilitate the production of subsequent sensing elements. In the present invention, the last metal layer is defined and etched. Except for a part reserved as an input / output pad of the circuit (I / 0 p a d) (not shown), the rest are defined as infrared sensors.

第9頁 414931 五、發明說明(7) 之犧牲層4,請參閱「第2a圖」,其為在一已具有積體電 路元件及金屬内連線之基底上形成一犧牲層後的晶圓之剖 面圖。定義該金屬内連線之最後一道金屬層以在該基底上 形成一犧牲層4的步驟為積體電路製程所包含的標準步驟 ,只需在光罩上同輸入出鋁墊一起定義,並不需要額外的 薄膜沈積、光刻過程,可以省略許多製程步驟。 在一已具有積體電路元件2及金屬内連線之基底1上形 成一犧牲層4後,以回触刻(e t c h b a c k )的技術在整個晶圓 上沈積一表面平坦的第一介電層5,請參閱「第2b圖」, 其係為在整個晶圓表面上沈積一第一介電層後的晶圓之剖 面圖。利用回钱刻技術的原因在於,晶圓表面在沈積第一 介電層5前即具有許多突起的電晶體閘極、金屬内連線層 、犧牲層4或銘墊等,因此塗覆第一介電層5後的晶圓表面 如未經任何平坦化處理亦會具有高低起伏的階梯(s t e p ), 使得紅外線元件的感測電阻因跨越不同高度的階梯而造成 斷線,因此需利用進一步的平坦化製程使晶圓表面平坦 化。本發明中用來平坦的回蝕刻的技術,在次微米的積體 電路製程中是標準化的步驟,然而在製作此一類型元件時 卻是首次定義。其步驟為(圖未示):先以旋塗法 (spin-on)沈積一第一介電層5於該基底1與該犧牲層4上, 該第一介電層5可為一般的旋佈型破璃(s p i η - ο n g 1 a s s )或 低介電常數高分子材料(low-k polymer),旋塗沈積第一 介電層5後之晶圓表面仍有高低的起伏,接著回#刻該第 一介電層5,得到平坦的表面,當然前述之回蝕刻步驟也Page 9 414931 V. Sacrifice layer 4 of the invention description (7), please refer to "Figure 2a", which is a wafer after forming a sacrificial layer on a substrate that already has integrated circuit elements and metal interconnects. Section view. The step of defining the last metal layer of the metal interconnect to form a sacrificial layer 4 on the substrate is a standard step included in the integrated circuit manufacturing process. It only needs to be defined on the photomask along with the input and output aluminum pads. Additional thin film deposition and photolithography processes are required, and many process steps can be omitted. After a sacrificial layer 4 is formed on a substrate 1 having integrated circuit elements 2 and metal interconnects, a first dielectric layer 5 having a flat surface is deposited on the entire wafer by an etchback technique. Please refer to "Figure 2b", which is a cross-sectional view of a wafer after a first dielectric layer is deposited on the entire wafer surface. The reason for using the money-back engraving technology is that the wafer surface has many protruding transistor gates, metal interconnect layers, sacrificial layers 4 or shims before the first dielectric layer 5 is deposited, so the first coating is applied. If the wafer surface after the dielectric layer 5 is not flattened, it will have undulating steps, so that the sensing resistance of the infrared element will be disconnected due to steps across different heights, so further use of The planarization process planarizes the wafer surface. The technique for flat etchback in the present invention is a standardized step in the sub-micron integrated circuit manufacturing process, but it was first defined when manufacturing this type of device. The steps are as follows (not shown): firstly, a first dielectric layer 5 is deposited on the substrate 1 and the sacrificial layer 4 by a spin-on method. The first dielectric layer 5 may be a general spin-on method. For cloth-shaped glass (spi η-ο ng 1 ass) or low-k polymer, spin-coating the first dielectric layer 5 on the wafer surface still has undulations, and then returns # 刻 此 第一 电 层 5, to obtain a flat surface, of course, the aforementioned etch back step also

第10頁 414931 五、發明說明(8) 可以包含化學機械研磨方式(CMP)。 在晶圓表面上沈積表面平坦之第一介電層5後,接著 沈積一鈦金屬或鈦合金於第一介電層5之上,再來沈積一 在呂或铭合金金屬於前述欽或鈦合金金屬層上,實際上此鈦 及鋁二金屬薄膜沉積步驟是目前積體電路工廠中鋁連線的 標準步驟,差別僅為厚度的定義而已,因此可完全匹配於 工薇之要求。定義前述欽或鈦合金金屬層與銘或紹合金金 屬層'其步驟為:塗覆一光阻層於前述銘或銘合金金屬層 上,再罩幕(mask)定義去除部份的铭或魅合金金屬層與其 下方之鈦或鈦合金金屬層,最後去除光阻層,藉此在前述 第一介電層5上形成由一鈦或欽合金金屬層及一紹或銘合 金金屬層所組成之感測電阻6 1與支腳連接導線7,如「第 2 c圖」所示,其係為對晶圓上的鈦或鈦合金金屬層與鋁 或鋁合金金屬層進行定義蝕刻後,形成感測電阻與支腳導 線的晶圓剖面圖。本發明係以金屬銘或銘合金作為感測材 料,來製作感測電阻,舉鋁矽銅為實施例,其溫度係數之 量測數據請參閱「第3圖」所示。 由「第3圖」之量測數據得到金屬鋁矽銅之溫度係數 係大於0 . 4 % / °C ,比習用之金屬鈦薄膜的溫度係數(僅 0 . 2 3 % / °C )大了許多,因此以鋁或鋁合金做為感測材料(鋁 或鋁合金的溫度係數與鋁矽銅的溫度係數相近)製作之紅 外線熱感測器的反應特性較之其他金屬會有比較好的特性 。更重要的是,金屬鋁或鋁合金是·積體電路製程中常見而 相容的材料,以鋁或鋁合金做為感測材料,可使感測電阻Page 10 414931 V. Description of the invention (8) may include chemical mechanical polishing (CMP). After the first dielectric layer 5 having a flat surface is deposited on the wafer surface, a titanium metal or a titanium alloy is then deposited on the first dielectric layer 5, and then a Lu or Ming alloy metal is deposited on the aforementioned silicon or titanium. On the alloy metal layer, this titanium and aluminum bimetal thin film deposition step is actually a standard step for aluminum wiring in integrated circuit factories at present. The difference is only the definition of thickness, so it can fully meet the requirements of Gongwei. To define the aforementioned metal alloy layer or metal alloy layer, the steps are: coating a photoresist layer on the metal alloy layer or metal alloy layer, and then removing the mask or charm by defining a mask. The alloy metal layer and the titanium or titanium alloy metal layer below it, and finally the photoresist layer is removed, thereby forming a layer consisting of a titanium or metal alloy layer and a metal alloy layer on the first dielectric layer 5. The sensing resistor 61 is connected to the supporting wire 7 as shown in "Figure 2c", which is defined by etching the titanium or titanium alloy metal layer and the aluminum or aluminum alloy metal layer on the wafer to form a sense. Measure the cross-section of the wafer with the resistance and the lead wire. The present invention uses a metal inscription or an alloy as a sensing material to make a sensing resistor. Taking aluminum silicon copper as an example, the temperature coefficient measurement data is shown in "Figure 3". According to the measurement data in "Figure 3", the temperature coefficient of the metal aluminum silicon copper is greater than 0.4% / ° C, which is larger than the temperature coefficient of the conventional metal titanium film (only 0.23% / ° C). Many, so the response characteristics of infrared thermal sensors made with aluminum or aluminum alloy as the sensing material (the temperature coefficient of aluminum or aluminum alloy is similar to that of aluminum silicon copper) have better characteristics than other metals . More importantly, metal aluminum or aluminum alloy is a common and compatible material in the integrated circuit manufacturing process. Using aluminum or aluminum alloy as the sensing material can make the sensing resistance

第11頁 414931 五、發明說明(9) 之製作與積體電路製程相容,簡化紅外線熱感測器之製程 並降低成本。此外,為了增加感測電阻的電阻值,以免電 阻負載(1 〇 a d i n g )大部份落在感測元件之外的連接導線電 阻上,鈦金屬的厚度最好小於0 . 2微米;鋁或鋁合金金屬 的厚度最好也小於0. 2微米,抑或採用次微米技術以製作 寬度更窄的感測電阻,抑或結合二者以製作之。 在第一介電層5上形成由一飲或鈦合金金屬層及一銘 或鋁合金金屬層所組成之感測電阻6 1與支腳7後,接著去 除該支腳7的鋁或鋁合金金屬層。請參閱「第2d圖」所 示,為了去除支腳7的鋁或鋁合金金屬層,但保留感測電 阻6 1的鋁或鋁合金金屬層,以光阻製程形成一光阻層8覆 蓋於該感測電阻6的區域及其他非位於支腳7上方的鋁或鋁 合金金属上,而露出支腳7。 利用光阻層8保護住感測電阻6 1及其他非位於支腳7上 方的铭或:!呂合金金屬後,以對紹或紹合金金屬與欽金屬有 高#刻率差異之選擇性钱刻去除支腳7的紹或紹合金金屬 層部份,使支腳7僅留下欽或欽合金金屬層部份。該银刻 溶液主要組成成份為磷酸、醋酸及硝酸,透過適當的比例 調配即可快速地蝕刻鋁或鋁合金(一分鐘約2微米),卻對 金屬钦有很低的银刻率,對銘或銘合金金屬與欽或鈇合金 金屬有良好的#刻選擇性。去除完_支腳7的紹或銘合金金 屬層部份後,再去除該光阻層8。此時,晶圓表面上形成 有由一铭或銘合金金屬層與一欽或欽合金金屬層所組成之 感測電阻6 1,以及由一鈦或鈦合金金屬所組成之支腳7。Page 11 414931 5. The invention (9) is compatible with the integrated circuit manufacturing process, which simplifies the manufacturing process of the infrared thermal sensor and reduces the cost. In addition, in order to increase the resistance value of the sensing resistor, so that most of the resistance load (10ading) does not fall on the resistance of the connecting wires outside the sensing element, the thickness of the titanium metal is preferably less than 0.2 microns; aluminum or aluminum The thickness of the alloy metal is also preferably less than 0.2 micrometers, or sub-micron technology is used to make a narrower sense resistor, or a combination of the two is used to make it. On the first dielectric layer 5, a sensing resistor 61 and a leg 7 composed of a drinking or titanium alloy metal layer and a metal or aluminum alloy metal layer are formed, and then the aluminum or aluminum alloy of the leg 7 is removed. Metal layer. Please refer to "Figure 2d", in order to remove the aluminum or aluminum alloy metal layer of the leg 7, but retain the aluminum or aluminum alloy metal layer of the sensing resistor 61, a photoresist layer 8 is formed by a photoresist process to cover the The area of the sensing resistor 6 and other aluminum or aluminum alloy metal not located above the leg 7 exposes the leg 7. The photoresist layer 8 is used to protect the sensing resistor 61 and other inscriptions that are not located above the leg 7 or:! Lu alloy metal, the selective money with a high #etch rate difference between Shao or Shao alloy metal and Qin metal The part of the metal layer of Shao or Shao alloy is etched and removed, so that only 7 part of metal layer of Chin or Chin alloy is left on foot 7. The main composition of this silver engraving solution is phosphoric acid, acetic acid, and nitric acid. Aluminium or aluminum alloy can be etched quickly (approximately 2 microns per minute) by mixing in an appropriate ratio. However, it has a very low silver engraving rate on metal. Orming alloy metal and Chin or rhenium alloy metal have good #etch selectivity. The photoresist layer 8 is removed after the shaw or metal alloy layer portion of the foot 7 is removed. At this time, the surface of the wafer is formed with a sensing resistor 61 composed of a metal alloy layer or metal alloy layer and a metal alloy layer or metal alloy layer, and a foot 7 composed of a titanium or titanium alloy metal.

第頁 414931 五、發明說明(ίο) 由於紅外線熱感測器在真空環境下主要係透過支腳將熱傳 至周圍的熱汲體基材,因此支腳材料的熱傳導係數對處於 真空環境下(< 1 0 - 2 Τ 〇 r r )的紅外線元件的熱導特性好壞有 決定性的影響。金屬鈦的熱傳導係數僅2 2 W / m _ °C,非常的 小(鋁矽銅的的熱傳導係數大於3 0 0 W / m - °C ),以金屬鈦做 為支腳的材料可以降低紅外線元件的固體熱傳導特性。是 以由本發明所提供之製程方法係形成由一鈦或鈦合金金屬 所組成之支腳(製程設計上去除該支腳的鋁或鋁合金金屬 層部份),以得到良好的熱導特性。Page 414931 V. Description of the invention (ίο) Since the infrared thermal sensor mainly transfers heat to the surrounding heat sink substrate through the foot in a vacuum environment, the thermal conductivity of the material of the foot is in a vacuum environment ( < The thermal conductivity characteristics of the infrared device of 1 0-2 Torr) have a decisive influence. The thermal conductivity of titanium metal is only 2 2 W / m _ ° C, which is very small (the thermal conductivity of aluminum silicon copper is greater than 300 W / m-° C). Using titanium as the material of the feet can reduce infrared rays The solid thermal conductivity of the component. The process method provided by the present invention is to form a foot made of a titanium or titanium alloy metal (the aluminum or aluminum alloy metal layer part of the foot is removed in the process design) to obtain good thermal conductivity characteristics.

再請參閱「第2e圖」,在晶圓表面上形成有由一鋁 或鋁合金金屬層與一鈦或鈦合金金屬層所組成之感測電阻 61,以及由一鈦或欽合金金屬層所組成之支腳7後,接著 在整個晶圓表面上沈積一第二介電層9,做為保護層 (passivation layer)。該第二介電層9材料製作方式可以 為前述之平坦化技術或可為一般之沈積保護方式,材料為 積體電路製程中常見的低溫氧化矽(silicon oxide)材料 或低溫氮化石夕(silicon nitride)材料,亦可為與第一介 電層5相同之材料。 在晶圓表面上沈積一第二介電層9後,接著形成一黑 體層10在該第二介電層9上,如「第2f圖」所示,其係為 在晶圓表面上.形成一黑體層後的晶圓之剖面圖。形成該黑 體層1 0的方法包括下列步驟(圖未示):先沈積一黑體材料 層於該第二介電層9上,該黑體材料可為金黑、白黑金、 鎳鉻或鈦等。再塗覆一光阻層於該黑體材料層上。接著罩Please refer to "Fig. 2e" again. A sensing resistor 61 composed of an aluminum or aluminum alloy metal layer and a titanium or titanium alloy metal layer is formed on the wafer surface, and a titanium or metal alloy layer is formed on the wafer surface. After forming the supporting leg 7, a second dielectric layer 9 is deposited on the entire wafer surface as a passivation layer. The second dielectric layer 9 can be made by the aforementioned planarization technology or a general deposition protection method. The material is a low-temperature silicon oxide material or a low-temperature nitride silicon oxide commonly used in integrated circuit manufacturing processes. The material of nitride may be the same as that of the first dielectric layer 5. After depositing a second dielectric layer 9 on the wafer surface, a black body layer 10 is then formed on the second dielectric layer 9, as shown in FIG. 2f, which is formed on the wafer surface. A cross-sectional view of a wafer behind a blackbody layer. The method for forming the black body layer 10 includes the following steps (not shown): first depositing a black body material layer on the second dielectric layer 9, the black body material may be gold black, white black gold, nickel chromium or titanium. A photoresist layer is coated on the black body material layer. Then hood

第13頁 414931 發 幕 應 對 相 - I 6 阻 電 測 感 與 在 只 層 料 材 體 黑 該 份 β— 咅 11)除 fv 去 明 說義 明定 黑阻 成光 完用 ’利 層或 阻抑 光; 該射 除輻 去線 後外 最紅 。的 10射 層入 體收 黑吸 該以 成’ 形作 方製 上的 域10 區層 的體 與 9 層 電 介二 第 該 份 ο βτ 立口 10除 層去 體, 黑後 該作 作製 製的 )-ο f 1 of層 t-體 f 1'' is: (1成 法完 剝 提 第4 4 該層 層 電 介 閱 參 請 以2 ,第 少 至 成 窗 觸 接 牲 犧 該 出 露 暴 層 電 介二 第 的 上 圓 晶 對 為 係 其 圖 露61 暴阻 ’ 電 窗測 觸感 接’ 一後 少11 至窗 成觸 形接 ’成 後形 刻。 银圖 義面 定剖 行之 進圓 層曰甜 電的 介層 一牲 第犧 與出 法 刻 板式 薄乾 浮或 懸法 一刻 成姓 形學 來化 起以 覆可 即 9 , 層 電後 雩4 介層 二牲 第犧 的出 份露 部暴 被 係 牲製 犧層 該屬 ,金 中道 法一 方後 程最 製之 之線 供連 提内 所屬 明金 發的 本件 在元 。路 4電 ®日 W體 牲 4幘 犧以 亥 去層 以 · 可層 ,牲 金犧 合該 的將 關程 相製 或屬 屬金 金鋁 Is去 為的 料用 材常 其程 , 製 作路 電 體 積 前 § 用 應 述.. 前酸 硝 ' 酸 磷 為 Γν 液 溶 刻 触 金 合 鋁 或 鋁 之 去酸 除 去 以 加 空腳 懸支 ρ. λ 咅^ h連 2相 第 厂 如 材 基 與 牲示 犧所 該 J 除 去 使 即 後 懸 β, 咅 底 該 而 此 藉 外 紅 成 完 得—線 懸 空 除與!之 用 使 或 抑 合底 混之 的d 板 酉 .f 薄 6 板 薄 浮 懸 熱 製 的 器 測 \tr 1 戶面6 J S阻 ]^ : 圖 電 4之測 到 第 感Γ得, Π .開t 如刀後 ,i 6 1向板 方薄 bb浮 線懸 虛至 著傳 沿能 J熱 圖收 1吸 ίι 板第ο 薄Γ 層 浮將體 懸係黑 該其在 作不圖 阻 電 測 感 數 有 具 内 能 熱 .的 到 收 吸 其 知 可 測 量 的 化 變 值 阻 電 由 經 值 阻 電。 變小 改大 第14頁 414931 五、發明說明(12) 由於該犧牲層最後被去除而形成紅外線元件懸空的部 份(亦即該犧牲層的區域對應了紅外線元件的懸浮薄板及 支腳區域),因此該犧牲層定義了紅外線元件的結構尺寸 大小。利用本發明之製程設計,可以使得整個製造流程完 整匹配於現有的積體.電路工廠製程,因此可以藉由工廠中 一的製程調整(僅在沈積厚度部分,因此相當容易)而得到所 需之結果,故而可以使用先進的次微米製程加以製作,此 舉更優於其他目前習知的技術。因此紅外線元件的填充% 可被大幅的提升,請參閱「第5圖」所示,其係以本發明 製作之紅外線熱感測器陣列元件的最小填充率對元件設計 準則(design rule)圖,所採用之圖素(pixel)的面積尺寸 為5 0 ’ 5 0平方微米,在0 . 3 5微米的製程中,本發明之填充 率最少可高達8 0 %以上,比起目前習知技術所達的最大值 70%高出甚多。 【發明之效果】 本發明提供一種與積體電路製程完全相容之紅外線熱 感測器陣列元件製造方法,將與紅外線元件相關的積體電 路元件上方之金屬層作為紅外線熱感測器之犧牲層,提升 紅外線陣列元件的填充率,以減少佈局的面積,且與積體 電路製程相容。積體電路製程中的介電質平坦化技術製作 懸冷薄板的結構支撐材料並克服製作於其上·^薄膜感測電· 阻的階梯跨越問題。以金屬欽或欽合金製作支腳連接導線 降低紅外線元件的固體熱傳導特性。並選用與積體電路相 容且溫度係數高之金屬鋁或鋁合金製作感測電阻,使得整Page 13 414931 Opening response phase-I 6 electrical resistance sensing and blackening of the part β- 咅 11) except fv to explain that the black resistance to light is clear and complete use of 'sharpness or suppression of light; This shot is the reddest after the radiation has gone off-line. The 10 shots in the body are taken in black to absorb the 10-layer layered body and 9 layers of dielectric on the square system. The βτ vertical opening 10 is removed and removed. ) -Ο f 1 of layer t-body f 1 '' is: (1% complete stripping 4th 4 4th layer dielectrics please refer to the 2nd, at least as far as the window contact sacrifice should be exposed The upper round crystal pair of the second dielectric layer is shown in Figure 61. The violent resistance 'electrical window touch sensing connection' is less than 11 to the window into contact shape and formed into a rear shape. The entrance of the dielectric layer is called the sacrificial layer of the sweet electricity and the method of cutting is a thin dry floating or suspended method. It is carved into a surname to form a surname, which is 9%. After the layer of electricity, the dielectric layer is sacrificed. The portion of the exposed part is sacrifice to the sacrifice layer, the line of the most advanced path of the golden middle method is for the bright hair belonging to Lian Ti. The road 4 electricity ® day W body animal 4 sacrifice The layering can be divided into layers, and the materials and materials that are suitable for the production process are usually made of materials that belong to the gold or aluminum alloy. § Before making the circuit volume, the application should be described: the former acid nitrate, acid phosphorus is Γν, liquid dissolving and contacting aluminous aluminum or aluminum deacidification to empty the foot suspension ρ. Λ 咅 ^ h 2nd phase plant such as The material base and the sacrifice should be removed by J, so that it will hang β afterwards, and the bottom should be completed by the red-the line is suspended and removed! The d plate used to make or suppress the bottom mix. F thin 6 Thermal measurement of plate thin floating suspension \ tr 1 House 6 JS resistance] ^: Figure 4 measured the first induction Γ, Π. After opening t as a knife, i 6 1 hangs to the plate thin thin bb floating line At the end of the transmission, the heat map can be collected by the heat map, and the thin Γ layer floating suspension system is black. It should have internal energy heat when it is not used to measure the electrical resistance. It can be measured by the absorption. Change the value of resistance by the value of resistance. Page 14 414931 V. Explanation of the invention (12) Because the sacrificial layer is finally removed, a part of the infrared element is suspended (that is, the area of the sacrificial layer corresponds to the area). (The suspended sheet and foot area of the infrared element), so the sacrificial layer defines the infrared The structural dimensions of the line components. Using the process design of the present invention, the entire manufacturing process can be completely matched to the existing integrated circuit. Circuit factory process, so it can be adjusted by a process in the factory (only in the thickness of the deposit, so it is quite equivalent Easy) to get the desired result, so it can be produced using advanced sub-micron processes, which is better than other currently known technologies. Therefore, the fill percentage of the infrared element can be greatly improved. Please refer to "Figure 5", which is a graph of the minimum fill rate of the infrared thermal sensor array element made by the present invention versus the design rule of the element. The area size of the pixel used is 50'50 square micrometers. In the process of 0.35 micrometers, the filling rate of the present invention can be as high as 80% or more, compared with the current conventional technology. The maximum value of 70% is much higher. [Effects of the Invention] The present invention provides a method for manufacturing an infrared thermal sensor array element that is fully compatible with the integrated circuit manufacturing process. The metal layer above the integrated circuit element related to the infrared element is used as a sacrifice of the infrared thermal sensor. Layer to increase the fill rate of the infrared array element to reduce the layout area and is compatible with the integrated circuit manufacturing process. The dielectric planarization technology in the integrated circuit manufacturing process is used to fabricate the structural support material of the suspended thin plate and overcome the problem of the step crossing of the thin film sensing electrical resistance. Made of metal Chin or Chin alloy to connect the legs to the wires to reduce the solid heat conduction characteristics of the infrared component. And select the metal aluminum or aluminum alloy that is compatible with the integrated circuit and has a high temperature coefficient to make the sensing resistor.

第15頁 414931 五、發明說明(13) 個紅外線熱感測器陣列元件製程完全與目前商用之積體電 路製程相容,達到最佳系統整合,增加靈敏度,降低製造 成本。 【圖示符號說明】 1基材 2 積體電路元件 3 金屬間介電層 4 犧牲層 5第一介電層 6 懸浮薄板 6 1 感測電阻 7 支腳 8 光阻層 9第二介電層 1 0 黑體層 1 1接觸窗Page 15 414931 V. Description of the invention (13) The manufacturing process of the infrared thermal sensor array element is completely compatible with the current commercial integrated circuit manufacturing process, to achieve the best system integration, increase sensitivity, and reduce manufacturing costs. [Illustration of symbols] 1 base material 2 integrated circuit element 3 intermetallic dielectric layer 4 sacrificial layer 5 first dielectric layer 6 suspended sheet 6 1 sensing resistor 7 feet 8 photoresistive layer 9 second dielectric layer 1 0 Blackbody layer 1 1 Contact window

第16頁Page 16

Claims (1)

414931 六、申請專利範圍 1 · 一種與積體電路製程相容之紅外線熱感測器陣列元件 製造方法,該方法包括下列步驟: 提供一半導體基底,其中該基底上已形成有積體電 路元件及金屬内連線; 定義該金屬内連線之最後一道金屬層以在該基底上 形成一犧牲層; 沈積一第一介電層於該基底與該犧牲層上; 〇 沈積一鈦或鈦合金金屬層於該第一介電層上; 沈積一鋁或鋁合金金屬層於該鈦或鈦合金金屬層 上; 定義該鈦或鈦合金金屬層與該鋁或鋁合金金屬層以 在該第一介電層上形成感測電阻與支腳; 去除該支腳的鋁或鋁合金金屬層,而留下支腳的鈦 或鈦合金金屬層; 沈積一第二介電層,以為保護層; 形成一黑體層於該第二介電層上,以吸收入射的紅 外線; 去除部份該第二介電層與該第一介電層,以形成至 少一接觸窗,暴露出該犧牲層;以及 去除該犧牲層。 2 ·如申請專利範圍第1項所述之與積體電路製程相容之 紅外線熱感測器陣列元件製造方法,其中定義該金屬 内連線之最後一道金屬層以在該基底上形成一犧牲層 的步驟,更進一步包括下列步驟:414931 VI. Application Patent Scope 1 · A method for manufacturing an infrared thermal sensor array element compatible with the integrated circuit manufacturing process, the method includes the following steps: providing a semiconductor substrate, wherein the integrated circuit element has been formed on the substrate and Metal interconnects; define the last metal layer of the metal interconnects to form a sacrificial layer on the substrate; deposit a first dielectric layer on the substrate and the sacrificial layer; o deposit a titanium or titanium alloy metal Layer on the first dielectric layer; depositing an aluminum or aluminum alloy metal layer on the titanium or titanium alloy metal layer; defining the titanium or titanium alloy metal layer and the aluminum or aluminum alloy metal layer to form the first dielectric layer A sense resistor and a leg are formed on the electrical layer; the aluminum or aluminum alloy metal layer of the leg is removed, and the titanium or titanium alloy metal layer of the leg is left; a second dielectric layer is deposited as a protective layer; A black body layer on the second dielectric layer to absorb incident infrared rays; removing a part of the second dielectric layer and the first dielectric layer to form at least one contact window to expose the sacrificial layer; and The sacrificial layer is removed. 2 · The manufacturing method of the infrared thermal sensor array element compatible with the integrated circuit manufacturing process described in item 1 of the scope of the patent application, wherein the last metal layer of the metal interconnect is defined to form a sacrificial on the substrate The steps of the layer further include the following steps: 第17頁 六 圍成 範形 1HMJ. T7 f 專 請 414931 上 層 金 道- 後 最 該 於 層 阻 光 犧- 成 形 以 層 屬 金 道 1 後 最 該及 份以 部.’ 除上 去底 義基 定該 幕在 罩層 牲 層 阻 之 容 相 程 製 路 令& 體 積 與 之 述 所 項 1 第 圍 蘇 光利 該專 除請 去申 如 一括 第包 一步 積一 沈進 中更 其’ ’驟 法步 方的 造上 製層 件牲 元犧 列該 陣與 器底 測基 感該 熱於 線層 外電 紅介 層 牲 犧 該 與 底 基 =° 於 層 電 介- 第- 積 沈 ••法 驟塗 步旋 1HJ. 又 歹^ 下 化 坦 平 面 表 其 使 層 電 介 一 第 該 及刻 以蝕 ’ ’回 上 之一括 容第包 相一步 程積一 製沈進 路中更 電其, 體,驟 積法步 與方的 之造上 述製層 所件牲 項元犧 1列該 第陣與 圍器底 範測基 利感該 專熱於 請線層 申外電 如紅介 4 上 層 牲 犧 該 與 底 基 該 於 層 令& 介- 第- 積 沈 :法 驟塗 步旋 列以 下 及 以 層 電 介 之 述 所 一項 第 1—_ 該第 磨圍 研範 械利 機專 學請 化申 如 之 。容 化相 坦程 平製 面路 表電 其體 使積 ,與 或電列 鈦介下 該一括 義第包 定該步 中在一 其以進 ,層更 法屬, 方金驟 造金步 製合的 件鋁腳 元或支 列鋁與 陣該阻 器與電 測層測 感屬感 熱金成 線金形 外合上 紅銥層 層 屬 金 金 合 鋁 或 Is 該 於 層 阻 光 :成 驟形 步On page 17, the six encircles into a normal form 1HMJ. T7 f specially requested 414931 Upper golden path-the last should be in the layer blocking light sacrifice-formed to the layer of the golden path 1 should be the most important part after the bottom. ' The capacity of the curtain and the resistance of the road and the system of the road order & volume and the above mentioned item 1 No. Su Guangli This special, please go to apply for the first step, the first step, the first step, the first step, and the next step. The upper layer of the die element sacrifices the array and the bottom of the device to measure the base sense. It should be hotter than the wire layer outside the electric red dielectric layer. The sacrifices and the base = ° Yu layer dielectric-the first-accumulate •• method step coating step spin 1HJ. ^^ Xiahuatan plane table which makes the layer dielectric first and etched with etch '' back to the previous one to include the first phase of the package phase one step product system to sink more electricity in the road, volume, step product method and method The construction of the above-mentioned layers of the sacrificial element Yuan 1 sacrifices the array and the bottom of the perimeter to measure the basic sense of the sensation. The speciality is to ask the line to apply for foreign power such as Hong Jie 4 The upper layer of the sacrifices should be related to the base. & 介-Chapter-Backlog: Law Step In the following column and said dielectric layer is of a first one of the second grinding-_ mechanical advantage around RESEARCH machine designed range of application such as the requested learned. The content phase is flat, and the surface is made of electricity, and the combination of titanium and titanium is included in this step. The step is to advance one by one, and the layers are more legal. The combined pieces of aluminum foot element or array of aluminum and array. The resistor and the electrical measurement layer are sensed by the thermal gold to form a gold line. The red iridium layer is layered of aluminous aluminum or Is. The layer is light-shielded: into a sudden shape. step 第18頁 414931 六、申請專利範圍 罩幕定義去除部份該欽或鈦合金金屬層與部份該铭 或銘合金金屬層,藉以在對應於該犧牲層區域之該第 一介電層上形成感測電阻與支腳;以及 去除該光阻層。 6 ·如申請專利範圍第1項所述之與積體電路製程相容之 紅外線熱感測器陣列元件製造方法,其中去除該支腳 的紹或紹合金金屬層的步驟,更進一步包括下列步驟 及 .,以 上 · ’ 阻層 電屬 測金 感金 該合 於|§ 蓋或 覆鋁 層的 阻腳 光支 一該 成除 形去 之 容 相 程 製 路 電 體 積 與 之 述 所 項 6 。第 層圍 阻範 光利 該專 除請 去申 如 7 腳屬進 支金刻 該金# 除合性 去鋁擇 中或選 其銘之 ,該異 法對差 方以率 造係刻 製法蝕 件方高 元的有 列層屬 陣屬金 器金金 測金合 感合鈦 熱銘或 線或鈦 外銘該 紅的與 之 容 相 程 製 路 電 體 積 與 之 述 所 項 7 第 圍 範 利 專 請 行如 8 餘 性 擇。 選行 該進 中液 其酸 ,刻 法蝕 方合 造混 製之 件酸 元醋 列與 陣酸 器硝湏、 感酸 熱磷 線以 外係 紅刻 之體 容.黑 相該 程成 製形 路中 電其 體’ 積法 與方 之造 述製 所件 項元 1列 第陣 圍器 範!^ 利感 專熱 請線 申外 如紅 上 層 _ ’ 電上 介層 二料 第材 : 玄_ =口 1¾¾ 驟於黑 步層該 列料於 下材層 括體阻 包黑光 法二 方積成 的沈形層Page 18 414931 VI. Definition of the scope of the patent application. Part of the metal layer of the metal or titanium alloy and part of the metal layer of the metal or alloy are removed to form the first dielectric layer corresponding to the region of the sacrificial layer. Sense resistors and feet; and remove the photoresist layer. 6 · The method for manufacturing an infrared thermal sensor array element compatible with the integrated circuit manufacturing process as described in item 1 of the scope of the patent application, wherein the step of removing the shaw or shaw alloy metal layer of the leg further includes the following steps And, the above · 'Resistive layer is a gold-detecting metal, which should be combined with the § Cap or aluminum-clad resistive pin optical support-the volume of the phase-to-phase circuit system and the item 6 described above. Fan Guangli, the first layer of confinement, should go to apply for Ru Ru 7 feet into the gold engraved with this gold # in addition to the aluminum to choose or choose the inscription, the foreign method to the difference to the rate of the etching method Part of the high-level layered array belongs to the group of gold, gold, gold, metal, gold, titanium, or titanium. The red is the same as the capacity of the system. The circuit volume is as described in Section 7. Fan Li Zhuan Please do like 8 choices. Choose the acid and vinegar of the middle liquid, and mix the pieces of acid and vinegar with the acid array and nitrate of the acid array and the acid-sensitive hot phosphorus line. The black body should be shaped. CLP Power's product method and Fang Zhishu's system of the first element of the first array of fan array! ^ If you have a sense of benefit, please apply for the application. The upper layer of the second layer of the dielectric layer is: Xuan _ = 口 1¾¾ This layer is formed in the lower layer, including the black barrier method and the second layer. Shaped layer Ο 第19頁Ο Page 19
TW88111349A 1999-07-05 1999-07-05 IC process compatible device fabrication method of the bolometer array TW414931B (en)

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