TW412852B - Inner lead bonding method and structure of the tape automated bonding (TAB) - Google Patents

Inner lead bonding method and structure of the tape automated bonding (TAB) Download PDF

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Publication number
TW412852B
TW412852B TW88107272A TW88107272A TW412852B TW 412852 B TW412852 B TW 412852B TW 88107272 A TW88107272 A TW 88107272A TW 88107272 A TW88107272 A TW 88107272A TW 412852 B TW412852 B TW 412852B
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TW
Taiwan
Prior art keywords
pads
bonding
pad
inner pins
solder
Prior art date
Application number
TW88107272A
Other languages
Chinese (zh)
Inventor
Jr-Gung Huang
Original Assignee
Sitron Prec Co Ltd
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Publication date
Application filed by Sitron Prec Co Ltd filed Critical Sitron Prec Co Ltd
Priority to TW88107272A priority Critical patent/TW412852B/en
Application granted granted Critical
Publication of TW412852B publication Critical patent/TW412852B/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods

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  • Wire Bonding (AREA)

Abstract

This invention is about the inner lead bonding method and structure of the tape automated bonding. The wire bonder used for wire bonding and the film carrier with shorter inner lead are used to perform the tape automated bonding on the dies to be packaged. The wire bonder is used to form the bonding ball and proceed the inner lead bonding, in which the bonding ball is formed in between the inner lead front edge of the film carrier and the corresponding connection region of the die bonding-pad. The process is simple and has high reliability. Additionally, the inner lead is only partially overlapped with the corresponding die bonding pad in order to expose the connection region of the bonding pad. It is convenient to do the wire bonding on the connection region in order to form the bonding ball to connect the inner lead and the bonding pad. Therefore, the required length of the inner lead is shorter and the material can be saved to decrease the production cost.

Description

經濟部智慧財產局員工消費合作社印制Λ 412852 4 1 I 6l w f. doc/(J()2 pj B7 五、發明說明(ί ) 本發明是有關於一種帶狀自動接合(TapePrinted by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs Λ 412852 4 1 I 6l w f. Doc / (J () 2 pj B7 V. Description of the invention (ί) The present invention relates to a tape-shaped automatic joint (Tape

AutomatedAutomated

Bonding,TAB)之方法及結構,且特別是有關於一種帶狀 自動接合捲帶(Tape)中軟片式承載器(Fi]m Carrier)之內引 腳(Inner Lead)接合方法及結構。 在半導體產業中,積體電路(integrated Circuits,IC)的 生產,主要分爲二個階段:矽晶片的製造、積體電路的製 作以及積體電路的封裝(Package)等。就積體電路的封裝而 言’此即是完成積體電路成品的最後步驟。封裝之目的在 於提供晶片(Die)與印刷電路板(printe(j Circuit Board, PCB) 或其他適當元件之間電性連接的媒介以及保護晶片。 在完成半導體製程後’晶片係由晶圓(Wafer)切割形 成。一般在晶片的周邊具有焊墊(Bonding Pad),其作用爲 提供晶片檢測之測試點,以及提供晶片與其他元件間連接 之端點。爲了連接晶片和其他元件,因此必須使用引線 (Wire)或凸塊(Bump)作爲連接之媒介。 請參照第1圖,其所繪示的是使用打線接合(Wire Bonding, WB)方式進行連接。其中係使用金線或鋁線等金 屬線104以連接晶片1〇〇上之焊墊1〇2與外部元件。其次, 請參照第2圖,其所繪示的是使用帶狀自動接合(TAB)方 式進行連接°其中是以凸塊(未顯示於圖中)作爲晶片200 卜的焊墊與捲帶中軟片式承載器之引腳2〇2間的連接媒 介。然後,請參照第3圖,其所繪示的是使用覆晶(Flip Chip, FC)方式進行連接。在晶片300之焊墊和電路基板的配線 電極之間,係使用銲錫凸塊302進行連接。 3 本紙張尺度適用t國國家標準(CNS)A4規格(210 X 297公釐) III I I i I--I l I I I * ---* I I I I 1 I--1 — — — — — - - (請先閱讀背面之注意事填再填寫本頁) 經濟部智慧財產局員工消費合作社印製 412852 五、發明說明(2) 習知技藝中,使用帶狀自動接合方式進行封裝,可大' 略區分爲三部份:製作軟片式承載器、製作凸塊及封裝。 在完成軟片式承載器及凸塊之製作後,必須進行內引腳接 合(Inner Lead Bonding, ILB),利用凸塊連接欲封裝之晶片 上的焊墊與軟片式承載器上的內引腳。接著,使用封裝樹 脂將晶片及軟片式承載器上部份電路加以密封,於檢驗測 §式後,再進f了外引腳接合(Outer Lead Bonding, OLB),使 軟片式承載器中的外引腳(Outer Lead)與電路基板或其他 元件連接。 請參照第4圖,其所繪示的是軟片式承載器與晶片接 合之俯視示意圖,晶片400係與軟片式承載器402上之內 引腳4〇4以凸塊或引線連接,此外在軟片式承載器4〇2中 還有由內引腳404向外延伸之外引腳406,可與電路基板 或其他元件連接。 一般而言,凸塊形成於晶片上之凸塊化晶片(Bumped Chip)較常被使用。請參照第5圖,其所繪示的是凸塊化 晶片之內引腳接合示意圖,在晶片500的焊墊502上具有 凸塊504,並以熱壓合(Thermal Compression)方式使凸塊 504與軟片式承載器506上的內引腳5〇8接合。然而,在 晶片上製作凸塊,必須在焊墊上形成障層金屬(Barrier Metal)及凸塊金屬,並經曝光 '顯影、蝕刻等步驟以定義 並形成凸塊,其製程複雜,且所需之成本也較高。 此外,亦可以使用凸塊形成於捲帶中內引腳上的凸塊 化捲帶(Bumped Tape) ’請參照第ό圖’其所繪不的是凸 4 本紙張尺度適用中囷國家標準(CNS)A4規格(210 X 297公釐) ϋϊ^ ^ IV 1— I I ^ ^ Ια ^ I I n I d ^ ^ I ^^OJI ^ I ^ ^ ^ ^ ^ I (請先閱讀背面之注意事琅再填寫本頁) 經濟部智慧財產局員工消費合作社印製 412852 4 I ] 6ΐνν Γ.(1οο/{102 A7 五、發明說明(多) 塊化捲帶之內引腳接合示意圖,在捲帶中之軟片式承載器 606的內引腳608上具有凸塊604,同樣以熱壓合方式使 凸塊604與晶片600上的焊墊602接合。製作引腳上之凸 塊,可以先形成對應於內引腳位置之凸塊,再使其與內引 腳接合,但需要使用凸塊形成基板以製作凸塊;或是直接 將內引腳之前端製作成具有凸塊之構型,但其製程繁複, 而且與晶片之接合強度較差。 習知帶狀自動接合之內引腳接合方法,係利用凸塊作 爲晶片焊墊與軟片式承載器內引腳之間的連接媒介,無論 是使用凸塊化晶片或凸塊化捲帶,其製程繁複,且所需之 成本較高。此外,凸塊高度不均句會降低接合強度,並在 進行接合時使晶片產生裂縫。而凸塊與·焊墊之接合,必須 加入障層金屬,在使用時會導致電壓下降、異常發熱,並 降低接合部份之可靠性。 因此,本發明的目的就是在提供一種帶狀自動接合之 內引腳接合方法及結構,使用內引腳前緣與晶片焊墊僅部 份重疊之軟片式承載器,並且直接在未和內引腳疊覆的焊 墊連接區與內引腳前緣之間形成電性連接。 根據本發明之上述目的,提出一種帶狀自動接合之內 引腳接合方法及結構,以打線接合使用之打線機,配合內 引腳較短之軟片式承載器,在内引腳前緣與其所對應的焊 墊連接區之間形成焊球,進行內引腳接合,其製程較習知 使用凸塊進行內引腳接合之方法簡單,而且可靠性較高。 此外,軟片式承載器中之內引腳與晶片上所對應之焊墊僅 t,--I------r-----------訂--------- ·- (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS〉A4規格0310 X 297公釐) 經濟部智慧財產局員工消費合作社印製Bonding (TAB) method and structure, and in particular, it relates to an inner lead bonding method and structure of a tape-shaped automatic bonding tape (Fi) m Carrier in a tape. In the semiconductor industry, the production of integrated circuits (ICs) is mainly divided into two stages: the manufacture of silicon wafers, the production of integrated circuits, and the packaging of integrated circuits. As far as the packaging of integrated circuits is concerned, this is the final step to complete the finished integrated circuit. The purpose of packaging is to provide a medium for the electrical connection between the die (die) and a printed circuit board (printed circuit board (PCB) or other appropriate components) and to protect the wafer. After the semiconductor process is completed, the 'wafer is made of wafers (Wafer ) Dicing. Generally, there are bonding pads on the periphery of the wafer, which are used to provide test points for wafer inspection and provide endpoints for the connection between the wafer and other components. In order to connect the wafer and other components, leads must be used (Wire) or bump (Bump) as the connection medium. Please refer to Figure 1, which shows the connection using wire bonding (WB) method. Among them are gold or aluminum wires 104 is used to connect the pads 102 on the wafer 100 to external components. Secondly, please refer to FIG. 2, which shows the connection using a tape-shaped automatic bonding (TAB) method. Among them is a bump ( (Not shown in the figure) as the connection medium between the solder pads of the wafer 200 and the pins 202 of the flexible carrier in the tape. Then, please refer to Figure 3, which shows the use of flip-chip ( Flip Ch ip, FC) connection. The solder pads 302 are used to connect between the pads of the chip 300 and the wiring electrodes of the circuit board. 3 This paper size is applicable to the national standard (CNS) A4 specification (210 X 297) (Mm) III II i I--I l III * --- * IIII 1 I--1 — — — — — —-(Please read the notes on the back and fill in this page before filling in) This is an employee of the Intellectual Property Bureau of the Ministry of Economic Affairs Printed by a consumer cooperative 412852 V. Description of the invention (2) In the conventional technique, packaging is performed using a ribbon-shaped automatic bonding method, which can be divided into three parts: making a flexible sheet carrier, making bumps, and packaging. After the flexible chip carrier and bumps are manufactured, Inner Lead Bonding (ILB) must be performed, and the bumps are used to connect the pads on the wafer to be packaged with the internal pins on the flexible chip carrier. Then, Encapsulating resin is used to seal some circuits on the chip and the flexible chip carrier. After inspection and testing, the outer lead bonding (OLB) is performed to make the external pins in the flexible chip carrier. (Outer Lead) and circuit board or other components Please refer to Figure 4, which shows a schematic plan view of the joint between the chip carrier and the wafer. The chip 400 is connected to the inner pin 404 on the chip carrier 402 by bumps or leads. In addition, In the flexible chip carrier 40, there are external pins 406 extending outward from the inner pins 404, which can be connected to a circuit substrate or other components. Generally speaking, bumps are formed on a wafer by a bumped wafer ( Bumped Chip) is more commonly used. Please refer to FIG. 5, which shows a schematic diagram of pin bonding in a bumped wafer. The solder pad 502 of the wafer 500 has a bump 504, and the bump 504 is made by a thermal compression method. It is engaged with the inner pin 508 on the flexible chip carrier 506. However, to make bumps on a wafer, barrier metals and bump metals must be formed on the solder pads, and the steps of exposure, development, and etching to define and form bumps have complex manufacturing processes and require The cost is also higher. In addition, you can also use a bumped tape formed on the inner pins of the tape by using bumps. 'Please refer to the figure'. It cannot be drawn. 4 This paper size applies the Chinese national standard ( CNS) A4 size (210 X 297 mm) ϋϊ ^ ^ IV 1— II ^ ^ Ια ^ II n I d ^ ^ I ^^ OJI ^ I ^ ^ ^ ^ I (Please read the notes on the back first (Fill in this page) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 412852 4 I] 6ΐνν Γ. (1οο / {102 A7 V. Description of the invention (multiple) Schematic diagram of the pin bonding within the block tape, in the tape The bump 604 is provided on the inner pin 608 of the soft-chip carrier 606, and the bump 604 is also bonded to the solder pad 602 on the wafer 600 by a thermocompression bonding method. The bump on the pin can be formed first to correspond to the inner The bumps at the pin positions are then bonded to the inner pins, but the bumps need to be used to form the substrate to make the bumps; or the front ends of the inner pins can be directly made into a bumped configuration, but the process is complicated In addition, the bonding strength with the wafer is poor. The internal pin bonding method of the strip automatic bonding is known to use bumps. As the connection medium between the wafer pads and the pins in the flexible chip carrier, whether it is a bumped wafer or a bumped tape, the manufacturing process is complicated and the required cost is high. In addition, the bump height is not high. Uniformity will reduce the bonding strength and cause cracks in the wafer during bonding. For the bonding of bumps and pads, a barrier metal must be added, which will cause voltage drop and abnormal heat generation during use, and reduce the bonding area. Therefore, the object of the present invention is to provide a method and a structure for internal pin bonding of a strip-shaped automatic bonding, which uses a flexible chip type carrier in which the leading edge of the internal pin and the wafer pad only partially overlap, and directly An electrical connection is formed between the pad connection area overlapped with the inner pin and the leading edge of the inner pin. According to the above object of the present invention, a method and a structure for inner pin bonding with a strip-shaped automatic bonding are proposed for wire bonding use. The wire bonding machine, with a short chip lead carrier, forms a solder ball between the leading edge of the inner pin and the corresponding pad connection area for inner pin bonding. The manufacturing process is more familiar. The method of using the bump to perform internal pin bonding is simple and highly reliable. In addition, the corresponding internal pads on the chip carrier and the corresponding pads on the wafer are only t, --I ------ r ----------- Order --------- ·-(Please read the precautions on the back before filling this page) This paper size applies to Chinese national standards (CNS> A4 specification 0310 X 297 mm) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs

41285S 4 I \ 6twf.duc/002 _B7_ 五、發明說明(y) 部份重疊,內引腳的長度較短,可以節省材料降低成本。 爲讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂,下文特舉較佳實施例,並配合所附圖示,作詳細 說明如下: 圖示之簡單說明: 第1圖繪示使用打線接合方式進行電性連接: 第2圖繪示使用帶狀自動接合方式進行電性連接; 第3圖繪示使用覆晶方式進行電性連接; 第4圖繪示軟片式承載器與晶片之接合示意圖; 第5圖繪示凸塊化晶片之內引腳接合示意圖; 第6圖繪示凸塊化捲帶之內引腳接合示意圖; 第7A圖和第7B圖分別繪示依照本發明之較佳實施 例,一種帶狀自動接合之內引腳接合方法及結構的剖面示 意圖與俯視示意圖;以及; 第8圖繪示依照本發明之較佳實施例,使用焊球直接 接合晶片焊墊與內引腳之封裝剖面示意圖。 圖示之標記說明: 100、200、300、400、500、600 ' 700、800 ··晶# 102、502、602、702 ' 802 :焊墊 104 :金屬線 202 :引腳 302、504、604 :凸塊 402、506、606、706、806 :軟片式承載器 404、508、608、708、808 :內弓1 腳 ^^1 ^^1 ^^1 ^^1 ^^1 ^^1 Et I 1^1 n n 1 ^ fl a^i n ^^1 ^^1 I 4-0 ^ (請先閱讀背面之汉意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS)A4規格(210x297公釐) 412852 4 1 I 6twi doc/002 A7 五、發明說明(i) 406 :外引腳 702a :焊墊連接區 702b :焊墊疊覆區 704、804 :焊球 708a、808a :內引腳前緣 810 :封裝樹脂 實施例 經濟部智慧財產局員工消費合作社印製 ,I------ I--1 ------- (請先閱讀背面之注意事填再填寫本頁) 請參照第7A圖與第7B圖,其所繪示的分別是依照 本發明之較佳實施例,一種帶狀自動接合之內引腳接合方 法及結構的剖面示意圖與俯視示意圖。首先提供欲封裝之 晶片700,在晶片700中包括具有多個焊墊702,再以帶 狀自動接合(TAB)捲帶中之軟片式承載器706對晶片700 進行接合。在捲帶中之軟片式承載器706上,還包括具有 對應於晶片700之焊墊702的內引腳708。進行帶狀自動 接合時,使軟片式承載器706位於晶片700之上,而軟片 式承載器706之內引腳708則是位於晶片700中其所對應 的焊墊702之上。習知技藝是以凸塊連接內引腳與晶片焊 墊(如第5圖及第6圖所示),其內引腳必須完全覆蓋位於 其下的晶片焊墊以便於使用凸塊連接,因此所需之內引腳 長度較長。請參照第7A圖,並與第5圖及第6圖比較, 在本發明中,內引腳之前緣70Sa與焊墊702僅部份重疊, 並將焊墊702區分爲未與內引腳708重疊之焊墊連接區 702a,以及與內引腳708重疊之焊墊疊覆區702b,並曝露 出焊墊連接區702a,以利後續連接步驟之進行,因此軟片 7 本紙張尺度適用中國國家標準(CNS)A4規格(2】〇 X 297公t ) 412852 4 1.1 6twl doc/0()2 pj B7 五、發明說明((;) 式承載器706之內引腳708所需的長度較短。然後再以打 線接合所使用之打線機,在晶片焊墊連接區702a上進行 打線動作形成焊球704連接內引腳前緣708a,達到電性連 接內引腳前緣708a與焊墊連接區702a之目的。 請參照第8圖,其所繪示的是依照本發明之較佳實施 例,使用打線機直接形成焊球接合晶片焊墊與內引腳之封 裝剖面示意圖。如圖所示,在晶片S00的焊墊802與軟片 式承載器806上的內引腳808之間,係利用打線機直接在 焊墊802上形成的焊球804作爲電性連接之媒介。由於內 引腳808之長度較短,僅與部份之焊墊8〇2重疊,因此打 線機所形成之焊球804至少可電性連接焊墊802 t未與內 引腳808疊覆之區域(如第7A圖中之焊墊連接區702a)以 及內引腳808的前緣(如第7A圖中之內引腳前緣70Sa)。 使用軟片式承載器806與打線機對晶片800進行帶狀自動 接合之後,再使用封裝樹脂810對晶片800、軟片式承載 器806之內引腳808,以及由打線機形成之焊球804進行 封裝。 習知帶狀自動接合方法中,需要在晶片之焊墊或軟片 式承載器之內引腳上先行製作凸塊,再以熱壓合方式進行 內引腳接合。但形成凸塊之製程繁複,必須經過曝光、顯 影、蝕刻等步驟以定義並形成凸塊,或者使用凸塊形成基 板製作凸塊,且其所需之成本較高。而直接將內引腳前端 製作成具有凸塊之構型’其內引腳與晶片之接合強度較 差。此外,凸塊高度不均勻會影響接合強度’並在焊墊與 8 本紙張尺度適用中國國家標準(CNS)A4規格(210 x 297公釐) ---------------- (請先閱讀背面之注意事項再填寫本頁) Γ 經濟部智慧財產局員工消費合作社印製 41285^ 4 I I 6t wt. tloc/002 B7 五、發明說明(q) 內引腳接合時導致晶片產生裂縫。而且凸塊與焊墊之接-合,必須加入障層金屬,因此在使用時會導致電壓下降、 異常發熱,並降低接合部份之可靠性。 由上述本發明之較佳實施例可知,本發明係採用打線 接合使用之打線機進行接合,直接在晶片焊墊上以打線動 作形成焊球,取代習知使用的凸塊,連接晶片之焊墊與軟 片式承載器之內引腳。因此本發明以打線機形成焊球進行 帶狀自動接合之製程較習知簡單,而晶片與內引腳接合部 份可靠性較高,並且可以充分運用現有打線機之功能u此 外’在本發明所使用之軟片式承載器中,對應於晶片焊墊 之內引腳僅需與焊楚部份重疊,使焊墊曝露出連接區,以 利打線機茌連接區形成焊球連接焊墊與內引腳,因此其所 需之內引腳長度較短,可節省製作內引腳之材料,以降低 封裝之成本。 雖然本發明已以較佳實施例揭露如上,然其並非用以 限定本發明,任何熟習此技藝者,在不脫離本發明之精神 和範圍內,當可作各種之更動與潤飾,因此本發明之保護 範圍當視後附之申請專利範圍所界定者爲準。 1-—.*— — 11 — —- I I I I I > — — — - — — It— — — —— - - (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐)41285S 4 I \ 6twf.duc / 002 _B7_ 5. Description of the invention (y) Partial overlap, the length of the inner pin is shorter, which can save materials and reduce costs. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, the following describes the preferred embodiments in detail with the accompanying drawings as follows: A brief description of the drawings: FIG. 1 Figure 2 shows the electrical connection using a wire bonding method: Figure 2 shows the electrical connection using a ribbon-shaped automatic bonding method; Figure 3 shows the electrical connection using a flip-chip method; Figure 4 shows a flexible chip carrier and Schematic diagram of wafer bonding; Figure 5 shows a schematic diagram of the internal pin bonding of a bumped wafer; Figure 6 shows a schematic diagram of the internal pin bonding of a bumped tape; Figures 7A and 7B respectively show according to this A preferred embodiment of the present invention is a cross-sectional schematic diagram and a top schematic diagram of a strip-type automatic bonding inner pin bonding method and structure; and FIG. 8 illustrates a preferred embodiment of the present invention, using a solder ball to directly bond a wafer to a chip. Schematic diagram of package cross section of pad and inner pin. The description of the marks in the illustration: 100, 200, 300, 400, 500, 600 '700, 800 · · Crystal # 102, 502, 602, 702' 802: Pad 104: Metal wire 202: Pins 302, 504, 604 : Bumps 402, 506, 606, 706, 806: Foil carrier 404, 508, 608, 708, 808: Inner bow 1 foot ^^ 1 ^^ 1 ^^ 1 ^^ 1 ^^ 1 ^^ 1 Et I 1 ^ 1 nn 1 ^ fl a ^ in ^^ 1 ^^ 1 I 4-0 ^ (Please read the Chinese and Italian items on the back before filling out this page) This paper size applies to China National Standard (CNS) A4 (210x297) (Mm) 412852 4 1 I 6twi doc / 002 A7 V. Description of the invention (i) 406: outer pin 702a: pad connection area 702b: pad overlay area 704, 804: solder ball 708a, 808a: inner pin Leading edge 810: Example of encapsulation resin Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, I ------ I--1 ------- (Please read the notes on the back and fill in this page ) Please refer to FIG. 7A and FIG. 7B, which are respectively a schematic cross-sectional view and a schematic plan view of a method and a structure for internal pin bonding of a strip-shaped automatic bonding according to a preferred embodiment of the present invention. First, a wafer 700 to be packaged is provided. The wafer 700 includes a plurality of bonding pads 702, and the wafer 700 is bonded by a flexible chip carrier 706 in a tape-shaped automatic bonding (TAB) tape. On the flexible tape carrier 706 in the tape, it also includes an inner pin 708 having a pad 702 corresponding to the wafer 700. When performing the ribbon-shaped automatic bonding, the flexible chip carrier 706 is positioned on the wafer 700, and the inner pins 708 of the flexible chip carrier 706 are positioned on the corresponding pads 702 in the wafer 700. The conventional technique is to use bumps to connect the inner pins to the wafer pads (as shown in Figures 5 and 6). The inner pins must completely cover the wafer pads underneath to facilitate the use of bump connections, so The required inner pin length is longer. Please refer to FIG. 7A and compare with FIG. 5 and FIG. 6. In the present invention, the leading edge 70Sa of the inner pin only partially overlaps with the pad 702, and the pad 702 is distinguished as not being in contact with the inner pin 708. Overlapping pad connection area 702a, and pad overlap area 702b overlapping with inner pin 708, and exposing pad connection area 702a, so as to facilitate subsequent connection steps. Therefore, this paper is in accordance with Chinese national standards. (CNS) A4 specifications (2) 0X 297 male t) 412852 4 1.1 6twl doc / 0 () 2 pj B7 5. Description of the invention ((;) The length of the pin 708 inside the (()) type carrier 706 is shorter. Then, the wire bonding machine used for wire bonding is used to perform a wire bonding operation on the wafer pad connection area 702a to form a solder ball 704 to connect the leading edge 708a of the inner pin to electrically connect the leading edge 708a of the inner pin to the pad connection area 702a. Please refer to FIG. 8, which illustrates a schematic cross-sectional view of a package that uses a wire bonder to directly form a solder ball bonding wafer pad and an inner pin according to a preferred embodiment of the present invention. As shown in the figure, Between the pad 802 of the wafer S00 and the inner pin 808 on the flexible chip carrier 806 The solder ball 804 formed directly on the bonding pad 802 by the wire bonding machine is used as a medium for electrical connection. Because the length of the inner pin 808 is short, it only overlaps with a part of the bonding pad 802, so the wire bonding machine formed The solder ball 804 can be electrically connected to at least the area where the pad 802 t is not overlapped with the inner pin 808 (such as the pad connection area 702a in FIG. 7A) and the leading edge of the inner pin 808 (such as in FIG. 7A). Leading edge of the inner pin 70Sa). After using the flexible chip carrier 806 and the wire bonding machine to automatically bond the wafer 800 in a strip shape, the encapsulating resin 810 is used to bond the wafer 800 and the inner pin 808 of the flexible chip carrier 806, The solder ball 804 formed by the machine is used for packaging. In the conventional automatic ribbon bonding method, bumps need to be made on the inner pads of the wafer pad or the flexible chip carrier, and then the inner pin bonding is performed by thermocompression bonding. However, the process of forming bumps is complicated, and must be exposed, developed, etched, etc. to define and form bumps, or use bumps to form substrates to make bumps, and the cost required is higher. Instead, the inner pins are directly The front end is made into a configuration with bumps' The bonding strength between the inner pin and the wafer is poor. In addition, uneven height of the bumps will affect the bonding strength ', and the Chinese National Standard (CNS) A4 size (210 x 297 mm) applies to the pad and 8 paper sizes --- ------------- (Please read the precautions on the back before filling out this page) Γ Printed by the Intellectual Property Bureau Employee Consumer Cooperative of the Ministry of Economic Affairs 41285 ^ 4 II 6t wt. Tloc / 002 B7 V. Description of the Invention (q) The chip will crack when the inner pins are bonded. Moreover, the barrier metal must be added to the connection between the bumps and the pads, so it will cause voltage drop, abnormal heat generation during use, and reduce the bonding portion. reliability. It can be known from the foregoing preferred embodiments of the present invention that the present invention adopts a wire bonding machine used for wire bonding for bonding, and directly forms solder balls on the wafer pads by wire bonding operations, instead of the conventionally used bumps, connecting the pads of the wafer with Inner pin of the flexible chip carrier. Therefore, in the present invention, the process of forming a solder ball by a wire bonding machine for automatic band bonding is simpler, and the bonding part of the chip and the inner pin has higher reliability, and can fully use the functions of the existing wire bonding machine. In addition, in the present invention, In the flexible chip carrier used, the inner pins corresponding to the wafer pads need only overlap with the solder pads, so that the pads are exposed to the connection area, so as to form a solder ball connecting the pads to the pads in the connection area. Pins, so the required inner pin length is shorter, which can save the material for making inner pins, and reduce the cost of packaging. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make various modifications and retouches without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of protection shall be determined by the scope of the attached patent application. 1 -—. * — — 11 — —- IIIII > — — — — — — — — — — — — — (Please read the notes on the back before filling out this page) The paper size of the paper is applicable to China National Standard (CNS) A4 (210 X 297 mm)

Claims (1)

經濟部智慧財產局員工消費合作社印製 412852 A8 ^ l 1 6twf.doc/〇〇2 B8 CS D8 六、申請專利範圍 L一種帶狀自動接合之內引腳接合方法,至少包括: 提供一晶片,具有複數個焊墊; 提供一軟片式承載器,具有複數個內引腳,其中該些 內引腳係分別對應於該晶片之該些焊墊; 使該些內引腳位於該些焊墊之上,且該些內引腳之前 緣與該些焊墊爲部份重疊,因此在每一該些焊墊上分別包 括一焊墊疊覆區與一焊墊連接區;以及 使每一該些內引腳之前緣分別與每一該些焊墊之該焊 墊連接區形成電性連接。 2. 如申請專利範圍第1項所述之帶狀自動接合之內引 腳接合方法,其中形成電性連接之步驟,係使用打線機分 別在每一該些內引腳之前緣與每一該些焊墊的該焊墊連接 區之間形成一焊球。 3. —種帶狀自動接合之內引腳接合結構,至少包括: 一晶片,具有複數個焊墊; 一軟片式承載器,具有複數個內引腳,其中該些內引 腳位於該些焊墊之上,且該些內引腳之前緣與該些焊墊爲 部份重疊,使每一該些焊墊分別具有一焊墊疊覆區與一焊 墊連接區;以及 複數個焊球,其中每一該些焊球係分別位於每一該些 內引腳之前緣與每一該些焊墊的該焊墊連接區之間,用以 電性連接每一該些內引腳之前緣與每一該些焊墊之該焊墊 連接區。 4. 如申請專利範圍第3項所述之帶狀自動接合之內引 (請先聞讀背面之注意事可再填寫本頁) 本紙張尺度適用中國國家標率(CNS ) A4規格(210X297公釐) 412852 A8 4 1 I 6twl'.d〇c/002 B8 C8 D8 六、申請專利範圍 腳接合結構,其中該些焊球係使用打線機分別在每一該些 內引腳之前緣與每一該些焊墊的該焊墊連接區之間形成。 5. —種半導體封裝,至少包括: 一晶片,具有複數個焊墊; 複數個內引腳,該些內引腳之前緣與該些焊墊爲部份 重疊,使每一該些焊墊分別具有一焊墊疊覆區與一焊墊連 接區, 複數個焊球,其中每一該些焊球係分別位於每一該些 內引腳之前緣與每一該些焊墊的該焊墊連接區之間,用以 電性連接每一該些內引腳之前緣與每一該些焊墊之該焊墊 連接區:以及 一絕緣材料,包覆該晶片、該些內引腳與該些焊球。 6. 如申請專利範圍第5項所述之半導體封裝,其中該 些焊球係使用打線機分別在每一該些內引腳之前緣與每一 該些焊墊的該焊墊連接區之間形成。 (請先閱讀背面之注意事ΪΓ再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS) Α4規格(210Χ297公釐)Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 412852 A8 ^ l 1 6twf.doc / 〇〇2 B8 CS D8 VI. Application for Patent Scope L An automatic pin bonding method for strip bonding, including at least: Having a plurality of pads; providing a flexible chip carrier with a plurality of inner pins, wherein the inner pins are corresponding to the pads of the chip respectively; so that the inner pins are located on the pads And the leading edges of the inner pins overlap with the pads, so each pad includes a pad overlay area and a pad connection area; and each of the inner pads The leading edges of the pins are electrically connected to the pad connection areas of each of the pads, respectively. 2. The strip-shaped automatic splicing inner pin bonding method described in item 1 of the scope of the patent application, wherein the step of forming an electrical connection is to use a wire-bonding machine at the leading edge of each of the inner pins and each of the A solder ball is formed between the solder pad connection areas of the solder pads. 3. —A strip-shaped automatic bonding inner pin bonding structure, including at least: a wafer with a plurality of solder pads; a flexible chip carrier with a plurality of inner pins, wherein the inner pins are located on the solders Pads, and the leading edges of the inner pins and the pads are partially overlapped, so that each of the pads has a pad overlay area and a pad connection area; and a plurality of solder balls, Each of the solder balls is located between the leading edge of each of the inner pins and the pad connection area of each of the pads, for electrically connecting the leading edge of each of the inner pins with The pad connection area of each of the pads. 4. As mentioned in item 3 of the scope of the patent application, the internal guide of the strip-shaped automatic joint (please read the notes on the back before filling this page) This paper size applies to China National Standard (CNS) A4 specification (210X297) (Centimeters) 412852 A8 4 1 I 6twl'.d〇c / 002 B8 C8 D8 VI. Patent application foot joint structure, in which the solder balls are wired with a wire drawing machine at the leading edge of each inner pin and each Formed between the pad connection areas of the pads. 5. A semiconductor package including at least: a chip having a plurality of pads; a plurality of inner pins, the leading edges of the inner pins and the pads partially overlap, so that each of the pads is separately There is a pad overlay area and a pad connection area, and a plurality of solder balls, wherein each of the solder balls is respectively located at the leading edge of each of the inner pins and is connected to the solder pad of each of the solder pads. Between the pads for electrically connecting the leading edge of each of the inner pins and the pad connection region of each of the pads: and an insulating material covering the chip, the inner pins and the pads Solder ball. 6. The semiconductor package according to item 5 of the scope of the patent application, wherein the solder balls are respectively formed between the leading edge of each of the inner pins and the pad connection area of each of the pads using a wire bonding machine. form. (Please read the cautions on the back before filling this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs This paper applies the Chinese National Standard (CNS) Α4 specification (210 × 297 mm)
TW88107272A 1999-05-05 1999-05-05 Inner lead bonding method and structure of the tape automated bonding (TAB) TW412852B (en)

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