TW408464B - Full chip electrostatic discharge protection architecture with electrostatic discharge common pathways - Google Patents

Abstract

This invention provides a kind of full chip electrostatic discharge protection architecture having a plurality of electrostatic discharge common pathways, which could effectively protect the integrated circuit having multiple sets of separate power source lines to solve the problem of inter circuit or interface circuit electrostatic discharge damage caused by the electrostatic discharge. In this invention, each power source line of the same electric potential of the integrated circuit is through one electrostatic discharge dual direction connecting device to connect to one electrostatic discharge common pathway, there is one electrostatic discharge clamping circuit connected between every two electrostatic discharge common pathways with high and low voltage gradient to drain the electrostatic discharge current. Utilize the full chip electrostatic discharge protection architecture provided by this invention, the integrated circuit with multiple sets of separate power source lines can drain the electrostatic discharge current through one electrostatic discharge common pathway that provides effective electrostatic discharge drain pathway when electrostatic discharge occurs; therefore, the electrostatic discharge current will not run helter-skelter inside the integrated circuit and cause unexpected damage. When the integrated circuit is under normal working condition, the added dual connecting device and the electrostatic discharge clamping circuit is kept in close status, so that it will not cause the power interference in the separated power source lines.

Description

Printed by the Central Ministry of Economic Affairs and Consumers' Cooperatives. V. Description of the invention (5-1) Field of the invention: The present invention relates to an electrostatic discharge protection circuit in integrated circuits, and more particularly to an integrated circuit in integrated circuits. The ESD shared channel architecture in the device serves as a full-chip ESD protection device. 5-2 Background of the Invention: In advanced ultra large integrated circuits, the power lines of different circuits are separated to avoid problems of noise coupling and ground bouncing between different circuits. In today's very large integrated circuits, there are often more than ten power supply pins to fully supply the power required for the operation of the integrated circuits. However, according to the following reference materials, an integrated circuit with a separate power pin and a separate power line has an interface circuit that is sensitive to electrostatic discharge damage. Even around the input and output pads of the circuit, electrostatic discharge has been set up. In the case of a protective circuit, the problem of electrostatic discharge damage to the interface circuit still occurs. [1] N. Maene, J. Vandenbroeck, and L. Bempt, " On chip electrostatic discharge protections for inputs, outputs, and supplies of CMOS circuits, '' Proc. Of EOS / ESD Symp., 1992, pp. 228 -233.

[2] M.-D. Ker and T.-L. Yu, u ESD protection to overcome internal gate-oxide damage on digital-analog interface of mixed-mode CMOS IC5s, M Journal of Microelectronics and Reliability, vol.36, no. 11/12, 1996, pp.1727-1730. (Please read the notes on the back before fvr? This page) Λ clothing. The size of the paper is applicable to China National Standard Car (CNS) Λ4 specification (210 ×: 297) Public waste)

Printed by the Shellfish Consumer Cooperative of the Central Standards Bureau of the Ministry of Common Carriage, V. Invention Description () [3] M.-D. Ker, C.-Y. Wu, T. Cheng, M. Wu, T.-L. Yu, and A. Wang, "Whole-chip ESD protection for CMOS VLSI / ULSI with multiple power pins, M Proc. of 1994 IEEE International Integrated Reliability Workshop, USA, 1994, pp.124-128.

[4] M.-D. Ker, C.-Y. Wu, H.-H. Chang, and T.-S. Wu5 “Whole-chip ESD protection scheme for CMOS mixed-mode IC's in deep-submicron CMOS technology , "Proc. Of IEEE Custom Integrated Circuits Conference, USA, 1997, pp. 31-34. Electrostatic discharge occurs between any two pins of an integrated circuit, and the electrostatic discharge current enters the product from the input pad or output pad. It then flows out of the integrated circuit from another input pad or output pad. Therefore, this kind of pin-to-pin electrostatic discharge test combination has been included in the electrostatic discharge test standard [5]. Under this type of pin-to-pin electrostatic discharge test combination, a positive or negative electrostatic discharge voltage is applied to the input or output pin, and the other input or output pin is simultaneously grounded, but all The Vdd and Vss pins are floating. Under this kind of pin-to-pin electrostatic discharge test, it will usually cause unexpected electrostatic discharge damage in the internal circuit. [5]. EOS / ESD Standard for ESD Sensitivity Testing, EOS / ESD Association, Inc., NY., 1993. In order to overcome the above-mentioned unexpected damage caused by electrostatic discharge in the internal circuit, some previous designs have been Propose 'For example, as reported in References to [8], put a set of back-to-back diode strings between the discrete power lines of the integrated circuit. Devices that use diodes, metal-oxide semiconductors, bipolar junction transistors, or thick silicon oxide, connected between discrete power lines of integrated circuits, have been disclosed in several US patents and papers. Please refer to {Please read the note on the back before filling this page ¾ '' '. Binding. The paper size is suitable for the 11 financial materials (CNS) Α4 · (210X297 公 ^ 〇8464αί _____ ^ Β7__ V. Description of the invention_ () References [9]-[16]. [6] S. Dabral, R. Aslett, and T. Maloney, "Designing on-chip power supply coupling diodes for ESD protection and noise immunity, Proc. Of EOS / ESD Symp. , 1993, pp. 239-249.

[7] T. Maloney and S. Dabral, "Novel clamp circuits for IC power supply protection, " Proc. Of EOS / ESD Symp., 1995, pp. 1-12.

[8] H. Nguyen and J. Walker, “Electrostatic discharge protection system for mixed voltage application specific integrated circuit design,’ ’US patent number 5,616,943, Apr., 1997.

[9] J. Kuo,. "ESD protection scheme," US patent number 5,196,981, Mar., 1993.

[10] J. Leach, “Method of forming an electrostatic discharge protection circuit,’ ’US patent number 5,290,724, Mar ,, 1994.

[11] W. Miller, “Electrostatic discharge protection for CMOS integrated circuits,’ ’US patent number 5,301,084, Apr., 1994.

[12] W. Reczek and H. Terletzki, ^ Integrated semiconductor circuit with ESD protection, ’’ US patent number 5,426,323, Jun., 1995. Printed by the Bayer Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs

{#Read the notes on the back before filling out this 1IC

[13] T. Maloney, ".Electrostatic discharge protection circuits using biased and terminated PNP transistor chains ,, 5 US patent number 5,530,612, Jun., 1996.

[14] S. Voldman, “Power sequence independent electrostatic discharge protection circuits,’ ’US patent number 5f610,791, Mar., 1997.

[15] S. Voldman »." Voltage regulator bypass circuit, M US patent number 5,625,280, Apr., 1997. This paper size is applicable to China National Standard (CNS) A4 specification (210X297). 5. Description of the invention (4〇 84β ^ Α7 Β7 Printed by the Consumers ’Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs [16] E. Worley, et al.,“ Sub-micron chip ESD protection schemes which avoid avalanching junction, ”Proc. Of EOS / ESD Symp., 1995 , pp. 13-20, please refer to the first figure 'shows a design method of the electrostatic discharge protection circuit in the conventional technology. A integrated circuit includes a circuit I and a circuit Π' are both internal circuits of the integrated circuit (Internal Circuit) needs to be protected by electrostatic discharge protection elements. Between the power line VDD1 and the power line VSS1, there are two diodes and two metal-oxide semiconductors, and the two contact pads serve as the wheel of the circuit I. The input pad 100 and the output pad 200. The power cord is used to supply the power required for the circuit I to work, and Vdd2 and Vss2 are used to supply the power required by the circuit π. In the previous design of the first figure, the power cord was routed through two Polar Body Series 600 The power line Vdd2, and the power line Vss are connected to the power line Vss2 via the diode string 500. The number of diodes in the diode string separates the electrical level or noise level between the power lines. Quasi-related, the diode string added between the separated power lines is designed to conduct the electrostatic discharge current between the separated power lines to avoid causing the internal circuit of the integrated circuit in the case of electrostatic discharge Electrostatic discharge damage. However, when the integrated circuit is under normal working conditions, the diode string is used to separate the voltage or miscellaneous voltage on the separated power line pa! If the integrated circuit has many To separate power lines, a back-to-back diode string must be added between every two adjacent power lines. As shown in the second figure, it is between the separate power lines of the integrated circuit with four internal circuits A typical example of a back-to-back diode string is used. Please refer to the second picture 'showing four with four sets of power cords (please read the note on the back before filling out this page) ^. 1Τ ------ \} — 5 ---;-β m scales 6 Consumers' Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs, Printed Together 408464 A7 _ B7 V. Description of the invention. (.) Circuit, circuit I is to supply power using power lines VDD1 and vssl, and circuit Π is to supply power using power lines VDD2 and VSS2 The dish is powered by the power line ν_ and VSS3, and the circuit IV is powered by the power line 乂 叩 彳 and VSS4. The back-to-back diode series 500 is inserted between the power supply lines VDD1 and VDD2, between the power supply lines VDD2 and VDD3, and between the power supply lines VDD3 and VDD4. A back-to-back diode string 500 is added between the power supply lines VSS1 and VSS2, between the power supply lines VSS2 and Vss3, and between the power supply lines VSS3 and VSS4. When the integrated circuit is under an electrostatic discharge condition, this back-to-back diode series provides a way to separate the electrostatic discharge current conduction between the power lines. For example, as shown in the second figure, a positive electrostatic discharge voltage is applied to the input pad 100 of the circuit I, but the input pad 100 of the circuit IV is relatively grounded. Under the electrostatic discharge of this pin butt, the positive electrostatic discharge voltage or current will pass through the diode Dpi (or Dnl) in the input electrostatic discharge protection circuit on the input pad 100 of the circuit I to be introduced into the power supply. Line VDD1 (or VSS1). Such an electrostatic discharge voltage / current on the power supply line Vddi (or VSS1) passes through a diode string between the power supply lines VDD1 and VDD2 (or between the power supply lines Vss) and VSS2, and enters the power supply line VDD2 ( Or VSS2). As shown by the dotted line explained in the second figure, the electrostatic discharge voltage or current flows through the diode string 500 between the separate power supply lines of the integrated circuit and flows to the power supply line VDD4 (or VSS4). Finally, after the diode Dp4 or Dn4 of the electrostatic discharge protection circuit is input on the input pad 100, the electrostatic discharge voltage / current flows from the ground input pad 100 of the circuit IV to the ground. In the second figure, before the electrostatic discharge current flows out from the ground input pad 100 of the circuit IV, at least three diodes are passed in series. If a paper size applies the Chinese National Standard (CNS) Ad Grid (210X29? Public waste) (Please read the notes on the back before filling out this page) 'Pack. Order 408464 Central Standards Bureau, Ministry of Economic Affairs A7 is printed. 5. Description of the invention () — 'Integrated circuit has many separate power lines to supply power to many different circuits.' The more diode strings in the ESD current path, the more With a long discharge delay, it is too late for the electrostatic discharge current to be discharged out of the integrated circuit from these two extinguishing series. Therefore, electrostatic discharge damage will still occur in the integrated circuit. Therefore, the electrostatic discharge protection design shown in the first figure is no longer suitable for very large integrated circuits with multiple sets of power lines. 5-3 Purpose and summary of the invention: The present invention proposes a full-chip electrostatic discharge protection architecture with multiple electrostatic discharge common channels, which can effectively protect integrated circuits with multiple sets of separated power lines to solve the problem of integrated circuits due to electrostatic discharge. Causes electrostatic discharge damage to internal or interface circuits. In the present invention, the power line of the mother circuit of the integrated circuit is connected to an electrostatic discharge common channel through an electrostatic discharge bidirectional connection element. There is an electrostatic discharge clamp between every two electrostatic discharge common channels having high and low voltage differences. The circuits are connected to discharge static discharge current. By using the full-chip electrostatic discharge protection architecture proposed by the present invention, when an integrated circuit having multiple sets of separated power lines is used to generate an electrostatic discharge discharge path through an electrostatic discharge common channel when an electrostatic discharge occurs, an electrostatic discharge current can be discharged. Therefore, the electrostatic discharge current will not scatter around inside the integrated circuit and cause unpredictable damage. Β When the integrated circuit is under normal working conditions, the two-way connecting components and the electrostatic discharge hanging circuit are kept closed. Therefore, this paper size that does not cause separation applies to the Chinese National Standard (CNS) Λ4 grid (210X297). (Please read the note f in the back first and then fill out this page) -------.-- 7 ~ Guangzhou: Install ------ Order ------ Printed by the Shell Standard Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs A7 ____ ~ _! 1 ---- ---- V. Inventive Suction (.) Power Problems with power interference between wires. 5-4 Schematic illustration: For the purpose and advantages of the present invention, please refer to the following detailed description, and also refer to the following schematic illustrations, where: The first diagram is a schematic diagram showing an electrostatic discharge protection circuit designed using conventional techniques The back-to-back diodes are connected in series between the separate power lines. The second diagram is a schematic diagram showing the electrostatic discharge protection circuit designed by the conventional technology. 'Use multiple back-to-back diodes between multiple separate power lines. The body is connected in series and shows the flow path of the electrostatic discharge current. The third figure shows the design of the electrostatic discharge protection structure of the present invention, which has two electrostatic discharge common channels to discharge the electrostatic discharge current. The fourth figure shows the present invention A circuit diagram of a plurality of electrostatic discharge common channels on a wafer, and a plurality of electrostatic discharge bidirectional connection elements, the two-way connection elements are connected between the electrostatic discharge common channels and the separated power lines, and between the electrostatic discharge common channels. Circuits are connected to each other by electrostatic discharge clamping; the fifth figure shows an integrated circuit of the present invention Schematic diagram of the application, JieZhao circuit includes 5 ¥, 3 ¥, 2.5 ¥ and 〇 乂 power cord, and uses four ESD common channels to achieve the purpose of full-chip ESD protection; Figure 6A shows the invention The indication of the electrostatic discharge bidirectional connection element 9 This standard is applicable to the national standard (~ CNS) A4 (2 丨 0X297) £ 7 " ----— ----; --ΊΛ-kII (please first Please read the note on the back ¥ 哏 and fill in this page) Order __4084 ^ 4 __ 5. Description of the invention () Figure, this component is composed of two P-type silicon controlled rectifiers (PSCR); The sixth B picture series A schematic cross-sectional view of an electrostatic discharge bidirectional connection element according to the present invention is shown. A first P-type silicon controlled rectifier and a second P-type silicon controlled rectifier are built on a P-type substrate; FIG. 7A shows another static electricity of the present invention. A schematic diagram of a discharge bidirectional connection element is composed of a first N-type silicon controlled rectifier and a second N-type silicon controlled rectifier. FIG. 7B is a schematic cross-sectional view showing another electrostatic discharge bidirectional connection element of the present invention. The first N Type silicon controlled rectifier and second N type silicon controlled rectifier are manufactured in P type On the substrate; printed by the consumer cooperation of the Central Bureau of Standards of the Ministry of Economic Affairs {Please read the precautions on the back before filling out this page) Figure 8 is a schematic diagram showing an electrostatic discharge clamping circuit of the present invention. This electrostatic discharge clamping circuit is It includes an electrostatic discharge detection circuit and several N-type metal-oxide-semiconductor-controlled lateral silicon-controlled rectifier elements. FIG. 9 shows a schematic diagram of another electrostatic discharge clamping circuit according to the present invention. A P-type metal-oxide-semiconductor-controlled lateral silicon-controlled rectifier element, wherein the gate of the P-type metal-oxide-semiconductor-controlled lateral silicon-controlled rectifier element is connected to an electrostatic discharge detection circuit through an inverter; / Tenth The figure shows another implementation of an electrostatic discharge clamping circuit according to the present invention, which includes an electrostatic discharge detection circuit, several N-type metal-oxide-semiconductor controlled lateral silicon-controlled rectifier elements, and several diodes, of which N-type The gate of the lateral silicon controlled rectifier controlled by the metal-oxide semiconductor transistor is connected to the electrostatic discharge detection circuit; f 10 This paper size is applicable to the Chinese National Standard (CNS) A4 specification (2 丨 OX 297) (Centi) 4〇8464 A7 ----------- B7_ _ V. Description of the invention _ () '' The eleventh figure shows another schematic diagram of the implementation of the electrostatic discharge clamping circuit of the present invention '' including an electrostatic discharge detection The test circuit, several P-type metal-oxide-semiconductor-controlled lateral silicon-controlled rectifiers and several diodes, among which the poles of the P-type metal-oxide-semiconductor-controlled lateral silicon-controlled rectifiers are connected to each other via an inverter. Electrostatic discharge detection circuit; The twelfth figure is a schematic diagram of another application of the present invention. The integrated circuit has multiple sets of power lines 'but only uses one electrostatic discharge shared channel'. Each input / output pad and power line are connected. An electrostatic discharge bidirectional connection element is connected to the electrostatic discharge common channel to achieve the design of full-chip electrostatic discharge protection. The thirteenth figure is a schematic diagram showing the electrostatic discharge two-way connection element in the twelfth figure of the present invention. The diode is connected in parallel with several N-type rectifier elements. Figure 14 is a schematic diagram showing another electrostatic discharge double south connection element of the present invention in Figure 12; the element includes several diodes. versus N-type silicon controlled rectifier / flow elements; FIG. 15 is a schematic diagram showing the electrostatic discharge bidirectional connection element of FIG. 12 of the present invention, including a diode in parallel with a plurality of p-type stone-controlled rectifiers; and The sixteenth figure is a schematic diagram showing another embodiment of the electrostatic discharge bidirectional connection element in the twelfth figure of the present invention. The element includes several diodes and several P-type silicon controlled rectifier elements. / 5_5 Detailed description of the invention: This paper size applies the Chinese National Standard (CNS) A4 specification (210X297). (Please read the notes on the back before filling this page.) Order by the Central Sample Rate Bureau of the Ministry of Economic Affairs. # 工 社 印A7 B7 464 V. Description of the invention () The present invention proposes a full-chip electrostatic discharge protection architecture with multiple electrostatic discharge common channels to solve the problem of damage to internal circuits caused by electrostatic discharge of integrated circuits with separate power lines. Multiple electrostatic discharge common channels formed by wide metal lines are added to a integrated circuit with multiple separate power lines. An electrostatic discharge bidirectional conduction element is used to connect between each separate power cord and the common path for electrostatic discharge. When an electrostatic discharge occurs in an integrated circuit having a plurality of separated power lines, the electrostatic discharge current is guided into the electrostatic discharge common channel through the two-way connection element. Using the electrostatic discharge common channel of the present invention, the electrostatic discharge The discharge current is guided from the internal circuit of the integrated circuit, and the electrostatic discharge current is discharged out of the integrated circuit through the designed electrostatic discharge registration circuit. By using the full-chip electrostatic discharge protection architecture of the present invention with a common channel for electrostatic discharge, the integrated circuit with multiple separated power lines can effectively avoid the problem of damage to the internal circuits of the integrated circuit due to electrostatic discharge, so as to achieve a full range Protective measures. Please refer to the third figure 'The integrated circuit has k sets of circuits and k sets of separated power lines. Circuit I supplies power using power lines VDD1 and ~ ⑻, circuit π supplies power through power lines VDI> 2 and vSS2, circuit board supplies power through vDD3 and Vsss, and circuit rv supplies power through 乂 4 and vSS4. The circuit v is the power supply through the power line ¥ 5 and vSS5, and the circuit κ is the power supply through the power lines Vddjc and Vss_k. The circuits I to K are the internal circuits of the integrated circuit. Each internal circuit accepts external incoming circuit signals via the input pad 100. There is an input-level electrostatic discharge protection circuit at the input 塾 100, and the Chinese National Standard (CNS) Α4 standard (210 × 297 & ^) is applied to the paper standard. (Please read the precautions on the back before filling in this change)

1, 1T Printed by Shelley Consumer Cooperative, Central Standards Bureau of the Ministry of Economic Affairs Λ 7 B7 ------------------- V. Description of the invention () In the three figures, the input stage electrostatic discharge circuit is It consists of-diode Dpi and another diode Dnl. Between the input pad and the internal circuit there is-a resistor R1 (R2, ..., or R_k) connected to the β female-an internal circuit is sent out through the output 塾 200 The signal 'input 200 is driven by a complementary CMOS output buffer stage (CMOS output buffer), which includes a pMOS and an NMOS, and the PMOS and NMOS of the output stage also serve as the electrostatic discharge protection circuit of the output stage. Printed by the Employees ’Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs (please read the note on the back with the item before writing this page) k sets of separated power cords are connected to the first electrostatic discharge sharing via a plurality of electrostatic discharge bidirectional connection elements A Channel or the second electrostatic discharge shared channel to provide a discharge current path when an electrostatic discharge occurs. The electrostatic discharge bidirectional connection element A connects the power line Vdd of each integrated circuit with the first electrostatic discharge shared channel, and the electrostatic discharge bidirectional connection element A Connected between the power line Vss and the second electrostatic discharge common channel. In the circuit K, the power line VDDJc is connected to the first electrostatic discharge common channel via the electrostatic discharge bidirectional connection element A, and the power line VSSJc is bidirectionally connected via electrostatic discharge Element A is connected to the first electrostatic discharge common channel. In the integrated circuit having separate power lines, 'the VDD power lines of all internal circuits are connected to the first electrostatic discharge common channel via the electrostatic discharge bidirectional connection element A', all internal The power supply line Vss of the circuit is connected to the second electrostatic discharge via the electrostatic discharge line bidirectional connection element a Common channel. Unlike the previous design of the first figure, the electrostatic discharge bidirectional connection element A connects the first electrostatic discharge common channel or the second electrostatic discharge common channel from a separate power line. The first electrostatic discharge common channel and the second electrostatic discharge common channel It is composed of wide metal wires with high electrical conductivity. It is applicable to ____13 two scales of the first and second common channels for electrostatic discharge --- A7 printed by the Bayer Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs- ----- B7 V. Description of the invention _ () 'has several electrostatic discharge clamping circuits B. When an electrostatic discharge occurs, the electrostatic discharge clamping circuit will form a path between the first and second electrostatic discharge common channels. 'Electrostatic discharge voltage / current across the row; but when the integrated circuit is under normal operating conditions, the electrostatic discharge clamping circuit is closed' to prevent the first electrostatic discharge common channel and the second electrostatic discharge common channel The path between them can thus avoid the problem of voltage interference between power lines with different voltage levels. In the third figure, 'because the first static The discharge common channel is connected to all VDD power lines of the integrated circuit. 'When the integrated circuit is in normal operation, the voltage level above the first electrostatic discharge shared channel is charged to the same level as the integrated circuit VDD voltage level. The second electrostatic discharge has two channels connected to the Vss power line of the integrated circuit. When the integrated circuit is under normal operating conditions, the voltage level of the second electrostatic discharge shared channel is charged to the voltage of the integrated circuit Vss. Level. The electrostatic discharge clamping circuit B between the first electrostatic discharge common channel and the second electrostatic discharge common channel is designed to remain closed when the integrated circuit is under normal operating conditions. Therefore, from the first There is no current leakage from the electrostatic discharge common channel to the second electrostatic discharge common channel. The first electrostatic discharge common channel, the second electrostatic discharge common channel, the electrostatic discharge bidirectional connection element A and the electrostatic discharge clamp are designed in the third figure. Circuit B does not affect the normal operating function of the integrated circuit with multiple separate power lines. However, when the integrated circuit is under electrostatic discharge, the first electrostatic discharge common channel, the second electrostatic discharge common channel, the electrostatic discharge bidirectional connection element and the electrostatic discharge clamp circuit element designed in the third figure can provide a paper Standards are applicable to Chinese storehouse standard (CNS) Λ4 specification (210X297 mm) (read first and then read the back of the matter before filling out this page) 'Booking and order printed by the Shell Standard Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs ^ 08464 a B7 V. Description of the invention () A kind of highly conductive discharge path, which can quickly derive the electrostatic discharge current from the integrated circuit with several separated power lines, so the internal circuit and interface circuit will not be accidentally caused by electrostatic discharge. For example, as shown in the third figure, when a positive electrostatic discharge voltage is added to the input "100" of the circuit I and the input pad 100 of the circuit K is relatively grounded, the electrostatic discharge current is Will pass through the diode Dpl of the input stage electrostatic discharge protection circuit of circuit I, and will be introduced into the power line VDD1, and the electrostatic discharge current on the power line vDD1 will pass through the electrostatic discharge The element A is bidirectionally connected and is introduced into the first electrostatic discharge common channel, and then the electrostatic discharge current is discharged to the second via the electrostatic discharge clamping circuit B ′ between the first electrostatic discharge common channel and the second electrostatic discharge common channel. Common channel for electrostatic discharge. The electrostatic discharge current on the second electrostatic discharge common channel is introduced into the power line yssk of the circuit K through the electrostatic discharge bidirectional connection element A. Finally, the electrostatic discharge current on the power line Vss_k is input through the circuit κ The diode Dn-k of the first-level electrostatic discharge protection circuit is discharged to the grounded input pad 100. Therefore, the electrostatic discharge current is discharged through the designed electrostatic discharge bidirectional connection element A, the first electrostatic discharge common channel and the second electrostatic discharge common channel, and the discharge path formed by the electrostatic discharge clamping circuit B, even if the integrated circuit With many separate power cords, it does not cause accidental electrostatic discharge damage between internal circuits or interface circuits. Because the ESD bidirectional connection / 0 piece A 'provides several highly conductive paths between the separated power cord and the ESD common channel', the ESD current can be input from the integrated circuit's input pad 100 or output pad 200, Quickly introduced to the common channel of electrostatic discharge, so the electrostatic discharge current can be far away from the internal circuit, so it will not be on the internal circuit ___ 15 This paper size applies to Chinese national standards (CNS> Λ4 specifications (2 丨 0 > ^^^- ---- (Please read the note on the back of the feed item rl · ^ 写 本 先)----fl ^ i ^^^^ 1 ^^^^ 1 _-_ ..... m ^ i, ^ f El _ · Order 4〇 ^ 4β4 ΑΊ J Β7 V. Description of the invention () Causes damage. The common channel for electrostatic discharge composed of wide metal wires can quickly discharge the electrostatic discharge current on the wafer. To enhance the electrostatic discharge current The discharge speed in the integrated circuit requires a fast conducting electrostatic discharge clamping circuit B to discharge the electrostatic discharge current from the first electrostatic discharge common channel to the second electrostatic discharge common channel. In the following description, a fast conduction will be proposed Various designs of electrostatic discharge clamping circuits. In summary, the proposed full-chip electrostatic discharge protection architecture with a common channel for electrostatic discharge can provide a more efficient and fast electrostatic discharge path for integrated circuits with multiple separated power lines, thus preventing electrostatic discharge damage from occurring in the Problems in Internal Circuits " Central Standards Bureau of the Ministry of Economic Affairs! Printed by the Industrial and Consumer Cooperatives (please read the precautions on the back before filling out this page). Full-chip electrostatic discharge protection architecture with a common channel for electrostatic discharge can also be applied. On the integrated circuit of mixed voltage power supply. As shown in the circuit design of the fourth figure, this integrated circuit has two groups of circuits. One group of circuits has low VDD power supply (VddLI, VDDL2 and " VdDL3) and low Vss power supply (VSSL1, VsSL2 and VsSL3), the power lines of the other group of circuits are still VDD power lines (V " ddh4, Vddhs, ... and Vddh_1c), and odd Vss power lines (VsSH4, VsSH5, ... and VssH_k) In the case of complex power supplies, three common ESD channels are used as a full-chip ESD protection design. As shown in Figure 4 The first ESD common channel is connected to the low VDD power supply line (VDDL1, VDDL2, and Vddu) via the electrostatic discharge bidirectional connection element A. The third electrostatic discharge common channel is connected to the 1¾ VDD power supply line via the electrostatic discharge bidirectional connection element A ( VDDH4, VddHS, ... and VdDHJc). Because the vss power lines are all grounded, the second ESD common channel is connected to all Vss power lines of the two groups of circuits via the electrostatic discharge bidirectional connection element A. This paper is in accordance with Chinese national standards ( CNS) A4 specification (210X297 mm) Printed by the Shellfish Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs ^ 〇S464 A7-B7 V. Description of the invention _ () (VsSLl, V SSL2, VSSL3 'VSSH4, VSSH5, ... and VSSH_k). In order to quickly discharge the electrostatic discharge current between the first electrostatic discharge common channel, the second electrostatic discharge common channel, and the third electrostatic discharge common channel, three fast conducting electrostatic discharge clamping circuits B are placed between the electrostatic discharge common channels. . The electrostatic discharge clamping circuit B is designed to have a high-impedance state to block the current path between the electrostatic discharge common channels when the integrated circuit is under normal operating conditions. However, the electrostatic discharge clamping circuit B can form a low-impedance path between the electrostatic discharge common channels when the integrated circuit is in an electrostatic discharge situation, so as to quickly discharge the electrostatic discharge current. With proper circuit design, this special electrostatic discharge clamp circuit B can be designed, which will be described in the following description. The full-chip ESD protection architecture formed by the three ESD shared channels described in the fourth figure can still effectively protect integrated circuits with mixed voltages and separate power lines. For integrated circuits with many mixed voltage power supplies, the proposed full-chip ESD protection architecture with a common channel for electrostatic discharge can be extended to protect integrated circuits with multiple and complex power sources. The embodiment shown in the fifth figure shows an integrated circuit with three VDD power supplies (2, 5V, 3V, and 5V). In the fifth figure, the 2.5-volt VDD power supply is for circuit I and circuit Π, but the power supply for circuit II and circuit IV is 3 volt VDD power, and the power supply for circuit V to circuit K is 5 volt VDD power. The Vss power supply from Circuit I to Circuit K is 0 Volts. In the above integrated circuit, there is a very complicated power supply. Since the four ESD common channels are used, the full-chip ESD protection structure shown in the fifth figure is designed. Please refer to the fifth picture, the first common channel for electrostatic discharge via electrostatic discharge. The paper size applies to the Chinese National Standard (CNS) A4 specification (210 × 297 cm) (please read the notes on the back before filling this page), 丨Assembly _ printed by the Central Standards Bureau of the Ministry of Economic Affairs, printed by Aigong Consumer Cooperative A7 B7 5. Description of the invention. () A two-way connection element A is connected to the 电路 00_2. ^ Power line of the circuit I and the circuit Π. The fourth electrostatic discharge common channel is connected to the VDD_3V power line of the circuit board and the circuit IV through a two-way electrostatic discharge bidirectional connection element. The third electrostatic discharge common channel is connected to the VDD_5V power line of the circuit V to the circuit K through the electrostatic discharge bidirectional connection element. Because the Vss power lines between the circuits are grounded, the second ESD common channel is connected to all VSs_ov power lines via the ESD bidirectional connection element. Between the electrostatic discharge common channels, five electrostatic discharge clamping circuits B are used to connect the first electrostatic discharge common channel, the second electrostatic discharge common channel, the third electrostatic discharge common channel, and the fourth electrostatic discharge common channel. With proper design, a full-chip electrostatic discharge protection design with a common channel for electrostatic discharge can still be proposed for integrated circuits with many mixed voltage power supplies. Please refer to Figures 6A and 7A, which show the electrostatic discharge bidirectional connection. The circuit design and component structure of component A are connected between the VDD or Vss power supply line and the common channel for electrostatic discharge. Please refer to the sixth diagram A. The electrostatic discharge bidirectional connection element A is connected by two P-type silicon controlled rectifier elements (PSCR1 and PSCR2) to provide a bidirectional current conduction between the electrostatic discharge common channel and VDD (or Vss). path. The anode of PSCR1 is connected to the cathode of PSCR2 and the common channel for electrostatic discharge. The cathode of PSCR1 is connected to the anode of PSCR2 and connected to the VDD or Vss power line. The gates of PSCR1 and PSCR2 are connected to the cathodes of PSCR1 and PSCR2, respectively. Refer to Figure 6A. When the voltage difference between the ESD shared channel and the VDD (or Vss) power line is greater than the critical voltage of the P channel metal-oxide semiconductor transistor, PSCR1 is triggered to conduct, providing a common channel between the ESD shared channel and This paper size applies to Chinese National Standard (CNS) A4 specification (210X297 cm). &Quot; -3 < Please read the precautions on the back before writing this page)

Printed by the Consumer Cooperatives of the Central Bureau of Standards of the Ministry of Economic Affairs 4〇 ^ 4β !, Α7 --- ------------- B7 15. Description of Invention () 'vDD (or vss) power cord Between low impedance paths. On the other hand, if the voltage difference from the power line VD "or VSS) to the electrostatic discharge common channel is greater than the critical voltage of the P-type metal-oxide semiconductor transistor, psCR2 will be turned on, providing a Or Vss) low-impedance circuit # between power lines: will provide a two-way current conduction path between the electrostatic discharge common channel and the V⑽ (or vss) power line to achieve full-chip electrostatic discharge protection design. See page Fig. 6B shows a cross-sectional view of an electrostatic discharge bidirectional connection element A fabricated on a P-type substrate. See Fig. 7A 'Another electrostatic discharge bidirectional connection element a is composed of two N-type dream-control rectifier elements (N_type siiic. ne〇ntr〇ued rectifier (NSCR) components (NSCR1 and NSCR2) 'Provide a two-way conduction path between the electrostatic discharge common channel and the VDD (or Vss) power line. The anode of NSCR1 is connected to the cathode of NSCR2, and Connected to the Vss or VDD power line, the cathode of NSCR1 is connected to the anode of NSCR2 and connected to the common channel for electrostatic discharge. The gates of NSCR1 and NSCR2 components are connected to the anodes of NSCR1 and NSCR2 components. See also Figure 7b shows a cross-sectional view of the electrostatic discharge bidirectional connection element A. The electrostatic discharge bidirectional connection element composed of NSCR1 and NSCR2 is manufactured on the P-type substrate. In the seventh diagram A, if it is shared from electrostatic discharge The voltage difference between the channel and the VDD (or Vss) power line is greater than the critical voltage of the N-channel metal-oxide semiconductor transistor. NSCR2 will be triggered to conduct electricity, providing a path between the ESD shared channel and the VDD (or Vss) power line. Low impedance path. On the other hand, the voltage difference from the VDD (or Vss) power line to the ESD shared channel is greater than the critical voltage of the N-channel metal-oxide semiconductor transistor, NSCR1 will be triggered 19 (Please read first (Notes on the back then fill out this page)

1. The 1T scale is applicable to the Chinese National Cricket (CNS) A4 specification (210X297 cm) ^ Printed by the Shell Standard Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 48044 A7 B7 V. Description of the invention A low impedance path between the discharge common channel and the vDD (or vss) power line. This provides a two-way conduction path between the electrostatic discharge common channel and the vDD (or vss) power line, achieving the purpose of full-chip electrostatic discharge protection design. Referring to FIG. 7B, a cross-sectional view of the electrostatic discharge bidirectional connection element A shown in FIG. 7A is shown. The electrostatic discharge bidirectional connection element A is composed of NSCR1 and NSCR2, and is fabricated on a P-type substrate. The electrostatic discharge clamping circuit B between the electrostatic discharge common channels at different voltage levels is shown in the eighth and ninth figures. The electrostatic discharge clamping circuit B is to provide a conductive path from a high-voltage electrostatic discharge common channel to a low-voltage electrostatic discharge common channel when the integrated circuit is under an electrostatic discharge pressure. However, when the integrated circuit is under normal operating conditions, the electrostatic discharge clamping circuit B must be kept closed to block the current paths in the high-voltage electrostatic discharge common channel and the low-voltage electrostatic discharge common channel. In order to meet the above requirements, the actual design of the fast conducting electrostatic discharge clamping circuit B is shown in the eighth figure. Please refer to the eighth figure. A plurality of N-channel metal-oxide-semiconductor-controlled lateral silicon controlled rectifiers (NMOS-controlled lateral silicon controlled rectifiers, NCLSCR) are formed in a high voltage electrostatic discharge shared channel and low voltage in a series 歹 ij manner. Electrostatic discharge is shared between channels. NCLSCR serial elements include NCLSCR1 to NCLSCRn. These NCLSCR elements are all coupled in series. The anode is connected to the high-voltage electrostatic discharge common channel and the cathode is connected to the low-voltage electrostatic discharge common channel. An electrostatic discharge detection circuit B11 controls the gates of all components. Pole, and connected to the common channel of high-voltage electrostatic discharge and the low paper size are applicable to the Chinese National Standard {CNS) A4 specification (210X297 cm) (please read the note on the back before filling this page) East.,-° Economy Printed by Shelley Consumer Cooperative of the Ministry of Standards of the People's Republic of China 48044 at ___ B7 ----- Voltage Electrostatic Discharge Common Channel H Electrostatic Discharge fa / Current When Electrostatic Discharge Clamping Circuit B, Electrostatic Discharge Detection Circuit Bll will quickly generate voltage Level, this voltage level is greater than the turn-on voltage of the N-channel metal-oxide semiconductor transistor to turn on the NCLSCR elements connected in series. However, when the integrated circuit is under normal normal operating conditions, such as the contact vGn shown in the eighth figure, the voltage level on the contact is maintained at the voltage level of the low-voltage static electricity common channel. Therefore, the N-channel metal-oxide semiconductors in the NCLSCR series are kept closed, so the NCLSCR elements connected in series are also closed to block the current path between the high-voltage electrostatic discharge common channel and the low-voltage electrostatic discharge common channel. The number of components connected in series by NCLSCR. When the integrated circuit is under normal operating conditions, the voltage difference between the high-voltage electrostatic discharge common channel and the low-voltage electrostatic discharge common channel is the maintenance power of a single NCLSCR element. In general complementary metal-oxide-semiconductor technology, it is about i volts. For example, in the fifth figure, when the integrated circuit is under normal operating conditions, the first electrostatic discharge common channel is charged to 2.5 volts, and the second electrostatic discharge common channel is at 0 volts. The electrostatic discharge clamping circuit B between the first electrostatic discharge common channel and the second electrostatic discharge common channel is designed to use three NCLSCR elements in one NCLSCR series. When the integrated circuit is in a normal state, A current path is blocked between the first electrostatic discharge common channel and the second electrostatic discharge common channel. When the integrated circuit is under normal operating conditions, the total sustaining voltage of the NCLSCR series in the electrostatic discharge clamping circuit B is larger than the voltage difference between VDD and Vss, so it will not cause the latch-up problem of the integrated circuit . This paper size is applicable to China National Standards (CNS) M specifications (210X297 cm) (Please read the notes on the back before filling this page) Order r Printed by the Central Standards Bureau of the Ministry of Economic Affairs and printed by the Bayer Consumer Cooperative 408464 A7 B7___ V. Invention Explanation () Please refer to the ninth figure, which shows another design of the electrostatic discharge clamping circuit B between the high-voltage electrostatic discharge common channel and the low-voltage electrostatic discharge common channel, which is controlled by several P-channel metal-oxide semiconductors. PMOS-controlled lateral silicon controlled rectifier (PCLSCR) is connected in series. PCLSCR serial elements include PCLSCR1 to PCLSCRn elements. All PCLSCR elements are coupled in series. The anode of TPCLSCR series is connected to high voltage. The electrostatic discharge shared channel, the cathode is connected to the low voltage electrostatic discharge shared channel, the gates of all PCLSCR elements are connected to the output terminal of an inverter B12, and the input terminal of the inverter B12 is connected to the electrostatic discharge detection circuit B11. The electrostatic discharge detection circuit B11 is connected from the high-voltage electrostatic discharge common channel to the low-voltage electrostatic discharge common channel. Referring to the ninth figure, an inverter B12 is used to switch the voltage level between the electrostatic discharge detection circuit B11 and the PCLSCR series to correctly control the gate voltage of the PCLSCR series. When the electrostatic discharge voltage / current occurs between the high-voltage electrostatic discharge common channel and the low-voltage electrostatic discharge common channel, the voltage level of the contact VQ_p is lower than the turn-on voltage of the P-channel metal-oxide semiconductor transistor in the PCLSCR series. Therefore, the PCLSCR series is turned on and turned on to form a low-impedance channel between the high-voltage electrostatic discharge common channel and the low-voltage electrostatic discharge common channel to achieve the purpose of full-chip electrostatic discharge protection. However, when the integrated circuit is in a normal operating state, the PCLSCR series remains closed to block the current path between the high-voltage electrostatic discharge common channel and the low-voltage electrostatic discharge common channel. The number of PCLSCR elements (η) in the PCLSCR series between the low-voltage electrostatic discharge shared channel and the high-voltage electrostatic discharge shared channel is calculated as n2 (Vdiff / Vh < Jld). (Notes for filling in the form page)

This paper size applies to Chinese national standards (&^; 4 specifications (210 fathers, 297 male splashes), printed by employees of the Central Bureau of Standards, Ministry of Economic Affairs, and cooperatives ^ 08464 A7 B7 V. Description of the invention () Integrated circuit is in normal normal operation In the state, vdiff is the voltage difference between the high-voltage electrostatic discharge shared channel and the low-voltage electrostatic discharge shared channel. 'Vh〇ld is the sustain voltage of a single PCLSCR element. Technically, the VhC) ld voltage is usually around 1 volt. A proper design of the number of PCLSCR elements will not cause a so-called latch-up problem between the high-voltage electrostatic discharge common channel and the low-voltage electrostatic discharge common channel. Another design of the fast conducting electrostatic discharge clamping circuit B is shown in Figs. 10 and 11. Please refer to the tenth figure. Diodes are inserted in the NCLSCR series to reduce the number of NCLSCR elements. Diodes include D1 to Dn. These diodes are serially connected to the NCLSCR elements at intervals. The gate of the NCLSCR and diode mixed series is connected to the electrostatic discharge detection circuit B11, and the electrostatic discharge detection circuit B11 is connected between the high-voltage electrostatic discharge common channel and the low-voltage electrostatic discharge common channel. Under forward bias conditions, the consumed voltage drop is about 0.7 volts. Therefore, the voltage drop across an NCLSCR element and a diode is about 1.7 volts. The number (η) of the combination of the NCLSCR element and the diode element in the electrostatic discharge clamping circuit B is calculated as ng (Vdiff / 1.7V). When the integrated circuit is under normal operating conditions, Vdiff is the voltage difference from the high-voltage electrostatic discharge common channel to the low-voltage electrostatic discharge common channel. "See Figure 11, which is another A design method in which a diode is inserted in the PCLSCR series to reduce the number of PCLSCR elements in the electrostatic discharge clamping circuit. Make proper design for the number of PCLSCR or NCLSCR components and diodes of the electrostatic discharge clamping circuit B. 23 This paper size is applicable to China National Standard (CNS) A4 (210X 297 mm) (Please read the note on the back first) Please fill in this page for more details). Production ------ Order ------ κίτί. Printed by the Consumers ’Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 408464 ~ Λ 7 Β7 5. Description of Invention () A problem of so-called latch-up occurs between the common channel for voltage electrostatic discharge and the common channel for low voltage electrostatic discharge. Please refer to the twelfth figure. A single electrostatic discharge shared channel can be used to complete the full-chip electrostatic discharge protection design. The integrated circuit includes internal circuit I to internal circuit K, and each internal circuit has an input pad 100 and a wheel. Out of the pad 200, each internal circuit is supplied by a VDD power line and a Vss power line. The vDD power line is a vDD 丨, VDD 2 or VDD_K power line, and the vss power line is a VSS_1, VSS 2 or Vss_k power line. A wide metal wire surrounds the entire wafer as a single electrostatic discharge common channel, providing a conductive path for electrostatic discharge current to prevent the electrostatic discharge current from flowing around in the internal current. D is in the integrated circuit. The input pads 100 and output pads of all internal circuits 200. The modified electrostatic discharge bidirectional connection element A1 is connected to the electrostatic discharge common channel ^ VDD and Vss separate power lines, and the modified electrostatic discharge bidirectional connection element A1 is connected to the electrostatic discharge common channel. With this design, the electrostatic discharge voltage generated on the input pad or output pad of the integrated circuit is introduced into the electrostatic discharge common channel through the modified electrostatic discharge bidirectional connection element A1, so the electrostatic discharge current is in the electrostatic discharge common channel. Medium flow. Finally, the electrostatic discharge current, via the modified electrostatic discharge bidirectional connection element A1, is discharged to the relatively grounded input or output pad of any circuit. The modified electrostatic discharge bidirectional connection element A1 is connected between the input or output pads that are relatively grounded and the common channel for electrostatic discharge. Between the contacts that span any two of the integrated circuits with separate power lines or circuits, this single-chip ESD shared channel can be used for a full-chip ESD protection design to avoid electrostatic discharge damaging internal circuits. This design can also be applied to paper without separate electric paper. Applicable to China National Standard (CNS) Λ4 specification (210X 297 cm) (Please read the back: ix notices before filling out this page)

Printed by the staff of the Central Standards Bureau of the Ministry of Economic Affairs on the cooperatives 4q ^ 464 Λ 7 a _ Β7-_...... 5. Description of the invention () In the integrated circuit of the source line or circuit. In order to provide the above-mentioned all-chip electrostatic discharge protection design with a single electrostatic discharge common channel, the modified electrostatic discharge bidirectional connection element A1 should be correctly designed. When the integrated circuit is under normal normal operation, avoid the power loss caused by the common channel through electrostatic discharge between the input pad, output pad or power contact pad. The proper design of this modified electrostatic discharge bidirectional connection element A1 is shown in the designs of Figs. 13, 14, 15, and 16. Please refer to the twelfth figure. The modified electrostatic discharge bidirectional connection element A1 uses a diode Dnla to connect the input pad 100 ′, the output pad 2000 or v, and the power cord to the common channel for electrostatic discharge. However, from the static discharge shared channel to the input pad 100, the output pad 200 or the V⑽ and Vss power lines, a plurality of N-type silicon controlled rectifier (NSCR) elements, including NscRla elements to NSCRln elements, are used as a series connection configuration. The gate of each NSCR element is connected to the anode of the NSCR element. In the modified electrostatic discharge bidirectional connection element A1, the number of components m of the NSCR series is calculated as (vDD-vss) / vh () ld to avoid the power loss through the common channel of electrostatic discharge. Vhoid is the sustaining voltage of a single NSCR element, and is about 1 volt in terms of general complementary metal-oxide-semiconductor technology. Please refer to the fourteenth figure, the diodes (Dla, Dlb, ...) are alternately inserted into the NSCR series to reduce the number of NSCR components. Please refer to the fifteenth figure. The Ϊ »type siHcon contr0iiec | PSCR type element can also be used in the modified electrostatic discharge bidirectional connection element A1. A plurality of PSCR elements ㈣ are connected to— From now on, the size of this paper is 25. The paper size is applicable to the national standard ¥ CNS (A4) specification (210 > < 297) ^ ----- {Please read the precautions on the back before filling this page) -s Xi-. J— n · Printed by the Consumer Cooperatives of the Central Bureau of Standards of the Ministry of Economic Affairs 408464 a? B7 V. Description of Invention ()

Dpla and PSCR are connected in series. The anode of the PSCR series is connected to the common channel for electrostatic discharge, and is connected to the cathode of the diode Dpla ^ The cathode of the PSCR series is connected to the anode of the diode Dpla, and is connected to VDD, Vss, the input pad 100 or the output pad 200. From the static discharge shared channel to the input pad i00, the output pad 200, or between the VDD and Vss power lines, a mixed serial configuration of PSCR elements and diodes can also be used, as shown in Figure 16. The total voltage drop across the mixed series of NSCR (or PSCR) components and diodes is designed to be greater than the voltage difference between the vDD power line and the vss power line under the normal normal operating conditions of the integrated circuit, that is, It can avoid power loss through the common channel of electrostatic discharge. The present invention has been described above with reference to the preferred embodiments, and those skilled in the art can make some modifications without departing from the spirit of the present invention. The scope of patent protection should be regarded as the scope of the attached patent application and its equivalent. Field-specific. . This paper size applies the Chinese National Standard {CNS) A4 specification (2 丨 0X297). (Please read the precautions on the back before filling this page)

Claims (1)

Printed by the Consumer Standards Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs A8 88 CS D8 6. Scope of patent application 1. A device to prevent the integrated circuit from being damaged by electrostatic discharge, the device includes at least: a plurality of internal circuits, each of which It has an output pad and an input pad. Input signals are input into the plurality of internal circuits through the input pads, and output signals are output through the output pads. The internal circuits are each connected to a first power line and a second A plurality of first electrostatic discharge bidirectional connection elements; a plurality of second electrostatic discharge bidirectional connection elements; a first electrostatic discharge common channel coupled to the first power line via the plurality of first electrostatic discharge bidirectional connection elements; A second electrostatic discharge common channel coupled to the second power line via the plurality of second electrostatic discharge bidirectional connection elements; and an electrostatic discharge clamping circuit coupled to the first electrostatic discharge common channel and the second electrostatic discharge common A channel, a current generated in the plurality of internal circuits passing through the plurality A first bidirectional connection element electrostatic discharge, ESD the first common channel, the plurality of second electrostatic discharge bidirectional connection element and the second electrostatic discharge common channel, in addition to the current row. 2. The device according to item 1 of the scope of patent application, wherein each of the first electrostatic discharge bidirectional connection elements includes at least: a first P-type silicon-controlled rectifier element, wherein the first P-type silicon-controlled rectifier element A gate electrode, lightly closing a cathode of the first P-type controlled rectifier element, an anode of the first P-type silicon controlled rectifier element, coupled to the first electrostatic discharge 27 This paper size applies to China National Standard (CNS) A4 specifications (210X297 mm) (Please read the notes on the back before filling this page) A8, B8, C3, D8, printed by the Central Bureau of Standards of the Ministry of Economic Affairs, and common channels for patent application; and a first P-type silicon-controlled rectifier element, wherein an anode of the second p-type silicon-controlled rectifier element is coupled to the first The cathode of the p-type silicon-controlled rectifier element and the first power line, and a cathode of the first p-type silicon-controlled rectifier element is connected to a gate of the second p-type silicon-controlled rectifier element. '3' The device according to item 1 of the scope of patent application, wherein each of the second electrostatic discharge bidirectional connection elements includes at least: a first P-type silicon controlled rectifier element, wherein one of the first silicon controlled rectifier element A gate is coupled to a cathode of the first P-type silicon controlled rectifier element, an anode of the first P-type * evening controlled rectifier element is coupled to the second electrostatic discharge common channel; and a second P-type silicon controlled rectifier element, wherein An anode of the second P-type silicon-controlled rectifier element is coupled to the cathode of the first P-type silicon-controlled rectifier element and the second power line, and a cathode of the second P-type silicon-controlled rectifier element is coupled to the second A gate for a p-type silicon controlled rectifier. 4. The device according to item 1 of the scope of patent application, wherein each of the first electrostatic discharge bidirectional connection elements includes at least: a first N-type silicon controlled rectifier element, wherein the first N-type silicon controlled rectifier element A gate, lightly coupling an anode of the first N-type hard-controlled rectifier element, a cathode of the first N-type silicon-controlled rectifier element, coupled to the first electrostatic discharge common channel; and a second N-type silicon-controlled rectifier; Element, where the second N-type silicon controlled rectifier paper is applied from China ^ furniture (CNs) secret ^ (21 () x297 mm) ^ t mi m I n ^ — m / l-.) ^^ 〆- »mn (Please read the notes on the back before filling in this page) f Order the printing of the employee consumer cooperative of the Central Bureau of Correction of the Ministry of Economic Affairs 4〇 ^ 46, s b8 c C8 ___— OS VI. Apply for a patent. Scope. Pieces A cathode is coupled to the anode of the first N-type silicon-controlled rectifier element and the first power line, and an anode of the second N-type silicon-controlled rectifier element is connected to a second N-type silicon-controlled rectifier element. Gate β 5. The device described in item 1 of the scope of patent application, wherein each first electrostatic discharge is bidirectional The connecting element includes at least: a first N-type silicon controlled rectifier element, wherein a gate of the first N-type silicon controlled rectifier element is coupled to an anode of the first N-type silicon controlled rectifier element, and the first N-type silicon controlled rectifier element A cathode of the rectifying element is coupled to the second electrostatic discharge common channel; and a second N-type silicon controlled rectifier element, wherein a cathode of the second N-type silicon controlled rectifier element is coupled to the first N-type silicon controlled rectifier. The anode of the element and the second power line, and the anode of the second N-type silicon-controlled rectifier element, engage a gate of the first N′-type dream-controlled rectifier element. 6. The device according to item 1 of the scope of the patent application, wherein each of the electrostatic discharge clamping circuits includes at least: NMOS controlled lateral silicon controlled rectifier NCLSCR ) Are connected in series, wherein the plurality of n-type metal-oxide-semiconductor-controlled lateral silicon-controlled rectifying elements connect the first electrostatic discharge common channel and the second electrostatic discharge common channel, each of the plurality of N-type metal oxides A gate of a lateral silicon controlled rectifier controlled by a semi-transistor, connected to a contact; and 29 paper XJL (CNS) Α4 ^ (21 ()) & 297 male thin) '---- --- iri! (Please read the notes on the back before you fill in this page) Order the policy of the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 4〇 ^ 464 Shao_ C8 ----- Shen Liu, static patent application scope The enemy electric detection circuit lightly closes the first electrostatic discharge common channel and the first electrostatic discharge common channel, wherein the contact is connected to the electrostatic discharge detection circuit. 7. The device as described in item 1 of the scope of the patent application, wherein each of the electrostatic discharge clamping circuits at least includes: a plurality of P-type gold latex semi-transistor controlled lateral chip controlled rectifier, PCLSCR) ^ are connected together, wherein the plurality of P-type metal-oxide-semiconductor-controlled lateral stone evening control rectifiers are combined with the -th static-discharge shared channel and the second electrostatic-discharge shared channel, each of the plurality A gate of a lateral silicon-controlled rectifier element controlled by a p-type metal-oxide semiconductor transistor coupled to a contact; an electrostatic discharge detection circuit that handles the first electrostatic discharge common channel and the second electrostatic discharge common channel; and The inverter has an input terminal and a wheel output terminal, wherein the input terminal lies on the electrostatic discharge circuit, and the input roller closes the contact. = The device described in item i of the scope of patent application, wherein each electrostatic discharge clamping circuit includes at least: a plurality of N-type metal-oxide-semiconductor-controlled lateral transmission and control rectification elements are connected in series' the plurality of N-types Each of the laterally controlled rectifiers controlled by metal oxide semiconductors and rectifiers reads and interacts with the diode, in which the multiple N-type laterally controlled rectifiers controlled by metal oxide semiconductors and the diode Component flex sigma series fits the first ESD common channel and the (please read the precautions on the back before filling this page) 30 ------ ABCD 4〇8464 'Patent application scope The second electrostatic discharge common channel, each gate of the plurality of N-type metal-oxide-semiconductor lateral silicon controlled rectifier elements is coupled with a contact; And an electrostatic discharge detection circuit coupled to the first electrostatic discharge common channel and the second electrostatic discharge common channel, wherein the contact is coupled to the electrostatic discharge detection circuit. 9. The device according to item 1 of the scope of patent application, wherein each of the electrostatic discharge clamping circuit elements includes at least: a plurality of P-type metal-oxide-semiconductor controlled lateral silicon-controlled rectifiers coupled in series, each of which The P-type metal-oxide-semiconductor-controlled lateral silicon-controlled rectifier is coupled in series with a diode, and the plurality of P-type metal-oxide-semiconductor lateral silicon-controlled rectifiers and the diode are coupled in series to couple the first An electrostatic discharge shared channel and the second electrostatic discharge shared channel 'each gate of the plurality of P-type metal-oxide-semiconductor lateral silicon controlled rectifier elements is coupled with a contact; an electrostatic discharge detection circuit is coupled with the The first electrostatic discharge common channel and the second electrostatic discharge common channel; and an inverter having an input terminal and an output terminal, wherein the input terminal is coupled to the electrostatic discharge detection circuit, and the output terminal is coupled to the contact. 1〇 · —A device for preventing integrated circuit from being damaged by electrostatic discharge, wherein the device includes at least: a plurality of first internal circuits, each of which has a first input pad and a 31-dimensional scale suitable for countries (CNS > A4 specification (210X297 mm) ------ (Please read the notes on the back before filling out this page) Copy and set the central standard of the Ministry of Economic Affairs and the Ministry of Economic Affairs for the Printing of Cooperative Consumer Cooperatives Bureau Consumer Consumption Co-operative Printing 40 ^ 464 Shao C8 D8 Six 'Patent Application. Scope. The first output pad, the input signal is input to the plurality of first internal circuits through the first input pad, and the output signal is transmitted through the first output塾 output from the plurality of first internal circuits 'each of the first internal circuits is lightly connected between the first power line and the second power line; each of the plurality of second internal circuits' has a second An input pad and a second output pad, and an input signal is input to the plurality of second internal circuits via the second input process; an output signal is output from the plurality of second internal circuits through the second output pad; each of the second The circuit is connected between the third power line and the fourth power line; a plurality of first electrostatic discharge bidirectional connection elements; a plurality of second electrostatic discharge bidirectional connection elements; a plurality of third electrostatic discharge two-way connection elements; a plurality of fourth electrostatic A discharge bidirectional connection element; a first electrostatic discharge common channel, coupled to the first power line via the plurality of first electrostatic discharge bidirectional connection elements; a second electrostatic discharge common channel, bidirectional through the plurality of second electrostatic discharge The quick-connect element and the plurality of third electrostatic discharge bidirectional connection elements are respectively coupled to the second power line and the third power supply line; r a third electrostatic discharge common channel passes through the plurality of fourth electrostatic discharge two-way connection elements 'Coupled to the fourth power line; and a plurality of electrostatic discharge clamping elements, wherein the first electrostatic discharge common channel, the second electrostatic discharge common channel, and the third electrostatic discharge common channel pass through the plurality of electrostatic discharge clamping circuits. Coupled together, the plurality of first internal circuits and the plurality of second internal circuits The mid-size 32 / Zhang Zhang standard adopts the Chinese national standard (CNS > A4 size (210X_297mm)) ~~ ----- (Please read the precautions on the back before filling this page)-, 1T- A8 B8 C8 Dft VI. Application for patent: Scope. A current generated is transmitted to the first electrostatic discharge common channel through the plurality of first electrostatic discharge bidirectional connection elements, and the plurality of second electrostatic discharge two-way connection elements and the plurality of first electrostatic discharge bidirectional connection elements. The three electrostatic discharge bidirectional connection elements are transmitted to the second electrostatic discharge common channel β / 11. The device according to item 10 of the patent application scope, wherein the first electrostatic discharge two-way connection element includes at least: a first P Type silicon controlled rectifier element, wherein a gate of the first p type silicon controlled rectifier element is coupled to a cathode of the first P type silicon controlled rectifier element, and an anode of the first P type silicon controlled rectifier element is coupled to the first A common channel for electrostatic discharge; and a second P-type silicon controlled rectifier element, wherein an anode of the second p-type silicon controlled rectifier element is coupled to the cathode of the first P-type silicon controlled rectifier element and the first power line, Ρ a cathode of the second type of silicon-controlled rectifier elements, the second coupling type ρ a silicon controlled rectifier gate element. 12. The device as described in item 10 of the scope of patent application, wherein the second electrostatic discharge two-way connection element includes at least: printed by the Consumer Cooperatives of the Central Bureau of Standards, Ministry of Economic Affairs (please read the precautions on the back before filling out this page) ) A first P-type silicon-controlled rectifier element, wherein a gate of the first P-type silicon-controlled rectifier element is coupled to a cathode of the first P-type silicon-controlled rectifier element, An anode coupled to the second electrostatic discharge common channel; and a second P-type silicon controlled rectifier element, wherein an anode of the second p-type silicon controlled rectifier element is coupled to the cathode of the first p-type silicon controlled rectifier element 33 This paper size is in accordance with Chinese National Standards (CNS > A4 size (210 × 297 mm). Printed by A8 BS CS D8, Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs. 6. Scope of patent application and the second power cord, the second p A cathode of the silicon-controlled rectifier element is coupled to a gate of the second p-type silicon-controlled rectifier element. 13. The device according to item 10 of the scope of patent application, wherein the third electrostatic discharge bidirectional element The device includes at least: a first P-type silicon controlled rectifier element, wherein a gate of the first P-type silicon controlled rectifier element is coupled to a cathode of the first P-type silicon controlled rectifier element, and the first p-type silicon controlled rectifier element An anode of the rectifier element is coupled to the second electrostatic discharge common channel; and a second P-type silicon-controlled rectifier element, wherein an anode of the second P-type silicon-controlled rectifier element is coupled to the first P-type silicon-controlled rectifier element. The cathode is coupled to the third power line, and a cathode of the second P-type silicon-controlled rectifier element is coupled to a gate of the second P-type silicon-controlled rectifier element./ 14. The device described in item 10 of the scope of patent application The fourth electrostatic discharge bidirectional connection element includes at least: a first P-type silicon-controlled rectifier element, wherein a gate of the first P-type silicon-controlled rectifier element is coupled to a first P-type silicon-controlled rectifier element. A cathode, an anode of the first P-type silicon-controlled rectifier element is coupled to the fourth electrostatic discharge common channel; and a second P-type silicon-controlled rectifier element, wherein an anode of the second p-type silicon-controlled rectifier element is coupled to the The first P-type silicon controlled rectifier The cathode and the fourth power line, a cathode of the second P-type silicon-controlled rectifier element, is coupled to a gate of the second P-type silicon-controlled rectifier element. 34 This paper standard applies to the Chinese National Standard (CNS) A4 specification ( 210X297 mm) -----. 11 .—— ^ ------- Order · ------- Absolute (Please read the notes on the back before filling this page) ABCD VI. Application Patent. Fan Guo. 15- The device described in item 10 of the scope of patent application, wherein the first electrostatic discharge bidirectional connection element includes at least:-a first N-type silicon controlled rectifier element, wherein the first N-type silicon controlled rectifier element A gate of the rectifying element is coupled to an anode of the first N-type silicon-controlled rectifying element, a cathode of the first N-type silicon-controlled rectifying element is coupled to the first electrostatic discharge common channel; and a second N-type silicon-controlled rectifier; Element, wherein a cathode of the second N-type silicon-controlled rectifier element is coupled to an anode of the first N-type silicon-controlled rectifier element and the first power line 'an anode of the second N-type silicon-controlled rectifier element, A gate coupled to the second N-type silicon controlled rectifier. (Please read the precautions on the back before filling out this page.) Printed by the Ministry of Economic Affairs, China ’s Standards and Quarantine Bureau, Shellfish Consumer Cooperative, Du printed 16. The device described in item 丨 〇 of the scope of patent application, where the second static electricity The bidirectional connection element includes at least: a first N-type silicon-controlled rectifier element, wherein a gate of the first N-type silicon-controlled rectifier element is coupled to an anode of the first N-type silicon-controlled rectifier element, and the first N-type A cathode of the silicon-controlled rectifier element is coupled to the second electrostatic discharge common channel; and a second N-type silicon-controlled rectifier element, wherein a cathode of the second N-type silicon-controlled rectifier element is coupled to the first N-type silicon-controlled rectifier element. Is the anode of the rectifier element and the first power line 'the anode of the first N-type silicon-controlled rectifier element coupled to a gate of the second N-type silicon-controlled rectifier element? The device described in the above item, of which the third electrostatic discharge I____. 35 This paper is applicable to the Chinese National Standard (CNS) delete 1_ (210X297 mm)-~~-------- Order-ABCD Ministry of Economic Affairs Printed by the Consumer Standards Cooperative of the Central Bureau of Standards The connection device includes at least: a first N-type silicon-controlled rectifier element, wherein a gate of the first N-type silicon-controlled rectifier element is coupled to an anode of the first N-type silicon-controlled rectifier element, and the first N-type silicon-controlled rectifier element A cathode of the rectifier-controlled element is coupled to the second electrostatic discharge common channel; and a second N-type silicon-controlled rectifier element, wherein a cathode of the second N-type silicon-controlled rectifier element is coupled to the first N-type silicon-controlled rectifier element. The anode of the element is connected to the third power line, and the anode of the second N-type silicon-controlled rectifier element is coupled to a gate of the second N-type silicon-controlled rectifier element. The device, wherein the fourth electrostatic discharge bidirectional connection element includes at least: a first N-type silicon-controlled rectifier element, wherein a gate of the first N-type silicon-controlled rectifier element is coupled to the first N-type silicon-controlled rectifier element. An anode, a cathode of the first N-type silicon-controlled rectifier element is coupled to the fourth electrostatic discharge common channel; and a second N-type silicon-controlled rectifier element, wherein a cathode of the second N-type silicon-controlled rectifier element is coupled to the The first N-type silicon controlled rectifier The anode is connected to the fourth power line, and the anode of the second N-type silicon-controlled rectifier is coupled to a gate of the second N-type silicon-controlled rectifier. 19. The device described in item 10 of the patent application park , Where the electrostatic discharge clamping circuit includes at least: a plurality of N-type metal-oxide-semiconductor lateral silicon controlled rectifier elements connected in series 36 (please read the precautions on the back before filling this page) In yr_: tT This paper size Free use of the Chinese National Standard (CNS) A4 specification (210X297 male *) 4 4 Printed by the Central Ministry of Economic Affairs of the Wuwu Employee Consumer Cooperative Cooperative A8 B8 C8 D8 6. The scope of patent application is coupled together, which _ the plurality of N-type metal oxygen A semi-electric transistor is coupled between the first electrostatic discharge common channel and the second electrostatic discharge common channel, between the second electrostatic discharge common channel and the third electrostatic discharge common channel, or between the first electrostatic discharge common channel Between the channel and the second electrostatic discharge common channel, a gate coupling and a contact point of each N-type metal-oxide-semiconductor; and an electrostatic discharge detection circuit coupled to the first electrostatic discharge common channel. Between the channel and the second electrostatic discharge common channel, between the second electrostatic discharge common channel and the third electrostatic discharge common channel, or between the third electrostatic discharge common channel and the first electrostatic discharge common channel , Wherein the contact is coupled to the electrostatic discharge detection circuit. / 20 · The device as described in item 10 of the patent application scope, wherein the electrostatic discharge clamping circuit includes at least: a plurality of P-type metal-oxide-semiconductor lateral silicon controlled rectifier elements coupled in series, wherein the plurality of A p-type metal-oxide-semiconductor-controlled lateral silicon controlled rectifier element is coupled between the first electrostatic discharge common channel and the second electrostatic discharge common channel, and the second electrostatic discharge common channel is shared with the third electrostatic discharge Between the channels, between the second electrostatic discharge common channel and the third electrostatic discharge common channel, or between the third electrostatic discharge common channel and the first electrostatic discharge common channel, each p-type metal oxide half A gate of the lateral silicon controlled rectifier element controlled by a transistor is coupled to a contact; an electrostatic discharge detection circuit is coupled to the first common channel for electrostatic discharge. 37 This paper is in accordance with China National Standard (CNS) A4 (210X297). (Mm) (Please read the precautions on the back before filling out this page)-Binding and ordering Printed by the Central Standards Bureau of the Ministry of Economic Affairs and Consumer Cooperatives A8 Β8 CS D8 6. Apply for a patent. Scope. Between the second electrostatic discharge common channel and the third electrostatic discharge common channel, or between the third electrostatic discharge common channel and the first electrostatic discharge common channel. An electrostatic discharge shared channel; and an inverter having an input terminal and an output terminal, wherein the input terminal is coupled to the electrostatic discharge detection circuit, and the output terminal is coupled to the contact. / 21. The device according to item 10 of the scope of patent application, wherein the electrostatic discharge clamping circuit at least comprises: a plurality of lateral silicon controlled rectifier elements controlled by a plurality of N-type metal-oxide semiconductors, each of which is an N-type metal-oxide The semi-transistor-controlled lateral silicon-controlled rectifier element is coupled in series to a diode, wherein the plurality of N-type metal-oxide-semiconductor-controlled lateral silicon-controlled rectifier elements are coupled to the first electrostatic discharge common channel and the second electrostatic Between the discharge common channel, between the second electrostatic discharge common channel and the third electrostatic discharge common channel, or between the third electrostatic discharge common channel and the first electrostatic discharge common channel, the plurality of N Each gate of the lateral silicon-controlled rectifier controlled by a metal-oxide semiconductor transistor is coupled with a contact; and an electrostatic discharge detection circuit is coupled between the first electrostatic discharge common channel and the second electrostatic discharge common channel. Between the second electrostatic discharge common channel and the third electrostatic discharge common channel, or between the third electrostatic discharge common channel and the first electrostatic discharge common channel Road between, wherein the contact is coupled to the ESD detection circuit. / 33 This paper size applies to China National Standard for Ladder (CNS) A4 (210X297 mm) (Please read the precautions on the back before filling out this page) 袭-4- 4- 6 4 054- ABCD Employees, Central Bureau of Standards, Ministry of Economic Affairs Printed by a consumer cooperative. 6. Patent application scope 22. The device described in item 10 of the patent application scope, wherein the electrostatic discharge clamping circuit includes at least: a plurality of lateral silicon controlled rectifier elements controlled by P-type metal-oxide semiconductors in series. Coupled together, each P-type metal-oxide-semiconductor-controlled lateral silicon-controlled rectifier element is coupled in series with a diode element, wherein the plurality of P-type metal-oxide-semiconductor lateral silicon-controlled rectifier elements are coupled to the first Between the electrostatic discharge common channel and the second electrostatic discharge common channel, between the second electrostatic discharge common channel and the third electrostatic discharge common channel, or between the third electrostatic discharge common channel and the first electrostatic discharge Between the channels, a gate of each lateral silicon controlled rectifier controlled by the P-type metal-oxide semiconductor transistor is coupled to a contact; an electrostatic discharge detection circuit is coupled Combined between the first electrostatic discharge common channel and the second electrostatic discharge common channel, between the second electrostatic discharge common channel and the third electrostatic discharge common channel, or between the third electrostatic discharge common channel and Between the first electrostatic discharge common channel; and an inverter having an input terminal and an output terminal, wherein the input terminal is coupled to the electrostatic discharge detection circuit, and the output terminal is coupled to the contact. 23. The device as described in claim 10, wherein the first power line is coupled to a 2.5 volt power supply, and the second power line is coupled to a 0 volt power supply. 24. The device described in item 10 of the scope of patent application, in which the third power cord {please read the precautions on the back before filling this page) is installed. The size of the paper is applicable to China National Standard (CNS) A4 specifications ( 210X 297 mm) ABC0 Member of the Central Standards Bureau of the Ministry of Economic Affairs and Consumer Cooperatives. 6. The scope of the patent application is coupled to a 5 volt power supply, and the fourth power line is coupled to a 0 volt power supply. / 25. A device for preventing the integrated circuit from being damaged by electrostatic discharge, wherein the device includes at least: a plurality of internal circuits, each of which has an input pad and an output pad, and an input signal is input to the internal circuit through the input pad. The output signal is output from the internal circuit through the output pad, and each of the internal circuits is coupled to a first power line and a second power line; a plurality of first electrostatic discharge bidirectional connection elements; a plurality of second electrostatic discharge bidirectional connection elements A plurality of third electrostatic discharge bidirectional connection elements; and an electrostatic discharge common channel through which the plurality of first electrostatic discharge bidirectional connection elements and the plurality of second electrostatic discharge two-way connection elements are bidirectionally connected to the plurality of third electrostatic discharges The components are respectively coupled to the first power line, the second power line and the third power line. / 26. The device as described in item 25 of the patent application scope, wherein the electrostatic discharge bidirectional connection element includes at least: / a plurality of N-type silicon-controlled rectifier elements coupled in series, wherein each of the N-type silicon-controlled rectifier elements A gate coupled to an anode of each of the N-type silicon-controlled rectifier elements; and a diode element coupled to the plurality of N-type silicon-controlled rectifier elements in parallel, wherein a cathode of the diode element is coupled to the Plural N-type silicon control 40 This paper size is applicable to Chinese National Standard (CNS) A4 specification (210X297 mm) (Please read the precautions on the back before filling in this page.) Order, r. 4-6 ί 05 4 A BCD Printed by the Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs. 6. The anode of the patent-applying rectifier element shares the same channel with the electrostatic discharge. An anode of the diode element is coupled to the N-type silicon-controlled rectifier element. The cathode is coupled to the first power line, the second power line, the input pad or the output pad of each of the internal circuits. 27. The device as described in item 26 of the scope of patent application, further comprising a diode element coupled to each N-type silicon controlled rectifier element. / 28. The device according to item 25 of the scope of patent application, wherein the electrostatic discharge bidirectional connection element includes at least: _ / · a plurality of P-type silicon controlled rectifier elements are coupled in series, each of which is a plurality of P-type A gate of the silicon-controlled rectifier element is coupled to a cathode of each p-type silicon-controlled rectifier element; and a diode element is coupled to a plurality of P-type silicon-controlled rectifier elements in parallel, in which a cathode of the diode element The anode coupled to the plurality of P-type silicon-controlled rectifier elements and the electrostatic discharge share a channel. An anode of the diode element is coupled to the cathode of the plurality of P-type silicon-controlled rectifier elements, and to each of the internal circuits. The first power line, the second power line, the input pad or the output pad. / 29. The device described in item 28 of the scope of patent application, further comprising a diode element, which is coupled in series with each of the P-type silicon controlled rectifier elements? 30. — A kind of electrostatic discharge protection method for integrated circuits, including at least: 41 copies of & Zhang scales applicable to Chinese national standards (CNSTA4 specifications (Ιοχ29? Mm) (Please read the precautions on the back before filling out this page) (installation · Ordered by the Ministry of Economic Affairs, Central Bureau of Standards, Bureau of Shellfish Consumer Cooperative, printed 4〇84e4 A8 ·. Mai-DS VI. Patent application scope 'Conduction-static electric current, build an internal circuit of M circuit, pass the internal circuit A power line is transmitted; the static 1: the discharge current is passed through the-electrostatic discharge bidirectional connection element, and is introduced into one of the first electrostatic discharge common channels of the integrated circuit; the static f discharge current is conducted through the-electrostatic discharge bidirectional The connecting element is introduced into a second electrostatic discharge common channel of the integrated circuit; and the electrostatic discharge current is transmitted from the first electrostatic discharge common channel to the electrostatic discharge clamping channel via the electrostatic discharge clamping circuit. The first electrostatic discharge common channel 'or the second electrostatic discharge common channel is transmitted to the second electrostatic discharge common channel. 31. As described in item 30 of the patent offense. Method, wherein the first electrostatic discharge common channel of the integrated circuit is a metal wire surrounding the integrated circuit. 32, The method as described in item 30 of the patent application scope, wherein the first integrated circuit The two electrostatic discharge common channels are a metal wire surrounding the integrated circuit. 33 ' The method described in item 30 of the scope of patent application, wherein each of the electrostatic discharge bidirectional connection elements includes at least: a first P-type A silicon-controlled rectifier element, wherein a gate of the first p-type silicon-controlled rectifier element is coupled to a cathode of the first p-type silicon-controlled rectifier element, and an anode of the first p-type silicon-controlled rectifier element is coupled to the first Electrostatic discharge 42 The size of this paper applies Chinese National Standard (CNS) M specification (21 × 297 mm) (Please read the precautions on the back before filling this page), binding-4- 6 4no 0 4 ABCD VI. Application Patent scope. Electric common channel; and, a second P-type silicon-controlled rectifier element, wherein an anode of the second P-type silicon-controlled rectifier element consumes the cathode of the first p-type silicon-controlled rectifier element and the power source. Line 'the first The cathode of a P-type silicon-controlled rectifier element is connected to a gate of the second P-type silicon-controlled rectifier element. 34 'The method as described in item 30 of the patent application scope, wherein each of the electrostatic discharges is bidirectionally connected The element includes at least: a first N-type silicon-controlled rectifier element, wherein a gate of the first N-type silicon-controlled rectifier element is coupled to an anode of the first N-type silicon-controlled rectifier element, and the first N-type A cathode of the silicon controlled rectifier element is coupled to the first electrostatic discharge common channel; and a second N type silicon controlled rectifier element, wherein a cathode of the second N type silicon controlled rectifier element is coupled to the first N type silicon controlled rectifier element. The anode of the rectifier element and the power line, an anode of the second N-type silicon-controlled rectifier element / a gate connected to the second N-type silicon-controlled rectifier element. 〆35. The method as described in item 30 of the scope of patent application, wherein each of the electrostatic discharge clamping circuits includes at least: / NMOS controlled lateral silicon rectifier elements controlled by N-type metal-oxide semiconductors controlled rectifier (NCLSCR) in series, wherein the plurality of N-type metal-oxide-semiconductor controlled lateral silicon controlled rectifier elements connect the first electrostatic discharge common channel and the second electrostatic discharge common channel, each of the plurality of N 43 This paper size is applicable to China National Standard (CNS) A4 (210 > < 29 ^ mm) h-Ο -----— ^ lr pack 丨 | (Please read the note on the back ^^ item before (Fill in this page) .II. Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs and printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs and printed 4S464 b \ 8 ___S_ VI. A gate is connected to a contact; and an electrostatic discharge detection circuit is coupled to the first electrostatic discharge common channel and the second electrostatic discharge common channel, wherein the contact is coupled to the electrostatic discharge detection Road. y 36. The method described in item 30 of the scope of patent application, wherein each of the electrostatic discharge clamping circuits includes at least: PMOS controlled lateral silicon controlled rectifier elements (PMOS controlled lateral silicon controlled rectifier) , PCLSCR) are connected in series, wherein the plurality of P-type metal-oxide-semiconductor lateral silicon controlled rectifier elements couple the first electrostatic discharge common channel and the second electrostatic discharge common channel, each of the plurality of P-type A gate electrode of the lateral silicon controlled rectifier element controlled by a metal oxide semiconductor transistor is coupled to a contact; an electrostatic discharge detection circuit is coupled to the first electrostatic discharge common channel and the second electrostatic discharge common channel; and an inverter The device has an input terminal and an output terminal, wherein the input terminal is coupled to the electrostatic discharge detection circuit, and the output terminal is coupled to the contact. 37. The method as described in item 30 of the scope of patent application, wherein each electrostatic discharge clamping circuit includes at least: a plurality of N-type metal-oxide-semiconductor controlled lateral silicon controlled rectifier elements connected in series, the plurality of N Transistor silicon controlled by metal oxide semiconductor semi-transistor. The paper size is applicable to China National Standard (CNS) A4 specification (210X297 mm) {Please read the precautions on the back before filling this page.) Industrial and consumer cooperatives printed A8 B8 CS ___ D8 _ VI. Each patent application scope rectifier element is connected in series with a diode. Among them, the N-type metal-oxide-semiconductor controlled lateral silicon controlled rectifier elements are coupled. The first electrostatic discharge common channel and the second electrostatic discharge common channel, each gate of the plurality of N-type metal-oxide-semiconductor lateral silicon controlled rectifier elements are coupled with a contact; and an electrostatic discharge detection A circuit coupled to the first electrostatic discharge common channel and the second electrostatic discharge common channel, wherein the contact is coupled to the electrostatic discharge detection circuit. 38. The method as described in item 30 of the scope of patent application, wherein each of the electrostatic discharge clamping circuits includes at least: a plurality of P-type metal-oxide-semiconductor-controlled lateral silicon controlled rectifiers coupled in series' each of the P -Type metal-oxide-semiconductor-controlled lateral silicon-controlled rectifier, coupled in series with a diode, in which the plurality of p-type metal-oxide-semiconductor-controlled lateral " · Even-controlled rectifier elements are combined with the first electrostatic discharge The channel and the second electrostatic discharge share a channel, and each gate of the lateral silicon controlled rectifier elements controlled by the plurality of P-type metal-oxide semiconductor transistors is coupled to a contact; an electrostatic discharge detection circuit is coupled to the- An electrostatic discharge common channel and the second electrostatic discharge common channel; and an inverter having an input terminal and an output terminal, wherein the input terminal is coupled to the electrostatic discharge detection circuit, and the output terminal is coupled to the contact. 39. The method as described in item 30 of the scope of patent application, wherein the electrostatic discharge double 45 sheets are applicable to the Chinese standard TcNS > Eighty-four Secrets (210X297 public sewing ―) --- (Please read the back Please note this page and fill in this page again) 'Packing.', § !. 4 6 4 β ο 4 ABCD Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 6. Apply for a patent. Scope of connection elements, including at least: N-type silicon control The rectifying elements are coupled in series, wherein a gate of each of the N-type silicon-controlled rectifying elements is coupled to an anode of each of the N-type silicon-controlled rectifying elements; and a diode element is coupled in parallel to the plurality of N-type A silicon-controlled rectifier element, wherein a cathode of the diode element is coupled to the anode of the plurality of N-type silicon-controlled rectifier elements and the first electrostatic discharge common channel, and an anode of the diode element is coupled to the plurality of The cathode of the N-type silicon controlled rectifier element is coupled to the power line of the internal circuit. 40. The method described in item 39 of the scope of patent application, further comprising a diode element coupled in series with each of the N-type silicon controlled rectifier elements. 41. The method according to item 30 of the scope of patent application, wherein the electrostatic discharge bidirectional connection element includes at least: a plurality of P-type silicon-controlled rectifier elements coupled in series, each of which is a plurality of P-type silicon-controlled rectifier elements A gate coupled to a cathode of each of the P-type silicon controlled rectifier elements; and a diode element coupled to a plurality of P-type silicon controlled rectifier elements in parallel, wherein a cathode of the diode element is coupled to the plurality of The t-pole of the P-type silicon-controlled rectifier element shares a channel with the first electrostatic discharge, and an anode of the diode element is coupled to the cathodes of the plurality of P-type silicon-controlled rectifier elements, and is coupled to the power source of the internal circuit. line. / 46 This paper size applies Chinese National Standard (CNS) A4 specification (210X297 mm) (Please read the precautions on the back before filling out this page) • Packing. Order-M patent application scope A8 B8 C3 D8 42 · If applying for a patent The method described in the item 41 of the scope further includes a component, which couples each of the P-type silicon controlled rectifier elements in series. ". Polar body element (please read the precautions on the back before filling out this page)-Binding. Binding-ii Printed by the Central Standards Bureau of the Ministry of Economic Affairs and Consumer Cooperatives 47 This paper is a standard in China (CNS) A4 Specifications (210X297 mm)