TW406308B - Method of manufacturing semiconductor devices - Google Patents

Method of manufacturing semiconductor devices Download PDF

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TW406308B
TW406308B TW87107056A TW87107056A TW406308B TW 406308 B TW406308 B TW 406308B TW 87107056 A TW87107056 A TW 87107056A TW 87107056 A TW87107056 A TW 87107056A TW 406308 B TW406308 B TW 406308B
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silicon
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silicon oxynitride
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TW87107056A
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Chinese (zh)
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Liang-Ji Yau
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Vanguard Int Semiconduct Corp
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Abstract

A method of manufacturing semiconductor device uses plasma-enhanced chemical vapor deposition to deposit silicon oxynitride from a gaseous mixture containing oxynitride and gaseous silicon. It forms a deposited layer having a better properties generated by dual-power source of electric plasma and its sustaining devices. Such deposited layer can be served as the protective layer for the semiconductor surface to reduce the number of trapped high-energy electrons and protect the integrated circuit devices from being influenced by moisture or any other possible harmful substances.

Description

2 5 12 5 1

5twf . doc/〇4〇63〇S A7 B7 經濟部中央標準局員工消費合作社印製 五、發明説明(/ ) 本發明是有關於一種半導體元件之製造方法,且特 別是有關於一種半導體積體電路元件之製造方法,其提供 改良的沉積氮氧化矽保護層之方法’可藉由改善產率和可 靠性來增加半導體元件之製造率。 半導體積體電路元件的製造係藉由各種不同的物質薄 膜(thin film)來達成,這些薄膜靠沉積與圖案定義來達成 這些元件的功能。半導體基底是用來製造電性元件以及用 來以電性內連這些元件,來有效地達成所需的電路與功 能。因應持續不斷增加之效率的需要’元件的尺寸與其間 之間隙越來越小,用以減少間隙與並降低相對應在電路中 的電訊號的傳播與時間延遲。這不僅只是縮小元件的尺寸 而已,其他相關元件也必須縮小尺寸。因此,導電物質薄 膜的厚度與元件中所使用絕緣層與保護層的尺寸也必須成 比例地以目前最被廣泛使用的導體金屬爲例,鋁內 連線圖$_的縮減,會造成溼度引起腐鈾的增加’其會 導致電阻^^[]或造成開路。諸如此類’縮減沉積在元件 上的保護會引起降低其阻絕溼度的能力。 像溼度H的原因或某些周圍的氣體也會引起半導體 基底和其他各種不同元件的表面電性之改變。此外爲允許 有較多化學物質滲逶眞而減低的絕緣層與保護層厚度也會 引起一較大程度奋#物質的傳遞,如高能或稱"熱"電子 會從一元件區傳到4&區域,並可能會被束縛住,或與元 件的電性操作產生爲要降低此現象,提供具有較曼 異的薄絕緣層是迫切的 n - -- ^^1 n - -- I I--------- Τ» 3. Ί 1 - (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS ) A4规格(210X297公釐) 2515twf.dcc/0^e3Qg A7 B7 五、發明説明(^) 由上述的理由,當沉積在半導體積體電路元件的各種 不同元件上時,做爲阻障的薄膜可做爲阻絕與遮蔽有害物 質的成因。本來,氮化矽層Si3N4,用來減低有害物質如 鈉或紳離子的傳遞是被認爲優於氧化政的,並且它具有·較 高的介電常數,更可滿足一些電性要求。最近,提出一更 符合此目的更有效的物質,是由矽、氮和氧等元素所形成 的化合物,它被稱爲氮氧化砂(silicon oxynitride),寫成 SiOxNy,其中X與y分別用來標示各種不同的氧與氮元素 的比例,端視沉積方法的細節而定。在元件的製造過程與 其後的操作期間,此類物質可降低半導體表面電位的敏感 度。它也可以當做爲一種屏障用來擴散濕氣與一些不要的 離子如鈉與鉀離子。 氮氧化矽層由各種不同組合的氣體所沉積成如由 石夕甲院(silane) SiH4,石夕甲院衍生物(silane derivatives) RSi,或有積矽氧烷(organosiloxanes) ROSi來提供砂原子, 以及由含氧與含氮氣體來提供在化學氣相沉積法過程中沉 積層的氧與氮原子所需的比例。一種特別有用的氣體是氧 化氮n2o,它含有兩種原子。其他可能的組合是諸如含有 氨NH3與氧氣〇2的混合氣體等。在反應氣體中使用電漿 來加強沉積率或改善沉積薄膜的性質將在下文中討論。例 如,使用由砂酸四乙酯(tetraethoxysilane) TEQ^與氮氣^N2 與氧氣02組成的氣體,在電漿加強型化學氣相沉積法 (plasma-enhanced CVD)中產生的氮氧化砂薄膜,Harada於 美國專利案號5,362,6865中討論。氧化氮的使用並未被討 4 ^紙張尺度適用中國國家標準(ϋ)^^^210〆297公釐) n i n .n I— - - I I 1 ,^1· - - - ^^1 —- I ! 肩 > _ (請先閲讀背面之注意事項再填寫本頁) 經濟部中失標準局貝工消費合作社印裝 2515twf.doc/00 406308 2515twf.doc/00 406308 經濟部中央標準局員工消費合作社印褽 B7 五、發明説明(多) * 論過,並且電漿產生與維持的方法也沒有被提及與詳細討 論過。美國專利案號4,38M95中有提及在製造電性元件 中符合各種目的沉積的氮氧化矽層的使用,以及在美國專 利案號5,071,790有提及在一半導體基底上的電性內連 線’但沒談到氧化氮的使用也未提到電漿製程的細節。 本發明的主要目的是要提供一種方法,用來在一半導 體積體電路元件上產生一氮氧化矽之阻障層,做爲保護之 用並阻絕濕氣或其他有害物質的滲入,用以保護半導體表 面與元件的內連線。 本發明的另一目的是要提供一製程,它可產生具有最 佳特性的氮氧化砂層’從一氧化氮與含砂氣體的混合氣體 中,藉由電漿加強型化學氣相沉積法來達成。 這些目的可由一氧化氮與含矽氣體的混合氣體中並且 藉由電漿加強型化學氣相沉積法來達成,使用一有雙電力 源(dual-power source)電漿生成與維持裝置來製造具有最 佳特性的沉積層。它可做爲半導體表面的保護層,減少受 束縛的高能電子,以及保護元件要素受濕氣與其他可能之 有害物質。 爲讓本發明之上述目的、特徵、和優點能更明顯易懂, 下文特舉一較佳實施例,並配合所附圖式,作詳細說明如 下: 圖式之簡單說明: 第1圖繪示一習知之半導體積體電路元件的部分剖面 圖, 5 本紙張尺度適用中國國家石^ ( CNS )八视^ ( 21〇><297公^ ) "一' — i 1 - - HI In I n - -I ^^1 - -- m I. I (請先閲讀背面之注意事項再填寫本頁) 25l5twf .doc/〇4^03〇8: Λ7 B7 五、發明説明(γ) 第2圖繪示依照本發明之半導體元件的部分剖面圖; 第3圖繪示依照本發明之各種不同製程所沉積氮氧化 矽層的特性圖;以及 第4圖繪示依據本發明所沉積的氮氧化矽層的改良特 性圖。 y施例 請參照第1圖,其繪示依據習知技藝所製造之半導體 積體電路元件部分剖面圖。圖示中顯示伊半導體基底10 包含一電性主動要件,鍍上一絕緣氧化層12。內連到一半 導體電路要件係一導電物質層14,由一適當的圖案所形 成。一屏障或"線性"餍沉積於上述之絕緣層上,最後再以 化學氣相沉積法沉積一氧化矽層18於阻障層上。阻障層 的一個功能是保護在沉積最後一層氧化層期間,其中的元 件結構’一般係由使用臭氧〇3與矽酸四乙酯TEOS藉由 化學氣相沉積法所形成。 經濟部中央標準局員工消费合作社印繁 ^19 fllv I Sul 1 n^i Β^ϋ ^^^^1 nn - , 牙 i (請先聞讀背面之注意事項再填寫本頁) 請參考第2圖,其繪示本發明之半導體積體電路元件 之部分剖面圖。一半導體基底20包含電路要件,鍍上一 層氧化矽22以及一內連線圖案24。於其上,從一含有氧 化氮N2〇與有機政氧院RSi的混合氣體中’藉由一電漿 輔助(plasma-assisted)之化學氣相沉積法沉積一氮氧化砂之 屏障或"線性"層26 ’它使用一具有雙電力源之裝置來將電 漿增能與維持。最後’元件結構部分覆蓋一層由化學氣相 沉積製程所沉積的一氧化矽層28,其來自於一臭氧〇3與 砂酸四乙酯TEOS的混合氣體。 6 本紙張尺度適用fi—國家標準(CNS)A4規格(210x297公楚) » » A7 25X5twf·doc /00 406308 、------___ 五、發明説明() 於氮氧化矽之沉積期間,使用一有雙電源供應器來將 〆' 一 - —^1 ^^1 11 —^1 - -- - : I HI (請先閱讀背面之注意事項再填寫本頁) 霉漿增能與維if的好處是電漿在13.56MHz下操作 的,而另一低·偏壓爲3〇〇與使得沉積薄膜可 承擔來自電漿的離子之轟擊,得特性。使用氧化 氮N2〇與矽甲烷SiH4 (參考第3圖^^^0)做爲反應氣體 具有可改善以矽酸四乙酯TEOS與02/參考第3圖的線32) 爲反應氣體的優點。從N20沉積膜的析射率具有較高^ 以作爲改進電性特性的一個指標,因爲與介電當 是直接成比例的。. - .' 4 - 在阻障層之化學氣相沉積期間N20的流率應保持於20 ' 的比率或更,所使用的矽甲烷衍生物得以產生可重複 生成和所需的薄膜特性。第4圖顯示,在各種流率,各種 不同的N20與矽甲烷衍生物組合下,在沉積之氮氧化物薄 膜中發現之残隹_的碳量。明顯可見,在流率爲20或更多 的情形下是較佳的,且衍生物如四甲基矽烷 (tetramethylsilane,TMS) 36 與四乙基砂院(tetraethylsilane) 比氧矽烷衍生物(oxysilane)如矽酸四乙酯TEOS 38較佳。 產生最佳特性之氮氧化矽層的製程參數請參考表1。 經濟部中央標準局員工消費合作社印繁 表1 RF Bias N2〇 Flow TEOS Flow TEOS 基底 Power Power Rate Rate Pressure Temp. (watts) (watts) (seem) (seem) (torr) (°C) 400-1200 100-300 >600 30-150 2-10 300-420 7 本紙倀尺度適用中國國家標準(CNS ) A4規格(210X297公釐) 2 515 t wf . doc /0 °406308 A7 B7 五、發明説明( 綜上所述,雖然本發明已以一較佳實施例揭露如上, 然其並非用以限定本發明,任何熟習此技藝者,在不脫離 本發明之精神和範圍內,當可作各種之更動與潤飾,因此 本發明之保護範圍當視後附之申請專利範圍所界定者爲 準。 (請先閲讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐)5twf.doc / 〇4〇63〇S A7 B7 Printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 5. Description of the Invention (/) The present invention relates to a method for manufacturing a semiconductor element, and in particular, to a semiconductor integrated body A method for manufacturing a circuit element, which provides an improved method for depositing a silicon oxynitride protective layer, can increase the manufacturing rate of a semiconductor element by improving yield and reliability. The fabrication of semiconductor integrated circuit components is achieved through a variety of thin films, which function by deposition and pattern definition. The semiconductor substrate is used to manufacture electrical components and to electrically interconnect these components to effectively achieve the required circuits and functions. In response to the need for ever-increasing efficiency, the size of the components and the gap between them are getting smaller and smaller to reduce the gap and to reduce the propagation and time delay of the corresponding electrical signals in the circuit. This is not just a reduction in the size of the components; other related components must also be reduced in size. Therefore, the thickness of the conductive material film must be proportional to the size of the insulating layer and the protective layer used in the component. Taking the most widely used conductor metal as an example, the reduction of the aluminum interconnection diagram $ _ will cause humidity The increase of decayed uranium 'will cause resistance ^^ [] or cause an open circuit. Something like this' reducing the protection deposited on the element will cause it to reduce its ability to block humidity. Causes such as humidity H or some surrounding gases can also cause changes in the surface electrical properties of semiconductor substrates and various other components. In addition, the thickness of the insulating layer and the protective layer reduced in order to allow more chemical substances to permeate will also cause a greater degree of material transfer, such as high energy or "thermal" electrons will pass from 4 & area, and may be bound, or caused by the electrical operation of the component. To reduce this phenomenon, it is urgent to provide a thin insulating layer with a more distinctive n--^^ 1 n--I I --------- Τ »3. Ί 1-(Please read the notes on the back before filling out this page) This paper size applies to China National Standard (CNS) A4 (210X297 mm) 2515twf.dcc / 0 ^ e3Qg A7 B7 V. Description of the Invention (^) For the reasons described above, when deposited on various components of semiconductor integrated circuit elements, the thin film as a barrier can be used as a cause of blocking and shielding harmful substances. Originally, the silicon nitride layer Si3N4 was used to reduce the transfer of harmful substances such as sodium or sodium ions. It is considered to be superior to oxidation, and it has a higher dielectric constant and can better meet some electrical requirements. Recently, a more effective substance that meets this purpose is proposed. It is a compound formed by elements such as silicon, nitrogen, and oxygen. It is called silicon oxynitride and is written as SiOxNy, where X and y are used to indicate The various oxygen to nitrogen ratios depend on the details of the deposition method. Such substances can reduce the sensitivity of semiconductor surface potentials during the manufacturing process of components and subsequent operations. It can also be used as a barrier to diffuse moisture and unwanted ions such as sodium and potassium. The silicon oxynitride layer is deposited by various combinations of gases, such as silane SiH4, silane derivatives RSi, or organosiloxanes ROSi to provide sand atoms. And the required ratio of oxygen to nitrogen atoms in the deposited layer during the chemical vapor deposition process is provided by the oxygen-containing and nitrogen-containing gas. A particularly useful gas is nitrogen oxide n2o, which contains two atoms. Other possible combinations are such as a mixed gas containing ammonia NH3 and oxygen 02. The use of a plasma in a reactive gas to enhance the deposition rate or improve the properties of the deposited film will be discussed below. For example, using a gas composed of tetraethoxysilane TEQ ^, nitrogen ^ N2, and oxygen 02, a nitrogen oxynitride sand film produced in plasma-enhanced CVD, Harada Discussed in US Patent No. 5,362,6865. The use of nitrogen oxides has not been discussed. 4 ^ Paper size applies Chinese national standard (ϋ) ^^^ 210〆297 mm) nin .n I—--II 1, ^ 1 ·---^^ 1 —- I Shoulder > _ (Please read the notes on the back before filling out this page) Printed by the Shell Standard Consumer Cooperative of the Ministry of Economic Affairs 2515twf.doc / 00 406308 2515twf.doc / 00 406308 Staff Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs印 褽 B7 V. Description of the invention (multiple) * It has been discussed, and the method of plasma generation and maintenance has not been mentioned and discussed in detail. U.S. Patent No. 4,38M95 mentions the use of silicon oxynitride layers deposited for various purposes in the manufacture of electrical components, and U.S. Patent No. 5,071,790 mentions the electrical properties on a semiconductor substrate. Wired 'but did not talk about the use of nitrogen oxides or the details of the plasma process. The main purpose of the present invention is to provide a method for generating a silicon oxynitride barrier layer on a semiconductor integrated circuit element for protection and to prevent the penetration of moisture or other harmful substances for protection. The semiconductor surface and the interconnect of the device. Another object of the present invention is to provide a process that can produce a nitrogen oxynitride sand layer having the best characteristics. From a mixed gas of nitrogen monoxide and a sand-containing gas, it is achieved by a plasma enhanced chemical vapor deposition . These objectives can be achieved in a mixed gas of nitric oxide and silicon-containing gas and by plasma enhanced chemical vapor deposition, using a dual-power source plasma generation and maintenance device to manufacture the The best characteristics of the deposited layer. It can be used as a protective layer on the surface of semiconductors, reducing bound high-energy electrons, and protecting component elements from moisture and other potentially harmful substances. In order to make the above-mentioned objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is given below in conjunction with the accompanying drawings for detailed description as follows: Brief description of the drawings: FIG. 1 shows Partial cross-sectional view of a conventional semiconductor integrated circuit element, 5 paper sizes are applicable to China National Stone ^ (CNS) Eight Views ^ (21〇 > < 297 公 ^) " 一 '— i 1--HI In I n--I ^^ 1--m I. I (Please read the notes on the back before filling this page) 25l5twf .doc / 〇4 ^ 03〇8: Λ7 B7 V. Description of the Invention (γ) Section 2 FIG. 3 is a partial cross-sectional view of a semiconductor device according to the present invention; FIG. 3 is a characteristic diagram of a silicon oxynitride layer deposited according to various processes of the present invention; and FIG. Improved characteristics of the silicon layer. Example y Please refer to FIG. 1, which shows a partial cross-sectional view of a semiconductor integrated circuit element manufactured according to a conventional technique. The figure shows that the Iraqi semiconductor substrate 10 includes an electrical active element and is plated with an insulating oxide layer 12. Interconnected to half the conductor circuit element is a conductive material layer 14 formed by a suitable pattern. A barrier or " linear " is deposited on the above-mentioned insulating layer, and finally a silicon oxide layer 18 is deposited on the barrier layer by chemical vapor deposition. One function of the barrier layer is to protect the element structure during the deposition of the last oxide layer, which is generally formed by chemical vapor deposition using ozone 03 and tetraethyl silicate TEOS. Employees' Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs, Yinfan ^ 19 fllv I Sul 1 n ^ i Β ^ ϋ ^^^^ 1 nn-, i (Please read the precautions on the back before filling this page) Please refer to Section 2 FIG. Is a partial cross-sectional view of a semiconductor integrated circuit element of the present invention. A semiconductor substrate 20 includes circuit elements, and is plated with a layer of silicon oxide 22 and an interconnect pattern 24. On top of it, a barrier or "linearity" of a nitrogen oxide sand is deposited from a mixed gas containing nitrogen oxide N2O and RSI, by plasma-assisted chemical vapor deposition. " Layer 26 'It uses a device with dual power sources to energize and maintain the plasma. Finally, the component structure is partially covered with a silicon oxide layer 28 deposited by a chemical vapor deposition process, which is derived from a mixed gas of ozone 03 and tetraethyl oxalate TEOS. 6 This paper size applies to fi-National Standard (CNS) A4 specification (210x297). »» A7 25X5twf · doc / 00 406308 、 --------___ 5. Description of the invention () During the deposition of silicon oxynitride, Use a dual power supply to connect 〆 'a-— ^ 1 ^^ 1 11 — ^ 1---: I HI (please read the precautions on the back before filling this page) The advantage is that the plasma operates at 13.56 MHz, while another low-bias voltage of 300 and the deposited film can withstand the bombardment of ions from the plasma, resulting in characteristics. The use of nitrogen oxide N2O and silicon methane SiH4 (refer to Fig. 3 ^^^ 0) as the reaction gas has the advantage of improving the use of tetraethyl silicate TEOS and 02 / refer to line 32 of Fig. 3) as the reaction gas. The emissivity of the film deposited from N20 has a high value ^ as an indicator for improving the electrical characteristics, because it is directly proportional to the dielectric constant. .-. '4-The flow rate of N20 during chemical vapor deposition of the barrier layer should be maintained at a ratio of 20' or more, and the silane derivatives used can produce reproducible and desired film properties. Fig. 4 shows the amount of residual carbon found in the deposited nitrogen oxide film at various flow rates and various combinations of N20 and silane derivatives. Obviously, it is better when the flow rate is 20 or more, and derivatives such as tetramethylsilane (TMS 36) and tetraethylsilane (oxyethyl) derivatives (oxysilane) For example, tetraethyl silicate TEOS 38 is preferred. Please refer to Table 1 for the process parameters of the silicon oxynitride layer that produces the best characteristics. Employees' Cooperatives of the Central Bureau of Standards, Ministry of Economic Affairs, China and India. Table 1 RF Bias N2〇Flow TEOS Flow TEOS Base Power Power Rate Rate Pressure Temp. (Watts) (watts) (seem) (seem) (torr) (° C) 400-1200 100-300 > 600 30-150 2-10 300-420 7 The size of this paper stack is applicable to the Chinese National Standard (CNS) A4 (210X297 mm) 2 515 t wf .doc / 0 ° 406308 A7 B7 V. Description of the invention ( In summary, although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make various changes without departing from the spirit and scope of the present invention. And retouching, therefore, the scope of protection of the present invention shall be determined by the scope of the attached patent application. (Please read the precautions on the back before filling out this page) Printed on the paper by the Consumer Standards Cooperative of the Central Bureau of Standards China National Standard (CNS) A4 specification (210X297 mm)

Claims (1)

2515jwfi;_.d〇c/^jlg 第871&056號為利_ _8 A8 B8 C8 D8 六、申請專利範圍 'MlL· 1. 一種半導體元件之製造方法,包含以下步驟: 形成一氧化矽層,於一包含元件與要件的半導體基 底上; .形成一導電圖案內連至該些元件與要件與該半導體 基底; 沉積一氮氧化矽阻障層,於該內連圖案與該些元件 與該些要件上,利用一含有氧化氮與含矽氣體的混合物, 藉由一電漿加強型之化學氣相沉積製程,並使用一雙電源 供應器。 2. 如申請專利範圍第1項所述方法,其中該沉積一氮 氧化矽阻障層的方法,包括以下步驟: 控制該氧化氮與該含矽氣體的流率; 控制該氧化氮與該含矽氣體的的壓力;以及 沉積該氮氧化矽期間,控制該半導體基底的溫度。 3. 如申請專利範圍第1項所述方法,其中該含矽氣體 係由一群組中擇一,該群組包含矽甲烷,四甲基矽烷TMS, 四乙基矽烷TES與矽酸四乙酯TEOS。 經濟部中央標準局員工消費合作社印裝 (請先閲讀背面之注意事項再填寫本頁) 4. 如申請專利範圍第2項所述方法,其中該流率維持 在一比率,氧化氮對含矽氣體約爲20比1或更高。 5. 如申請專利範圍第1項所述方法,其中該雙電源供 應器輸入,包括: 一 300-380ICHZ之低頻偏壓電源,且功率約100-300 watts ;以及 一 13.56MHz之射頻電源輸入,功率約400-1200watts 本紙張足度適用中國國家標準(CNS ) A4规格(210X297公釐) 2515jwfi;_.d〇c/^jlg 第871&056號為利_ _8 A8 B8 C8 D8 六、申請專利範圍 'MlL· 1. 一種半導體元件之製造方法,包含以下步驟: 形成一氧化矽層,於一包含元件與要件的半導體基 底上; .形成一導電圖案內連至該些元件與要件與該半導體 基底; 沉積一氮氧化矽阻障層,於該內連圖案與該些元件 與該些要件上,利用一含有氧化氮與含矽氣體的混合物, 藉由一電漿加強型之化學氣相沉積製程,並使用一雙電源 供應器。 2. 如申請專利範圍第1項所述方法,其中該沉積一氮 氧化矽阻障層的方法,包括以下步驟: 控制該氧化氮與該含矽氣體的流率; 控制該氧化氮與該含矽氣體的的壓力;以及 沉積該氮氧化矽期間,控制該半導體基底的溫度。 3. 如申請專利範圍第1項所述方法,其中該含矽氣體 係由一群組中擇一,該群組包含矽甲烷,四甲基矽烷TMS, 四乙基矽烷TES與矽酸四乙酯TEOS。 經濟部中央標準局員工消費合作社印裝 (請先閲讀背面之注意事項再填寫本頁) 4. 如申請專利範圍第2項所述方法,其中該流率維持 在一比率,氧化氮對含矽氣體約爲20比1或更高。 5. 如申請專利範圍第1項所述方法,其中該雙電源供 應器輸入,包括: 一 300-380ICHZ之低頻偏壓電源,且功率約100-300 watts ;以及 一 13.56MHz之射頻電源輸入,功率約400-1200watts 本紙張足度適用中國國家標準(CNS ) A4规格(210X297公釐) 經濟部中央標隼局員工消費合作社印製 2515twfl.doc/002 B8_406308 g8s_ 六、申請專利範圍 間. 6. 如申請專利範圍第2項所述方法,其中該基底溫度 在氮氧化矽沉積期間,保持在約爲300與420t之間。 7. —種半導體元件之製造方法,用以保護一半導體基 底,包括以下步驟: 沉積一氮氧化矽層於該半導體基底,該些元件,與該 些內連線上,其中該氮氧化矽層阻障層係由從一含氧化氮 與矽甲烷的混合反應氣體中,藉由電漿加強型之化學氣相 K積法所形成; 沉積一氧化矽保護層於該氮氧化矽阻障層。 8. 如申請專利範圍第7項所述方法,其中於該氮氧化 矽層阻障層沉積期間,該基底的溫度是被控制的。 9. 如申請專利範圍第7項所述方法,其中該雙電力源 輸入,包括以下步驟: 施加一 300-380KHZ之低頻偏壓電源,功率約爲100-300 watts ;以及 施加一 13_56MHz之射頻電源輸入,功率約爲400-1 200watts 間。 10. 如申請專利範圍第7項所述方法,其中該矽甲烷係 由一群組中擇一,該群組包含矽甲烷,四甲基矽烷TMS, 四乙基矽烷TES與矽酸四乙酯TEOS中擇一。 1 1.如申請專利範圍第7項所述方法,其中該反應氣體 混台物保持流率在一比率,氧化氮對矽甲烷約爲20比1 或更高。 ---------裝-----Ί 訂--------.%. (請先閲讀背面之注意事項再填寫本頁) 本紙張又度適用中國國家揉準(CNS ) A4说格(210X297公嫠) 2515twfl.d〇c/002 gg C8 _4fif;.^〇g 58_ 六、申請專利範圍 12. 如申請專利範圍第7項所述方法,其中該最後一 保護氧化矽層係從一臭氧與TEOS之混合氣體中藉由化學 氣相沉積法所形成。 13. 如申請專利範圍第7項所述方法,其中該矽但氧化 物沉積製程係於基底溫度在約爲300與420°C間所完成。 (請先閲讀背面之注意事項再填寫本頁) 經濟部中央標车局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐)2515jwfi; _. D〇c / ^ jlg No. 871 & 056 is profit_ _8 A8 B8 C8 D8 VI. Application for patent scope 'MlL · 1. A method for manufacturing a semiconductor device, including the following steps: forming a silicon oxide layer, On a semiconductor substrate including components and requirements; forming a conductive pattern interconnected to the components and requirements and the semiconductor substrate; depositing a silicon oxynitride barrier layer on the interconnection pattern and the components and the components Essentially, a mixture of nitrogen oxide and silicon-containing gas is used, a plasma enhanced chemical vapor deposition process is used, and a dual power supply is used. 2. The method according to item 1 of the patent application scope, wherein the method for depositing a silicon oxynitride barrier layer comprises the following steps: controlling the flow rate of the nitrogen oxide and the silicon-containing gas; controlling the nitrogen oxide and the silicon-containing gas The pressure of the silicon gas; and controlling the temperature of the semiconductor substrate during the deposition of the silicon oxynitride. 3. The method as described in item 1 of the scope of the patent application, wherein the silicon-containing gas system is selected from a group consisting of methane, tetramethylsilane TMS, tetraethylsilane TES, and tetraethylsilicate Esters TEOS. Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs (please read the notes on the back before filling out this page) 4. As described in the second patent application method, where the flow rate is maintained at a ratio, the nitrogen oxide is The gas is about 20 to 1 or higher. 5. The method as described in item 1 of the scope of patent application, wherein the dual power supply inputs include: a low-frequency bias power supply of 300-380ICHZ with a power of about 100-300 watts; and a radio frequency power input of 13.56MHz, The power is about 400-1200watts. This paper is fully applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) 2515jwfi; _. D〇c / ^ jlg No. 871 & 056 for profit_ _8 A8 B8 C8 D8 Scope 'MlL · 1. A method for manufacturing a semiconductor device, including the following steps: forming a silicon oxide layer on a semiconductor substrate including the device and requirements; forming a conductive pattern interconnected to the devices and requirements and the semiconductor Substrate; depositing a silicon oxynitride barrier layer, on the interconnect pattern and the elements and the elements, using a mixture containing nitrogen oxide and silicon containing gas, by a plasma enhanced chemical vapor deposition Process and use a dual power supply. 2. The method according to item 1 of the patent application scope, wherein the method for depositing a silicon oxynitride barrier layer comprises the following steps: controlling the flow rate of the nitrogen oxide and the silicon-containing gas; controlling the nitrogen oxide and the silicon-containing gas The pressure of the silicon gas; and controlling the temperature of the semiconductor substrate during the deposition of the silicon oxynitride. 3. The method as described in item 1 of the scope of the patent application, wherein the silicon-containing gas system is selected from a group consisting of methane, tetramethylsilane TMS, tetraethylsilane TES, and tetraethylsilicate Esters TEOS. Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs (please read the notes on the back before filling out this page) 4. As described in the second patent application method, where the flow rate is maintained at a ratio, the nitrogen oxides contain silicon. The gas is about 20 to 1 or higher. 5. The method as described in item 1 of the scope of patent application, wherein the dual power supply inputs include: a low-frequency bias power supply of 300-380ICHZ with a power of about 100-300 watts; and a radio frequency power input of 13.56MHz, The power is about 400-1200watts. This paper is fully applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) printed by the Consumer Cooperatives of the Central Standardization Bureau of the Ministry of Economic Affairs. The method according to item 2 of the patent application range, wherein the substrate temperature is maintained between about 300 and 420 t during the deposition of silicon oxynitride. 7. A method for manufacturing a semiconductor device for protecting a semiconductor substrate, including the following steps: depositing a silicon oxynitride layer on the semiconductor substrate, the components, and the interconnects, wherein the silicon oxynitride layer The barrier layer is formed by a plasma-enhanced chemical vapor K-product method from a mixed reaction gas containing nitrogen oxide and silicon methane; a silicon oxide protective layer is deposited on the silicon oxynitride barrier layer. 8. The method according to item 7 of the patent application, wherein during the deposition of the silicon oxynitride barrier layer, the temperature of the substrate is controlled. 9. The method as described in item 7 of the scope of patent application, wherein the dual power source input includes the following steps: applying a low frequency bias power source of 300-380KHZ with a power of about 100-300 watts; and applying a RF power source of 13-56MHz Input, power is about 400-1 200watts. 10. The method as described in item 7 of the scope of the patent application, wherein the methane is selected from the group consisting of methane, tetramethylsilane TMS, tetraethylsilane TES and tetraethylsilicate Choose from TEOS. 1 1. The method according to item 7 of the scope of the patent application, wherein the reaction gas mixture maintains a flow rate at a ratio, and the ratio of nitrogen oxide to silicon methane is about 20 to 1 or higher. --------- Installation ----- Ί Order --------.%. (Please read the precautions on the back before filling this page) This paper is also suitable for Chinese countries. (CNS) A4 grid (210X297 gong) 2515twfl.d〇c / 002 gg C8 _4fif;. ^ 〇g 58_ VI. Application for patent scope 12. The method described in item 7 of the scope of patent application, in which the last protection The silicon oxide layer is formed by a chemical vapor deposition method from a mixed gas of ozone and TEOS. 13. The method according to item 7 of the scope of the patent application, wherein the silicon but oxide deposition process is performed at a substrate temperature between about 300 and 420 ° C. (Please read the notes on the back before filling out this page) Printed by the Consumer Cooperatives of the Central Bureau of Standard Vehicles of the Ministry of Economic Affairs This paper applies the Chinese National Standard (CNS) A4 specification (210X297 mm)
TW87107056A 1998-05-07 1998-05-07 Method of manufacturing semiconductor devices TW406308B (en)

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