TW401620B - Manufacture method of the metal interconnects - Google Patents

Manufacture method of the metal interconnects Download PDF

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Publication number
TW401620B
TW401620B TW87105529A TW87105529A TW401620B TW 401620 B TW401620 B TW 401620B TW 87105529 A TW87105529 A TW 87105529A TW 87105529 A TW87105529 A TW 87105529A TW 401620 B TW401620 B TW 401620B
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Taiwan
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metal
layer
manufacturing
scope
item
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TW87105529A
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Chinese (zh)
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Wen-Bin Liu
Ching-Shing Shie
Yau-Bi Shiu
Jr-Huang Lin
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United Microelectronics Corp
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Abstract

A manufacture method of metal interconnects is disclosed, which utilizes the unlanded layout method and hydrogen-Silsequioxane (HSQ) as the inter-metal dielectrics (IMD), and uses hydrogen to couple with nitrogen or other inert gas like argon for washing and cure processes, so as to improve the condition of poison metal via happened in the subsequent process due to the water absorption of hydrogen-silsequioxane (HSQ), thereby achieving the fast-speed, having a small RC delay and reducing the layout space.

Description

經濟部中央標準局員工消費合作社印製 401620 2653twf, doc/006 A 7 B7 五、發明説明(/ ) 本發明是有關於一種金屬內連線的製造方法,且特別 是有關於一種採用非著陸的佈置方式及以氫化矽倍半氧化 物做爲內金屬介電層,並使用氫氣搭配鈍氣沖洗及氮氣固 化製程之金屬內連線的製造方法。 在先進的超大型積體電路(VLSI)製程上,可以在1〜2 平方公分面積的矽表面上擠進數量多達數十萬的電晶 體。並且,爲了使積體電路的積集度增加,用來連接各個 電晶體或是其他單元元件的金屬線,其在積體電路內的密 度將很高。所以,以往單一一層金屬層的設計,將無法完 成整個積體電路的連線工作,因此必須在其間加入一層介 電層,以避免單元元件之間產生非預期性·的導通。 近來,一種被用來當作內金屬介電層(Inter-Metal Dielectrics ; IMD)的氫化矽倍半氧化物(Hydrogen-8丨18639111〇\&1^;1^(3),因其介電常數〖低,約在2.6〜3之 間,比一般氧化物(Cbdde)的介電常數(約在3.8〜4.0之間) 還低,所以目前已漸漸地爲半導體業者所採用。由於氫化 矽倍半氧化物(HSQ)的介電常數低,所以較不會有寄生電容 (Parasitic Capac丨tor)的問題產生,因此其具有電阻-電容時 間延遲(RC Time Delay)小與速度快的優點。但是,氫化矽 倍半氧化物本身具有吸水性,很容易受到水氣的影響,而 導致在後續製程中發生製程上的錯誤(error)例如金屬中毒 (Poison Metal Via)等。 請參照第1A〜1C圖,其繪示的是習知一種金屬內連線 的製造流程剖面圖。 本紙張尺度適用中國國家標準(CNS > Α4規格(210X297公釐) (請先閲讀背面之注意事項再填寫本頁) 、1Τ 經濟部中央標準局員工消費合作社印製 mm 2653twf.d〇c/〇〇6 ρ^η ___—_ B7 五、發明説明(i) 請參照第1A圖’首先提供一半導體基底10,並在其 上形成一金屬層12。然後例如以傳統微影蝕刻法定義金屬 層12以形成一開口,接著例如使用塗佈形成一 層氫化矽倍半氧化層14塡入開口並覆蓋金屬層12。其中, 以傳統製程方法在定義金屬層12時,爲了使後續製程不會 有對準(Alignment)上的問題產生,而採用著陸型(ianded) 的金屬內連線結構,往往金屬層12的佈置(Layout)空間較 大’而會有如狗骨頭(Dog-Bone)的形狀結構產生,使得整 體佈置的面積增大。 隨後,例如以化學機械硏磨法(CMP)去除部份氫化矽倍 半氧化層Η至與金屬層I2表面同高。接著,使用電漿化 學氣相沈積法(PECVD),沈積一層氧化層(〇xide)16覆蓋金 屬層12與氫化矽倍半氧化層14。 請參照第1B圖,接著例如使用傳統微影蝕刻法,蝕刻 氧化層16至暴露出金屬層12表面爲止,以形成介層窗 (Via)18。由於習知金屬層12的佈置面積較大(如同狗骨頭 的形狀結構),亦即所謂的著陸(landed),所以較不會有蝕 刻上的問題產生,但若欲採用非著陸(unlanded)的方式,或 者在對準時發生太大誤差,導致蝕刻到部份氫化矽倍半氧 化層14時,此時暴露出之氫化矽倍半氧化層14將會受到 氧氣碳化(02 Ashing)及去除光阻之溶解液(Solvent Damage)、RCA淸洗等之影響而吸水,致使在其表面會產 生一層具親水基之吸水層,以致在後續製程例如沈積一層 介層窗插塞(Plug)20時,造成金屬中毒(Poison Metal Via) 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐〉 ---;-------------訂------ (請先閲讀背面之注意事項再填寫本頁) 經濟部中央標準局舅工消費合作社印裂 401680 2653twf.doc/006 ρ^η ______ B7 五、發明説明(3) .的情形。 請參照第ic圖’接著進行後續製程,以完成金屬內連 線的製造,包括形成一介層窗插塞20及金屬層22等,其 中介層窗插塞2〇的材質例如爲鎢(W),以及形成金屬層22 的方法包括化學氣相沈積法。 綜上所述,習知具有以下的缺點: (1) 做爲內連線用之金屬層的佈置面積較大,如同狗骨 頭的形狀結構一樣,使得整體佈置的面積增大。 (2) 內金屬介電層採用氫化矽倍半氧化物,因其具有吸 水性,容易受到氧氣碳化及去除光阻之溶解液或RCA淸洗 等之影響而吸水,以致造成金屬中毒的情形。 有鑒於此,本發明的目的就是在提供一種金屬內連線 的製造方法,係採用非著陸的佈置方式,以縮小整體佈置 .空間。 本發明的另一目的,提出一種金屬內連線的製造方 法,係採用氫化矽倍半氧化物做爲內金屬介電層,以達到 速度快與RC延遲小的目的。 爲達成本發明之上述和其他目的,一種金屬內連線的 製造方法,係使用氫氣搭配氮氣或是氬氣等其他鈍氣沖洗 及氮氣固化製程,以便對具吸水性之氫化矽倍半氧化物進 行吸水鍵置換及趨除水氣的步驟’改善氫化砂倍半氧化物 因具有吸水性而造成後續製程發生金屬中毒的情形,進而 達到速度快、RC延遲小及縮小佈置空間的目的。 爲讓本發明之上述和其他目的、特徵、和優點能更明 (請先閲讀背面之注意事項再填寫本頁) ------—^裝------訂------ 本紙張尺度適用中國國家標準(CNS)A4規格(210X297公釐) 經濟部中央標準局員工消費合作社印袋 401620 2653twf.doc/006 A7 B7 五、發明説明(>) .顯易懂,下文特舉一較佳實施例,並配合所附圖式,作詳 細說明如下: 圖式之簡單說明: 第1A〜1C圖繪示的是習知一種金屬內連線的製造流程 剖面圖,以及 第2A〜2D圖繪示的是依照本發明一較佳實施例之金屬 內連線的製造流程剖面圖。 圖式之標示說明: 1〇、30 :半導體基底 12、22、32、44 :金屬層 14、34、34a :氫化砂倍半氧化層 16、36 :氧化層 18、38 :介層窗 20、42 :介層窗插塞 39 :沖洗製程 40 :吸水層 實施例 請參照第2A〜2D圖,其繪示的是依照本發明一較佳實 施例之金屬內連線的製造流程剖面圖。 請參照第2A圖,首先提供一半導體基底30,並在其 上例如使用濺鍍法形成一金屬層32。然後例如以傳統微影 蝕刻法定義金屬層32以形成一開口,接著例如使用塗佈法 (Coating)形成一層氫化砍倍半氧化層34塡入開口並覆蓋 金屬層32。其中,本發明在定義金屬層32時,不需像習 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) (請先閲讀背面之注意事項再填寫本頁)Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs 401620 2653twf, doc / 006 A 7 B7 V. Description of the Invention (/) The present invention relates to a method for manufacturing a metal interconnect, and in particular to a method using non-landing Arrangement method and manufacturing method of metal interconnects using hydrogenated silicon sesquioxide as inner metal dielectric layer, and using hydrogen gas with inert gas flushing and nitrogen curing process. In the advanced VLSI process, hundreds of thousands of electric crystals can be squeezed into the silicon surface with an area of 1 to 2 square centimeters. In addition, in order to increase the integration degree of the integrated circuit, the density of the metal wires used to connect various transistors or other unit elements in the integrated circuit will be very high. Therefore, in the past, the design of a single metal layer could not complete the wiring work of the integrated circuit. Therefore, a dielectric layer must be added between them to avoid unintended conduction between unit elements. Recently, a hydrogenated silicon sesquioxide (Hydrogen-8 丨 18639111〇 \ & 1 ^; 1 ^ (3), which is used as an inter-metal dielectric (IMD), because of its intermediary The electric constant is low, about 2.6 to 3, which is lower than the dielectric constant (about 3.8 to 4.0) of ordinary oxides (Cbdde), so it has been gradually adopted by semiconductor industry. Because of silicon hydride The dielectric constant of sesquioxide (HSQ) is low, so there is less problem of parasitic capacitance, so it has the advantages of small resistance-capacitance time delay (RC Time Delay) and fast speed. However, hydridosilsesquioxide itself is water-absorbent and is easily affected by water vapor, which may cause process errors such as metal poisoning (Poison Metal Via) in subsequent processes. Please refer to Section 1A ~ Figure 1C, which shows a cross-sectional view of the manufacturing process of a known metal interconnect. This paper size applies to Chinese national standards (CNS > A4 size (210X297 mm)) (Please read the precautions on the back before filling in this Page), 1T Central Standards Bureau, Ministry of Economic Affairs Printed by industrial and consumer cooperatives mm 2653twf.d〇c / 〇〇6 ρ ^ η ___ —_ B7 V. Description of the invention (i) Please refer to FIG. 1A 'Firstly provide a semiconductor substrate 10 and form a metal layer thereon 12. Then define the metal layer 12 to form an opening by, for example, a conventional lithographic etching method, and then, for example, use coating to form a layer of hydrogenated silicon sesquioxide 14 into the opening and cover the metal layer 12. Among them, the traditional manufacturing method is used to define When the metal layer 12 is used, in order to avoid subsequent alignment problems, the landing-type metal interconnect structure is used. Often, the layout space of the metal layer 12 is large. There will be a dog-bone-like shape structure, which will increase the area of the overall arrangement. Subsequently, for example, by chemical mechanical honing (CMP), part of the hydrogenated silicon sesquioxide layer will be removed to the surface of the metal layer I2. The same height. Next, a plasma chemical vapor deposition (PECVD) method is used to deposit an oxide layer 16 overlying the metal layer 12 and the hydrogenated silicon sesquioxide layer 14. Please refer to FIG. Shadow etching The oxide layer 16 is formed until the surface of the metal layer 12 is exposed to form a via 18. The conventional metal layer 12 has a relatively large layout area (like the shape of a dog bone), which is also called landed. , So there are fewer problems in etching, but if you want to use the unlanded method, or if too much error occurs in the alignment, which causes etching to part of the hydrogenated silicon sesquioxide layer 14, it will be exposed The resulting silicon sesquihydroxide layer 14 will be affected by oxygen carbonization (02 Ashing), photoresist-removing solution (Solvent Damage), RCA cleaning, etc., and absorb water, resulting in a layer of hydrophilic groups on its surface. Water absorbing layer, so that in the subsequent process, such as depositing a layer of the plug 20 of the interlayer window (Plug) 20, causing metal poisoning (Poison Metal Via) This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm> ---; ------------- Order ------ (Please read the notes on the back before filling out this page) The Central Standards Bureau of the Ministry of Economic Affairs, Machining and Consumer Cooperatives 401680 2653twf.doc / 006 ρ ^ η ______ B7 V. Description of the invention (3). Please refer to FIG. Ic 'and then carry out subsequent processes to complete the manufacture of metal interconnects, including forming a via window plug 20 and a metal layer 22, where the material of the via window plug 20 is, for example, tungsten (W) The method of forming the metal layer 22 includes a chemical vapor deposition method. In summary, the conventional method has the following disadvantages: (1) The layout area of the metal layer used as the interconnect is large, like the shape and structure of a dog bone, which increases the overall layout area. (2) The inner metal dielectric layer is made of hydrogenated silicon sesquioxide. Because of its water absorption, it is susceptible to oxygen carbonization and the removal of photoresist solution or RCA washing, etc., and absorb water, resulting in metal poisoning. In view of this, the object of the present invention is to provide a method for manufacturing a metal interconnect, which adopts a non-landing arrangement to reduce the overall arrangement space. Another object of the present invention is to provide a method for manufacturing a metal interconnect, which uses a hydrogenated silicon sesquioxide as the inner metal dielectric layer to achieve the goals of high speed and small RC delay. In order to achieve the above and other objectives of the present invention, a method for manufacturing a metal interconnect is to use hydrogen with nitrogen or other inert gas flushing and nitrogen curing processes to absorb water-absorbing silicon sesquioxides. The steps of replacing the water-absorbent bond and dehydrating the gas' improve the situation that the hydrogenated sand sesquioxide has metal poisoning in the subsequent process due to its water absorption, so as to achieve the goals of high speed, small RC delay, and reduced layout space. In order to make the above and other objects, features, and advantages of the present invention clearer (please read the precautions on the back before filling out this page) ---------- ^ 装 -------- Order ---- -This paper size applies to China National Standard (CNS) A4 (210X297 mm). Printed bags for employees' cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs 401620 2653twf.doc / 006 A7 B7 5. Description of the invention (>). A preferred embodiment is described below in detail, in conjunction with the accompanying drawings, as follows: Brief description of the drawings: Figures 1A to 1C show cross-sectional views of a conventional manufacturing process of a metal interconnect, and Figures 2A to 2D show cross-sectional views of a manufacturing process of a metal interconnect according to a preferred embodiment of the present invention. Description of the drawings: 10, 30: semiconductor substrates 12, 22, 32, 44: metal layers 14, 34, 34a: hydrogenated sand sesquioxide layers 16, 36: oxide layers 18, 38: interlayer windows 20, 42: interlayer window plug 39: rinsing process 40: water absorbing layer embodiment Please refer to FIGS. 2A to 2D, which shows a cross-sectional view of a manufacturing process of a metal interconnect according to a preferred embodiment of the present invention. Referring to FIG. 2A, a semiconductor substrate 30 is first provided, and a metal layer 32 is formed thereon, for example, using a sputtering method. Then, the metal layer 32 is defined by, for example, a conventional lithographic etching method to form an opening, and then a hydrogenation dichroic oxide layer 34 is formed into the opening and covers the metal layer 32 by using a coating method, for example. Among them, the present invention does not need to define the metal layer 32 in accordance with the Chinese paper standard (CNS) A4 specification (210X297 mm). (Please read the precautions on the back before filling this page)

40i680 2653twf. doc/006 A7 B7 經濟部中央標準局員工消費合作社印製 五、發明説明(S) .知一樣,需佈置(Layout)成如狗骨頭的形狀結構,亦即本發 明係採用非著陸(unlanded)的佈置方式,使得整體的佈置空 間可大大地縮小,進而在積集度日益提高的情況下,達到 速度快與RC延遲小的目的。 隨後’例如以化學機械硏磨法或回蝕法(Etching Back),去除部份氫化矽倍半氧化層34至與金屬層32表面 同高。接著,例如使用電獎化學氣相沈積法,沈積一層氧 化層36覆蓋金屬層32與氫化砂倍半氧化層34。 請參照第2B圖,接著例如使用傳統微影蝕刻法,触刻 氧化層36至暴露出金屬層32表面爲止,以形成介層窗 38。由於介層窗38的寬度與金屬層32的寬度同大小,且 在進行微影製程時,對準操作可能會發生誤差,導致蝕刻 到部份氫化矽倍半氧化層34,此時暴露出之氫化矽倍半氧 化層34表面將會受到氧氣碳化及去除光阻之溶解液、RCA 淸洗等之影響而吸水,以致會在此暴露出之氫化矽倍半氧 化層34表面形成一具親水基之吸水層40,如第2B圖所繪 不0 請參照第2C圖,然後進行一沖洗製程39,係使用氫 氣(H2)搭配氮氣(N2)或是氬氣(Ar)等其他鈍氣’沖洗介層窗 38暴露出之氫化矽倍半氧化層34,以便對吸水層4〇進行 吸水鍵置換。 接著,進行一氮氣固化(N2 Curing)製程,趨除介層窗 38暴露出之氫化矽倍半氧化層34中的水氣’達到趕除吸 水層40(如第2B圖所示)內之水氣的目的’以形成不具水氣 (請先閲讀背面之注意事項再填寫本頁) -- 、τ Γ 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) 401630 2653twf. doc/006 A7 B7 經濟部中央標準局負工消费合作社印製 五、發明説明(厶) .之氫化矽倍半氧化層34a,如第2C圖所示,避免因後續製 程而造成金屬中毒的情形。 請參照第2D圖,接著進行後續製程,以完成金屬內連 線的製造,包括形成一介層窗插塞42及金屬層44等,·其 中介層窗插塞42的材質例如爲鎢(W),以及形成金屬層44 的方法包括濺鍍法。 因此,本發明的特徵之一,係採用非著陸的金屬內連 線結構並使用氫化矽倍半氧化層作爲內金屬線介電層。 本發明的特徵之二,係使用氫氣搭配氮氣或是氬氣等 其他鈍氣,沖洗介層窗38暴露出之氫化矽倍半氧化層34, 以便對吸水層40進行吸水鍵置換。 本發明的特徵之三,係進行一氮氣固化製程,以趨除 介層窗38暴露出之氫化矽倍半氧化層34,達到趕除吸水 層40內之水氣的目的。 綜上所述,本發明所提出之金屬內連線的製造方法’ 具有以下的優點: (1) 採用非著陸的佈置方式,改善習知必須預留如狗骨 頭形狀之佈置空間的缺點,大大地縮小了佈置空間’也縮 短金屬連線之長度,降低RC延遲。 (2) 採用氫化矽倍半氧化物做爲內金屬介電層’減少寄 生電容,並使用氫氣搭配氮氣或是氬氣等其他鈍氣及氮氣 固化製程,來改善發生金屬中毒的情況,以達到速度快與 RC延遲小的目的。 雖然本發明已以較佳實施例揭露如上,然其並非用以 (請先閲讀背面之注意事項再填寫本頁) -e Γ 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) 經濟部中央標準局員工消費合作社印製 2653twf. doc/006 A7 B7 五、發明説明(q ) .限定本發明,任何熟習此技藝者,在不脫離本發明之精神 和範圍內,當可作各種之更動與潤飾,因此本發明之保護 範圍當視後附之申請專利範圍所界定者爲準。 本紙張尺度適用中國國家標準(CNS ) A4規格(210X 297公釐) (請先閲讀背面之注意事項再填寫本1)40i680 2653twf. Doc / 006 A7 B7 Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs. 5. Description of the Invention (S). As you know, it needs to be laid out in the shape of a dog bone, that is, the present invention uses non-landing (unlanded) arrangement makes the overall arrangement space greatly reduced, and further achieves the purpose of fast speed and small RC delay in the case of increasing accumulation. Subsequently, for example, a chemical mechanical honing method or an etch back method is used to remove a part of the hydrogenated silicon sesquioxide layer 34 to the same level as the surface of the metal layer 32. Next, an electro-chemical chemical vapor deposition method is used to deposit an oxide layer 36 overlying the metal layer 32 and the hydrogenated sand sesquioxide layer 34, for example. Referring to FIG. 2B, the conventional lithographic etching method is used, for example, to etch the oxide layer 36 until the surface of the metal layer 32 is exposed to form an interlayer window 38. Because the width of the interlayer window 38 is the same as the width of the metal layer 32, and during the lithography process, an error may occur in the alignment operation, resulting in the etching of a portion of the hydrogenated silicon sesquioxide layer 34, which is exposed at this time. The surface of the silicon hydride sesquioxide layer 34 will be affected by the carbonization of oxygen and the photoresist-removing solution, RCA cleaning, etc., and absorb water, so that the surface of the silicon hydride sesquioxide layer 34 exposed there will form a hydrophilic group. The water-absorbing layer 40 is not drawn as shown in Figure 2B. Please refer to Figure 2C, and then perform a flushing process 39, using hydrogen (H2) with nitrogen (N2) or other inert gases such as argon (Ar). The silicon sesquioxide layer 34 exposed by the interlayer window 38 is used to replace the water-absorbing layer 40 with a water-absorbing bond. Next, a nitrogen gas curing (N2 Curing) process is performed, and the moisture in the silicon hydride sesquioxide layer 34 exposed by the interlayer window 38 is removed to reach the water in the water absorption layer 40 (as shown in FIG. 2B). The purpose of gas' to form without moisture (please read the precautions on the back before filling in this page)-τ Γ This paper size applies Chinese National Standard (CNS) A4 specification (210X297 mm) 401630 2653twf. Doc / 006 A7 B7 Printed by the Central Bureau of Standards, Ministry of Economic Affairs and Consumer Cooperatives. 5. Description of the Invention (i). The silicon sesquihydride layer 34a, as shown in Figure 2C, avoids metal poisoning caused by subsequent processes. Please refer to Figure 2D, and then carry out subsequent processes to complete the manufacture of metal interconnects, including forming a via window plug 42 and a metal layer 44. The material of the via window plug 42 is, for example, tungsten (W) The method of forming the metal layer 44 includes a sputtering method. Therefore, one of the features of the present invention is to use a non-landing metal interconnect structure and use a hydrogenated silicon sesquioxide layer as the inner metal wire dielectric layer. The second feature of the present invention is that the hydrogenated silicon sesquioxide layer 34 exposed by the interlayer window 38 is flushed with hydrogen in combination with other inert gases such as nitrogen or argon, so as to replace the water-absorbing layer 40 with water-absorbing bonds. The third feature of the present invention is to perform a nitrogen curing process to remove the silicon hydride sesquioxide layer 34 exposed by the interlayer window 38, so as to remove the water vapor in the water absorbing layer 40. In summary, the method for manufacturing metal interconnects proposed by the present invention has the following advantages: (1) Adopting a non-landing arrangement to improve the shortcomings of the conventional arrangement, which must reserve a layout space such as a dog bone shape, greatly The ground reduces the layout space, and also shortens the length of the metal wiring and reduces the RC delay. (2) The use of hydrogenated silicon sesquioxide as the inner metal dielectric layer reduces the parasitic capacitance, and uses hydrogen in combination with nitrogen or other inert gases such as argon and nitrogen curing process to improve the occurrence of metal poisoning to achieve Fast speed and small RC delay. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to be used (please read the precautions on the back before filling this page) -e Γ This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs 2653twf. Doc / 006 A7 B7 V. Description of the Invention (q). Limiting the invention, anyone skilled in the art can make various kinds without departing from the spirit and scope of the invention. Changes and retouching, therefore, the scope of protection of the present invention shall be determined by the scope of the appended patent application. This paper size applies to Chinese National Standard (CNS) A4 (210X 297 mm) (Please read the precautions on the back before filling in this 1)

Claims (1)

401620 經濟部中央標準局員工消費合作社印裝 A8 2653twf.doc/006 B8 C8 · D8 六、申請專利範圍 1. 一種金屬內連線的製造方法,包括下列步驟: 形成一金屬層覆蓋一半導體基底; 定義該金屬層以形成一第一開口; 形成一氫化矽倍半氧化層塡入該第一開口; 形成一氧化層覆蓋該氫化矽倍半氧化層及該金屬層; 定義該氧化層以形成一第二開口; 進行一氫氣與鈍氣沖洗製程; 進行一氮氣固化製程;以及 形成一介層窗插塞塡入該第二開口。 2. 如申請專利範圍第1項所述之金屬內連線的製造方 法,其中該形成該氫化矽倍半氧化層與該形成該氧化層之 間,更包括去除部份該氫化矽倍半氧化層至與該金屬層表 面同高。 3. 如申請專利範圍第2項所述之金屬內連線的製造方 法,其中去除部份該氫化矽倍半氧化層的方法包括化學機 械硏磨法。 4. 如申請專利範圍第2項所述之金屬內連線的製造方 法,其中去除部份該氫化矽倍半氧化層的方法包括回蝕 法。 5. 如申請專利範圍第1項所述之金屬內連線的製造方 法,其中形成該氫化矽倍半氧化層的方法包括塗佈法。 6. 如申請專利範圍第1項所述之金屬內連線的製造方 法,其中形成該氧化層的方法包括電漿化學氣相沈積法。 7. 如申請專利範圍第1項所述之金屬內連線的製造方 (請先閲讀背面之注意事項再填寫本頁) 丨_ 裝· 、-'° .麵 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) 401620 A8 2653twf.doc/006 B8 C8 ' D8 六、申請專利範圍 法,其中形成該第一開口的方法包括微影蝕刻法。 8. 如申請專利範圍第1項所述之金屬內連線的製造方 法,其中形成該第二開口的方法包括微影鈾刻法。 9. 如申請專利範圍第1項所述之金屬內連線的製造方 法,其中該鈍氣包括氮氣。 10. 如申請專利範圍第1項所述之金屬內連線的製造方 法,其中該鈍氣包括氫氣。 11. 如申請專利範圍第1項所述之金屬內連線的製造方 法,其中該介層窗插塞的材質包括鎢。 12. 如申請專利範圍第1項所述之金屬內連線的製造方 法,其中形成該金屬層的方法包括濺鍍法。 (請先閱讀背面之注意事項再填寫本頁) 裝· 訂 經濟部中央標準局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐)401620 Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs A8 2653twf.doc / 006 B8 C8 · D8 VI. Application for Patent Scope 1. A method for manufacturing metal interconnects, including the following steps: forming a metal layer covering a semiconductor substrate; Define the metal layer to form a first opening; form a silicon hydride sesquioxide layer into the first opening; form an oxide layer to cover the silicon hydride sesquioxide layer and the metal layer; define the oxide layer to form a A second opening; performing a hydrogen and inert gas flushing process; performing a nitrogen curing process; and forming a via window plug into the second opening. 2. The method for manufacturing a metal interconnect as described in item 1 of the scope of patent application, wherein the forming of the hydride silicon sesquioxide layer and the forming of the oxide layer further includes removing a portion of the hydride silicon sesquioxide. Layer to the same height as the surface of the metal layer. 3. The method for manufacturing metal interconnects as described in item 2 of the scope of the patent application, wherein the method for removing a part of the hydrogenated silicon sesquioxide layer includes a chemical mechanical honing method. 4. The method for manufacturing metal interconnects as described in item 2 of the scope of the patent application, wherein the method of removing part of the hydrogenated silicon sesquioxide layer includes an etch-back method. 5. The method for manufacturing a metal interconnect as described in item 1 of the scope of patent application, wherein the method for forming the silicon sesquioxide layer includes a coating method. 6. The method for manufacturing a metal interconnect as described in item 1 of the scope of patent application, wherein the method for forming the oxide layer includes a plasma chemical vapor deposition method. 7. The manufacturer of the metal interconnects as described in item 1 of the scope of the patent application (please read the precautions on the back before filling this page) 丨 _ Installation ·,-'°. The size of the paper is subject to Chinese national standards ( CNS) A4 specification (210X297 mm) 401620 A8 2653twf.doc / 006 B8 C8 'D8 6. The method of applying for a patent, wherein the method for forming the first opening includes a lithographic etching method. 8. The method of manufacturing a metal interconnect as described in item 1 of the scope of the patent application, wherein the method of forming the second opening includes lithography lithography. 9. The method for manufacturing a metal interconnect as described in item 1 of the patent application scope, wherein the inert gas includes nitrogen. 10. The method for manufacturing a metal interconnect as described in item 1 of the scope of the patent application, wherein the inert gas includes hydrogen. 11. The method for manufacturing a metal interconnect as described in item 1 of the scope of patent application, wherein the material of the interlayer window plug includes tungsten. 12. The method for manufacturing a metal interconnect as described in item 1 of the scope of patent application, wherein the method for forming the metal layer includes a sputtering method. (Please read the notes on the back before filling this page) Binding and printing Printed by the Consumer Cooperatives of the Central Bureau of Standards of the Ministry of Economic Affairs This paper size applies to the Chinese National Standard (CNS) A4 specification (210X297 mm)
TW87105529A 1998-04-13 1998-04-13 Manufacture method of the metal interconnects TW401620B (en)

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