TW400589B - Flat MCM micro electronics package - Google Patents

Abstract

The invention relates to a <mu>BGA flat MCM micro electronics package, which redesigns the conventional <mu>BGA package, that can package a single chip only, to use a ceramic plate as a back-plate to provide the functions of heat-dissipation, wire layout, and the supporting, thereby accomplishing the <mu>BGA flat MCM micro electronics package. The invention is provided to couple the chip circuit to the circuit on the ceramic plate. The circuit on the ceramic plate extends to the peripheral of the plate and couples to the substrate of the printed circuit board (PCB). The BGA on the backside of the substrate of the printed circuit board is used as the extending input and output terminals of the whole package to complete the <mu>BGA flat MCM micro electronics package in accordance with the present invention. The invention can also be used in packaging a single chip for increasing the robustness of the single-chipe package and the efficiency of heat-dissipation.

Description

V. Description of the invention (1) Planar multi-chip microelectronic packaging 1. Abstract This technology is a kind of micro-ball brake array planar multi-chip microelectronic packaging. The conventional micro-ball brake array package with only a single chip is redesigned, and the ceramic plate As a backplane, it provides heat dissipation, wiring, and support functions to achieve miniature ball brake array ceramic planar multi-chip microelectronic packaging. This technique is to couple the chip circuit to the circuit on the ceramic board, the circuit on the ceramic board extends to the periphery, and then to the printed circuit board substrate, and the ball brake array on the back of the printed circuit board substrate is used to extend the entire package. Input and output endpoints, complete the miniature ball brake array ceramic planar multi-chip microelectronic packaging of this technology. This technique can also be used in single-chip packaging, which can improve the robustness and heat dissipation of single-chip packaging. 2. Background note The memory capacity of integrated circuit is getting larger and larger. From the early 4M, 16M, 64M to 128M or 256M, the process difficulty is getting higher and higher, and with the increase of memory density , The product yield is relatively reduced. However, high memory or high transistor capacity can also be achieved by improving the packaging method. For example, a 1 2 8 Μ single chip can be packed together by two 6 4 Μ, so the relative yield can be

C: \ WIND0WS \ Desktop \ working \ 8810tw. Ptd page 4 5. Description of the invention (2) ‘Increase, and the process complexity and cost are relatively reduced. The single-chip micro ball grid array package shown in the micro ball grid array (uBGA) shown in Figure 1A is a package with only a single chip 10, and there are no planar multi-chips with ceramics. The structure of the package. Figure 1B is a bottom view of Figure 1A, showing a single chip 10 whose I / O [I / 0] pads 12 are arranged on the four sides of the 1C periphery; and the wires / leads 16 and the circuit on the substrate 14 (Not shown in the figure) are mutually coupled; the other side of the substrate 14 uses the ball brake array 18 as the input / output extension of the wafer 10, providing the connection end of the entire package coupled to the external printed circuit board. The wafer 10 is fixed on the substrate 14 with a buffer-fixing colloid 15 (Fig. 1A). The buffer-fixing colloid 15 provides a slow expansion and contraction between the wafer 10 and the substrate 14 due to temperature changes. Punching and fixing functions, so that the mismatched thermal stress between the wafer 10 and the substrate 14 can be reduced, so as to improve the reliability of the product. Packaging gel 19 is used to encapsulate components such as protective circuits, leads / leads, and chips. The technique of the present invention is to use a piece of ceramic plate as a back plate, couple the circuit on the wafer to the circuit on the ceramic plate, and then couple the circuit on the ceramic plate to the circuit on the substrate of the printed circuit board. The ball brake array on the back of the material is the extension input / output end point of the wafer; the ceramic plate material of the present invention provides heat dissipation function in single-chip packaging, and simultaneously provides heat dissipation and horizontal fixation in multi-chip packaging. Although the present invention is described by taking a combination of memory capacity as a package for illustration, it is also a simple conversion application of this technique to reduce the packaging volume by combining packages of different functions of the chip, which is also the scope of the right of the present invention.

C: \ WIND0WS \ Desktop \ working \ 8810tw. Ptd page 5 5. Description of the invention (3) 3. Simple illustration of the diagram Figure 1 A. For the conventional technique, a single chip micro ball brake array package. Figure 1B. A bottom view of Figure 1A. Figure 2 A. Single chip package for this technology, containing ceramic plate to provide heat dissipation. FIG. 2B is a bottom view of FIG. 2A. Figure 3 A. Multi-chip packaging for this technology, containing ceramic plates to provide heat dissipation and horizontal fixation. Figure 3B shows the modified design of the buffer fixing gel. Figure 3C. Is a bottom view of Figure 3A. 4. Detailed description of the present invention Figure 2 A. Single chip package for this technology, containing ceramic plate to provide heat dissipation function. The ceramic board 27 has a circuit (not shown in the figure) and the following circuit is coupled to a circuit (not shown in the figure) on a chip 20. The ceramic board 27 also provides a heat dissipation function; the printed circuit board substrate 24 Leads / leads 2 6 Coupling circuit I / O around ceramic board 2 7 [I / 0] pad 2 2; printed circuit board substrate 2 4

C: \ WIND0WS \ Desktop \ working \ 8810tw. Ptd page 6 V. Description of the invention (4) Ball gate array 2 8 is used as the input / output extension of chip 20 on the outer side. The wafer 20 is fixed on the substrate 24 with a buffer-fixing colloid 25, and the buffer-fixing colloid 25 provides the thermal stress of expansion and contraction caused by the temperature change between the wafer 20 and the ceramic plate 27 and the substrate 24. The buffering and fixing functions cause the mismatched thermal stress between the wafer 20 and the ceramic plate 27 to the substrate 24 to be reduced, so as to improve the reliability of the product. G — Buffer-fixed colloid 25, which can be selected or omitted according to the reliability requirements of the product. The buffer-fixed colloids 25 may also be a plurality of separate small colloids. This product can also be packaged with colloids 29, packaging protection circuits, chips 20, wires / lead pins 26, etc. It also isolates the air so that the components will not absorb moisture in the air to improve the reliability of the product. FIG. 2B is a bottom view of FIG. 2A. And I is the electricity (not shown) that couples the circuit (not shown) of the chip 20 to the ceramic board 27; the ceramic board 27 has I / O pads 22 around the ceramic board 27, and the printed circuit board base. One side of the material 24 has a circuit (not shown in the figure), and the wires / leads 26 are used to couple the output and input of the circuit around the ceramic plate 27 [I / O pad 2 2; the other side of the printed circuit board substrate 2 4 is a ball Gate array 2 8

C: \ WIND0WS \ Desktop \ working \ 8810tw.ptd Page 7 V. Description of the invention (5) The input and output extensions of chip 20 provide connection terminals for coupling to external printed circuit boards. Figure 3 A. Multi-chip packaging for this technology, containing ceramic plates for heat dissipation and horizontal fixation. The ceramic plate 37 has a circuit (not shown), and the following circuits are coupled to the circuits (not shown) on the wafers 30A, 30B. The ceramic plate 37 also provides a heat dissipation function and a horizontal fixing function. The printed circuit board substrate 3 4 uses the wires / lead pins 36 to couple the output and input of the circuit around the ceramic board 37 [I / 0] pad 3 2; the other side of the printed circuit board substrate 3 4 uses a ball brake array 38 I / O extension ends of the wafers 30A, 30B. The wafers 3 0 A, 3 0 B fix the colloids 3 5 A, 3 5 B with buffers and are fixed on the substrate 3 4. The buffers fix the colloids 3 5 A, 3 5 B and provide the wafers 3 0 A, 3 0 B and The thermal stress buffering and fixing function of the expansion and contraction caused by the temperature change between the ceramic plate 37 and the substrate 34 causes the wafer 30A, 30B and the ceramic plate 37 to mismatch the thermal stress between the substrate 34 and the substrate 34. Can be lowered to increase product reliability. Individual buffer fixing colloids 3 5 A and 3 5 B can be used or omitted according to the requirements of the reliability of the product. Figure 3B shows the modified design of the buffer-fixed colloid

C: \ WIND0WS \ Desktop \ working \ 8810tw.ptd Page 8 V. Description of the invention (6) The buffer fixation colloid 35A, 35B can also be an integral fixation glue 35. At the same time, fix the wafer 30 A, 3 0 B. The buffer fixing colloids 3 5 A, 3 5 B can also be multiple separate small colloids, which can be fixed separately or fixed at a time as a whole. 30 A, 30B ° This product can also be packaged with colloid 39, packaging protection circuits, Chips 30, wires / leads 36, and other components are also isolated from the air so that the components do not absorb moisture in the air to improve product reliability. FIG. 3C is a bottom view of FIG. 3A. The circuit (not shown) of the wafers 30A and 30B is coupled to the circuit (not shown) on the ceramic board 37; the ceramic board 37 has I / O pads 32 and printed circuit board substrate 34 around the ceramic board 37 One side has a circuit (not shown in the figure) and the wires / lead pins 36 couple the circuit to the input and output of the ceramic plate 37 [I / 0] cymbal 3 2 and the other side of the printed circuit board substrate 3 4 is a ball brake. The array 38 serves as an I / O extension of the chip 30, and provides connection terminals for coupling to an external printed circuit board. In the design of the backplane of the present invention, a printed circuit board made of an organic material can be used instead of a ceramic board in a design requiring a lower heat dissipation effect.

C: \ WIND0WS \ Desktop \ working \ 8810tw.ptd Page 9 V. Description of the Invention (7) The foregoing description discloses the preferred embodiment and design drawings of the present invention. However, the preferred embodiments and design drawings are only By way of example, it is not intended to limit the scope of the right of the technology of the present invention. Anyone who implements it with equal technical means or the scope of the right covered by the following "patent application scope" will not depart from the spirit of the present invention. It is the scope of the applicant's rights.

C: \ WIND0WS \ Desktop \ working \ 8810tw.ptd page 10

Claims (1)

88 1 054 IS VI. Scope of Patent Application 1. A flat multi-chip microelectronic package, comprising: a backplane with a circuit, and at least one side of the side with I / O pads; providing wiring, support, and Heat dissipation function; more than one wafer, the aforementioned wafer has a circuit and is coupled to the aforementioned backplane circuit; and 0 substrate, which has a circuit and is coupled to the aforementioned backplane's input / output [I / O] pad ° 2. A flat multi-chip microelectronic package as described in item 1 of the scope of patent application, further comprising: a buffer-fixing colloid, fixing the aforementioned wafer on the aforementioned substrate, and providing thermal stress buffering for expansion and contraction therebetween Features that improve product reliability. 3. A flat multi-chip microelectronic package as described in item 1 of the scope of the patent application, further comprising: a packaging gel covering the aforementioned chip, coupling circuit and other components to provide protection and extend product life. 4. A flat multi-chip microelectronic package as described in item 1 of the scope of patent application C: \ WIND0WS \ Desktop \ working \ 8810tw. Ptd page 11 6. Scope of applying for patents, including: Ball brake array, on the other surface of the aforementioned substrate, as the extension input / output end of the aforementioned wafer. 5. A flat multi-chip microelectronic package as described in item 2 of the scope of the patent application, further comprising: a packaging gel covering the aforementioned chip, coupling circuit and other components to provide protection and extend product life. 6. A planar multi-chip microelectronic package as described in item 5 of the scope of the patent application, further comprising: a ball brake array on the other surface of the aforementioned substrate as an extension input / output end of the aforementioned wafer. 7. A planar multi-chip microelectronic package as described in item 1 of the scope of patent application, wherein the back plate refers to a ceramic plate. 8. A flat multi-chip microelectronic package, comprising: I / O 43— There is a C: \ WINDOWS \ Desktop \ working \ 8810tw. Ptd Page 12 6. Application for a patent scope of more than one chip, the aforementioned chip has a circuit, and the circuit on the backplane ; And a substrate, which has a circuit and is connected to the I / O pad of the aforementioned backplane. 9. A flat multi-chip microelectronic package according to item 8 of the scope of the patent application, wherein the back plate refers to a printed circuit board made of organic materials. 10. —A flat single-chip microelectronic package including: a backplane with a circuit, and at least one side of the side with I / O pads; providing wiring, support, and heat dissipation functions; a chip with a circuit and The circuit is coupled to the aforementioned backplane; and the substrate, which has the circuit and is connected to the I / O pad of the aforementioned backplane. 11. A flat single-chip microelectronic package as described in item 10 of the scope of patent application, further comprising: a buffer-fixing colloid, fixing the aforementioned wafer on the aforementioned substrate, and providing thermal stress for expansion and contraction therebetween Buffer function to improve product reliability. 12. A flat single-chip microelectronic as described in item 10 of the scope of patent application C: \ WIND0WS \ Desktop \ working \ 8810tw. Ptd page 13 6. Scope of patent application Packaging, including: Packaging gel, covering the aforementioned chip, coupling circuit and other components to provide protection and extend product life. 13. A flat single-chip microelectronic package as described in item 10 of the scope of patent application, further comprising: a ball brake array on the other surface of the aforementioned substrate as an extension input / output end of the aforementioned wafer. 14. A flat single-chip microelectronic package as described in item 11 of the scope of the patent application, further comprising: a packaging gel covering the aforementioned chip, coupling circuit and other components to provide protection and extend product life. 15. A flat single-chip microelectronic package as described in item 14 of the scope of patent application, further comprising: a ball brake array on the other surface of the aforementioned substrate as the extension input / output end of the aforementioned wafer. 16. A flat single-chip microelectronic as described in item 10 of the scope of patent application C: \ WIND0WS \ Desktop \ working \ 8810tw.ptd Page 14 6. Scope of Patent Application Packaging, the backboard mentioned here refers to the ceramic board. 17. —A flat single-chip microelectronic package, including: a backplane with a circuit, and at least one side of the side with I / O pads; providing wiring and support functions; a chip with a circuit and coupled to Circuits on the aforementioned backplane; and a substrate, an output / input [I / O] pad having a circuit and coupled to the aforementioned backplane. 18. A flat single-chip microelectronic package as described in item 17 of the scope of the patent application, wherein the back plate refers to a printed circuit board made of organic materials. C: \ WIND0WS \ Desktop \ working \ 8810tw. Ptd page 15