""··部中，欠行碑/0夂T·消於合0.^卬帟 Λ7 ___ B7 ---------一 - ' ------_五、發明说明（I ) 本案係有關於一種振盪器，尤其關於一種振盪器之起 動電路。 在此領域者皆知許多振盪器具有一操作穩定（或非振盪) 區，使得該振盪器電路不能確實起動。換句話說，若該振 盪器以不規則方式起動’則不會振盪。此解釋了為何正常 情況下需要一起動電路。 另一與振盪器之起動過程有關之問題為參考晶體，亦 即，在電源Vdd已達一穩定值後，該參考晶體的振幅可 達到一穩定狀態。若該振盪器（可以是一電壓控制振盘器 (VCO)或電流控制振盪器（ICO))試著在過渡期間鎖住該參 考晶體，其將進入操作非振盪區域因而未能振盪，此需要 提供另一起動電路。 已作了各種努力以保證振盪器電路確實起動。振逢器 的起動電路可確保該振盪器在打開電源過程中在操作適當 區域起動，俾使有規則地振盪。 Shawn M. Logan的美國專利號5,534,826提供一種技 術使連接於晶體諧振器的晶體改變。此方法保證了該晶體 諧振器的快速起動。然而，該參考晶體的快速起動不能保 證一鎖相迴路（PLL)振盪器（ICO/VCO)所欲之起動。 Yasuo Tsuzuki, Takehiko Adachi 和 H Wen Zhang 在 IEEE International Frequency Control Symposium 之第 49 期年刊（1995年五月）中第565至568頁，題目為”快速起 動晶體諧振器電路”的文章中提及一種習知技術。在此文 中，在起動階段以減少一使用者控制阻抗值以增強該振盪 本紙張尺度边Λ] t國國家標準（CNS ) Μ規格（21(^297¾釐） ^先閱讀背面之注意事^-·^-,.1'-"') -V.." " ·· In the ministry, owing a stele / 0 夂 T · eliminating in the 0. ^ 卬 帟 Λ7 ___ B7 --------- 一-'------_ V. Invention Note (I) This case relates to an oscillator, and more particularly to a starter circuit for an oscillator. It is well known in the art that many oscillators have an operationally stable (or non-oscillating) region so that the oscillator circuit cannot be started reliably. In other words, if the oscillator is started in an irregular manner ', it will not oscillate. This explains why it is normally necessary to move the circuit together. Another problem related to the startup process of the oscillator is the reference crystal, that is, after the power source Vdd has reached a stable value, the amplitude of the reference crystal can reach a stable state. If the oscillator (which can be a voltage-controlled oscillator (VCO) or current-controlled oscillator (ICO)) tries to lock the reference crystal during the transition period, it will enter the operating non-oscillating region and fail to oscillate. This requires Provide another starting circuit. Various efforts have been made to ensure that the oscillator circuit does start. The starter circuit of the vibrator ensures that the oscillator starts in the proper area of operation during power-on, so that it oscillates regularly. U.S. Patent No. 5,534,826 to Shawn M. Logan provides a technique for altering a crystal connected to a crystal resonator. This method guarantees a quick start of the crystal resonator. However, the fast start of the reference crystal does not guarantee the desired start of a phase-locked loop (PLL) oscillator (ICO / VCO). Yasuo Tsuzuki, Takehiko Adachi, and H Wen Zhang mention a practice in an article entitled "Fast Start Crystal Resonator Circuit" in IEEE International Frequency Control Symposium, 49th Annual (May 1995), pages 565 to 568知 技术。 Knowing technology. In this article, in order to reduce the impedance value controlled by a user to enhance the oscillation during the start-up phase, the paper's national standard (CNS) M specification (21 (^ 297¾%) ^ Read the notes on the back first ^- · ^-,. 1 '-"') -V ..
If____丁 -----m I I . 線 A: 五、發明説明（2) 器電路直到振盪開始為止。然而，若振盪器已在穩定區域， 則此方法無法保證可將振盪器自穩定區域取出。 另一種起動操作也可藉由使用兩個電路來建立❶第一 階段由一 Vdd偵測電路組成以偵測Vdd值。第二階段由 電路組成以偵測該參考晶體的振幅。來自該第二階段之 觸發訊號可使該振盪器正常操作。本質上，該振 持在一停止狀態直至該參考晶體已達穩絲態振=疋Ϊ 楨測所有處理地區和溫度之Vdd值大於Vdd/2，在第一階 段需要一大型電容器。此外，該參考晶體的振幅偵測階段 需要許多閘極。最後，這些電路將佔去一大區域。 丁 因此，本案之申請人嘗試解決習知技術所遭遇之問題。 本發明的目的乃提供一種確保一振盪器振盪之方法， 以減輕與一非振盪電壓控制振盪器/電流控制振盪器 (VCOACO)有關之問題。 本發明的另一目的乃提供一種用於Vdd偵測和晶體 輸出偵測之起動電路。 線 本發明的再另一目的乃提供一種起動電路，其只佔去 相當小的矽區域。 本發明的再另一目的乃提供一種不需處理補償的起動 電路。 本發明的再另一目的乃提供一種可靠振盥裝置，在打 開電源時若該參考晶艘未達到一穩定操作點，可以追縱一 低振幅晶體時脈以避免該振盪器進入一非振盈穩定區域， 本發明的又另一目的乃提供一種起動電路，在電源打 本紙张尺展延川T闼囤家標準（CNS ) A4規格.（210X297舂釐） - ----— . — __ri___B? 五、發明説明（3) 開或重新言又疋後若其開始在穩定區域操作，則自動觸發該 振盈器有規則地振動^ (^先閱讀背面之注意事邛再^^本頁) 本發明的再又另一目的乃提供一種省空間，簡單及所 欲之振盪器起動電路。 根據本發明之一構想，一可靠振盪裝置包括一振盪 器，其具有一振盈器輸出，在第一情況具有一第一狀態且 在第二情況具有一第二狀態；以及一偵測裝置，電連接於 β亥振逢器以偵測該振盪器輸出在第一狀態或第二狀態且 具有一偵測輸出，其在第三情況具有一第三狀態且在第四 情況具有一第四狀態，當該偵測輸出在第三狀態時，該振 盪器在第一工作模式，而當該偵測輸出在第四狀態時，該 振盪器在第二工作模式。 線 _ 當然’該第三狀態和第四狀態之電壓狀態分別為低和 高電壓。當該偵測輸出在第三狀態時，該振盪器輸出則在 第一狀態’而當芽偵測輸出在第四狀態時，該振盪器輸出 則在第二狀態。該第一狀態和第二杈態之電壓狀態分別為 低和高電壓。 當然，該第一工作模式和第二工作模式分別為一振盪 模式和一固定模式。在該振盡模式，讀振盪器以該振盪器 I假設要振盪之模式振盪。然而，在該學定模式1，該振盪器 不振盪。在電源打開/重新設定期間，該振盪器以低於該 振盪器假設要振盪之頻率振盪。在此情況，該偵測輸出維 持在第三狀態和第四狀態之間變換。 較佳地，該偵測裝置包括一計數器，其可以為一漣波 +紙張尺度適州中阀國家標準（CNS )八4規坪（210X297秦釐） A7 五、發明説明（+ ) 計數器，或是-n位元往下計數器，用以計數2n時脈週 期，且具有一最高有效位元（MSB)，其中該n可以為4。 較佳地，該偵測裝置更包括一變換器（inverter),用以 轉換該最高有效位元之一邏輯狀態以提供該偵測輪出。 較佳地，該振盪器為一微分振盪器，可以為一五階段 基本微分環振盪器。 較佳地’本案之裝置更包括一 20Μίίζ參考晶趙。 當然’本案之裝置可結合於一鎖相迴路電路裝置。該 鎖相迴路電路裝置可包括一相位偵測器，一電荷幫浦及二 迴路濾波器。 ' 當然，在本案之裝置中，該振盪器可具有一輸出作為 該相位偵測器之輸入。 根據本發明之另一構想，一種適合與一振盪器配合使 用之起動電路包括一偵測裝置，其包括一第一輸入端，用 以輸入該振盪器輪出；以及一偵測輸出，在第三情 況具有一第三狀態且在第四情況具有一第四狀態， 使得當該偵測輸出在第三狀態時，該振盪器在第一工作模 式’而當該偵測輸出在第四狀態時，該振盪器在第二工作 模式。該振盪器具有一振盪器輸出，在第一情況具有 一第一狀態且在第二情況具有一第二狀態。 ‘1 一般來說’該偵測裝置更包括一第二輸入端，用以輸 入一晶體時脈。 當然’該镇測裝置可包括一計數器，其可以為一 η位 元往下計數器，用以計數2η時脈週期，且具有一最高有 本紙乐尺度適用中國國家標隼（CNS > Α4規格（2丨〇><297於釐）If____ 丁 ----- m I I. Line A: 5. Description of the invention (2) The device circuit until the oscillation starts. However, if the oscillator is already in the stable region, this method cannot guarantee that the oscillator can be taken out of the stable region. Another starting operation can also be established by using two circuits. The first stage consists of a Vdd detection circuit to detect the Vdd value. The second stage consists of a circuit to detect the amplitude of the reference crystal. The trigger signal from the second stage enables the oscillator to operate normally. In essence, the oscillation is held in a stopped state until the reference crystal has reached steady-state vibration. 疋 Ϊ The Vdd value of all processing regions and temperatures is greater than Vdd / 2, and a large capacitor is required in the first stage. In addition, the reference crystal requires many gates for its amplitude detection phase. In the end, these circuits will take up a large area. D Therefore, the applicant in this case tried to solve the problems encountered by the conventional technology. It is an object of the present invention to provide a method for ensuring the oscillation of an oscillator to alleviate the problems associated with a non-oscillating voltage controlled oscillator / current controlled oscillator (VCOACO). Another object of the present invention is to provide a starting circuit for Vdd detection and crystal output detection. Another object of the present invention is to provide a start-up circuit which occupies only a relatively small silicon area. It is still another object of the present invention to provide a starter circuit which does not require processing compensation. Yet another object of the present invention is to provide a reliable vibrating device. If the reference crystal vessel does not reach a stable operating point when the power is turned on, it can track a low-amplitude crystal clock to prevent the oscillator from entering a non-vibrating state. In a stable area, another object of the present invention is to provide a starting circuit for extending a paper ruler of Yanchuan T 闼 storehouse standard (CNS) A4 specification. (210X297 舂）)-----_. — __Ri___B V. Explanation of the invention (3) If the user starts to operate in the stable area after opening or re-talking, it will automatically trigger the vibrator to regularly vibrate ^ (^ Read the precautions on the back 邛 ^^ this page) Yet another object of the present invention is to provide a space-saving, simple and desired oscillator starting circuit. According to an idea of the present invention, a reliable oscillating device includes an oscillator having an oscillator output, a first state in a first case and a second state in a second case; and a detection device, It is electrically connected to the β-Hydraulic device to detect whether the oscillator output is in the first state or the second state and has a detection output, which has a third state in the third case and a fourth state in the fourth case. When the detection output is in the third state, the oscillator is in the first working mode, and when the detection output is in the fourth state, the oscillator is in the second working mode. Line _ Of course, the voltage states of the third and fourth states are low and high voltages, respectively. When the detection output is in the third state, the oscillator output is in the first state 'and when the bud detection output is in the fourth state, the oscillator output is in the second state. The voltage states of the first and second states are low and high voltages, respectively. Of course, the first working mode and the second working mode are an oscillation mode and a fixed mode, respectively. In this exhaust mode, the read oscillator oscillates in the mode in which the oscillator I is supposed to oscillate. However, in set mode 1, the oscillator does not oscillate. During power on / reset, the oscillator oscillates at a lower frequency than the oscillator assumes to oscillate. In this case, the detection output keeps changing between the third state and the fourth state. Preferably, the detection device includes a counter, which can be a ripple + paper size Shizhou National Valve National Standard (CNS) 8 4 gauge (210X297 Qinli) A7 5. Description of the invention (+) counter, or A -n bit down counter is used to count a 2n clock cycle and has a most significant bit (MSB), where n can be 4. Preferably, the detection device further includes an inverter for converting a logic state of the most significant bit to provide the detection rotation. Preferably, the oscillator is a differential oscillator, which may be a five-stage basic differential ring oscillator. Preferably, the device of the present case further includes a 20 μL reference crystal. Of course, the device of this case can be combined with a phase-locked loop circuit device. The phase-locked loop circuit device may include a phase detector, a charge pump, and a two-loop filter. 'Of course, in the device of this case, the oscillator may have an output as an input to the phase detector. According to another concept of the present invention, a start-up circuit suitable for use with an oscillator includes a detection device including a first input terminal for inputting the oscillator to rotate out; and a detection output at the first The three cases have a third state and the fourth case have a fourth state, so that when the detection output is in the third state, the oscillator is in the first working mode 'and when the detection output is in the fourth state The oscillator is in the second operating mode. The oscillator has an oscillator output having a first state in a first case and a second state in a second case. ‘1 in general’ The detection device further includes a second input terminal for inputting a crystal clock. Of course, the test device can include a counter, which can be an n-bit down counter to count the 2η clock cycle, and has a highest paper music standard applicable to Chinese national standards (CNS > Α4 specifications ( 2 丨 〇 > < 297 in centimeters)
(^1¾.^背面之注素事^'汚#‘'!':'— I • 1/1 -----訂-- if. 部 中 a .1 ；H f： Λ ii 印 t Λ7 一 B7 五、發明説明（r) 效位元（MSB)。 較佳地，該偵測裝置更包括一變換器，用以轉換該最 高有效位元之一邏輯狀態以提供該偵測輸出。 當然’該振盪器為一微分振盪器，可藉由一微分至單 端轉換而提供該振盪器輸出。 根據本發明之第三構想，一種使一振盪器振盪之方法 之步驟包括偵測該振盡器是否有規則地振盈以及當該振H 器有規則地振盈時’允許該振盪器振盈之，且當該振盘器 沒有規則地振盪時，維持該振盪器免於振盪直至建立一足 夠控制電壓為止》該振盪器包括一振盪器輸出， 當然’在本案之方法中，該步驟可由一偵測裝置執行 之’該偵測裝置包括一第一輸入端，用以輸入該振盪器 輸出’該振盈器輸出在第一情況具有一第一狀態且 在第·一情況具有一第·—狀態；以及一偵測輸出，其 在第三情況具有一第三狀態且在第四情況具有广第 四狀態：，使得當該偵測輸出在第三狀態時，該振盪器在 第一工作模式，而當該偵測輸出在第四狀態時，該振盪器 在第二工作模式。 當然’該第一工作模式和第二工作模式分別為一振盪 模式和一固定模式。在該固定模式，該振盪器不振盪。在 電源打開/重新設定期間’該振盪器以低於該振盪器需要 振盪之頻率振盪。 當然，該偵測裝置包括一計數器。 一般來說’當該振盪器在該固定模式，該控制電壓則 本紙張尺度適州t囷國家標隼（CNS ) A4規格（210X297^釐） ^先聞讀背面之注意事-具^^."頁) ------訂------線 五、發明説明 增加 A7 B7 正常來說’該計數器將週期性地計數直到獲得該足夠 控制電壓為止。 當然，該計數器計數16個時脈作為一週期。 本案之實施例請參閲所附圏式之說明，俾得一更深入 之了解。 第圖係為根據本發明之一可靠振盡裝置之一般構造 之示意結構圏； 第二圈係為用於第一圖中的可靠振盪裝置之一計數器 之示意圖； 第三圈係為根據本發明之可靠振盪裝置之一較佳實施 例的示意方塊圓；以及 第四圓係根據本發明說明第三圓中之可靠振盪裝置加 入於一鎖相迴路電路。 V上‘圖式之主要構件如下： 4:振盪器 5:計數器 9:振盪器輸 8:相位偵測器 16:迴路濾波 出 器 57:偵測裝置 60:參考晶體 7:變換器 15:電荷幫浦 6:晶體時脈 如第一圖所示’根據本發明之可靠振盥裝置之基本結 構包括一振盪器4，其具有一振盪器輸出，在第一情況具 有一第一狀態且在第二情況具有一第二狀態；以及一偵測 裝置57’電連接於該振盪器4以偵測該振盪器輸出在第 本紙張尺度適州中國國家標準（CNS ) A4規格（210x297公疫 ^^''•乂-頁)(^ 1¾. ^ Note on the back ^^^ # ''! ':' — I • 1/1 ----- Order-if. Ministry of a .1; H f: Λ ii 印 t Λ7 A B7 V. Description of the invention (r) Effective bit (MSB). Preferably, the detection device further includes a converter for converting a logic state of the most significant bit to provide the detection output. Of course 'The oscillator is a differential oscillator, and the oscillator output can be provided by a differential to single-ended conversion. According to a third concept of the present invention, a method of oscillating an oscillator includes detecting the vibration exhaustion. Whether the oscillator vibrates regularly and when the oscillator vibrates regularly, 'allow the oscillator to vibrate, and when the vibrator does not oscillate regularly, maintain the oscillator from oscillation until a Until the control voltage is sufficient, the oscillator includes an oscillator output. Of course, in the method of this case, this step can be performed by a detection device. The detection device includes a first input terminal for inputting the oscillator output. 'The vibrator output has a first state in the first case and a first state in the first case. -State; and a detection output having a third state in the third case and a wide fourth state in the fourth case: so that when the detection output is in the third state, the oscillator operates in the first Mode, and when the detection output is in the fourth state, the oscillator is in the second working mode. Of course, 'the first working mode and the second working mode are an oscillation mode and a fixed mode, respectively. In the fixed mode, The oscillator does not oscillate. 'During the power on / reset' the oscillator oscillates at a frequency lower than the oscillator needs to oscillate. Of course, the detection device includes a counter. Generally 'when the oscillator is at the fixed Mode, the control voltage is the paper size of the state standard (CNS) A4 specification (210X297 ^ cent) ^ first read the notes on the back-with ^^. &Quot; page) ------ order ------ Line V. Description of the invention Increase A7 B7 Normally, the counter will count periodically until the sufficient control voltage is obtained. Of course, the counter counts 16 clocks as a cycle. For the example of this case, please refer to the description of the attached formula for a deeper understanding. The first diagram is a schematic structure of the general structure of a reliable vibration device according to the present invention; the second circle is a schematic diagram of a counter used in the first diagram of the reliable oscillation device; the third circle is according to the present invention A schematic square circle of a preferred embodiment of the reliable oscillation device; and the fourth circle is added to a phase-locked loop circuit in the reliable oscillation device of the third circle according to the present invention. The main components of the pattern on V are as follows: 4: Oscillator 5: Counter 9: Oscillator input 8: Phase detector 16: Loop filter 57: Detection device 60: Reference crystal 7: Converter 15: Charge Pump 6: The crystal clock is as shown in the first figure. 'The basic structure of a reliable vibration device according to the present invention includes an oscillator 4, which has an oscillator output, has a first state in the first case, and The second case has a second state; and a detection device 57 'is electrically connected to the oscillator 4 to detect that the oscillator output is in the first paper size of the China State Standard (CNS) A4 specification (210x297) ^^ '' • 乂 -page)
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-*1T 線 Λ 7 Β7 中 央 而 ii .τ 消 t- A 权 印 V. 五、發明説明（ 一狀態或是第二狀離、，曰目女 y. 有—第：肤皞:”有一傾測輸出’在第三情況具 測輸!四情況具有一第四狀態，使得當該摘 ί出在第一狀態時，該振盪器4 當該偵測輸出在第四狀離陆第作模式而 你乐四狀態時，該振盪器4是在第二工作模 L 1 —特別實施例_，該偵測裝置57包括—計數器5， 第二圖所示，以一參考晶體6〇產生時脈。 如第二圖所示，具有n(在此特別實例中為句位元之計 數器5藉由參考晶體6〇所產生的時脈訊號6而產生時脈。 雖然可使用任何類型之計數器，但以使用—缝波計數器來 作說明《•制4·位元漣波計數器5以彳貞測該振盈器4的 振盪頻率’該振盪器4為一電壓控制振盪器（vc〇)或電流 控制振蘯器（ICO)。該計數器5之重置訊號由振盈器輸出 9所驅動。在下一頁之表一說明了在連續時脈週期中該計 數器5之四個輸出位元的改變。 該計數器5的操作可綜合如下。當該晶體時脈存在時， 若卩〇讲9為高的，該計數器5由”1111，，計數至，，0000，，。若 Pom 9為低的，該計數器5的所有輸出位元，，也就是q3, Q2, Q1和Q0皆為高的。由表一可觀察到Q3 10在八個時 脈週期皆為高狀態且在八個週期為低狀態《此事實形成本 案之基礎。 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297%瘦) (1?先妃讀背面之：^^^"•'"•^''-''-,ί"')-* 1T line Λ 7 Β7 in the center and ii .τ cancel t- A right seal V. V. Description of the invention (the first state or the second state of departure, said the girl y. Yes-No .: skin 皞: "There is a tilt The test output has a test input in the third case! The fourth case has a fourth state, so that when the pick-up is in the first state, the oscillator 4 when the detection output is in the fourth state off-land operation mode and When you are in the fourth state, the oscillator 4 is in the second working mode L 1-a special embodiment. The detection device 57 includes a counter 5. As shown in the second figure, the clock is generated by a reference crystal 60. As shown in the second figure, the counter 5 having n (sentence bit in this particular example) generates a clock by referring to the clock signal 6 generated by the crystal 60. Although any type of counter can be used, Use a slot-wave counter for explanation. "• system 4 · bit ripple counter 5 measures the oscillation frequency of the oscillator 4 '. The oscillator 4 is a voltage-controlled oscillator (vc0) or a current-controlled oscillator. (ICO). The reset signal of the counter 5 is driven by the output of the vibrator. Table 1 on the next page shows The change of the four output bits of the counter 5 in the clock cycle. The operation of the counter 5 can be summarized as follows. When the crystal clock is present, if 讲 〇9 is high, the counter 5 consists of "1111 ,, Count to ,, 0000 ,,. If Pom 9 is low, all output bits of the counter 5, that is, q3, Q2, Q1, and Q0 are all high. From Table 1, it can be observed that Q3 10 is in eight The clock cycles are all high and low in eight cycles. "This fact forms the basis of this case. This paper size applies the Chinese National Standard (CNS) A4 specification (210X297% thin) (1? Read on the back of the concubine: ^ ^^ " • '" • ^' '-''-, ί "')
A7 B7 五、發明説明（$ ) 表一 Q3 Q2 Ql Q0 1 1 1 1 1 1 1 0 1 1 0 1 1 1 0 0 1 0 1 1 1 0 1 0 1 0 0 1 1 0 0 0 0 1 1 1 0 1 1 0 0 1 0 1 0 1 0 0 0 0 1 1 0 0 1 0 0 0 0 1 0 0 0 0 往下計數 起始狀態 線 第三圖說明了根據本發明之—種用於一起動電路或可 靠振盪裝置之新方法。參考此囷’將討論該計數器5 ^操 作。該變換器7轉換Q3 10之邏輯狀態以產生一 Cm〇ut 訊號14作為一重置訊號以觸發該振盪器的啟動。根據其 邏輯狀態，Cntout訊號14決定該振盪器的之固定/振盪模 式’使得當該Cntout訊號14為低時，該Cnt〇m訊號14 _放該振盪器至一振盪狀態，且若該Cnt〇ut訊號14為高 時，該Cntout訊號14維持該振盪器4(例如為一五階段基 本微分環振盪器）在一固定模式。在一微分至單端轉換之 後，輸出Pout 9代表該振堡器4之輸出。當該振盡器4 維持在固定模式時’ Pout 9仍然為高狀態。 本紙張尺度適W中國囤家標準（CNS ) A4規格（210X29f公釐） 五、發明説明 A7 B7 釘浐部中头ί;.^Γ/ί.;.υί/ί史合Μ妇印1'i 如第四圖所示，上述之起動電路配合作為一鎖相迴路 (PLL)電路裝置的一部份，該鎖相迴路電路裝置包括一相 位偵測器（P.D.) 8，一電荷幫浦（C.P.) 15及一迴路濾波器 (L.F·) 16，其中該振盪器4之輸出Phin 18可作為相位 读測Is 8的輸入。 本案之起動電路以下列模式作用。當電源Vdd上升時， Pout 9也上升。當Pout 9非常高而使計數器5中的正反 器開始作用時，該計數器5開始計數。Q3 10在八個時脈 週期維持高的狀態使得該Cntout訊號14為低且該振盪器 自由開始振盪。若該振盪器4不振盪，可能因為有一不足 的控制電壓或是其在穩定區域操作，Pout 9維持在高的狀 態使得Q3 10在八個時脈週期維持在低狀態❶該控制電壓 試著在此期間上升且該振盪器仍然在固定狀態。然後重複 上面所提及之週期。此過程將持續著直至建立一足夠控制 f壓Vc 17以使該振盪器4開始振盪。 ' 當該振盪器4根據參考晶體以非常低的頻專振堡時， 該Cntout訊號14維持在高和低狀態之間變換，那麼該振 盘器可以在固定模式或是振蘯模式。當該Cntout訊號14 以足夠高之頻率振盪使得在Q3 10由1變成〇之前重新政 定該計數器時’該Cntout訊號14在PLL電路裝置之正常 操作情況下仍為低狀態，如第四圖所示。 再請參閱第一圖’其顯示本案之可靠振盪裝置之基本 結構’在此特別實施例中偵測輸出Cntout訊號14之第三 狀態和第四狀態之電壓狀態分別為低電壓和高電壓。在所 本紙張尺廋述用中國國家標率（CNSl Μ規格（210X297S< η 讀 λ if ；k iA7 B7 V. Description of the invention ($) Table 1 Q3 Q2 Ql Q0 1 1 1 1 1 1 1 0 1 1 0 1 1 1 0 0 1 0 1 1 1 1 1 1 1 1 1 0 1 1 0 0 1 0 1 0 1 0 0 0 0 1 1 0 1 New methods of starting circuits or reliable oscillators. With reference to this operation, the operation of the counter 5 will be discussed. The converter 7 converts the logic state of Q3 10 to generate a Cmout signal 14 as a reset signal to trigger the start of the oscillator. According to its logic state, the Cntout signal 14 determines the fixed / oscillation mode of the oscillator, such that when the Cntout signal 14 is low, the Cntom signal 14 _ puts the oscillator to an oscillation state, and if the Cnt〇 When the ut signal 14 is high, the Cntout signal 14 maintains the oscillator 4 (for example, a five-phase basic differential ring oscillator) in a fixed mode. After a differential to single-ended conversion, output Pout 9 represents the output of the vibrator 4. When the exhaustor 4 is maintained in the fixed mode, 'Pout 9 is still high. The size of this paper is in accordance with China Store Standard (CNS) A4 specification (210X29f mm). 5. Description of the invention A7 B7 Nail in the middle of the nail section ;; ^ Γ / ί.;. Υί / ί 史 合 Ｍ 女 印 1 ' i As shown in the fourth figure, the above-mentioned starting circuit cooperates as a part of a phase-locked loop (PLL) circuit device, which includes a phase detector (PD) 8 and a charge pump ( CP) 15 and a loop filter (LF ·) 16, in which the output Phin 18 of the oscillator 4 can be used as the input for the phase readout Is 8. The starting circuit in this case works in the following modes. When the power supply Vdd rises, Pout 9 also rises. When Pout 9 is very high and the flip-flop in counter 5 starts to work, the counter 5 starts counting. Q3 10 remains high for eight clock cycles so that the Cntout signal 14 is low and the oscillator is free to start oscillating. If the oscillator 4 does not oscillate, it may be because there is an insufficient control voltage or it is operating in a stable region. Pout 9 is maintained at a high state so that Q3 10 is maintained at a low state for eight clock cycles. The control voltage is This period rises and the oscillator is still fixed. Then repeat the cycle mentioned above. This process will continue until a sufficient control f voltage Vc 17 is established to start the oscillator 4 to oscillate. 'When the oscillator 4 excites the oscillator at a very low frequency according to the reference crystal, the Cntout signal 14 maintains a transition between high and low states, then the vibrator can be in a fixed mode or a vibrating mode. When the Cntout signal 14 oscillates at a sufficiently high frequency so that the counter is re-politicized before Q3 10 changes from 1 to 0, the Cntout signal 14 is still low during normal operation of the PLL circuit device, as shown in the fourth figure. Show. Please refer to the first figure again, which shows the basic structure of the reliable oscillating device in this case. In this particular embodiment, the voltage states of the third and fourth states of the detection output Cntout signal 14 are low voltage and high voltage, respectively. In the paper rule, the Chinese national standard (CNSl M standard (210X297S < η read λ if; k i
IT --------Ύ, 五、發明説明（[o ) 揭露之實施例中’振盪器輸出Pout 9之第一狀態和第二 狀態之電壓狀態分別為低電壓和高電壓，使得偵測輸出 Cntom訊號η在第三狀態（振盪），而振盪器輸出p〇m 9 在第一狀態（低），且當偵測輸出p〇ut 9在第四狀態時，振 盪器輸出Pout9在第二狀態（高）。 在本案之實例中，該第一工作模式和第二工作模式分 別為一振盪模式和一固定模式。在該振盪模式，該振盪器 以該振盪器假設要振盪之模式振盪。然而，在該固定模式， 該振盪器不振盪。在電源打開/重新設定期間，該振盪器 以低於該振盪器假設要振盪之頻率振盪。 該計數器5為一 4位元往下計數器，用以計數2n(或16) 時脈週期，且具有一最高有效位元(MSB) Q3 10以提供 偵測輪出Cntout訊號14。用於使該計數器5產生時脈之 參考晶體60可以是一 2〇MHz參考晶體。 形式上來說’根據本發明’ 一種適合與一振盪器4配 合使用之起動電路包括一偵測裝置57,其包括一第一輸 入端Pout 9’用以輸入該振盈器輸出p〇ut 9; —摘測 輸出Cntout 14’在第三情況具有一第三狀態且在 第四情況具有一第四狀態’使得當該偵測輸出Cntout 14在第三狀態時，該振盈器4在第一工作模式，而當該 偵測輸出Cntout 14在第四狀態時，該振盪器4在第二 工作模式；以及一第二輸入端，用以輸入一參考晶體6〇 所產生的一晶體時脈Xtal 6。該振盪器4具有一振盡器 輸出Pout 9，在第一情況具有一第一狀態且在第二 不A乐尺度適州中囷國家標準（CNS > A4規格（210X29仏釐） 先閎讀背面之注意事項再堵，';冬頁) 訂 絲 #ί沪部中^^η,·^’υ消贽合 Μ"印$t Λ7 --------------—____ Β7 五 '發明説明（丨/ ) 情況具有一第二狀態。 方法上來說，一種使一振盪器4振盪的方法步驟包括 偵測該振盪器4是否有規則地振盪以及當該振盪器4有規 則地振盪時，釋放該振盪器4振盪之，且當該振盪器4不 規則地振盪時，維持該振盪器4免於振盪直至建立一足夠 控制電壓Vc為止。該振盪器4包括一振盪器輸出。 上述之步驟可以一偵測裝置57執行之，該偵測裝置57 包括一第一輸入端P〇ut 9,用以輸入至該振盪器輸出， 該振盪器輸出在第一情況具有一第一狀態且在第二 情況具有一第二狀態；以及一偵測輸出Cntout 14， 其在第三情況具有一第三狀態且在第四情況具有一 第四狀態’使得當該偵測輸出Cntout 14在第三狀態時， 該振盡器4在第一工作模式，而當該偵測輸出Cnt〇lU 14 在第四狀態時’該振盪器4在第二工作模式。 本案之實施例已詳加描述，以上所描述不應用來加以 限定本案之申請專利範圍。本案得由熟悉本技藝之人士任 施匠思而為諸般修飾，然皆不脫如附申請專利範圍所欲保 護者。 (詞先閱祐背面之：^意3-';:'.·1,^·'·'·‘·-^:'--IT -------- Ύ, 5. Description of the Invention ([o) In the disclosed embodiment, the voltage states of the first state and the second state of the oscillator output Pout 9 are low voltage and high voltage, respectively, so that The detection output Cntom signal η is in the third state (oscillation), and the oscillator output p0m 9 is in the first state (low), and when the detection output pout 9 is in the fourth state, the oscillator output Pout9 is in The second state (high). In the example of the present case, the first working mode and the second working mode are respectively an oscillation mode and a fixed mode. In this oscillation mode, the oscillator oscillates in a mode that the oscillator assumes to oscillate. However, in this fixed mode, the oscillator does not oscillate. During power on / reset, the oscillator oscillates at a lower frequency than the oscillator assumes to oscillate. The counter 5 is a 4-bit down counter for counting 2n (or 16) clock cycles and has a most significant bit (MSB) Q3 10 to provide a detection round-out Cntout signal 14. The reference crystal 60 for generating the clock of the counter 5 may be a 20 MHz reference crystal. Formally, according to the present invention, a starting circuit suitable for use with an oscillator 4 includes a detection device 57 including a first input terminal Pout 9 'for inputting the output of the vibrator p0ut 9; -The test output Cntout 14 'has a third state in the third case and a fourth state in the fourth case' so that when the detection output Cntout 14 is in the third state, the vibrator 4 works in the first Mode, and when the detection output Cntout 14 is in the fourth state, the oscillator 4 is in the second working mode; and a second input terminal is used to input a crystal clock Xtal 6 generated by a reference crystal 60. . The oscillator 4 has an exhaustor output Pout 9. In the first case, it has a first state and in the second non-A scale, the state standard (CNS > A4 specification (210X29%)). Note on the back again, '; winter page) Order silk # ί 沪 部 中 ^^ η, · ^' υ 消 贽 合 Ｍ " 印 $ t Λ7 -------------- —____ Β7 Five 'invention description (丨 /) The situation has a second state. Methodologically, a method step of oscillating an oscillator 4 includes detecting whether the oscillator 4 oscillates regularly and when the oscillator 4 oscillates regularly, release the oscillator 4 to oscillate, and when the oscillation When the oscillator 4 oscillates irregularly, the oscillator 4 is kept from being oscillated until a sufficient control voltage Vc is established. The oscillator 4 includes an oscillator output. The above steps can be performed by a detection device 57 including a first input terminal Po 9 for input to the oscillator output, and the oscillator output has a first state in the first case. And in the second case has a second state; and a detection output Cntout 14 which has a third state in the third case and a fourth state in the fourth case 'so that when the detection output Cntout 14 is in the first In the three states, the oscillator 4 is in the first operating mode, and when the detection output Cnt01U 14 is in the fourth state, the oscillator 4 is in the second operating mode. The examples in this case have been described in detail, and the above description should not be used to limit the scope of patent application in this case. This case may be modified by anyone who is familiar with the art, but it is not inferior to those who want to protect the scope of the patent application. (Read the words on the back of You: ^ 意 3-';:'. · 1, ^ · '·' · ‘·-^: '-