TW393729B - Manufacturing method of a solder pad - Google Patents

Manufacturing method of a solder pad Download PDF

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Publication number
TW393729B
TW393729B TW87121153A TW87121153A TW393729B TW 393729 B TW393729 B TW 393729B TW 87121153 A TW87121153 A TW 87121153A TW 87121153 A TW87121153 A TW 87121153A TW 393729 B TW393729 B TW 393729B
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Taiwan
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layer
metal layer
metal
manufacturing
trench
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TW87121153A
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Chinese (zh)
Inventor
Shr-Wei Suen
Wen-Yi Shie
Huo-Tie Lu
Kuen-Chr Wang
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United Microelectronics Corp
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Priority to TW87121153A priority Critical patent/TW393729B/en
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Publication of TW393729B publication Critical patent/TW393729B/en

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Abstract

This is a manufacturing method of a solder pad, in which a barrier layer is formed on the inner metal dielectric layer with a dual damascene opening and a trench. A first metal layer is formed on the barrier layer to completely fill the dual damascene opening and partially fill the trench. Sequentially, a glue layer and a second metal layer are formed on the first metal layer. The second metal layer must fill the trench. Chemical mechanical polishing removes a part of the second metal layer, glue layer, first metal layer until the inter dielectric layer is exposed. It also produces a dual damascene structure and the solder pad structure, which fills up the trench.

Description

4055twf.d〇c/ 0 0 8___B,___ 五、發明説明(f ) 本發明是有關於一種半導體元件的製造方法,且特別 是有關於一種半導體元件上銲墊的製造方法。 隨丨著積體電路元件的高度積集化,元件的尺寸逐漸 縮小,其所需的金屬內連線(Interconnect)數目也隨之 而增加。然而,尺寸的縮小以及金屬內連線數目的增加, 將使得製程的困難度增加,特別是在提供良率佳以及可 靠度好的金屬內連線製程上。因此,如何使超大型積體 電路的內連線,在極小的接觸面積下,仍具有良好的導 電性質與執行效能,是目前半導體工業所積極努力的方 向。 在習知之半導體元件上銲墊之製造方法中,在完成 銲墊窗口蝕刻之後,由於銅墊層(Cu pad)完全裸露於銲墊 窗口中,又完全暴露於空氣中,且銅的氧化速率很高, 所以銅很容易被氧化成氧化銅,而造成電阻値增大及影 響半導體元件的可靠性,進而造成半導體元件不良率提 高。且以傳統的接線技術,由於銅與銲接線附著力不佳, 會有銅墊層與銲接線銲接不良的問題發生,而造成半導 體元件不良率提高。 第1A圖至第1E圖爲習知的一種銲墊的製造方法, 用以解決銅銲墊與焊接線附著力不佳的問題。 首先,請參照第1A圖,在一已形成有一多層金屬層 (未顯示)之基底100上形成一內金屬介電層102’內金屬 介電層102中具有包括溝渠與介層洞的雙重鑲嵌開口 104 以及銲墊溝渠106。 3 度诚川十阎搜家榡彳(CNS ) Λ4規相(2丨0X297公釐) (誚先閱讀背面之注意事項再填寫本頁) 裝_4055twf.d0c / 0 0 8 ___ B, ___ 5. Description of the Invention (f) The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a pad on a semiconductor device. With the integration of integrated circuit components, the size of components has gradually decreased, and the number of metal interconnects required has also increased. However, the reduction in size and the increase in the number of metal interconnects will increase the difficulty of the process, especially in the process of providing metal interconnects with good yields and reliability. Therefore, how to make the interconnections of the ultra-large integrated circuits still have good conductive properties and performance under a very small contact area is the current active direction of the semiconductor industry. In the conventional method for manufacturing a pad on a semiconductor device, after the pad window is etched, the copper pad layer (Cu pad) is completely exposed in the pad window and completely exposed to the air, and the oxidation rate of copper is very high. High, so copper can be easily oxidized to copper oxide, which increases the resistance 値 and affects the reliability of the semiconductor element, which in turn leads to an increase in the defect rate of the semiconductor element. And with the traditional wiring technology, due to the poor adhesion between copper and the welding wire, there will be a problem of poor welding between the copper pad and the welding wire, which will increase the failure rate of the semiconductor components. FIG. 1A to FIG. 1E show a conventional method for manufacturing a bonding pad, which is used to solve the problem of poor adhesion between a copper bonding pad and a bonding wire. First, referring to FIG. 1A, an inner metal dielectric layer 102 'is formed on a substrate 100 having a multi-layer metal layer (not shown). The inner metal dielectric layer 102 has a dual damascene including a trench and a via hole. Opening 104 and pad trench 106. 3 degrees Chengchuan ten Yan search family (CNS) Λ4 gauge phase (2 丨 0X297 mm) (诮 Please read the precautions on the back before filling this page) Pack_

,1T 4055twf.doc/008 A7 B7_ 五、發明説明(>) 請參照第1B圖,在內金屬介電層102上形成一層共 形的(Conformal)阻障層108,在阻障層108上,形成一 層銅金屬層110,並使之塡滿雙重鑲嵌開口 104及銲墊 溝渠106。 請參照第1C圖,以化學機械硏磨法(Chemical Mechanical Polishing,CMP)去除部分銅金屬層 110,至 裸露出內金屬介電層102爲止,藉以在雙重鑲嵌開口 104 中形成雙重鑲嵌結構ll〇a,並在銲墊溝渠106中形成銅 銲墊110b。在內金屬介電層102上依序覆蓋一層黏著層 (Glue)112與絕金屬層114。 請參照第1D圖,進行微影與蝕刻的製程,去除部分 的鋁金屬層114與黏著層112,以在銅銲墊110b的上方 形成銘銲墊114a。 請參照第1E圖,在上圖所示的結構上覆蓋一層保護 層116,其中保護層116中有一銲墊窗開口 118,暴露出 銘靜墊1 14a。 此習知用以形成銲墊的製造方法,雖然解決了銅墊 層與焊接線之間附著力不佳的問題,但是在形成鋁墊層 時,需要一道額外的光罩定義鋁金屬層,製程的複雜性 與製作的成本會因此而增加。 有鑑於此,本發明的主要目的就是在提供一種銲墊的 製造方法,以自動對準的方式在銅銲墊上形成鋁銲墊,因 此不需要使用額外的光罩來定義鋁金屬層,對於節省製作 成本與降低製程的複雜性有很大的助益。 4 本紙张尺度诚川屮( CNS ) 招(210X297公楚) (誚先閱讀背面之注意事項再填寫本頁)1T 4055twf.doc / 008 A7 B7_ 5. Description of the Invention (>) Please refer to FIG. 1B to form a conformal barrier layer 108 on the inner metal dielectric layer 102, and on the barrier layer 108 To form a copper metal layer 110 and fill it with the dual damascene opening 104 and the pad trench 106. Referring to FIG. 1C, a portion of the copper metal layer 110 is removed by chemical mechanical polishing (CMP) until the inner metal dielectric layer 102 is exposed, so as to form a double damascene structure in the double damascene opening 104. a, and a copper pad 110b is formed in the pad trench 106. The inner metal dielectric layer 102 is sequentially covered with a glue layer 112 and a metal insulating layer 114. Referring to FIG. 1D, a lithography and etching process is performed, and a part of the aluminum metal layer 114 and the adhesive layer 112 are removed to form a bonding pad 114a above the copper bonding pad 110b. Referring to FIG. 1E, the structure shown in the above figure is covered with a protective layer 116, wherein the protective layer 116 has a pad window opening 118 to expose the Ming pad 1 14a. This conventional manufacturing method for forming solder pads solves the problem of poor adhesion between the copper pad layer and the welding line, but when forming the aluminum pad layer, an additional photomask is needed to define the aluminum metal layer. The manufacturing process The complexity and cost of production will increase as a result. In view of this, the main purpose of the present invention is to provide a method for manufacturing a pad, which forms an aluminum pad on a copper pad in an automatic alignment manner, so there is no need to use an additional photomask to define the aluminum metal layer. Production costs and the complexity of the process are of great help. 4 Paper Size Chengchuan 屮 (CNS) strokes (210X297 Gongchu) (诮 Read the precautions on the back before filling this page)

A7 B7 4055twf.doc/008 五、發明説明(彡) 根據本發明的上述及其他目的,提出一種銲墊的製造 方法,在具有雙重鑲嵌開口與溝渠的內金屬介電層上形成 一層阻障層,其中溝渠的尺寸較雙重鑲嵌開口尺寸大,係 用以作爲接合墊形成的區域。於阻障層上形成一層共形的 第一金屬層,此第一金屬層之厚度視雙重鑲嵌開口的大小 而定;由於雙重鑲嵌開口較小,第一金屬層會完全塡滿雙 重鑲嵌開口,在溝渠的部分則形成一層與表面共形的第一 金屬層,所以僅會部分塡滿溝渠。於第一金屬層上依序形 成一層黏著層與第二金屬層,黏著層係用以增加第一金屬 層與第二金屬層之間的附著力,第二金屬層必須塡滿溝 渠。進行化學機械硏磨製程,去除部分的第二金屬層、黏 著層、第一金屬層,至暴露出內層介電層爲止,藉以同時 形成雙重鑲嵌結構與塡充在溝渠中的銲墊結構;其中銲墊 結構包括第一金屬層、黏著層以及位於黏著層上的第二金 屬層。在形成銲墊的結構上覆蓋一層保護層,並進行罩幕 定義,在保護層中形成銲墊窗開口,暴露出銲墊中的第二 金屬層。 根據本發明的上述及其他目的,提出一種銲墊的製造 方法,在具有雙重鑲嵌開口與溝渠的內金屬介電層上形成 一層阻障層,其中溝渠的尺寸較雙重鑲嵌開口尺寸大,係 用以作爲接合墊形成的區域。於阻障層上形成一層共形的A7 B7 4055twf.doc / 008 V. Description of the invention (彡) According to the above and other objects of the present invention, a method for manufacturing a solder pad is proposed, in which a barrier layer is formed on an inner metal dielectric layer having a double damascene opening and a trench. The size of the trench is larger than the size of the double inlay opening, which is used as the area where the bonding pad is formed. A conformal first metal layer is formed on the barrier layer. The thickness of the first metal layer depends on the size of the dual mosaic openings. Because the dual mosaic openings are small, the first metal layer will completely fill the dual mosaic openings. A portion of the trench is formed with a first metal layer conformal to the surface, so the trench is only partially filled. An adhesive layer and a second metal layer are sequentially formed on the first metal layer. The adhesive layer is used to increase the adhesion between the first metal layer and the second metal layer. The second metal layer must fill the trench. Carry out a chemical mechanical honing process to remove part of the second metal layer, the adhesive layer, and the first metal layer until the inner dielectric layer is exposed, so as to form a dual damascene structure and a pad structure filled in the trench at the same time; The pad structure includes a first metal layer, an adhesive layer, and a second metal layer on the adhesive layer. Cover the structure forming the pad with a protective layer and define the mask. The pad window opening is formed in the protective layer, exposing the second metal layer in the pad. According to the above and other objects of the present invention, a method for manufacturing a solder pad is provided. A barrier layer is formed on an inner metal dielectric layer having a double inlay opening and a trench. The size of the trench is larger than that of the double inlay opening. Use as a bonding pad area. Form a conformal layer on the barrier layer

I 第一金屬層,此第一金屬層之厚度視雙重鑲嵌開口的大小 而定;由於雙重鑲嵌開口較小,第一金屬層會完全塡滿雙 重鑲嵌開口,在溝渠的部分則形成一層與表面共形的第一 5 (誚先閱讀背而之注意事項再填寫本頁) 裝. 訂 ϋ张尺^试川十R 1¾3:標今(('NS ) AAim ( 2丨0X297公釐) " 4 Ο 5 5 twf . doc /0 0 8 B7 五、發明説明(a ) 金屬層,所以僅會部分塡滿溝渠。進行化學機械硏磨製程, 去除部分的第一金屬層至暴露出內層介電層爲止,藉以完 成雙亀鑲嵌結構。接著,依序形成一層黏著層與第二金屬 層,黏著層係用以增加第一金屬層與第二金屬層之間的附 著力,第二金屬層必須塡滿溝渠。進行化學機械硏磨製程, 去除部分的第二金屬層與黏著層,至暴露出內層介電層爲 止,藉以形成塡充在溝渠中的銲墊結構;其中銲墊結構包 括第一金屬層、黏著層以及位於黏著層上的第二金屬層。 在形成銲墊的結構上覆蓋一層保護層,並進行罩幕定義, 在保護層中形成銲墊窗開口,暴露出銲墊的第二金屬層。 爲讓本發明之上述目的、特徵、和優點能更明顯易懂, 下文特舉二實施例,並配合所附圖式,作詳細說明如下: 圖式之簡單說明: 第1A圖至第1E圖爲習知的一種銲墊的製造方法; 第2圖至第5圖繪示依照本發明第一實施例的一種銲 墊的製造流程圖;以及 第2圖、第6圖、第7圖、第4圖以及第5圖係依照 本發明第二實施例,依序繪示另一種製造流程圖。 圖示標記說明: 100 基底 102,202 內金屬介電層 \ 104,204 雙重鑲嵌開口 106,206 銲墊溝渠 108,208 阻障層 6 本紙張尺度这川ψ K 1¾家枕呤(CNS )八4现梠(210X 297公釐)~一" (誚先閱讀背面之注意事項再填寫本頁) 裝 訂 A7 B7 4055twf.doc/008 五、發明説明($ ) 110 銅金屬層 112,212,212’ 黏著層 114 鋁金屬層 ll〇a 雙重鑲嵌結構 110b 銅銲墊 H4a 鋁銲墊 H6 保護層 118 銲墊窗開口 210,210a,210b 第一金屬層 214,214’,214a 第二金屬廢 216 保護層 第一實施例 請參照第2圖,提供一層內金屬介電層202,其上己 形成包括溝渠與介層洞的雙重鑲嵌開口 204,以及銲墊溝 渠206。在此內金屬介電層202上形成一層共形的阻障層 208與第一金屬層210,第一金屬層210的厚度視雙重鑲 嵌開口 204的大小而定,用以塡滿雙重鑲嵌開口 204即可, 由於銲墊溝渠206的尺寸較雙重鑲嵌開口 204大,所以當 雙重鑲嵌開口 204被塡滿時,在銲墊溝渠206的部分僅覆 蓋一層共形的第一金屬層210,塡充部分的銲墊溝渠206。 第一金屬層210之材質較佳爲銅,形成方法比如爲以化學 氣相沈積法(Chemical Vapor Deposition,CVD)沈積銅金屬 層' 電鏡銅(Electrode Plating Cu)、無電銅(Electrodeless,Cu) 以及無電鑛銅(Electrodeless Plating Cu),其中電鑛銅等方 Ί 紙張尺度这川、|阐杈家柢嘩(( NS ) Λ4規栺(210X 297公釐) " (誚先閱讀背面之注意事項再填寫本頁) 7^I The first metal layer. The thickness of the first metal layer depends on the size of the double inlay opening. Because the double inlay opening is small, the first metal layer will completely fill the double inlay opening, and a layer and surface will be formed in the part of the trench. Conformal No. 5 (Please read the precautions before filling this page). Binding. Zhang Zhang ruler ^ Test Chuan ten R 1¾3: Mark this (('NS) AAim (2 丨 0X297mm) " 4 Ο 5 5 twf. Doc / 0 0 8 B7 V. Description of the invention (a) The metal layer will only partially fill the trench. A chemical mechanical honing process is performed to remove a portion of the first metal layer until the inner interlayer is exposed. The double-layered mosaic structure is completed by the electrical layer. Then, an adhesive layer and a second metal layer are sequentially formed. The adhesive layer is used to increase the adhesion between the first metal layer and the second metal layer, and the second metal layer The trench must be filled. A chemical mechanical honing process is performed to remove part of the second metal layer and the adhesive layer until the inner dielectric layer is exposed to form a pad structure filled in the trench; the pad structure includes A first metal layer, an adhesive layer, and an adhesive layer A second metal layer on the layer. A protective layer is covered on the structure forming the pad, and a mask is defined, and a pad window opening is formed in the protective layer to expose the second metal layer of the pad. In order for the present invention The above objects, features, and advantages can be more clearly understood. The following two embodiments are described in detail below in conjunction with the accompanying drawings as follows: Brief description of the drawings: Figures 1A to 1E are conventional A method for manufacturing a solder pad; FIGS. 2 to 5 show a flowchart for manufacturing a solder pad according to a first embodiment of the present invention; and FIG. 2, FIG. 6, FIG. 7, FIG. 4 and FIG. Figure 5 shows another manufacturing flowchart in sequence according to the second embodiment of the present invention. The illustration marks indicate: 100 substrates 102,202 metal dielectric layers \ 104,204 double mosaic openings 106,206 pad trenches 108,208 barrier layer 6 sheets of paper Dimensions K ψ K 1 ¾ Home pillow (CNS) 8 4 now (210X 297 mm) ~ a " (诮 Please read the precautions on the back before filling this page) Binding A7 B7 4055twf.doc / 008 V. Invention Description ($) 110 copper metal layer 112,212,212 'sticky Landing layer 114 Aluminum metal layer 110a Double mosaic structure 110b Copper pad H4a Aluminum pad H6 Protective layer 118 Pad window opening 210, 210a, 210b First metal layer 214, 214 ', 214a Second metal waste 216 Protective layer First implementation For example, please refer to FIG. 2, a layer of inner metal dielectric layer 202 is provided, and a double damascene opening 204 including a trench and a hole of the dielectric layer has been formed thereon, and a pad trench 206 has been formed on the metal dielectric layer 202. The barrier layer 208 and the first metal layer 210 are shaped. The thickness of the first metal layer 210 depends on the size of the dual damascene opening 204. It is sufficient to fill the double damascene opening 204. Since the size of the pad trench 206 is double The inlay opening 204 is large, so when the double inlay opening 204 is filled, the portion of the pad trench 206 is covered with only a conformal first metal layer 210 and the portion of the pad trench 206 is filled. The material of the first metal layer 210 is preferably copper. For example, the method for forming the first metal layer 210 is to deposit a copper metal layer by using a chemical vapor deposition method (Chemical Vapor Deposition (CVD)), Electrode Plating Cu, Electrodeless (Cu), and Electrodeless Plating Cu (Electrodeless Plating Cu), of which copper and other papers are used. Paper scales are described in this paper. | 杈 枝 家 柢 ° (NS) Λ4 gauge (210X 297 mm) " (诮 Read the precautions on the back first (Fill in this page again) 7 ^

A7 B7 4055twf.doc/008 五、發明説明(G ) 法在雙重鑲嵌開口 24處會有由底部往上塡(Bottom-Up), 且在銲墊溝渠206處會形成共形的銅的特性,故雙重鑲嵌 開口 204會被第一金屬層210塡滿,而再銲墊溝渠206的 部分則形成一層共形的第一金屬層210。 請參照第3圖,在第一金屬層210上依序形成一層黏 著層212與一層第二金屬層214。黏著層212係用以增加 第一金屬層210與第二金屬層214之間的附著力;第二金 屬層214的厚度必須足夠塡滿銲墊溝渠206,其較佳的材 質比如爲鋁金屬。 請參照第4圖,進行化學機械硏磨製程,去除部分的 第二金屬層214、黏著層212以及第一金屬層210,至暴 露出內金屬介電層202爲止,藉以同時形成雙重鑲嵌結構 210a,以及包括第一金屬層210b與第二金屬層214a的銲 墊結構。 請參照第5圖,在第4圖所示的結構上形成一層保護 層216,進行罩幕定義,在保護層216中形成銲墊窗開口 218,暴露出銲墊結構中的第二金屬層214a。 第二實施例 請參照第2圖’此結構的形成方法以及步驟的特徵 在第一實施例中已有詳細的說明,故在此不重複敘述。 進行化學機械硏磨製程,去除雙重鑲嵌開口 204與銲墊 \ 溝渠206以外的弟一金屬層210,形成如第6圖所示之 結構,完成雙重鑲嵌結構21〇a。 請參照第7圖’在化學機械硏磨製程完成後,依序 8 4:紙張尺度遥川屮鍺丨羽·^,((,NS ) A4^^'2I0X297^^ ) 一~~~~一 (誚先閲讀背面之注意事項再填寫本頁) 裝 訂 4〇55twf.doc/008 A7 B7 五、發明説明(9) 形成一層黏著層212’與第二金屬層214’於第6圖所示的 結構上,黏著層212係用以增加第一金屬層210與第二金 屬層2|14之間的附著力;第二金屬層214的厚度必須足夠 塡滿銲墊溝渠206,其較佳的材質比如爲鋁金屬。 之後,請參照第4圖,進行化學機械硏磨製程,去除 部分的第二金屬層214’以及黏著層212’,至暴露出內金屬 介電層202爲止,藉以形成包括第一金屬層210b與第二 金屬層214a的銲墊結構。 請參照第5圖,在第4圖所示的結構上形成一層保護 層216,進行罩幕定義,在保護層216中形成銲墊窗開口 218,暴露出銲墊結構中的第二金屬層214a。 由於形成的銲墊窗開口 218並未暴露出容易氧化的第 —金屬層210a,無須擔心第一金屬層210a氧化而造成電 阻增大及影響半導體元件的可靠性。 此外,暴露出來的第二金屬層214a係以自動對準的 方式形成,不會增加製程使用的罩幕,因此對於節省製 作的成本,以及簡化製程的複雜性有很大的助益。 雖然本發明已以一較佳實施例揭露如上,然其並非用 以限定本發明,任何熟習此技藝者,在不脫離本發明之精 神和範圍內,當可作各種之更動與潤飾,因此本發明之保 護範圍當視後附之申請專利範圍所界定者爲準。 \ 9 本紙張尺度璉川中兩柯家^?((抑)六4規^(210>< 297公釐) ("先閱讀背而之注意事項再填寫本頁) 裝·A7 B7 4055twf.doc / 008 5. The invention description (G) method will have a bottom-up at the double damascene opening 24, and a conformal copper characteristic will be formed at the pad trench 206. Therefore, the dual damascene opening 204 will be filled with the first metal layer 210, and a portion of the re-pad trench 206 will form a conformal first metal layer 210. Referring to FIG. 3, an adhesive layer 212 and a second metal layer 214 are sequentially formed on the first metal layer 210. The adhesive layer 212 is used to increase the adhesion between the first metal layer 210 and the second metal layer 214. The thickness of the second metal layer 214 must be sufficient to fill the pad trench 206. A preferred material is aluminum metal. Referring to FIG. 4, a chemical mechanical honing process is performed to remove a portion of the second metal layer 214, the adhesive layer 212, and the first metal layer 210 until the inner metal dielectric layer 202 is exposed, thereby forming a dual mosaic structure 210a at the same time. And a pad structure including the first metal layer 210b and the second metal layer 214a. Referring to FIG. 5, a protective layer 216 is formed on the structure shown in FIG. 4 to define a mask. A pad window opening 218 is formed in the protective layer 216 to expose the second metal layer 214 a in the pad structure. . Second Embodiment Please refer to FIG. 2 for the method of forming the structure and the characteristics of the steps. The first embodiment has been described in detail, so it will not be repeated here. A chemical mechanical honing process is performed to remove the dual damascene opening 204 and the first metal layer 210 other than the solder pad \ trench 206 to form a structure as shown in FIG. 6 to complete the dual damascene structure 21a. Please refer to Figure 7 'after the chemical mechanical honing process is completed, in order. 8 4: Paper-scale Harmony 屮 丨 Yu, ^, ((, NS) A4 ^^' 2I0X297 ^^) One ~~~~ one (诮 Please read the notes on the back before filling in this page) Binding 4〇55twf.doc / 008 A7 B7 V. Description of the invention (9) Form an adhesive layer 212 'and a second metal layer 214' as shown in Figure 6 Structurally, the adhesive layer 212 is used to increase the adhesion between the first metal layer 210 and the second metal layer 2 | 14; the thickness of the second metal layer 214 must be sufficient to fill the pad trench 206, and its better material For example, aluminum. Then, referring to FIG. 4, a chemical mechanical honing process is performed to remove a portion of the second metal layer 214 ′ and the adhesive layer 212 ′ until the inner metal dielectric layer 202 is exposed, thereby forming a first metal layer 210 b and The pad structure of the second metal layer 214a. Referring to FIG. 5, a protective layer 216 is formed on the structure shown in FIG. 4 to define a mask. A pad window opening 218 is formed in the protective layer 216 to expose the second metal layer 214 a in the pad structure . Since the formed pad window opening 218 does not expose the easily oxidized first metal layer 210a, there is no need to worry about the oxidation of the first metal layer 210a, which may increase the resistance and affect the reliability of the semiconductor device. In addition, the exposed second metal layer 214a is formed in an auto-aligned manner, which does not increase the mask used in the process, so it greatly helps to save the cost of production and simplify the complexity of the process. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make various modifications and decorations without departing from the spirit and scope of the present invention. The scope of protection of the invention shall be determined by the scope of the attached patent application. \ 9 The paper size of the two Ke family in the Sichuan River ^? ((Suppression) six 4 rules ^ (210 > < 297mm) (" Read the precautions on the back before filling this page)

,1T, 1T

Claims (1)

經濟部中央標準局員工消費合作社印装 A8 B8 C8 4055twf . doc/ 008 D8 六、申請專利範圍 1. 一種銲墊的製造方法,包括下列步驟: 提供一內金屬介電層,其中該內金屬介電層中至少已 形成有一雙重鑲嵌開口以及一溝渠; 形成一共形的阻障層於該內金屬介電層上; 形成一共形的第一金屬層於該阻障層上,其中該第一 金屬層完全塡滿該雙重鑲嵌開口,並部分塡滿該溝渠; 形成一黏著層於該第一金屬層上; 形成一第二金屬層於該黏著層上,藉以塡滿該溝渠; 以及 去除部分的該第二金屬層、該黏著層、該第一金屬層 與該阻障層,至暴露出該內金屬介電層爲止。 2. 如申請專利範圍第1項所述之製造方法,其中該第 一金屬層之材質包括銅。 3. 如申請專利範圍第2項所述之製造方法,其中形成 該第一金屬層之方法包括化學氣相沈積法、電鍍銅、無電 銅以及無電鍍銅。 4. 如申請專利範圍第1項所述之製造方法,其中該第 二金屬層之材質包括鋁。 5. 如申請專利範圍第1項所述之製造方法,其中去除 部分的該第二金屬層、該黏著層、該第一金屬層與該阻障 層,至暴露出該內金屬介電層的步驟係以化學機械硏磨法 進行。 6. —種銲墊的製造方法,包括下列步驟: 提供一內金屬介電層,其中該內金屬介電層中至少已 (請先閱讀背面之注意事項再如寫本頁) -裝_ 訂 本紙張尺度逋用中國國家標準(CNS ) A4規格(210X297公釐) 經濟部中央標準局員工消費合作社印製 A8 B8 C8 4055twf.doc/008 D8 六、申請專利範圍 形成有一雙重鑲嵌開口以及一溝渠; 形成一共形的阻障層於該內金屬介電層上; 形成一共形的第一金屬層於該阻障層上,其中該第一 金屬層完全塡滿該雙重鑲嵌開口,並部分塡滿該溝渠; 去除部分該第一金屬層與該阻障層,至暴露出該內金 屬介電層爲止; 形成一黏著層於該第一金屬層與該內金屬介電層上; 形成一第二金屬層於該黏著層上,藉以塡滿該溝渠; 以及 去除部分的第二金屬層與該黏著層,至暴露出該內金 屬介電層爲止。 7. 如申請專利範圍第6項所述之製造方法,其中該第 一金屬層之材質包括銅。 8. 如申請專利範圍第7項所述之製造方法,其中形成 該第一金屬層之方法包括化學氣相沈積法、電鍍銅、無電 銅以及無電鍍銅。 9. 如申請專利範圍第6項所述之製造方法,其中該第 二金屬層之材質包括鋁。 10. 如申請專利範圍第6項所述之製造方法,其中去除 部分該第一金屬層與該阻障層,至暴露出該內金屬介電層 之步驟係以化學機械硏磨法進行。 Π.如申請專利範圍第6項所述之製造方法,其中去除 部分的該第二金屬層與該阻障層,至暴露出該內金屬介電 層的步驟係以化學機械硏磨法進行。 (請先閱讀背面之注意事項再务寫本頁) -裝· 訂 線--1. 本紙張尺度適用中國國家標準(CNS ) A4规格(210X297公釐) A8 Bg C8 D8 4055twf.doc/008 申請專利範圍 11 一種銲墊的製造方法,包括下列步驟: 提供具有一溝渠之一內金屬介電層; 形成一共形的阻障層於該內金屬介電層上: 形成一共形的第一金屬層於該阻障層上,部分塡滿該 溝渠; 形成一黏著層於該第一金屬層上;以及 形成一第二金屬層於該黏著層上,以塡滿該溝渠。 13_如申請專利範圍第12項所述之製造方法’其中該 第一金屬層之材質包括銅。 如申請專利範圍第13項所述之製造方法,其中形 成該第一金屬層之方法包括化學氣相沈積法、電鍍銅、無 電銅以及無電鍍銅。 I5.如申請專利範圍第U項所述之製造方法,其中該 第二金屬層之材質包括鋁。 (請先閲讀背面之注意事項再填寫本頁) 裝. 訂 經濟部中央標隼局員工消費合作社印裝 12 本紙張尺度逋用中國固家揉準(CNS > A4规格(210X297公釐)Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs A8 B8 C8 4055twf .doc / 008 D8 VI. Patent Application Scope 1. A method for manufacturing a solder pad, including the following steps: Provide an inner metal dielectric layer, wherein the inner metal dielectric layer At least one double damascene opening and a trench have been formed in the electrical layer; a conformal barrier layer is formed on the inner metal dielectric layer; a conformal first metal layer is formed on the barrier layer, wherein the first metal A layer completely fills the double mosaic opening and partially fills the trench; forming an adhesive layer on the first metal layer; forming a second metal layer on the adhesive layer so as to fill the trench; and removing part of the trench The second metal layer, the adhesion layer, the first metal layer and the barrier layer are exposed until the inner metal dielectric layer is exposed. 2. The manufacturing method according to item 1 of the scope of patent application, wherein the material of the first metal layer includes copper. 3. The manufacturing method according to item 2 of the scope of patent application, wherein the method for forming the first metal layer includes a chemical vapor deposition method, electroplated copper, electroless copper, and electroless copper. 4. The manufacturing method according to item 1 of the scope of patent application, wherein the material of the second metal layer includes aluminum. 5. The manufacturing method according to item 1 of the scope of patent application, wherein a portion of the second metal layer, the adhesive layer, the first metal layer and the barrier layer are removed until the inner metal dielectric layer is exposed. The steps are performed by chemical mechanical honing. 6. — A method for manufacturing a solder pad, including the following steps: Provide an inner metal dielectric layer, wherein the inner metal dielectric layer is at least (please read the precautions on the back before writing this page) This paper size uses Chinese National Standard (CNS) A4 specifications (210X297 mm). Printed by the Consumer Cooperatives of the Central Bureau of Standards of the Ministry of Economic Affairs. A8 B8 C8 4055twf.doc / 008 D8. 6. The scope of the patent application has formed a double mosaic opening and a trench. Forming a conformal barrier layer on the inner metal dielectric layer; forming a conformal first metal layer on the barrier layer, wherein the first metal layer completely fills the dual damascene opening and is partially filled The trench; removing a portion of the first metal layer and the barrier layer until the inner metal dielectric layer is exposed; forming an adhesive layer on the first metal layer and the inner metal dielectric layer; forming a second A metal layer is on the adhesive layer to fill the trench; and a part of the second metal layer and the adhesive layer are removed until the inner metal dielectric layer is exposed. 7. The manufacturing method according to item 6 of the scope of patent application, wherein the material of the first metal layer includes copper. 8. The manufacturing method according to item 7 of the scope of patent application, wherein the method for forming the first metal layer includes a chemical vapor deposition method, electroplated copper, electroless copper, and electroless copper. 9. The manufacturing method according to item 6 of the scope of patent application, wherein the material of the second metal layer includes aluminum. 10. The manufacturing method as described in item 6 of the scope of patent application, wherein the steps of removing part of the first metal layer and the barrier layer until the inner metal dielectric layer is exposed are performed by a chemical mechanical honing method. Π. The manufacturing method as described in item 6 of the scope of patent application, wherein the steps of removing a portion of the second metal layer and the barrier layer, and exposing the inner metal dielectric layer are performed by chemical mechanical honing. (Please read the precautions on the back before writing this page)-Binding · Binding Line-1. This paper size is applicable to Chinese National Standard (CNS) A4 specification (210X297 mm) A8 Bg C8 D8 4055twf.doc / 008 Apply Patent Scope 11 A method for manufacturing a solder pad, including the following steps: providing a metal dielectric layer having an inner trench; forming a conformal barrier layer on the inner metal dielectric layer: forming a conformal first metal layer The trench is partially filled on the barrier layer; an adhesion layer is formed on the first metal layer; and a second metal layer is formed on the adhesion layer to fill the trench. 13_ The manufacturing method according to item 12 of the scope of patent application, wherein the material of the first metal layer includes copper. The manufacturing method according to item 13 of the scope of patent application, wherein the method for forming the first metal layer includes a chemical vapor deposition method, electroplated copper, electroless copper, and electroless copper. I5. The manufacturing method as described in item U of the patent application range, wherein a material of the second metal layer includes aluminum. (Please read the precautions on the back before filling out this page) Binding. Order Printed by the Central Consumers Bureau of the Ministry of Economic Affairs of the Consumer Cooperatives 12 This paper size is in accordance with China Gujia standard (CNS > A4 size (210X297 mm)
TW87121153A 1998-12-18 1998-12-18 Manufacturing method of a solder pad TW393729B (en)

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