TW377444B - Control gate driver circuit for a non-volatile memory and memory using same - Google Patents

Control gate driver circuit for a non-volatile memory and memory using same

Info

Publication number
TW377444B
TW377444B TW086112145A TW86112145A TW377444B TW 377444 B TW377444 B TW 377444B TW 086112145 A TW086112145 A TW 086112145A TW 86112145 A TW86112145 A TW 86112145A TW 377444 B TW377444 B TW 377444B
Authority
TW
Taiwan
Prior art keywords
voltage
input terminal
regulated
memory
charge pump
Prior art date
Application number
TW086112145A
Other languages
Chinese (zh)
Inventor
Bruce L Morton
Yangming Su
Kuo-Tung Chang
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US08/703,174 external-priority patent/US5721704A/en
Priority claimed from US08/703,173 external-priority patent/US5740109A/en
Application filed by Motorola Inc filed Critical Motorola Inc
Application granted granted Critical
Publication of TW377444B publication Critical patent/TW377444B/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G11C16/28—Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits

Landscapes

  • Read Only Memory (AREA)
  • Dram (AREA)

Abstract

A charge pump is provided in this invention, comprising: a voltage reference generating circuit having at least one output terminal for providing a corresponding reference voltage; (1) a first regulated voltage doubling charge pump stage having a voltage input terminal connected to a power supply voltage terminal, a reference input terminal coupled to said voltage reference generating circuit for receiving a first reference voltage, and a voltage output terminal for providing a first regulated voltage; and a first capacitor used to double a voltage at said voltage input terminal to provide said first regulated voltage; and (2) a second regulated voltage doubling charge pump stage having a voltage input terminal connected to said voltage output terminal of said first regulated voltage doubling charge pump stage, a reference input terminal coupled to said voltage reference generating circuit for receiving a second reference voltage, and an output terminal for providing a second regulated voltage, and having a second capacitor used to double a voltage at said voltage input terminal to provide said first regulated voltage; where the said first capacitor is formed using a thinner oxide than said second capacitor, thereby saving circuit area.
TW086112145A 1996-08-23 1997-08-23 Control gate driver circuit for a non-volatile memory and memory using same TW377444B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/703,174 US5721704A (en) 1996-08-23 1996-08-23 Control gate driver circuit for a non-volatile memory and memory using same
US08/703,173 US5740109A (en) 1996-08-23 1996-08-23 Non-linear charge pump

Publications (1)

Publication Number Publication Date
TW377444B true TW377444B (en) 1999-12-21

Family

ID=27107089

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086112145A TW377444B (en) 1996-08-23 1997-08-23 Control gate driver circuit for a non-volatile memory and memory using same

Country Status (3)

Country Link
JP (1) JP3827418B2 (en)
KR (1) KR100518096B1 (en)
TW (1) TW377444B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI737535B (en) * 2020-11-06 2021-08-21 力晶積成電子製造股份有限公司 Semiconductor device and manufacturing method of the same

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100727441B1 (en) * 2005-09-29 2007-06-13 주식회사 하이닉스반도체 Column decoder
US7548484B2 (en) 2005-09-29 2009-06-16 Hynix Semiconductor Inc. Semiconductor memory device having column decoder
WO2014104808A1 (en) * 2012-12-28 2014-07-03 주식회사 실리콘웍스 Charge pump apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI737535B (en) * 2020-11-06 2021-08-21 力晶積成電子製造股份有限公司 Semiconductor device and manufacturing method of the same

Also Published As

Publication number Publication date
JPH1083692A (en) 1998-03-31
KR100518096B1 (en) 2005-12-06
KR19980018899A (en) 1998-06-05
JP3827418B2 (en) 2006-09-27

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees