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Application filed by Taiwan Semiconductor Mfg Co LtdfiledCriticalTaiwan Semiconductor Mfg Co Ltd
Priority to TW087111004ApriorityCriticalpatent/TW374234B/en
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Publication of TW374234BpublicationCriticalpatent/TW374234B/en
The present invention provides an improved process for manufacturing semiconductor interconnects. The process chiefly uses material selection of a dielectric layer and appropriate ion implantation to increase the etching selectivity of dielectric material, thus a damascene interconnect structure can be obtained without an etch stop layer.
TW087111004A1998-07-071998-07-07Method for manufacturing a damascene interconnect structure
TW374234B
(en)