TW371331B - System for prefetching data - Google Patents

System for prefetching data

Info

Publication number
TW371331B
TW371331B TW085106154A TW85106154A TW371331B TW 371331 B TW371331 B TW 371331B TW 085106154 A TW085106154 A TW 085106154A TW 85106154 A TW85106154 A TW 85106154A TW 371331 B TW371331 B TW 371331B
Authority
TW
Taiwan
Prior art keywords
prefetched
cache
cache lines
stream
mode
Prior art date
Application number
TW085106154A
Other languages
English (en)
Inventor
Dwain Alan Hicks
Michael John Mayfield
David Scott Ray
Shih-Hsiung Stephen Tung
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of TW371331B publication Critical patent/TW371331B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/383—Operand prefetching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60—Details of cache memory
    • G06F2212/6022—Using a prefetch buffer or dedicated prefetch cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60—Details of cache memory
    • G06F2212/6026—Prefetching based on access pattern detection, e.g. stride based prefetch

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
TW085106154A 1995-11-06 1996-05-24 System for prefetching data TW371331B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/554,180 US6085291A (en) 1995-11-06 1995-11-06 System and method for selectively controlling fetching and prefetching of data to a processor

Publications (1)

Publication Number Publication Date
TW371331B true TW371331B (en) 1999-10-01

Family

ID=24212343

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085106154A TW371331B (en) 1995-11-06 1996-05-24 System for prefetching data

Country Status (4)

Country Link
US (1) US6085291A (zh)
JP (1) JPH09146835A (zh)
KR (1) KR100262906B1 (zh)
TW (1) TW371331B (zh)

Cited By (1)

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US7984237B2 (en) 2004-03-24 2011-07-19 Intel Corporation Integrated circuit capable of pre-fetching data

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US6381683B1 (en) 1998-12-09 2002-04-30 Advanced Micro Devices, Inc. Method and system for destination-sensitive memory control and access in data processing systems
US6226721B1 (en) * 1998-12-09 2001-05-01 Advanced Micro Devices, Inc. Method and system for generating and utilizing speculative memory access requests in data processing systems
US6546439B1 (en) 1998-12-09 2003-04-08 Advanced Micro Devices, Inc. Method and system for improved data access
US6510497B1 (en) 1998-12-09 2003-01-21 Advanced Micro Devices, Inc. Method and system for page-state sensitive memory control and access in data processing systems
US6219769B1 (en) 1998-12-09 2001-04-17 Advanced Micro Devices, Inc. Method and system for origin-sensitive memory control and access in data processing systems
US6260123B1 (en) 1998-12-09 2001-07-10 Advanced Micro Devices, Inc. Method and system for memory control and access in data processing systems
US6918009B1 (en) 1998-12-18 2005-07-12 Fujitsu Limited Cache device and control method for controlling cache memories in a multiprocessor system
US6223257B1 (en) * 1999-05-12 2001-04-24 Rise Technology Company Instruction cache address generation technique having reduced delays in fetching missed data
US6418516B1 (en) * 1999-07-30 2002-07-09 International Business Machines Corporation Method and system for managing speculative requests in a multi-level memory hierarchy
US6487637B1 (en) 1999-07-30 2002-11-26 International Business Machines Corporation Method and system for clearing dependent speculations from a request queue
US6473833B1 (en) 1999-07-30 2002-10-29 International Business Machines Corporation Integrated cache and directory structure for multi-level caches
US6594730B1 (en) * 1999-08-03 2003-07-15 Intel Corporation Prefetch system for memory controller
US6317811B1 (en) * 1999-08-26 2001-11-13 International Business Machines Corporation Method and system for reissuing load requests in a multi-stream prefetch design
US6446167B1 (en) * 1999-11-08 2002-09-03 International Business Machines Corporation Cache prefetching of L2 and L3
US6467030B1 (en) * 1999-11-09 2002-10-15 International Business Machines Corporation Method and apparatus for forwarding data in a hierarchial cache memory architecture
US6567894B1 (en) * 1999-12-08 2003-05-20 International Business Machines Corporation Method and apparatus to prefetch sequential pages in a multi-stream environment
JP2001344153A (ja) * 2000-05-30 2001-12-14 Nec Corp マルチプロセッサシステムのキャッシュメモリ制御装置
US6901500B1 (en) * 2000-07-28 2005-05-31 Silicon Graphics, Inc. Method and apparatus for prefetching information and storing the information in a stream buffer
US6523093B1 (en) * 2000-09-29 2003-02-18 Intel Corporation Prefetch buffer allocation and filtering system
US6665776B2 (en) * 2001-01-04 2003-12-16 Hewlett-Packard Development Company L.P. Apparatus and method for speculative prefetching after data cache misses
JP4341186B2 (ja) 2001-01-22 2009-10-07 株式会社日立製作所 メモリシステム
US6795876B1 (en) * 2001-03-27 2004-09-21 Intel Corporation Adaptive read pre-fetch
JP3969009B2 (ja) * 2001-03-29 2007-08-29 株式会社日立製作所 ハードウェアプリフェッチシステム
US7093077B2 (en) 2001-11-30 2006-08-15 Intel Corporation Method and apparatus for next-line prefetching from a predicted memory address
US7260704B2 (en) 2001-11-30 2007-08-21 Intel Corporation Method and apparatus for reinforcing a prefetch chain
US6954840B2 (en) 2001-11-30 2005-10-11 Intel Corporation Method and apparatus for content-aware prefetching
US6675280B2 (en) 2001-11-30 2004-01-06 Intel Corporation Method and apparatus for identifying candidate virtual addresses in a content-aware prefetcher
US6871246B2 (en) * 2003-05-07 2005-03-22 Freescale Semiconductor, Inc. Prefetch control in a data processing system
US7139878B2 (en) * 2003-06-20 2006-11-21 Freescale Semiconductor, Inc. Method and apparatus for dynamic prefetch buffer configuration and replacement
US7200719B2 (en) * 2003-07-31 2007-04-03 Freescale Semiconductor, Inc. Prefetch control in a data processing system
US20050039016A1 (en) * 2003-08-12 2005-02-17 Selim Aissi Method for using trusted, hardware-based identity credentials in runtime package signature to secure mobile communications and high-value transaction execution
KR100546403B1 (ko) * 2004-02-19 2006-01-26 삼성전자주식회사 감소된 메모리 버스 점유 시간을 가지는 시리얼 플레쉬메모리 컨트롤러
JP4532931B2 (ja) * 2004-02-25 2010-08-25 株式会社日立製作所 プロセッサ、および、プリフェッチ制御方法
US20060143401A1 (en) * 2004-12-27 2006-06-29 Jacob Doweck Method and apparatus for prefetching based on cache fill buffer hits
US7350029B2 (en) * 2005-02-10 2008-03-25 International Business Machines Corporation Data stream prefetching in a microprocessor
US7380066B2 (en) * 2005-02-10 2008-05-27 International Business Machines Corporation Store stream prefetching in a microprocessor
JP4378335B2 (ja) 2005-09-09 2009-12-02 インターナショナル・ビジネス・マシーンズ・コーポレーション ディスクへのトランザクション・データ書き込みの方式を動的に切り替える装置、切り替える方法、及び切り替えるプログラム
US20080098176A1 (en) * 2006-10-18 2008-04-24 Krishna M V V Anil Method and Apparatus for Implementing Memory Accesses Using Open Page Mode for Data Prefetching
US7917701B2 (en) * 2007-03-12 2011-03-29 Arm Limited Cache circuitry, data processing apparatus and method for prefetching data by selecting one of a first prefetch linefill operation and a second prefetch linefill operation
US8683129B2 (en) * 2010-10-21 2014-03-25 Oracle International Corporation Using speculative cache requests to reduce cache miss delays
US20130179642A1 (en) * 2012-01-10 2013-07-11 Qualcomm Incorporated Non-Allocating Memory Access with Physical Address
US9047198B2 (en) 2012-11-29 2015-06-02 Apple Inc. Prefetching across page boundaries in hierarchically cached processors

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US5261066A (en) * 1990-03-27 1993-11-09 Digital Equipment Corporation Data processing system and method with small fully-associative cache and prefetch buffers
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US5357618A (en) * 1991-04-15 1994-10-18 International Business Machines Corporation Cache prefetch and bypass using stride registers
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US5761706A (en) * 1994-11-01 1998-06-02 Cray Research, Inc. Stream buffers for high-performance computer memory system
US5664147A (en) * 1995-08-24 1997-09-02 International Business Machines Corp. System and method that progressively prefetches additional lines to a distributed stream buffer as the sequentiality of the memory accessing is demonstrated

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7984237B2 (en) 2004-03-24 2011-07-19 Intel Corporation Integrated circuit capable of pre-fetching data

Also Published As

Publication number Publication date
KR100262906B1 (ko) 2000-08-01
JPH09146835A (ja) 1997-06-06
US6085291A (en) 2000-07-04
KR970029103A (ko) 1997-06-26

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