TW355836B - Sputtering methods for forming metal interconnect lines in semiconductor devices - Google Patents
Sputtering methods for forming metal interconnect lines in semiconductor devicesInfo
- Publication number
- TW355836B TW355836B TW086111997A TW86111997A TW355836B TW 355836 B TW355836 B TW 355836B TW 086111997 A TW086111997 A TW 086111997A TW 86111997 A TW86111997 A TW 86111997A TW 355836 B TW355836 B TW 355836B
- Authority
- TW
- Taiwan
- Prior art keywords
- interconnect lines
- semiconductor devices
- metal interconnect
- forming metal
- metal
- Prior art date
Links
- 239000002184 metal Substances 0.000 title abstract 6
- 239000004065 semiconductor Substances 0.000 title 1
- 238000004544 sputter deposition Methods 0.000 title 1
- 238000010438 heat treatment Methods 0.000 abstract 3
- 238000004377 microelectronic Methods 0.000 abstract 2
- 238000000151 deposition Methods 0.000 abstract 1
- 238000002844 melting Methods 0.000 abstract 1
- 230000008018 melting Effects 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Physical Vapour Deposition (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
A method for forming interconnect lines for a microelectronic device comprises depositing a metal-containing film on a microelectronic substrate at a temperature ranging from about 25 DEG C to less than about 150 DEG C; then heating the metal-containing film to a temperature ranging from about 70 percent to about 90 percent of the melting point of the metal in the metal-containing film; and then heating the metal-containing film to a temperature higher than employed in the first heating step.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019960062463A KR100213447B1 (en) | 1996-12-06 | 1996-12-06 | Method for forming metal interconnector of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
TW355836B true TW355836B (en) | 1999-04-11 |
Family
ID=19486207
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW086111997A TW355836B (en) | 1996-12-06 | 1997-08-21 | Sputtering methods for forming metal interconnect lines in semiconductor devices |
Country Status (3)
Country | Link |
---|---|
JP (1) | JPH10172923A (en) |
KR (1) | KR100213447B1 (en) |
TW (1) | TW355836B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9287207B2 (en) | 2003-09-23 | 2016-03-15 | Micron Technology, Inc. | Methods for forming conductive vias in semiconductor device components |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002319550A (en) * | 2001-04-23 | 2002-10-31 | Sony Corp | Forming method for metal film and manufacturing method for semiconductor device |
KR20030002787A (en) * | 2001-06-29 | 2003-01-09 | 주식회사 하이닉스반도체 | Method for forming the metal plug of semiconductor device |
KR100753468B1 (en) * | 2005-03-11 | 2007-08-31 | 삼성전기주식회사 | Wiring material, wiring substrate and process for forming wiring substrate |
KR20120049477A (en) * | 2010-11-09 | 2012-05-17 | 에스케이하이닉스 주식회사 | Metal line forming method of semiconductor devices |
-
1996
- 1996-12-06 KR KR1019960062463A patent/KR100213447B1/en not_active IP Right Cessation
-
1997
- 1997-06-20 JP JP9164675A patent/JPH10172923A/en not_active Withdrawn
- 1997-08-21 TW TW086111997A patent/TW355836B/en not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9287207B2 (en) | 2003-09-23 | 2016-03-15 | Micron Technology, Inc. | Methods for forming conductive vias in semiconductor device components |
Also Published As
Publication number | Publication date |
---|---|
KR19980044376A (en) | 1998-09-05 |
KR100213447B1 (en) | 1999-08-02 |
JPH10172923A (en) | 1998-06-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
MY115056A (en) | Semiconductor integrated circuit device for connecting semiconductor region and electrical wiring metal via titanium silicide layer and method of fabrication thereof | |
TW349247B (en) | Process for producing semiconductor element | |
TW350102B (en) | Semiconductor device manufacturing method | |
TW350135B (en) | Semiconductor device and method of manufacturing the same the invention relates to a semiconductor device and method of manufacturing the same | |
TW355845B (en) | Semiconductor device and a method of manufacturing the same | |
EP0776037A3 (en) | Low temperature integrated metallization process and apparatus | |
EP1111096A3 (en) | Seed layer repair method | |
EP0214515A3 (en) | Method and apparatus for forming metal silicide | |
TW344892B (en) | Method of forming a semiconductor metallization system and structure therefor | |
EP0491503A3 (en) | Method for depositing metal | |
EP0128385A3 (en) | Method of producing a semiconductor device having electrodes and wirings | |
WO1995027313A1 (en) | Method of manufacturing an antifuse with silicon spacers and resulting antifuse | |
TW352454B (en) | Improved method for forming aluminum contacts | |
EP0666336A4 (en) | High melting point metallic silicide target and method for producing the same, high melting point metallic silicide film and semiconductor device. | |
TW334576B (en) | Semiconductor device and method for making a semiconductor device | |
EP0854505A3 (en) | Process of depositing a TiN based film during the fabrication of a semiconductor device | |
TW355836B (en) | Sputtering methods for forming metal interconnect lines in semiconductor devices | |
CA2115716A1 (en) | Method for Forming a Patterned Oxide Superconductor Thin Film | |
KR960016231B1 (en) | Semiconductor metal wire forming method | |
EP0898306A3 (en) | Method of forming a self-aligned refractory metal silicide layer | |
EP0966024A3 (en) | Method and apparatus for protection of substrate surface | |
EP0607820A3 (en) | Method for producing semiconductor device having metal silicide layer on diffusion region. | |
KR960016232B1 (en) | Metal silicide forming method | |
EP0376709A3 (en) | Method of producing a semiconductor device by metal sputtering | |
JPS6476736A (en) | Manufacture of semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |