TW350952B - A non-volatile memory element having closing memory cells - Google Patents

A non-volatile memory element having closing memory cells

Info

Publication number
TW350952B
TW350952B TW086116314A TW86116314A TW350952B TW 350952 B TW350952 B TW 350952B TW 086116314 A TW086116314 A TW 086116314A TW 86116314 A TW86116314 A TW 86116314A TW 350952 B TW350952 B TW 350952B
Authority
TW
Taiwan
Prior art keywords
closable
character lines
transistor
memory cells
closing
Prior art date
Application number
TW086116314A
Other languages
English (en)
Inventor
Byeng-Sun Choi
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Application granted granted Critical
Publication of TW350952B publication Critical patent/TW350952B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/41—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region of a memory region comprising a cell select transistor, e.g. NAND

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
TW086116314A 1996-11-05 1997-11-04 A non-volatile memory element having closing memory cells TW350952B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960052120A KR100205785B1 (ko) 1996-11-05 1996-11-05 불휘발성 반도체 메모리 장치

Publications (1)

Publication Number Publication Date
TW350952B true TW350952B (en) 1999-01-21

Family

ID=19480834

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086116314A TW350952B (en) 1996-11-05 1997-11-04 A non-volatile memory element having closing memory cells

Country Status (2)

Country Link
KR (1) KR100205785B1 (zh)
TW (1) TW350952B (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002230982A (ja) * 2001-02-01 2002-08-16 Mitsubishi Electric Corp 不揮発性半導体記憶装置
KR101604417B1 (ko) 2010-04-12 2016-03-17 삼성전자주식회사 비휘발성 기억 소자
KR101080207B1 (ko) 2010-08-27 2011-11-07 주식회사 하이닉스반도체 블록 제어 커맨드 발생회로

Also Published As

Publication number Publication date
KR19980034160A (ko) 1998-08-05
KR100205785B1 (ko) 1999-07-01

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees