TW320782B - Chip LED and its production method - Google Patents

Chip LED and its production method Download PDF

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Publication number
TW320782B
TW320782B TW85111189A TW85111189A TW320782B TW 320782 B TW320782 B TW 320782B TW 85111189 A TW85111189 A TW 85111189A TW 85111189 A TW85111189 A TW 85111189A TW 320782 B TW320782 B TW 320782B
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Taiwan
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electrode
item
grain
emitting diode
patent application
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TW85111189A
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Chinese (zh)
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Jia-Fuu Jang
Jinn-Maw Hwang
Suh-Jen Lu
Gwo-Ian Ni
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Highlight Optoelectronics Inc
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Abstract

A chip LED includes a chip with structure of LED, in which P-N junction is formed; a first pole formed on one chip surface relative to P-N junction of the chip; a secondary pole formed on another chip surface relative to P-N junction of the chip; a third pole formed on one side of the chip adjacent to P-N junction conducting with the first pole and disconnect with the secondary pole; a insulation layer formed between the third pole and P-N junction to prevent the third pole from contacting P-N junction directly.

Description

經濟部中央標準局員工消費合作杜印製 3SG7S2 A7 ________— _B7 五、發明説明(1 ) 本發明係有關於一種發光二極體及其製作方法,特別 係有關於-種晶粒型發光二極體及其製作方法,其正面電 極與負面電極係位於同一晶面,可在固晶時同時導通,不 需另外打線。 請參閲第1圖,.以傳統的發光二極體而言,其正、負 兩電極10,U係分別位處於晶粒之p_N界面5兩側的不 同卵面上。在製成成品時,一般均將晶粒固植於一個導架 (LEAD FRAME)或電路板的定點上,俟銀膠乾著後,再以 打線方法接通電極,如此,發光二極體方具有發光的能力。 然而,在固晶及打線的過程中,經常因爲處理失當, 導致晶粒受到傷害,成品產生缺陷,影響了生產良率製 造時政及產品壽命。再者,此種習知的打線製程,也使得 晶粒間的距離無法縮小,對LED產品,例如特別是點矩陣 (Dot Matnx)或平面顯示器(Dlsplay)之迷你化和解析度的 進展產生了阻礙。另外,打線設備的價格昂貴,更是造成 LED產品成本過高的主要原因之一。 / 另一方面,爲了順應與其他元件及電子積體電路成品 間的整合,表面接著技術(以下簡稱SMD)對發光二極體製 作的重要性更顯得日益迫切。目前,發光二極體的smd 產的大而典當(最小都在2mm以上),更已成爲整合發展 上的一大瓶頸。 爲了因應SMD的需求,習知發光二極體產品中,有將 晶粒先行固著於一個小型承載器或承載板(Camei·),該承 裁物之材質可爲陶瓷或塑膠高分子,在其背面兩端有兩個 胁(2丨0X297公釐) (請先閲讀背面之注意事項再填寫本頁} -裝 訂 經濟、那中央榡準局貝工消費合作社印製 3S0782 A7 ______ B7 五、發明説明(2 ) 分隔金屬極’與正面上利用印刷電路技術開製之正負電極 刀別接通。當晶粒用固晶的方式固著於正面上的適當電 極,再以打線方式接通該晶粒至另一電極,經樹脂封模後, 即形成一獨立體之發光二極體,一般恪稱爲晶粒型發光二 極體(Chlp LED)。這種晶粒型發光二極體不僅需要傳統的 固晶打線動作,也需要特殊的包裝工具和材料(Tape and Reel) ’大抵上成本甚高,再者因成品設計之限制,如印刷 電路及打線’習知的晶粒型發光二極體之尺寸雖較一般的 發光二極體縮減很多,仍然有其囿限,通常是很難小於 1 mm。在應用上,對產品解析度之提昇,晶粒電性的穩定 性,依舊難有突破性的功效。爲此,不需打線,尺寸纖小, 且具有SMD機能之發光二極體晶粒的製作乃當務之急。 有鑑於此,本發明之目的即在於提供一種晶粒型發先 二極體及其製作方法,其係以單一裸晶粒(Bare chlp)製 成,可適用於各類表面接著技術和製程。 本發明之另一目的即在於提供一種晶粒型發光二極體 及其製作方法,其接著面已具有本發明之正、負電極,於 固晶時可同時完成電路聯通,可縮小其體積,故可應用於 高解析度、極纖細的顯示,和各種繁複的電子光電元件與 成pp的設計中,此爲一般傳統的發光二極體和較新式的習 知晶粒型發光二極體所無法達成的功效。 爲了達成上述目的,本發明乃利用下列方法製作晶粒 型發光二極體,請參閲第2圖,其包括下列步驟:(1)步驟 2〇,首先在一已成長發光二極體結構的磊晶片上製作歐姆 4 ( CNS ) A4«^S- ( 210x1^^]------ (請先閱讀背面之注意事項再填寫本頁) -裝· f '^0782 '^0782 五 A7 B7 、發明説明(3 電極,(2)㈣22 ’接著再依所需尺寸切割 成晶粒側面;(3)步驟24,然後在晶粒側面製作絕 V 以避免電極直接和發光二極體的p_N界面接觸;⑷; 26 ’接下來再於晶粒側面上製作導電層,藉以使正自= 極位於相同的晶面上 Θ. g- 上,⑴步驟28,最後再將蟲晶片 成早一的晶粒。 傳統卵粒型發光二極體在完成正背面電極的製作後, 再經切割、測試後即爲成品。而本發明之製作方法的特點 在於本發明更利用下列步踩,藉以在晶粒側面上毁作了導 ,電路:(1)形成晶粒側面,以提供正面電極延伸到背面的 官道’此晶面可以是晶粒的單、雙或四面,其深度則至少 要大於P-N界面的厚度,最大則爲貫穿整㈣晶看的厚 度。形成此晶粒側面的方式可爲化學蚀刻、機械切割、雷 射擊穿、氣相㈣或化學反應等各種方式。⑺在晶粒側面 上製作絕緣層,以賴及隔離p_N界面,使免於受後續製 作的導電層影響。此絕緣層的材質可使用氧化物(如 SiO2)、氮化物(如SlsN4),以及高分子聚合物(如p〇lyimide) 和所有具備絕緣特性的材料。當然,選用的材料必須能和 晶粒側表面層及導電層有良好的附著強度。同時,要有良 好的透光性和抗潮、耐腐蝕等特性。其範圍與側面裸露的 程度一致,以達到覆蓋P_N界面的目的。配合絕緣層的形 成技術,一般從數百埃到一百微米左右均具功能性。至於 形成此絕緣層的方式,則有旋轉塗佈法(Spin c〇atmg)、噴 霧塗佈法(Spray Coatmg)、化學氣相沉積法(CVD)、熱蒸鍍 ------------裝— ί請先閲1#背面之注意事項再填寫本頁j -55 經濟部中央標準局員工消費合作社印製 線-----4, 本紙張尺度適用中國國家標準(CNS ) A4規格(210x'^^J'y A7 B7 經濟部中央標隼局貝工消費合作社印製 五、發明説明(4 ) 法(Thermal Coating)、及電子槍濺鍍(E-Gun Sputtering)等各 種技術。(3)在晶粒側面上形成導電層,以使得原本位於不 同晶面的正負電極透過該導電層而能存在於同一晶面或相 鄰晶面,令此二電極在固晶時即能同時導通,不需額外打 線。該導電層的材質除了需具有導電性外,最好要薄(例如 小於1 μπι)、勻稱、透光性佳;另外,其與絕緣層間的黏著 度和相容性,以及材質之耐磨、抗蝕與對熱及潮的穩定性 也需留意。當然,製作該導電層的工作環境對晶粒的光電 特性之衝擊也不可忽祝。此導電層之材質可以是金屬(如 金、銀、銅、鋁、鎳等)、氧化物(如氧化銦、氧化錫、氧 化銦錫)、非氧化物(如氮化矽)或導電高分子化合物。至於 製作的方式可爲電漿增強化學氣相沉積法(Plasma Enhanced Chemical Vapor Deposition)、物理氣相沉積法 (Physical Vapor Deposition)、熱蒸艘法(Thermal Coating)、 電子‘槍濺鍍(Electron-Gun Sputtering)、電鍍法 (Electroplating)、嗔霧法(Spraying)、以及無電電鍍 (Electroless Plating)等。由上述可知本發明之重點在於將傳 統發光二極體晶粒中分別位於頂部及底部的正、負電極藉 由晶粒側面導電層的製作,而將正、負電極同時製作於同 一晶面上,成爲在同一晶面上具有雙電極之新型式發光二 極體。於應用時,固晶於支架上或印刷電路板上即構成通 路的做法,較傳統發光二極體晶粒仍需利用焊接金線以構 成通路的做法更簡化工作程序,且具有節省材料與人工的 好處。 (請先閲讀背面之注意事項再填寫本頁) .裝 訂 線 本紙張尺度適用中國國家標準(CNS ) A4規格(210X;297公釐) 3^〇782 A7 B7 五 經濟部中央榡準局員工消费合作社印裝 '發明説明(5) 除了前述製作步驟的特點外,尚需考量晶粒分割和包 裳的技巧。側立式晶粒於晶粒分割時,必需避免破壞了側 面的導電層,分割的方式可利用崩離機或以一般發光二極 體a日粒切割機予以切割分離。而包裝的方式依直立式和側 反式也有差異,前者可用傳統的發光二極體包裝方式,後 者爲適應後續固晶動作,則需把晶粒先橫躺再做包裝。 利用上述製作方法,本發明可分別製作出兩種不同型 式的晶粒型發光二極體,一種是直立式的晶粒型發光二極 體(Free-Standmg Clup LED),其在晶粒固植時,方向和 P-N界面相垂直;另一種爲側立式的晶粒型發光二極體 (Side-Lying Chip LED) ’其晶粒固植方向與p_N界面相平 行。此兩種晶粒型發光二極體皆是在晶粒側面上製作導通 電路,藉以使正、負兩個電極可位於相同的固晶面上, 、、’里由適當分隔、絕緣處理,使兩個電極間不致形成通路 一般而T,兩個電極在固晶面上的分隔大约需要求在三 之的固_面兔度以上。如此利用表面接著技術固著晶粒 後,可自動完成電路聯接。 下面兹配合附圖説明本發明之較佳實施例,藉以更清 楚地闡明本發明之架構、製作方法及特徵,其中 第1圖係繪示-習知的發光二極體的架構之圖式; 第2圖係用以説明本發明之製作方法的流程圖; 第3圖係績示本發明之晶粒型發光二極體的一較佳實 施例的架構之圖式; 第4a圖至第4d圖係繪示本發明之晶粒型發光二極體 再 分 (請先閲讀背面之注意事項再填寫本頁) 裝3SG7S2 A7 ________— _B7 by the consumer cooperation cooperation of the Central Bureau of Standards of the Ministry of Economic Affairs 5. Description of the invention (1) The present invention relates to a light-emitting diode and its manufacturing method, in particular, it relates to a type of crystal-type light-emitting diode For the body and its manufacturing method, the front electrode and the negative electrode are located on the same crystal plane, which can be turned on at the same time during the solid crystal, without additional wiring. Please refer to FIG. 1. For a conventional light emitting diode, its positive and negative electrodes 10, U are located on different egg planes on both sides of the p_N interface 5 of the die, respectively. When the finished product is made, the grain is generally fixed on a fixed frame (LEAD FRAME) or a fixed point of the circuit board. After the silver glue is dried, the electrode is connected by wire bonding. In this way, the light-emitting diode side Has the ability to emit light. However, in the process of solid crystal bonding and wire bonding, improper handling often results in damage to the crystal grains and defects in the finished product, which affects the production yield, manufacturing politics and product life. In addition, this conventional wire bonding process also makes it impossible to reduce the distance between the die. The miniaturization and resolution of LED products, such as dot matrix (Dot Matnx) or flat panel display (Dlsplay), have produced progress. Hinder. In addition, the high price of wire bonding equipment is one of the main reasons for the high cost of LED products. / On the other hand, in order to comply with the integration with other components and electronic integrated circuit products, the importance of surface bonding technology (hereinafter referred to as SMD) for the light-emitting diode system is becoming increasingly urgent. At present, the smd production of light-emitting diodes (the smallest is more than 2mm) has become a major bottleneck in integrated development. In order to meet the needs of SMD, in conventional light-emitting diode products, the crystal grains are first fixed on a small carrier or carrier plate (Camei ·). The material of the referee can be ceramic or plastic polymer. There are two threats on the back of the back (2 丨 0X297mm) (please read the precautions on the back before filling in this page)-binding economy, printed by the Central Bureau of Precinct Beigong Consumer Cooperative 3S0782 A7 ______ B7 V. Invention Description (2) Separate the metal pole and the positive and negative electrode blades made by printed circuit technology on the front side. When the crystal is fixed on the appropriate electrode on the front side by solid crystal, then connect the crystal by wire bonding After the resin is sealed by resin, a separate light-emitting diode is formed, which is generally called Chlp LED. This kind of crystal-type light-emitting diode not only needs The traditional die-bonding wire bonding also requires special packaging tools and materials (Tape and Reel), which is probably very costly. Furthermore, due to the limitations of finished product design, such as printed circuits and wire bonding, the conventional die-type light-emitting diodes Although the size of the body is more general Light-emitting diodes have shrunk a lot, and still have their limits. It is usually difficult to be less than 1 mm. In application, the improvement of product resolution and the stability of the electrical properties of the grains are still difficult to have breakthrough effects. For this reason No wire bonding is required, the size is small, and the production of light-emitting diode crystals with SMD function is an urgent task. In view of this, the purpose of the present invention is to provide a crystal-type pre-diode and its production method, It is made of a single bare die (Bare chlp) and can be applied to various surface bonding technologies and processes. Another object of the present invention is to provide a die-type light emitting diode and a manufacturing method thereof, and its bonding surface With the positive and negative electrodes of the present invention, the circuit connection can be completed at the same time during the solid crystal, and the volume can be reduced, so it can be applied to high resolution, extremely slim display, and various complicated electronic optoelectronic components and pp design Among them, this is an effect that cannot be achieved by conventional light-emitting diodes and newer conventional crystal-type light-emitting diodes. In order to achieve the above purpose, the present invention uses the following method to produce a crystal-type light-emitting diode For the diode, please refer to Figure 2, which includes the following steps: (1) Step 20: First, an ohmic 4 (CNS) A4 «^ S- (210x1 is fabricated on an epitaxial wafer with a grown light-emitting diode structure ^^] ------ (please read the precautions on the back before filling in this page) -install · f '^ 0782' ^ 0782 five A7 B7, invention description (3 electrodes, (2) ㈣22 'then follow again Cut the required size into the side of the die; (3) Step 24, then make an absolute V on the side of the die to avoid direct contact between the electrode and the p_N interface of the light-emitting diode; ⑷; 26 'Next, make on the side of the die The conductive layer, so that the positive electrode is located on the same crystal plane Θ.g-, ⑴Step 28, and finally the insect chip is formed into an earlier grain. The traditional egg-shaped light-emitting diode is finished after the fabrication of the front and back electrodes, and then cut and tested. The feature of the manufacturing method of the present invention is that the present invention further utilizes the following steps to destroy and guide the circuit on the side of the die: (1) forming the side of the die to provide the official way that the front electrode extends to the back. The crystal plane can be single, double or four sides of the crystal grain, and its depth is at least greater than the thickness of the PN interface, and the maximum is the thickness seen through the entire crystal. The method of forming the sides of the crystal grains may be various methods such as chemical etching, mechanical cutting, laser penetration, gas phase, or chemical reaction. ⑺An insulating layer is formed on the side of the die to rely on isolating the p_N interface, so as not to be affected by the conductive layer made later. The material of this insulating layer can use oxides (such as SiO2), nitrides (such as SlsN4), as well as high molecular polymers (such as p〇lyimide) and all materials with insulating properties. Of course, the selected material must have good adhesion strength to the surface layer and conductive layer on the grain side. At the same time, it must have good light transmission and moisture resistance, corrosion resistance and other characteristics. Its range is consistent with the degree of side exposure to achieve the purpose of covering the P_N interface. With the formation technology of the insulating layer, it is generally functional from hundreds of angstroms to about 100 microns. As for the method of forming this insulating layer, there are spin coating method (Spin Coatmg), spray coating method (Spray Coatmg), chemical vapor deposition method (CVD), thermal evaporation -------- ---- Installation — Please read the notes on the back of 1 # first and then fill out this page j -55 Printed line of the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs ----- 4, this paper scale is applicable to the Chinese National Standard (CNS ) A4 specification (210x '^^ J'y A7 B7 Printed by Beigong Consumer Cooperative of Central Standard Falcon Bureau of the Ministry of Economic Affairs V. Invention Description (4) Method (Thermal Coating), and E-Gun Sputtering) Technology. (3) Form a conductive layer on the side of the crystal grain so that the positive and negative electrodes originally located on different crystal planes can exist on the same crystal plane or adjacent crystal planes through the conductive layer, so that the two electrodes are solidified It can be connected at the same time without additional wiring. In addition to being conductive, the material of the conductive layer is preferably thin (for example, less than 1 μm), well-proportioned, and good in light transmittance; in addition, its adhesion to the insulating layer and phase Capacitance, as well as the wear resistance, corrosion resistance and stability to heat and moisture of the material also need to be noted. Of course The impact of the working environment of the conductive layer on the photoelectric characteristics of the crystal grains can not be ignored. The material of this conductive layer can be metal (such as gold, silver, copper, aluminum, nickel, etc.), oxide (such as indium oxide, oxide Tin, indium tin oxide), non-oxides (such as silicon nitride) or conductive polymer compounds. As for the production method can be plasma enhanced chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition), physical vapor deposition ( Physical Vapor Deposition, Thermal Coating, Electron-Gun Sputtering, Electroplating, Spraying, and Electroless Plating, etc. by the above It can be seen that the focus of the present invention is to make the positive and negative electrodes on the top and the bottom of the conventional light-emitting diode grains by the conductive layer on the side of the grain, and simultaneously make the positive and negative electrodes on the same crystal surface to become A new type of light-emitting diode with double electrodes on the same crystal surface. In application, solid crystal is formed on the bracket or printed circuit board to form a channel, which is more popular The light-emitting diode die still needs to use a gold wire to form a passage, which simplifies the working process and has the advantage of saving materials and labor. (Please read the precautions on the back before filling this page). Binding paper size Applicable to China National Standard (CNS) A4 specification (210X; 297mm) 3 ^ 〇782 A7 B7 Fifth Central Economic Bureau of the Ministry of Economic Affairs Staff Consumer Cooperative Printed 'Invention Description (5) In addition to the characteristics of the aforementioned production steps, it still needs Consider the technique of grain splitting and wrapping. When the vertical crystal grain is divided into grains, it is necessary to avoid damaging the conductive layer on the side surface. The division method can be cut and separated by a chipping machine or a general light emitting diode a-day grain cutter. The packaging method is different depending on the upright type and side trans type. The former can use the traditional light-emitting diode packaging method, and the latter needs to lie horizontally before packaging to adapt to the subsequent solid crystal movement. Using the above manufacturing method, the present invention can produce two different types of grain-type light-emitting diodes, one is an upright grain-type light-emitting diode (Free-Standmg Clup LED), which is implanted in the grain At this time, the direction is perpendicular to the PN interface; the other is a side-type grain-type LED (Side-Lying Chip LED) 'whose grain implantation direction is parallel to the p_N interface. Both of these two die-type light emitting diodes are made with conduction circuits on the sides of the die, so that the positive and negative electrodes can be located on the same solid crystal surface. Between the two electrodes, there is no general path and T, and the separation of the two electrodes on the solid crystal surface needs to be more than three degrees of solid surface. After using the surface bonding technology to fix the die in this way, the circuit connection can be automatically completed. The following is a description of preferred embodiments of the present invention with reference to the accompanying drawings, in order to more clearly illustrate the architecture, manufacturing method, and features of the present invention. FIG. 1 is a schematic diagram of a conventional light-emitting diode architecture; FIG. 2 is a flowchart for explaining the manufacturing method of the present invention; FIG. 3 is a diagram showing the structure of a preferred embodiment of the grain-type light emitting diode of the present invention; FIGS. 4a to 4d The figure shows the subdivision of the grain-type light emitting diode of the present invention (please read the precautions on the back before filling this page).

、1T 線 私紙張尺度適用中國國家梂準(CNS ) A4規相 • 1^1 —1- -1 · 經濟部中央標準局員工消費合作社印製 A7 ---—____B7_ 五、發明説明(6 ) - 的另一較佳實施例的架構之圖式; 第5圈係緣示第3圖之架構的_種修正架構的圖式; 及第6圖係缚示第4d圖之架構的一種修正架構的圖式。 在上述圖式中,相同的標號用以標示指同的元件或構 造。 較佳實施例之説明: =請參閲第3圖,繪示了一側立式發光二極體的架構, 至於其製作方法則係包括下列步驟:⑴將成長有發光二極 體架構的遙晶片經適當的晶片清洗後,按其”n屬性, 用熱蒸鍍機(Thermal Coater)把能形成歐姆接觸的合金金屬 (例如P面用Au_Be,N面用Au_Ge),分別鍍到正、背面 上,再退火生成歐姆接觸的正面電極3〇及背面電極, 溫度、時間與合金厚度可按照傳統參數;⑺再依p_N界面 層5之厚度,用切割刀切出所需的厚度或约1〇〇微米(^m), 而寬度約兩倍切刀厚度;(3)切割後以化學葯品,如硫酸, 將切割面酸蝕以去除切割缺陷,便可將晶片側面覆上絕緣 物質,以生成絕緣層35於晶粒側面(即切割面)上;(4)之後, 再把正面電極30透過側面導電層3〇a之製作,令正面電極 30和側面電極30a連通;(5)最後利用切割刀把晶粒切穿, 便完成一侧立式晶粒型發光二極體。 請再參閲第3圖,側立式晶粒型發光二極體的另一種 製作方法係包括下列步驟:(1)將成長有發光二極體架構的 明片經適當的晶片清洗後,按其p和N屬性,用熱蒸鍍 機把能形成歐姆接觸層的合金金屬,鍍到正、背面上,並 8 (請先閲讀背面之注意事項再填寫本頁) -裝-、 1T line private paper standard is applicable to China National Standard (CNS) A4 regulation phase • 1 ^ 1 —1- -1 · Printed by the employee consumer cooperative of the Central Standards Bureau of the Ministry of Economic Affairs A7 -----____ B7_ V. Description of invention (6) -A diagram of the architecture of another preferred embodiment; circle 5 is a diagram of the modified architecture of the architecture of FIG. 3; and FIG. 6 is a modified architecture of the architecture of FIG. 4d Scheme. In the above drawings, the same reference numerals are used to refer to the same elements or structures. Description of the preferred embodiment: = Please refer to FIG. 3, which shows the structure of a vertical light-emitting diode on one side. As for its manufacturing method, it includes the following steps: (1) A remote structure with a light-emitting diode structure will be grown After the wafers are properly cleaned, according to their "n properties", use a thermal evaporation machine (Thermal Coater) to form an alloy metal that can form ohmic contacts (for example, Au_Be for P surface and Au_Ge for N surface), respectively, to the front and back On the top, re-anneal to form the front electrode 30 and the back electrode of the ohmic contact. The temperature, time and alloy thickness can be in accordance with traditional parameters; ⑺ Then according to the thickness of the p_N interface layer 5, use a cutter to cut out the required thickness or about 10. 〇 Micron (^ m), and the width is about twice the thickness of the cutter; (3) After cutting, the cutting surface is acid etched to remove the cutting defects, and the side of the wafer can be covered with insulating material to generate The insulating layer 35 is on the side of the die (ie, the cut surface); (4) After that, the front electrode 30 is made through the side conductive layer 30a, so that the front electrode 30 and the side electrode 30a are connected; (5) Finally, cutting The knife cuts through the grain Vertical grain-type light-emitting diode. Please refer to FIG. 3 again, another manufacturing method of the side vertical grain-type light-emitting diode includes the following steps: (1) a structure with a light-emitting diode structure will be grown After the wafers are cleaned by the appropriate wafers, according to their p and N properties, the alloy metal that can form the ohmic contact layer is plated on the front and back sides with a hot vapor deposition machine, and 8 (please read the precautions on the back side before filling in This page)-installed-

、1T 線 本紙張从適用國家梯準(CNS) 21GX297公羡) __ A7 -—--Β7 五、發明説明(7 ) ------- 請 先 閱 讀 背 ί 事 項 再 填 寫 本 頁 2用照相顯影之黃光室技術開出區域性電極,再經退火的 '驟形成歐姆接觸的正面電極3{)和背面電極3 黃光室顯影技術配合化學蚀刻技術,在晶粒正面開出平台 (Mesa),平台四週的溝槽寬度约爲兩倍的切割刀寬度(心 至5〇μιη),而深度則以略大於p_N界面層$之深产或 ⑽; (3)利用化學氣相沉積技術於此晶片正面鍍上:層 乳化矽(Sl3N4)35,但使正面電極3〇露現,再以賤錢的方 式鍍上-導電且透光之氧化物層3Qa,例如氧化域;⑷ 最後用切割刀把此晶粒切穿,便形成一側立式晶粒型發光 一極體。 經濟部中央標準局員工消費合作社印装 請參閲第4a圖至第4d圖’接下來説明直立式晶粒型 發光二極體的製作方法,其包括下列步踩:⑴如第乜圖 所示,提供一製作有發光二極體架構的磊晶片40,即包括 有P型區域、N型區域及P_N界面42 ,其厚度爲 200±50μπι,經適當地清洗其正、背面後,先鍍上—=厚 約數百埃至數千埃的氮化碎44 ;⑺如第4b圖所示,利用 黃光室顯影技術配合化學蝕刻技術,於磊晶片上開出複數 個直徑約爲ISO至200微米的貫穿圓洞46 ; (3)再以旋轉塗 佈玻璃(SPm-〇n Glass)塗佈在圓洞之表面上當作絕緣層 48 ,再經過光阻處理,開出正、背面的電極區,如第 圖所示;(4)於前述電極區中鍍上一層金,並經退火以形成 歐姆接觸的正面電極50和負面電極52,並在絕緣層4〔上 形成一導電層5〇a ; (5)請參閲第4d圖,依圓洞46相對位 置將蟲晶片分割成獨立晶粒’便完成了直立式晶粒型發光 9, 1T line paper from the applicable national standard (CNS) 21GX297 public envy) __ A7 ----- B7 V. Description of the invention (7) ------- Please read the details before filling in this page 2 Photographic development of the yellow light chamber technology produces regional electrodes, and then annealed to form the ohmic contact front electrode 3 {) and back electrode 3. The yellow light chamber development technology cooperates with chemical etching technology to open the platform on the front of the die ( Mesa), the groove width around the platform is about twice the width of the cutting blade (center to 50μιη), and the depth is slightly greater than the p_N interface layer $ deep production or ⑽; (3) using chemical vapor deposition technology On the front surface of the wafer is coated with a layer of emulsified silicon (Sl3N4) 35, but the front electrode 30 is exposed, and then a conductive and transparent oxide layer 3Qa, such as an oxidized domain, is plated in a cheap way; ⑷ last The cutting blade cuts through the crystal grains to form a vertical grain-type light emitting diode on one side. Please refer to Figures 4a to 4d for the printing and printing of the employee consumer cooperative of the Central Standards Bureau of the Ministry of Economic Affairs. Next, the manufacturing method of the vertical grain-type light-emitting diode will be described, which includes the following steps: (1) as shown in the first figure , To provide an epitaxial wafer 40 fabricated with a light-emitting diode structure, which includes a P-type region, an N-type region, and a P_N interface 42 with a thickness of 200 ± 50μπι. After properly cleaning its front and back surfaces, it is plated first — = Nitride chips with a thickness of about several hundred angstroms to several thousand angstroms 44; ⑺As shown in Figure 4b, using the yellow light chamber development technology and chemical etching technology, a plurality of diameters of about ISO to 200 are opened on the wafer Micrometer penetrating round hole 46; (3) then spin-coated glass (SPm-〇n Glass) coated on the surface of the round hole as an insulating layer 48, and then through the photoresist treatment, open the front and back electrode area , As shown in the figure; (4) plating a layer of gold in the aforementioned electrode area, and annealed to form a front electrode 50 and a negative electrode 52 with ohmic contact, and a conductive layer 50a is formed on the insulating layer 4 [ ; (5) Please refer to Figure 4d, the worm chip is divided into independent according to the relative position of the round hole 46 Tablets' completes the vertical type light emitting die 9

A7A7

經濟部中央樣隼局員工消費合作社印製 五、發明説明(8 二極體。 利用前迷I作方法製作出的晶粒型發光二極體主要係 具有發光二極體架構之晶粒;一正面電極,形成於 、“之正面上’-背面電極,形成於該晶粒之背面上; 一側面電極,形成於兮S私、 ^ \、及卵釭 <一側面上,緊鄰著P-N界面, 並且與則述正面電極導通,而與前述背面電極不導通;及 一絕緣層’形成於前述側面電極與P_N界面之間,以避免 側面電極直接接觸p_N界面。而隨著侧立式或直立式的應 用不同’其可分別形成如第3圖或第4圖之形式。也就是 説’對側立式日日粒型發光二極體而言,所形成的侧面電極 並不覆蓋整個側面,而對直立式晶粒型發光:極體而言, 則是所形成的背面電極不覆蓋整個晶粒背面。至於製作 上,側立式晶粒型發光二極體可利用切割或形成平台的深 度來控制側面電極形成的位置,而直立式晶粒型發光二極 體則可在θ面電極形成後’再利用黃光室顯影技術配合蝕 刻技術形成所要的背面電極。 另外,配合不同的固晶方式,本發明之晶粒型發光二 極體亦可形成如第5圖及第6圖所示。對側立式晶粒型發 光一極體而吕’可使背面電極包括—延伸至與侧面電極相 同側面的電極31a,而對直立式晶粒型發光二極體而言, 則疋可使正面電極包括一延伸晶粒背面的電極5〇b。至於 製作上’對侧立式晶粒型發光二極體而言,可預先利用切 割刀在晶粒背面切割所需要的溝槽’而對直立式晶粒型發 光二極體而言,則可利用黃光室顯影技術配合餘刻技術形 10 (請先閲讀背面之注意事項再填寫本頁) .裝 、-'° 線Printed by the Consumer Consortium of the Central Falcon Bureau of the Ministry of Economic Affairs 5. Description of the invention (8 diodes. The grain-shaped light-emitting diodes produced by the method of the previous fan I are mainly grains with a light-emitting diode structure; 1 The front electrode is formed on the front surface of the "-back electrode", which is formed on the back surface of the die; a side electrode is formed on the side of the squat, ^ \, and egg 釭 < next to the PN interface , And the front electrode is conductive, but not the back electrode; and an insulating layer is formed between the side electrode and the P_N interface to prevent the side electrode from directly contacting the p_N interface. With the side vertical or upright The application of the formula is different. It can be formed as shown in Figure 3 or Figure 4. That is to say, for the contralateral vertical solar-type light-emitting diode, the formed side electrode does not cover the entire side. For the vertical grain-type light emitting body: for the polar body, the formed back electrode does not cover the entire back surface of the grain. As for the fabrication, the lateral vertical grain-type light emitting diode can be cut or formed to the depth of the platform To control The position where the surface electrode is formed, and the vertical grain-type light emitting diode can be used after the formation of the θ surface electrode, and then the yellow light chamber development technology and the etching technology are used to form the desired back electrode. In addition, with different solid crystal methods, The grain-type light-emitting diode of the present invention can also be formed as shown in Figure 5 and Figure 6. The opposite vertical grain-type light-emitting diode and Lu 'can make the back electrode include-extend to the same as the side electrode The electrode 31a on the side, and for the vertical grain type light emitting diode, the front electrode can include an electrode 50b extending on the back side of the grain. For the polar body, the required grooves can be cut in advance on the back side of the die with a dicing knife. For the upright grain type light-emitting diode, the yellow light chamber development technology can be used in conjunction with the remaining technology. Please read the precautions on the back before filling in this page). Installation,-'° line

.—.1 I- I 本紙張尺度適用中國國家榡準(CNS ) A4規格(210X297公嫠) 經濟部中央標準局買工消費合作杜印製 A7 B7 五、發明説明(9 ) 成所要的電極。.—. 1 I- I This paper scale is applicable to the Chinese National Standard (CNS) A4 specification (210X297). The Central Standards Bureau of the Ministry of Economic Affairs has printed and printed the A7 B7 in cooperation with consumers. V. Description of the invention (9) .

ti IX ----- .---裝------訂 (請先閱讀背面之注意事項再填寫本頁) 線 本紙張尺度適用中國國家揉準(CNS ) A4規格(210X297公釐)ti IX ----- .--- installed ----- ordered (please read the precautions on the back before filling in this page) The size of the line paper is suitable for China National Standard (CNS) A4 specification (210X297mm )

Claims (1)

3^07823 ^ 0782 六、申請專利範園 1. 面; -種晶粒型發光二接體,包括: 具有發光二柘體架構之晶粒, 其中形成有一ρ_Ν界 面上蝴粒⑽㈣界面的一 第二電極’形成於該晶粒之相對於。_N界面的另一 第三電極,形成於該晶粒之 晶面上; 界面,並:成於該晶粒之—側面上,緊鄭著P-N 通;及與㈣—電極導通’而與前述第二電極不導 I II I 注I -I I丨卜看裝 —絕緣看’形成於前述第三 避免第三電極直接接觸㈣界面。與。·Ν界面^,以 前^如申請專利範園第1項的晶粒型發光二極體,其中, 部二側:電極係覆蓋整個晶面’而前述第三電極則係覆蓋 —3如中請專利範圍第η的晶粒型發光二極體,其中, ::第二電極係覆蓋部分晶面,而前述第三電極 整個側面。 - Γ 經濟部中央標準局員工消費合作社印装 ^ ’如申叫專利範圍第2項的晶粒型發光二極體,其中, 則迷第二電極更包括延伸至與第三電極同-晶面的電極。 5 ·如申州專利粑圍第3項的晶粒型發光二極體,其中, 述第二電極更包括延伸至與第二電極同一晶面的電椏。 6.如申請專利範圍第2項或第3項的晶粒型發光二極 體,其中,前述絕緣層可爲氧化物、氮化物或高分子聚合 本紙張从逋用中國國家樣率(CNS ) Μ祕(21GX297公釐)6. Patent application 1. The surface;-Seed-type light emitting dichroic body, including: a crystal with a light-emitting dichroic body structure, in which a second electrode formed on the ρ_Ν interface ⑽㈣ interface is formed on The relative of the crystal grains. _N The other third electrode of the interface is formed on the crystal face of the grain; the interface is: formed on the side of the grain, tightly connected with the PN; and with (the electrode conduction) and the aforementioned first Two-electrode non-conductive I II I Note I -II 丨 Buying-insulating viewing is formed in the aforementioned third avoiding direct contact between the third electrode and the interface. versus. · N interface ^, the former ^ such as the patented model of the first paragraph of the grain-type light-emitting diode, in which, the two sides: the electrode system covers the entire crystal plane 'and the third electrode is covered-3 as please The n-th crystallite light-emitting diode of the patent scope, wherein: the second electrode covers part of the crystal plane, and the third electrode has the entire side surface. -Γ Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs ^ 'If the crystal-type light-emitting diode of claim 2 is claimed, the second electrode further includes the same crystal plane as the third electrode Electrode. 5. The grain-type light-emitting diode according to item 3 of the Shenzhou Patent, wherein the second electrode further includes an electrode extending to the same crystal plane as the second electrode. 6. The grain-type light-emitting diode as claimed in item 2 or item 3 of the patent scope, wherein the aforementioned insulating layer may be an oxide, nitride or polymer polymer. This paper is from China National Sample Rate (CNS) Μ 秘 (21GX297mm) 經濟部中央揉準局負工消費合作社印製 7申請專利範圍第2項或第3項的晶粒型發光二極 體,其中,前述第一電極與第二電極爲可形成歐姆接觸的 合金金屬。 8.如申请專利範圍第6項的晶粒型發光二極體,其中, 則迷絕緣層之厚度可爲100埃至100微米。 9 —種晶粒型發光二極體的製作方法,包括下列步 驟: (1)提供一具有發光二極體架構之磊晶片,並將金屬分 別鍍到磊晶片的正面及背面上,再退火生成正面電極和背 面電極; (11)再依據P_N界面層之深度,用切割刀在磊晶片上切 出所需的深度及寬度; (in)將切割面酸蝕以去除切割缺陷’再於磊晶片切割 面上覆上絕緣物質,以生成絕緣層於切割成之晶粒的側面 上; (iv) 於該晶粒之側面上製作一導電層,並使前述正面 電極、第一電極和側面導電層連通; (v) 切割此磊晶片以形成一晶粒型發光二極體。 10. 如申請專利範圍第9項的製作方法,其中,前述正 面電極可爲金_皱合金,前述背面電椏可爲金鍺合金。 11. 如申請專利範圍第9項的製作方法,其中,前述步 驟中切割深度需大於P-N界面層之深度,而寬度約爲兩 倍切割刀的厚度。 (請先閱讀背面之注意事項再填寫本頁) -裝 本紙張奴财關家辟(CNS ) Λ4祕U10X297公釐)Printed by the Ministry of Economic Affairs of the Central Bureau of Accreditation and Consumer Cooperatives of the 7th patent application of the second or third grain-type light-emitting diodes, wherein the first electrode and the second electrode are alloy metals that can form ohmic contacts . 8. The grain-type light-emitting diode as claimed in item 6 of the patent scope, wherein the thickness of the insulating layer may be 100 angstroms to 100 microns. 9—A manufacturing method of grain-type light-emitting diodes, including the following steps: (1) Provide an epitaxial wafer with a light-emitting diode structure, and plate the metal on the front and back of the epitaxial wafer respectively, and then anneal to generate Front electrode and back electrode; (11) According to the depth of the P_N interface layer, use a dicing knife to cut the required depth and width on the epitaxial wafer; (in) acid etch the cut surface to remove the cutting defects. The cutting surface is covered with an insulating substance to generate an insulating layer on the side of the cut grain; (iv) A conductive layer is formed on the side of the grain, and the front electrode, the first electrode and the side conductive layer are made Connectivity; (v) Cutting the epitaxial wafer to form a die-type light emitting diode. 10. The manufacturing method as described in item 9 of the patent application, wherein the front electrode may be a gold-wrinkle alloy, and the back electrode may be a gold-germanium alloy. 11. The manufacturing method as claimed in item 9 of the patent scope, in which the cutting depth in the previous step needs to be greater than the depth of the P-N interface layer, and the width is about twice the thickness of the cutting blade. (Please read the precautions on the back first and then fill out this page)-Install this paper Slave Wealth Guan Jia Pi (CNS) Λ4 Secret U10X297mm) 申請專利範圍 12.如申請專利範圍第9項的製作方法,其中,前述步 驟(ill)中去除切割缺陷的方式可利用硫酸及雙氧水配比混 合溶液酸蝕切割面。 驟: 13.種8曰粒型發光二極體的製作方法,包括下列步 經濟部中央梯準局貝工消費合作社印製 (^)提供一成長有發光二極體架構的磊晶片,把金屬鍍 到麻时片的正面及背面上,再退火生成正面電極和背面 極; (ii)在晶粒正面開出平台;. (m)於此晶片側面鍍上一絕緣層,並使正面電極露 現,再鍍上-導電層,且使此導電層與正面電極相連通; ㈣切割此遙晶片以形成一晶粒型發光二極體。 14.如申請專利㈣第13項的製作方法,其中,前述 步騄⑻中’平台的形成係使用黃光室顯影技術配合化 刻技術。 15·如申請專利範圍第13項的製作方法,其中,前述 步驟(m)中’絕緣㈣形成係利聽學氣相沉積技術。 16-如申請專利範圍第13項的製作方法,其中,前述 步驟(m)中’導電|的形成係利用濺鍍的方式。 17. 如申請專利li圍第丨3項的製作方法,其中,前述 中’平台四週的溝槽寬度約爲3〇至、,而深度 則’々爲兩㈣P_N界面層深度或约爲]〇〇陶。 18. 如申請專利_第13項的製作方法,其中,前述 絕緣層可爲氮化矽。 . ^---1 — (請先閱讀背面之注意事項再填寫本頁) 、va 線 14 320782Patent application scope 12. The manufacturing method as described in item 9 of the patent application scope, wherein the method of removing cutting defects in the aforementioned step (ill) can use a mixed solution of sulfuric acid and hydrogen peroxide to etch the cut surface. Steps: 13. The production method of 8 kinds of grain-shaped light-emitting diodes, including the following steps: Printed by the Ministry of Economic Affairs, Central Bureau of Standards and Technology, Beigong Consumer Cooperative (^) to provide an epitaxial wafer with a light-emitting diode structure, and the metal Plated on the front and back of the flake film, and then annealed to form the front electrode and the back electrode; (ii) open the platform on the front of the die; (m) plate an insulating layer on the side of the wafer and expose the front electrode Now, a conductive layer is plated again, and the conductive layer is connected to the front electrode; (iv) The remote wafer is cut to form a grain-type light emitting diode. 14. The manufacturing method according to item 13 of the patent application (iv), wherein the formation of the platform in the aforementioned step ⑻ uses yellow light chamber development technology in combination with lithography technology. 15. The manufacturing method as claimed in item 13 of the patent application scope, wherein the 'insulation (iv) formation in the aforementioned step (m) is an audio vapor deposition technique. 16- The manufacturing method according to item 13 of the patent application range, wherein the formation of the 'conductivity | in the aforementioned step (m) is by sputtering. 17. The manufacturing method as claimed in item 丨 3 of the patent application, wherein the aforementioned “the width of the groove around the platform is about 30 ° to φ, and the depth” is the depth of the two P_N interface layers or about] 〇〇 pottery. 18. The manufacturing method as claimed in item _ item 13, wherein the aforementioned insulating layer may be silicon nitride. . ^ --- 1 — (Please read the precautions on the back before filling this page), va line 14 320782 申請專利範圍 19.如申請專利範圍第13項的製作方法,其中,前述 導電層可爲氧化銦錫。 、 *巧 驟 2〇 —種晶粒型發光二極體的製作方法,包括下列步 經濟部中央標準局貝工消費合作社印製 ⑴提供一成長有發光二極體架構的磊晶片,並於磊晶 片之正面及背面鍍上一層保護層; 、09 (ii)於是晶片上開出複數個貫孔; (π〇然後在貫孔之表面上形成絕緣層,再經過 理,開出正、背面的電極區; 處 (iv)於前述電極區巾鍍上-金屬廣,並經退火以形成歐 姆接觸的正面電極和貞面電極,同時於該絕料上形成 電層; (V)依貫孔相對位置將遙晶片分割成獨立晶粒,便完成 了直立式晶粒型發光二極體。 曰21·如申請專利範圍第2〇項的製作方法,其中,前述 蟲日日片之厚度約爲ΙΟΟμηι至300μπι 。. 广22_如申請專利範圍第20項的製作方法,其中,前述 氮化矽之厚度約爲100埃至1微米。 23. 如申請專利範圍第20項的製作方法,其中,前述 貫孔爲貫穿圓洞,且其直徑約爲⑽幻_微米。Μ 24. 如申請專利範圍第2〇項的製作方法,其中,前述 貫孔的形成係利用黃光室顯影技術配合化學㈣】技術以 25. 如申請專利範圍第2〇項的製作方法,其中,前述 絕缘IT利用旋轉塗饰玻璃塗佈形成。 ^ 15 本紙張 (請先閱讀背面之注意事項再填寫本頁} 裝 -訂 線 • · ? - I ABCD 、申請專利範圍 26. 如申請專利範圍第 保護層可爲氮化矽。 27. 如申請專利範圍第: 氮化矽之厚度約爲 500埃至 。項的製作方法,其中,前述 2項的㈣核,其中,前述 3000 埃。 (請先閡讀背面之注意事項再填寫本頁} ·'訂 —線 經濟部中央標準局貝工消費合作社印製 16 本紙張尺度逋用中國國家標率(CNS)A4规格(210 X 297公釐)Patent application scope 19. The manufacturing method as claimed in item 13 of the patent application scope, wherein the aforementioned conductive layer may be indium tin oxide. , * Qiao Step 20—The manufacturing method of a grain-type light-emitting diode, including the following steps: Printed by Beigong Consumer Cooperative of Central Bureau of Standards of the Ministry of Economy ⑴Provide an epitaxial chip with a light-emitting diode structure, and Yu Lei A protective layer is coated on the front and back of the wafer;, 09 (ii) Then a plurality of through holes are formed on the wafer; (π〇 Then an insulating layer is formed on the surface of the through holes, and then processed to open the front and back Electrode area; place (iv) plated on the aforementioned electrode area-metal wide, and annealed to form an ohmic contact of the front electrode and the face electrode, and at the same time form an electrical layer on the insulation; (V) opposite through holes The remote wafer is divided into independent crystal grains to complete the vertical grain-type light-emitting diode. The manufacturing method as described in item 20 of the patent application range, wherein the thickness of the aforementioned insect daily film is about 100μηι Up to 300μπι .. Guang 22_ as the manufacturing method of patent application item 20, wherein the thickness of the aforementioned silicon nitride is about 100 angstroms to 1 micron. 23. As the manufacturing method of patent application item 20, wherein the aforementioned The through hole is a through hole And its diameter is about ⑽Magic_micron. Μ 24. The manufacturing method as claimed in item 20 of the patent scope, wherein the formation of the aforementioned through-hole is developed using yellow light chamber development technology in conjunction with the chemical technology technology to 25. Such as applying for a patent The production method of item 20 in the scope, in which the aforementioned insulating IT is formed by spin-coated glass coating. ^ 15 This paper (please read the precautions on the back before filling out this page) Binding-Binding Line • ·-ABCD 、 Patent application 26. If the patent application scope, the protective layer can be silicon nitride. 27. As the patent application scope: The thickness of silicon nitride is about 500 angstroms to. Nuclear, of which the aforementioned 3000 Angstroms. (Please read the precautions on the back before filling in this page) · "Order-Line 16 printed by the Ministry of Economic Affairs Central Standards Bureau Beigong Consumer Cooperative Co., Ltd. using the Chinese National Standard Rate (CNS ) A4 specification (210 X 297 mm)
TW85111189A 1996-09-13 1996-09-13 Chip LED and its production method TW320782B (en)

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