TW308717B - - Google Patents

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TW308717B
TW308717B TW084102625A TW84102625A TW308717B TW 308717 B TW308717 B TW 308717B TW 084102625 A TW084102625 A TW 084102625A TW 84102625 A TW84102625 A TW 84102625A TW 308717 B TW308717 B TW 308717B
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Taiwan
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insulating film
gas
film
species
etching
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TW084102625A
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Chinese (zh)
Inventor
Ken Yoshioka
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Hitachi Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics

Description

A7 B7 308717 五、發明説明（1 ) 本發明係關於半導體積體電路裝置之製造技術，尤關 於利用等離子體中之基或離子將半導體晶圖上之薄膜予以 乾式蝕刻之技術。 使用於L S I製造之代表性絕緣膜即氧化矽膜之加工 ，通常係採用利用等離子體過程之乾式蝕刻裝置（等離子 體蝕刻裝置）來進行。 使用代表性等離子體蝕刻裝置中之一種之有磁場微波 等離子體蝕刻裝置之蝕刻過程中，首先以排氣系統將由蝕 刻裝置之反應室（蝕刻室）與放電室所構成之眞空室抽成 眞空（大約10_6Torr)，然後，經由針型閥將反應 氣體導入眞空室中使其成爲一定之壓力（大約1 〇-5至 1 0 ' 1 T 〇 r r ) ° 蝕刻堆積於矽晶圓上之氧化矽膜之時，其反應氣體係 使用例如CF4，C2F6，C3F8，C4F8等碳氟化合物 系氣體，或與CHF3，CH2F2等含氫碳氟化合物系氣 體，或氫之混合氣體。這種碳氟化合物系氣體總稱爲碳氟 系氣體。 微波振盪器（亦即磁控管）所產生之1至1 0 GHZ (通常爲2. 4 5 GHZ)之微波從導波管中傳播而被導 入形成放電室之放電管內部。爲了使微波通過，放電管係 由絕緣物（通常爲石英或氧化鋁）製成。 在放電室與反應室之一部分由電磁鐵及永久磁鐵形成 磁場。在此狀態下將微波電場導入放電室後，由於磁場與 微波《場之相乘作用而產有磁場微波放電，而形成等離子 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐）_ 4 . -----^---^--------ir-------41- - * (請先閲讀背面之注意事項再填寫本頁) 經濟部中央橾準局員工消費合作社印製 經濟部中央標準局貝工消費合作社印製 A7 B7五、發明説明（2 ) 體。 此時，反應氣體在等離子體中解離，產生許多種基或 離子。反應氣體之離解係因反應氣體分子內之電子與等離 子體中之電子相撞，或吸收光線而被激起於反結合性軌道 而發生。該離解種被供給於氧化矽膜表面，各離解種對乾 式蝕刻之特性產生複雜影響而關連於氧化矽膜之蝕刻。 這種利用等離子體過程之乾式蝕刻技術在日本特開平 3 — 109728號中揭示。 在矽L S I或TFT (薄膜電晶體）等電子裝置中， 做爲被乾式蝕刻材料之氧化矽膜被堆稹於矽膜（矽基板， 矽外延膜，多結晶矽膜等），氮化矽膜，或其層叠膜上。 高度稹體化之電子裝置中，可在該氧化矽膜上利用乾 式蝕刻形成直徑0. 5 /zm以下，高平面形狀比（孔深度 /孔直徑）之接觸孔，而且可進行使基層之矽膜，氮化膜 或各層疊膜之蝕刻量成爲最小限度之髙精確度，高選擇比 之蝕刻技術。 爲了實現這種蝕刻，必須精密的進行反應氣體之離解 種之組成控制。然而，利用習知之等離子內電子之相撞所 產生之反應氣體分子之離解之蝕刻方式，非常不容易進行 這種控制》 其理由爲電子所產生之選擇激起只能在最低能置之反 結合性軌道上實現，其所必須之均句能量之電子不能在等 離子體內獲得。因此，必須在外部產生均勻能量之電子使 其射入，或導入均勻能量之光源於等離子體中。然而如此 本紙張尺度遑用中國國家標準（CNS ) Α4規格（210Χ297公釐）_ 5_ _ ---------------ir------.it- - 於 (請先閲讀背面之注意^項再填寫本頁) 經濟部中央標準局貝工消费合作社印装 308717 A7 ___ B7 五、發明説明（3 ) ，則蝕刻裝置之成本大幅度的昇高。 本發明之目的爲提供一種可實現髙選擇比，高精密度 之触刻之技術3 本發明之上述目的，其他目的，及新穎之特徵可由參 照圖式之說明成爲更明確。 本發明中揭示之發明中，代表性之概要如下。 (1 )本發明半導體積體電路裝置之製造方法係在以 乾式蝕刻法蝕刻半導體基板上之薄膜時，使在等離子體中 以準安定狀態激起之惰性氣體，與上述薄膜之乾式蝕刻時 所必須之反應氣體互相發生作用而選擇性的形成所需之離 解種。 (2 )本發明之半導體稹體電路裝置之製造方法係在 上述（1 )項之製造方法中，將等離子體乾式蝕刻裝置之 等離子體生成室與反應室分離，阻止等離子體中之電子被 導入反應室中，藉此降低因與電子相撞而產生之上述反應 氣體之離解。 (3 )本發明之半導體積體電路裝置之製造方法係在 以乾式蝕刻法蝕刻半導體基板上之氧化矽膜時’使在等離 子體中以準安定狀態激起之惰性氣體與碳氟化合物系氣體 互相發生作用而形成所需之離解種。 (4 )本發明之半導體稹體電路裝置之製造方法係在 上述（3 )項之製造方法中，使上述碳氟化合物氣體成爲 碳數量2或2以上之鏈狀高_氟化合物。 (5 )本發明之半導體稹體電路裝置之製造方法係在 本紙張尺度適用中國國家標準（CNS)A4規格（ 210X 297公釐）_ 6 _ 1 訂 族 . * (請先閲讀背面之注意事項再填寫本頁) A7 經濟部中央樣準局員工消費合作杜印製 |---- B7 五 、發明説获 1(4 ) 1 上 述（ 3 ) 項之 製 造方 法 中 ，使 上 述 碳 氟 化 合 物 系 氣 體 成 1 爲 碳數 置 2 至6 之 範圍 內 之 鏈狀 碳 氟 化 合 物 0 1 ( 6 ) 本發 明 之半 導 體 積體 電 路 裝 置 之 製 造 方 法 係 在 1 I 上 述（ 3 ) 項之 製 造方 法 中 ，使 上 述 碳 氟 化 合 物 系 氣 體 成 請 先 閲 1 I 爲 碳數 量 3 或3 以 上之 環 狀 高碳 氟 化 合 物 〇 背 ιέ I 1 1 ( 7 ) 本發 明 之半 導 體稹•體 電 路 裝 置 之 製 造 方 法 係 在 之 注 1 I 意 I 上 述（ 3 ) 項之 製 造方 法 中 ，使 上 述 惰 性 氣 體 成 爲 從 Η e 事 項 1 I 再 I » N e A r » K r及 X e 所構 成 之 群 中 選 擇 之 一 種 或 2 填 馬 1 本 種 以上 之 稀 有氣 體 〇 頁 -— 1 1 ( 8 ) 本發 明 之半 導 體 積體 電 路 裝 置 之 製 造 方 法 係 在 1 | 上 述（ 3 ) 項之 製 造方 法 中 ，形 成 對 氮 化 矽 之 選 擇 比 高 之 .1 離 解種 〇 1 訂 ( 9 ) 本發 明 之半 導 體 稹體 電 路 裝 置 之 製 造 方 法 係 在 1 1 I 上 述（ 3 ) 項之 製 造方 法 中 ，將 上 述 情 性 氣 體 之 比 率 設 定 1 1 爲 合氣 體 流 量之 5 0 % 以 上 ，將 處 理 壓 力 設 定 爲 1 0 0 m 1 1 To r Γ 至1 T o r r 之 範圍 內 藤 ( 1 0 )本 發 明之 半 導 體積 體 電 路 裝 置 之 製 造 方 法 係 1 I 在 上述 ( 3 )項 之 製造 方 法 中， 將 上 述 惰 性 氣 體 之 比 率 設 1 | 定 爲全 氣 體 流童 之 8 0 % 以 上， 將 處 理 壓 力 設 定 爲 1 0 0 1 | m T 0 Γ r至 5 0 0 m To Γ r 之 範 圍 內 〇 1 1 I ( 1 1 )本 發 明之 半 導 體積 體 電 路 裝 置 之 製 造 方 法 係 1 1 在 上述 ( 3 )項 之 製造 方 法 中， 使 用 Ary m 機 材 料 做 爲 乾 式 蝕 1 1 刻 之罩 幕 0 1 1 ( 1 2 )本 發 明之 半 導 體積 體 電 路 裝 置 之 製 造 方 法 係 1 1 本紙浪尺度適用中國國家標準（CNS)A4規格U10X297公釐）一 7 - 308717 經濟部中央樣準局貝工消費合作社印製 A7 B7五、發明説明（5 ) 在以乾式蝕刻半導體基板上之氮化矽膜時，使在等離子體 中以準安定狀態下激起之惰性氣體與碳氟化合物系氣體互 相發生作用而選擇性的形成所需之離解種。 (1 3 )本發明之半導體積體電路裝置之製造方法係 在上述（12)項之製造方法中，使用從He ，Ar ， K r及X e所構成之群中選擇之一種或2種以上之稀有氣 體做爲上述惰性氣體，使用二鄰乙基苯酚電烷做爲碳氟系 氣體，藉此形成對矽之選擇比高之離解種。 (1 4 )本發明之半導體積體電路裝置之製造方法係 在上述（1 3 )項之製造方法中，將上述惰性氣體之比率 設定爲全氣體流量之8 0%以上，將處理壓力設定爲 l〇〇m Torr至500m Torr之範圔內。 (1 5 )本發明之半導髖稹體電路裝置之製造方法具 有如下述（a)至（d)之過程： (a )在半導體基板主面上形成L 0 C 0 S構造之場 絕緣膜後，在由上述場絕緣膜所包圔之活性領域中形成半 導體元件之過程； (b )在上述半導體基板全面推積第1絕緣膜後，在 上述第1絕緣膜上推積蝕刻比例與上述第1絕緣膜不同之 第2絕緣膜之過程： (c )使在等離子體中以準安定狀態激起之惰性氣體 與碳氟系氣體互相發生作用而選擇性的產生上述第2絕緣 膜對上述第1絕緣膜之選擇比成爲最大之離解種，以該離 解種蝕刻上述第2絕緣膜之過程； 8 一 本紙張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐） (請先閲讀背面之注意事項再填寫本頁) 經濟部中央搮準局貝工消费合作杜印製 A7 B7五、發明説明（6 ) (d)使在等離子體中以準安定狀態激起之惰性氣體 與碳氟系氣體互相發生作用，藉此選擇性的生成上述第1 絕緣膜對上述半導體基板之選擇比成爲最大之離解種’以 該離解種蝕刻上述第1絕緣膜而形成連接於上述半導體元 件，而且一部分與上述場絕緣膜重叠之接觸孔之過程。 (16) 本發明之半導體積體電路裝置之製造方法係 在上述（1 5 )項之製造方法中，以形成於上述第2絕緣 膜上之無機材料做爲罩幕蝕刻上述第2絕緣膜。 (17) 本發明之半導體積體電路裝置之製造方法係 在上述（1 5 )項之製造方法中，將接觸孔之直徑設定爲 0. 或 0. 3em 以下。 (1 8 )本發明之半導體稹體電路裝置之製造方法係 在上述（1 6 )項之製造方法中，以與上述第1絕緣膜相 同之材料形成由上述無機材料形成之罩幕。 (1 9 )本發明之半導體積體電路裝置之製造方法具 有如下述（a)至（d)之過程： (a)在半導體基板之主面上形成MI SFET之過 程； (b )在上述半導體基板全面堆稹第1絕緣膜後，在 上述第1絕緣膜上堆積蝕刻比例與上述第1絕緣膜不同之 第2絕緣膜之過程： (c )使在等離子體中以準安定狀態激起之惰性氣體 與碳氟氣體互相發生作用，藉此選擇性的生成上述第2絕 緣膜對上述第1絕緣膜之選擇比成爲最大之離解種，以該 本紙張尺度適用中國國家#準（〇阳）戍4規格（210'/297公釐〉_〇 _ ~ (請先閱讀背面之注意事項再填寫本頁) 經濟部中央樣準局貝工消费合作社印製 A7 B7 _ 五、發明説明（7 ) 離解種蝕刻上述第2絕緣膜之過程； (d )使在等離子體中以準安定狀態激起之惰性氣體 與碳氟系氣體互相產生作用，藉此選擇性的生成上述第1 絕緣膜對上述半導體基板之選擇比成爲最大之離解種，以 該離解種蝕刻上述第1絕緣膜形成連接於上述 MI SFET之閘極與鄰接於閘極之MI SFET之閘極 間之半導體基板，而且一部分與上述閘極重叠之接觸孔之 過程。 (2 0 )本發明之半導體積體電路裝置之製造方法係 在上述（1 9 )項之製造方法中，以形成於上述第2絕緣 膜上之無機材料做爲罩幕，蝕刻上述第2絕緣膜。 (2 1 )本發明之半導體稹體電路裝置之製造方法係 在上述（1 9 )項之製造方法中，將上述接觸孔之直徑設 定爲0. 25em或〇. 25μπι以下。 (22) 本發明之半導體積體電路裝置之製造方法 係在上述（2 0 )項之製造方法中，以與上述第1絕緣膜 相同之材料形成由上述無機材料所形成之罩幕。 惰性氣體係在由於與等離子體之互相作用而被禁止轉 變成基底狀態之準安定狀態下被激起。準安定狀態之自然 放出壽命（自然轉變至基底狀態之平均時間）爲一秒，故 反應室內可多置的存在準安定狀態之惰性氣體。準安定狀 態之惰性氣體因相撞而放出能量，轉變成基底狀態。被放 出之能量成爲均勻，可選擇性的激起反應氣體分子。 以下說明惰性氣體代表例之稀有氣體之作用。表1爲 本紙張尺度適用中國國家標準（CNS ) Α4规格（210Χ297公釐）_ 1〇 _ (請先閲讀背面之注意事項再填寫本頁) 訂 A7 308717 B7 nil —** 五、發明説明（8 ) 稀有氣體（He ，Ne ’Ar ’Kr ’Xe)之準安定準 位能量（註1 )。 表1 稀有氣體之準安定準位能量 稀有氣體元素 準安定準位能量（eV) He 19.82 20.61 Ne 16.62 16.72 A r 11.55 11.72 Kr 9.92 10.56 Xe ____- 8. 32 9.45 (註1 ) J.S. Chang, R.M. Hobson,市川幸美，金田輝男 ，「電離氣體之原子•分子過程」P. 142 (東京電氣 大學出版局，1982)。 如表1所示，可利用任何稀有氣體之準安定狀態之種 類有限。因此，導入之碳氟化合物系氣體分子之反結合軌 道必須存在於和稀有氣體之準安定準位能成爲一致之位置 ，而且從其反結軌道離解之離解中必須適合於蝕刻。 此外，又必須明瞭使用於氧化矽膜之蝕刻之離解種之 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐）_ ^ _ ---------i------.玎------線 - -.. (請先閱讀背面之注意事項再填寫本頁) 經濟部中央標準局貝工消费合作社印製 A7 B7 經濟部中央橾準局員工消費合作社印製 五、發明説明（9 ) 特性之附著性，蝕刻性，及選擇性等。表2中表示靥於各 特性之離解種。 表2 離解種之特性與離解種之例 特性 離解種 附著性 cf2,c2f4,ch2,chf,cf,ch 蝕刻性 ch2,c2f4,cf3,f,chf2,cf,chf, CF2+,C2F4+,CF3+,F+,CHF2+, CF+)CHf 選擇性（對S i ) CF2)C2F4,chf2,cf,chf,cf2+, C2F4+,CHF2+,CF+,CHF+ 非選擇性 cf3)f,cf3+,f+ 非蝕刻性 ch2,hf,ch 垂直入射於基板 CF2+,C2F4+,CF3+,F+,CHF2+,CF+, CHF+,CH2+,CH+ 各向同性的入射 Cf2,C2F4，CF3，F,CHF2，CF，CHF, 於基板 ch2,ch (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS ) A4規格（2丨0X297公釐）__ 、-=* Α7 Β7 五、發明説明（10) 爲了提高選擇比，必須排除非選擇性離解種。又爲了 維持蝕刻之形狀精密度，必須使用兼有選擇性及附著性之 離解種。由表2所示特性可知選擇性之欄之離解種爲最佳 。蝕刻速率可藉由反應氣體之導入置，其混合比，功率等 通常之裝置控制形成β 從反結合性軌道之離解可根據分子軌道計算（註2) 得知。計算精密度可藉計算稀有氣體之準安定狀態與分子 之既知反應而評估。表3中表示單矽烷（S i Η4)之反 應測定結果（註3 )及計算結果。 ----------------.玎------遗 - (請先閲讀背面之注意事項再填寫本頁) 經濟部中央標準局負工消費合作杜印製 13 - 本紙張尺度適用中國國家標準（CNS ) Α4規格（210X 297公釐）_ A7 B7 五、發明説明（u) 表3 SiH4之共鳴離解之計算結果 氣體 實測準 安定準 位能置 根據計算 之分子激 起能量 計算轉 變通路 離解種（與 實測成爲一致） He 21.2eV 21.2eV m SiHx + (單結合 Si * 軌道） A r 1 1 . 7eV 12.2eV 從8. 6 SiHx (非反結 轉變成 SiH* 合軌道） 8. 8eV Si* 之反結 合軌道 (請先閲讀背面之注意事項再填寫本頁) ,ιτ 經濟部中央揉準局貝工消费合作社印裝 (註 2.) K . Kobayash i, N. K u r i t a, H. Kumahora and Tago, Phys. Rev. B45, 11299 (1992); K.A7 B7 308717 V. Description of the invention (1) The present invention relates to the manufacturing technology of semiconductor integrated circuit devices, and is particularly concerned with the technology of dry etching of thin films on semiconductor crystal patterns using radicals or ions in plasma. The processing of the silicon oxide film, which is a representative insulating film used in the manufacture of LSI, is usually performed by a dry etching device (plasma etching device) using a plasma process. In the etching process using one of the representative plasma etching apparatuses with a magnetic field microwave plasma etching apparatus, first, the exhaust chamber is used to evacuate the empty chamber composed of the reaction chamber (etching chamber) and the discharge chamber of the etching apparatus into an empty space ( About 10_6 Torr), and then the reaction gas is introduced into the empty chamber through a needle valve to make it into a certain pressure (about 1 〇-5 to 10 ′ 1 T 〇rr) ° etching silicon oxide film deposited on the silicon wafer At this time, for the reaction gas system, for example, CF4, C2F6, C3F8, C4F8 and other fluorocarbon-based gases, or CHF3, CH2F2 and other hydrogen-containing fluorocarbon-based gases, or a mixed gas of hydrogen. Such fluorocarbon-based gas is collectively called fluorocarbon-based gas. The microwave of 1 to 10 GHZ (usually 2. 4 5 GHZ) generated by the microwave oscillator (that is, the magnetron) propagates from the waveguide and is guided into the discharge tube forming the discharge chamber. In order to pass microwaves, the discharge tube is made of an insulator (usually quartz or alumina). Electromagnetic and permanent magnets form a magnetic field in a part of the discharge chamber and the reaction chamber. In this state, after the microwave electric field is introduced into the discharge chamber, the magnetic field is generated by the magnetic field and the microwave "field multiplication effect, and the plasma is generated, and the plasma is formed. The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) 4. ----- ^ --- ^ -------- ir ------- 41--* (Please read the precautions on the back before filling out this page) Central Ministry of Economic Affairs Bureau staff consumer cooperatives print the A7 B7 V. Invention description (2) of the Beigong Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs. At this time, the reaction gas dissociates in the plasma, generating many kinds of radicals or ions. The dissociation of the reaction gas occurs because the electrons in the molecules of the reaction gas collide with the electrons in the plasma or absorb light and are excited in the anti-combination orbit. The dissociated species are supplied to the surface of the silicon oxide film, and each dissociated species has a complex influence on the characteristics of dry etching and is related to the etching of the silicon oxide film. This dry etching technique using a plasma process is disclosed in Japanese Patent Laid-Open No. 3-109728. In electronic devices such as silicon LSI or TFT (thin film transistor), the silicon oxide film used as the dry etching material is deposited on the silicon film (silicon substrate, silicon epitaxial film, polycrystalline silicon film, etc.), silicon nitride film , Or on its laminated film. In electronic devices with a high volume, the silicon oxide film can be dry-etched to form contact holes with a diameter of 0.5 / zm or less and a high planar shape ratio (hole depth / hole diameter), and the silicon of the base layer can be used. The etching amount of the film, the nitride film or each laminated film becomes the minimum high accuracy, and the etching technology with high selectivity. In order to realize such etching, the composition control of the dissociation species of the reaction gas must be precisely performed. However, it is very difficult to perform such control by using the etching method of the dissociation of reactive gas molecules generated by the collision of electrons in the plasma. The reason is that the choice of electrons can only stimulate anti-combination at the lowest energy level. Realized on a sexual orbit, the electrons with the same required energy can not be obtained in the plasma. Therefore, it is necessary to generate electrons of uniform energy from the outside to inject them, or to introduce light sources of uniform energy into the plasma. However, this paper standard uses the Chinese National Standard (CNS) Α4 specification (210Χ297mm) _ 5_ _ --------------- ir ------. It-- (Please read the note on the back ^ item first and then fill out this page) Printed by 308717 A7 ___ B7 of the Beigong Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 5. Invention description (3), the cost of the etching device will increase significantly. The purpose of the present invention is to provide a technique capable of realizing high selectivity and high-precision touch engraving. 3 The above-mentioned objects, other objects, and novel features of the present invention can be made clearer by referring to the description of the drawings. Among the inventions disclosed in the present invention, representative outlines are as follows. (1) The manufacturing method of the semiconductor integrated circuit device of the present invention is performed when the thin film on the semiconductor substrate is etched by the dry etching method, and the inert gas excited in a quasi-steady state in the plasma and the dry etching of the thin film The necessary reaction gases interact with each other to selectively form the desired dissociative species. (2) The method of manufacturing a semiconductor device circuit of the present invention is in the manufacturing method of (1) above, the plasma generating chamber and the reaction chamber of the plasma dry etching apparatus are separated to prevent the introduction of electrons in the plasma In the reaction chamber, the dissociation of the reaction gas generated by collision with electrons is thereby reduced. (3) The method for manufacturing a semiconductor integrated circuit device of the present invention is to use an inert gas and a fluorocarbon-based gas excited in a quasi-steady state in plasma when etching a silicon oxide film on a semiconductor substrate by dry etching Interact with each other to form the desired dissociated species. (4) The method of manufacturing a semiconductor device circuit of the present invention is the manufacturing method of the above item (3), wherein the fluorocarbon gas is a chain high-fluoro compound having a carbon number of 2 or more. (5) The manufacturing method of the semiconductor rice ball circuit device of the present invention is in accordance with the Chinese National Standard (CNS) A4 specification (210X 297mm) _ 6 _ 1 in this paper size. * (Please read the notes on the back first (Fill in this page again) A7 DuPont Printing by Employees' Consumer Cooperation of the Central Bureau of Prototyping of the Ministry of Economic Affairs | ---- B7 V. Invention Obtained 1 (4) 1 In the manufacturing method of item (3) above, the above fluorocarbon system is used The gas is 1 to be a chain fluorocarbon in the range of 2 to 6 in carbon number. 0 1 (6) The method for manufacturing a semiconductor integrated circuit device of the present invention is in the method for manufacturing the above item (3), using For the above-mentioned fluorocarbon gas composition, please read 1 I is a cyclic high fluorocarbon compound with carbon number 3 or more. Back I 1 1 (7) Note 1 I Yi I In the manufacturing method of item (3) above, the above inert gas is used The body becomes one selected from the group consisting of Η e matters 1 I then I »N e A r» K r and X e or 2 fills a horse 1 rare gas of this kind or more —— page 1 1 (8) The manufacturing method of the semiconductor integrated circuit device of the invention is in 1 | the manufacturing method of the above item (3), forming a high selectivity ratio to silicon nitride. 1 dissociative species 〇1 (9) The manufacturing method of the circuit device is in the manufacturing method of 1 1 I above (3), the ratio of the above-mentioned emotional gas is set 1 1 to 50% or more of the combined gas flow rate, and the processing pressure is set to 100 m 1 1 To r Γ to 1 Torr (1 0) The manufacturing method of the semiconductor integrated circuit device of the present invention is 1 I. In the manufacturing method of the above item (3), the ratio of the inert gas is set to 1 | Full gas 80% or more of the child, set the processing pressure to be within the range of 1 0 0 1 | m T 0 Γ r to 5 0 0 m To Γ r 〇1 1 I (1 1) of the semiconductor integrated circuit device of the present invention Manufacturing method 1 1 In the manufacturing method of the above item (3), the Ary m machine material is used as the dry etching 1 1 engraved mask 0 1 1 (1 2) The manufacturing method of the semiconductor integrated circuit device of the present invention is 1 1 This paper wave scale is applicable to the Chinese National Standard (CNS) A4 specification U10X297 mm) I 7-308717 Printed A7 B7 by the Beige Consumer Cooperative of the Central Prototype Bureau of the Ministry of Economic Affairs V. Invention description (5) On dry etching of semiconductor substrates In the case of silicon nitride film, the inert gas excited in the quasi-steady state in the plasma interacts with the fluorocarbon-based gas to selectively form the desired dissociation species. (1 3) The manufacturing method of the semiconductor integrated circuit device of the present invention is one or more than two selected from the group consisting of He, Ar, K r and X e in the manufacturing method of the above item (12) The rare gas is used as the above-mentioned inert gas, and di-o-ethylphenol alkylene is used as the fluorocarbon gas, thereby forming a dissociative species with a high selectivity to silicon. (1 4) The manufacturing method of the semiconductor integrated circuit device of the present invention is in the manufacturing method of (1 3) above, the ratio of the inert gas is set to 80% or more of the total gas flow rate, and the processing pressure is set to From 100m Torr to 500m Torr. (1 5) The manufacturing method of the semiconducting hippocampus circuit device of the present invention has the following processes (a) to (d): (a) A field insulating film of L 0 C 0 S structure is formed on the main surface of the semiconductor substrate Then, the process of forming a semiconductor element in the active field surrounded by the field insulating film; (b) After the first insulating film is deposited on the entire semiconductor substrate, the etching ratio on the first insulating film is equal to the above The process of the second insulating film that is different from the first insulating film: (c) The inert gas excited in the quasi-stabilized state in the plasma interacts with the fluorocarbon-based gas to selectively produce the second insulating film The selection ratio of the first insulating film becomes the largest dissociative species, and the above-mentioned second insulating film is etched by the dissociative species; 8 A paper size applies to the Chinese National Standard (CNS) A4 specification (210X 297 mm) (please read first (Notes on the back and then fill in this page) A7 B7 of the Ministry of Economic Affairs, Central Bureau of Industry and Fisheries, Consumer Printing Co., Ltd. Du A. V. Invention description (6) (d) Inert gas and carbon excited in a quasi-stable state in the plasma Fluorine gases interact with each other, This selective generation of the dissociation species in which the selection ratio of the first insulation film to the semiconductor substrate becomes the largest 'is to etch the first insulation film with the dissociation species to form a connection to the semiconductor element, and a part of which overlaps with the field insulation film The process of contact holes. (16) The method for manufacturing the semiconductor integrated circuit device of the present invention is the method for manufacturing the above item (1 5), wherein the second insulating film is etched using the inorganic material formed on the second insulating film as a mask. (17) The manufacturing method of the semiconductor integrated circuit device of the present invention is in the manufacturing method of the above item (1 5), the diameter of the contact hole is set to 0. or 0.3 em or less. (18) The method of manufacturing a semiconductor device circuit of the present invention is the manufacturing method of the above item (16), in which the mask made of the inorganic material is formed of the same material as the first insulating film. (19) The manufacturing method of the semiconductor integrated circuit device of the present invention has the following processes (a) to (d): (a) The process of forming the MI SFET on the main surface of the semiconductor substrate; (b) The above semiconductor The process of depositing the first insulating film on the entire substrate, and then depositing a second insulating film with an etching ratio different from that of the first insulating film on the first insulating film: (c) Stimulate the plasma in a quasi-stable state The inert gas and fluorocarbon gas interact with each other, thereby selectively generating the selection ratio of the second insulating film to the first insulating film to become the largest dissociative species, which is applicable to China National Standard # 〇 （〇 阳） 4 specifications (210 '/ 297mm> _〇_ ~ (please read the precautions on the back before filling in this page) A7 B7 _ printed by the Beige Consumer Cooperative of the Central Prototype Bureau of the Ministry of Economic Affairs. 5. Description of the invention (7) The process of dissociating and etching the above second insulating film; (d) Interacting the inert gas excited in the quasi-stable state in the plasma with the fluorocarbon gas, thereby selectively generating the above first insulating film to the above The choice ratio of semiconductor substrate becomes the most A large dissociating species, the first insulating film is etched with the dissociating species to form a semiconductor substrate connected between the gate of the MI SFET and the gate of the MI SFET adjacent to the gate, and a part of the contact hole overlapping the gate (2 0) The manufacturing method of the semiconductor integrated circuit device of the present invention is in the manufacturing method of (1 9) above, using the inorganic material formed on the second insulating film as a mask, and etching the above The second insulating film. (2 1) The manufacturing method of the semiconductor ball circuit of the present invention is the manufacturing method of the above item (1 9), and the diameter of the contact hole is set to 0.25 em or 0.25 μm or less. (22) In the manufacturing method of the semiconductor integrated circuit device of the present invention, in the manufacturing method of the above item (2 0), a mask made of the inorganic material is formed of the same material as the first insulating film. It is activated in a quasi-stable state that is prohibited from changing to the base state due to interaction with the plasma. The quasi-stable state's natural release life (average time from natural transition to the base state) is Therefore, the inert gas in the quasi-stable state can be placed in the reaction chamber. The inert gas in the quasi-stable state releases energy due to collision and changes to the base state. The released energy becomes uniform and can selectively stimulate the reaction gas Molecule. The following describes the role of rare gases as representative examples of inert gas. Table 1 is based on the paper standard and is applicable to the Chinese National Standard (CNS) Α4 specification (210Χ297mm) ) Order A7 308717 B7 nil — ** V. Description of the invention (8) Quasi-stabilized level energy of rare gas (He, Ne'Ar'Kr'Xe) (Note 1). Table 1 Quasi-stabilized level energy of rare gas Quasi-stabilized level energy of rare gas element (eV) He 19.82 20.61 Ne 16.62 16.72 A r 11.55 11.72 Kr 9.92 10.56 Xe ____- 8. 32 9.45 (Note 1) JS Chang, RM Hobson , Yukimi Ichikawa, Fao Jintian, "Atoms and Molecular Processes of Ionized Gases" P. 142 (Tokyo Electric University Press Bureau, 1982). As shown in Table 1, the types of quasi-stability that can be used for any rare gas are limited. Therefore, the anti-combination track of the introduced fluorocarbon gas molecules must exist at a position that can be consistent with the quasi-stability level of the rare gas, and the dissociation from its anti-junction orbit dissociation must be suitable for etching. In addition, it must be clear that the paper standard used for the dissociation of silicon oxide film etching is applicable to the Chinese National Standard (CNS) A4 specification (210X297mm) _ ^ _ --------- i ---- -. 玎 ------ LINE--.. (Please read the precautions on the back before filling out this page) Printed by the Ministry of Economic Affairs Bureau of Central Standardization Beigong Consumer Cooperative A7 B7 Employee Consumer Cooperative of Central Central Bureau of Economic Affairs Printing 5. Description of the invention (9) Adhesion, etching, and selectivity of characteristics. Table 2 shows the dissociation species for each characteristic. Table 2 Characteristics of dissociated species and examples of dissociated species Dissociated species adhesion cf2, c2f4, ch2, chf, cf, ch etch ch2, c2f4, cf3, f, chf2, cf, chf, CF2 +, C2F4 +, CF3 +, F + , CHF2 +, CF +) CHf selectivity (for S i) CF2) C2F4, chf2, cf, chf, cf2 +, C2F4 +, CHF2 +, CF +, CHF + non-selective cf3) f, cf3 +, f + non-etching ch2, hf, ch Normal incidence on the substrate CF2 +, C2F4 +, CF3 +, F +, CHF2 +, CF +, CHF +, CH2 +, CH + Isotropic incident Cf2, C2F4, CF3, F, CHF2, CF, CHF, on the substrate ch2, ch (please read the back side first Please pay attention to this page and then fill out this page) This paper scale is applicable to the Chinese National Standard (CNS) A4 specification (2 丨 0X297mm) __,-= * Α7 Β7 5. Invention description (10) In order to improve the selection ratio, non-selection must be excluded Sexual dissociation species. In order to maintain the precision of the shape of the etching, it is necessary to use a dissociative species that has both selectivity and adhesion. From the characteristics shown in Table 2, it can be seen that the dissociation species in the selective column is the best. The etching rate can be determined by the introduction of the reaction gas, its mixing ratio, power, etc. The usual device controls the formation of β. The dissociation of the anti-binding orbit can be calculated from the molecular orbital calculation (Note 2). The precision of calculation can be evaluated by calculating the quasi-stability of rare gases and the known reaction of molecules. Table 3 shows the reaction measurement results (Note 3) and calculation results of monosilane (S i Η4). ----------------. 玎 ------ Leave- (please read the precautions on the back and then fill out this page) The Ministry of Economic Affairs Central Bureau of Standards Unemployment Consumer Cooperation Du Yin System 13-This paper scale is applicable to the Chinese National Standard (CNS) Α4 specification (210X 297mm) _ A7 B7 V. Description of invention (u) Table 3 Calculation results of resonance dissociation of SiH4 Gas measured quasi-stability level can be set according to calculation Molecule Stimulated Energy Calculation Transition Path Dissociation Species (consistent with the actual measurement) He 21.2eV 21.2eV m SiHx + (single bonded Si * orbital) A r 1 1. 7eV 12.2eV from 8.6 SiHx (non-reverse junction to SiH * combined track) 8. 8eV Si * anti-combined track (please read the precautions on the back before filling this page), ιτ Printed by Beigong Consumer Cooperative of the Central Bureau of Economic Development of the Ministry of Economic Affairs (Note 2.) K. Kobayash i , N. K urita, H. Kumahora and Tago, Phys. Rev. B45, 11299 (1992); K.

Kobayash i, N. Kurita, H.Kumahora, and K. Tago, Phys. Rev. A 4 3, 5810 (199l);K. Tago, H.Kumahora, N. Sadaoka, and K. Kobayashi, Int. J. Supercomp. App 1 . 2,(1988) 58 ° (註 3)M.Tsuji, K. Kobayashi, S. Yamaguch i, and Y. Nishimura, Che. Phys. Lett. 158, 470(1989) 本紙張尺度適用中國國家揉準（CNS ) A4規格（210X 297公釐）_ _ 經濟部中央標準局員工消費合作社印裝 A7 B7 五、發明説明（12 ) 〇 由表3可知根據分子軌道計算，可在1 e V以內之精 確度預測分子之反結合性軌道之能量。 根據分子軌道計算，可知爲了產生表2之選擇性離解 種必須選擇之分子。根據表3所示之離解種，及產生該離 解種之分子之計算，可知中性離解所需之能量爲2 e V以 上，激起反結合性軌道所需之最小能量爲5至1 2 e V， 而離解種之離子化位能爲1 0至1 3 e V。 由此又可知離子離解所需之能量爲1 2 e V以上。因 此，可從H e ，N e選擇性的產生離子離解種及中性離解 種，而可從Ar ，Kr ，Xe選擇性的產生中性離解。 根據分子軌道計算算出從反結合性軌道之離解時，即 可得知各分子中是否有產生表2之選擇性離解種之反結合 性軌道之存在。表4中表示有這種反結合性軌道之存在， 而其激起能量接近稀有氣體之準安定準位能量之分子。所 產生之分子係在碳氟化合物系氣體中之C F4，C H F3, C 2 Η 4 * C^Fs。 本紙張尺度適用中國國家標準（CNS ) A4規格（210 X 297公釐）_ j 5 -----：— I：-I-----—IT:------啟. (請先閱讀背面之注意事項再填寫本頁) 308717 A7 B7 五、發明説明（I3 ) 經濟部中央標準局員工消費合作社印製 表4有產生選擇性離解種之反結合軌道之碳氟化合物計氣體分子 稀有氣體 選擇性 離臓 具有不產生非選擇性 離腫之反結合· 之肝 具有產生非選擇性離臓 之反結合軌道之肝 He cf2+ C2F4, CH2F2 C2F4+ C^Fe chf2+ CH2F2 cf2 C2F4 c2f4 C-iFs Ne cf2+ C2F4 UF8(從非反結合軌道轉變） C2F4+ CH2F2 CHFa chf2+ C2F4,CH2F2 cf2 C4F8(同上） C2F4 C4Fs(问上） CHF chf3 Ar CF2 C2F4,C4F8 chf3)cf4 chf2 chf3 CHF chf3 Kr cf2 ch2f2 cf4 c2f4 C4F8 chf2 CH2F2 CHFa CHF CH2F2 Xe cf2 CH2F<l CH2F2 C2F4 C4F8 (請先閱讀背面之注意事項再填寫本頁) ,-ιτ 级 本紙張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐）_ 16 經濟部中央標準局員工消費合作社印製 A7 B7五、發明説明（14) 使用與準安定狀態之稀有氣體之相互作用而形成之選 擇離開時，有少數等離子體中之電子所形成之離解之存在 。在實際蝕刻過程中’可能因離子之入射而彈出非選擇性 離解種之可能性。因此’有時爲了側壁保護而必須混合具 有附著性而蝕刻速度低之CHF或C F。此時’只要使用 從CH2F2之選擇離解即可。 若合併使用這種保護性之離解種時’即使使用非選擇 性離解種之產生量較小之C H F3之選擇離開仍可進行所 需之蝕刻。然而，因爲C H4之非選擇性離解種之產生量 多，故在組合時必須增多保護性氣體之量。 將不使用與準安定狀態之稀有氣體之相互作用所形成 之選擇離解之習用蝕刻法，或利用非選擇性離解種之產生 量多之選擇離解之蝕刻法與本發明之利用選擇離解之蝕刻 法組合，仍因混合比而可控制離解種之比率，故可產生良 好之結果。 若希望抑制等離子中之電子所形成之離解而進行利用 與準安定狀態之稀有氣體之相互作用所形成之選擇離解時 ，只要將稀有氣體等離子體室與導入氣體分子之離解反應 室在空間上予以分離即可。以格子分隔兩個室即可將正離 子與電氣上成爲中性之準安定狀態之稀有氣體導入離解反 應室內，故可進行選擇離解與離子捕助蝕刻。 以下參照圖式說明本發明之實施例。 (實施例1 ) 本紙張尺度適用中國國家橾準（CNS)A4规格（210X297公釐）_ 17 - (請先閱讀背面之注意事項再填寫本頁) 訂 經濟部中央橾準局員i消費合作杜印製 A7 _ B7五、發明说明（l5 ) 第1圖爲本實施例中使用之微波等離子體蝕刻裝置 100之概略圖。圖中，101爲微波導波管，102a ，102b爲磁鐵，1〇3爲等離子體生成室，106爲 反應室。磁控管所產生之2. 4 5 GHZ之微波經過微波 導波管1 0 1被導入等離子體生成室》原料氣體G經過氣 體導入口104被導入等離子體生成室1〇3中。 將微波導入等離子體生成室1 0 3，利用設在等離子 體生成室103外側之磁石102a，l〇2b產生1K G a u s之磁場，藉此將原料氣體G在磁束密度爲8 7 5Ga u s之ECR位置由於電子回旋加速器共鳴而被等 離子體化。 此時，從原料氣體G產生之中性離解種及離子離解種 被輸送至反應室10 6之半導體基板（晶圚）1表面。支 持半導體基板1之晶圖支持台1 0 7連接於高頻電源 1 0 8，將高頻施加於半導體基板1而產生自我偏壓，控 制離子能量。 以下說明使用微波等離子體蝕刻裝置1 0 0之本實施 例之蝕刻過程。該過程係爲了在鄰接於做爲元件分離技術 廣泛的被利用之 L 0 C Ο S (Local Oxidation of Silicon)構造之場絕緣膜之矽基板上形成接觸而在絕緣 膜上形成連接孔之過程。 過去•爲了與基板形成接觸而形成之連接孔必須配置 成不會與場絕緣膜重疊。其理由爲將絕緣膜予以乾式蝕刻 而形成連接孔時，若因過度蝕刻而使基層之場絕緣膜被刻 本紙張尺度遥用中國國家搮準（€邶）八4規格（2丨0/297公釐）_18 _ (請先閱讀背面之注意事項再填寫本頁) *vs A7 B7 經濟部中央標準局貝工消费合作社印製 五 、發明説明 ( 16 ) 1 削 時 1 基 板 將 會 露 出 而 使 場 絕 緣 膜之元 件 分離 特 性 發 生 劣 1 化 0 I 然 而 9 在 不 容 許 連 接 孔 與 場 絕緣膜 有 重叠 之 配 置 設 計 /-—V 1 1 I 中 t 由 於 石 版 印 刷 技 術 過 程 之 光 罩對正 精 確度 之 限 制 > 非 請 先 閲 1 1 | 常 不 容 易 現 設 計 規 則 爲 0 3 仁m以 下 之L S I 〇 讀 背 1 I 因 此 > 本 發 明 中 1 首 先 如 第 2圖所 示 ，在 由 單 結 晶 矽 1 | * I 所 構 成 之 半 導 體 基 板 1 主 面 上 形 成L 0 C 0 S 構 造 之 場 絕 举 項 1 | 再 1 I 緣 膜 2 » 然 後 在 由 場 絕 緣 膜 2 包 圍之活 性 領域 內 > 利 用 常 填 寫 J 本 法 形 成 半 導 體 元 件 » 例 如 Μ I S F E T 0 頁 '—^ 1 I 上 述 Μ I S F E T 係 由 多 結 晶矽膜 所 構成 之 閘 極 3 » 1 I 氧 化 矽 膜 所 搶 稱 成 之 閘 極 絕 緣 膜 4 ，及形 成 於半 導 體 基 板 1 1 1 上 之 —· 對 半 導 體 領 域 ( 源 極 領 域 ，吸極 領 域） 5 6 所 構 訂 I 成 〇 閘 極 3 之 上 部 及 側 壁 由 氧 化 矽膜7 保 護。 ' 1 1 然 後 在 半 導 體 基 板 1 全 面 以C V D 法堆 積 膜 厚 1 1 5 0 0 至 2 0 0 0 A 左 右 之 氮 化 矽膜8 再於 其 上 以 1 1 C V D 法 堆 稹 膜 厚 5 0 0 0 至 1 0 0 0 0 A左 右 之 达 1 B P S G ( Bo r 〇 Phospho Si 1 i cate G 1 as S)膜 9 « 1 | 然 後 » 如 第 3 圖 所 示 > 於 上 述B P S G膜 9 上 形 成 光 1 I 阻 圖 型 1 0 9 該 光 阻 调 型 1 0 在 Μ I S F E T 之 一 方 之 半 1 1 | 導 體 領 域 5 上 方 具 有 開 孔 1 1 〇 該開孔 1 1被 配 置 成 其 一 1 1 端 重 叠 於 鄰 接 半 導 體 領 域 5 之 場 絕緣膜 2 之狀 態 〇 1 1 然 後 * 將 上 述 半 導 體 基 板 1 搬入微 波 等離 子 體 蝕 刻 裝 1 1 置 1 0 0 之 反 rrfag 應 室 1 0 6 內 9 以 光阻圖 型 10 做 爲 罩 幕 將 1 1 B P S G 膜 9 予 以 乾 式 蝕 刻 0 該 蝕刻係 以 B P S G 膜 1 6 1 1 本紙浪尺度適用中國國家標準（〇抑>八4規格（210';< 297公釐）__19 經濟部中央標準局負工消費合作社印袈 A7 _B7___ 五、發明説明（1了） 對基層氮化矽膜8之選擇比成爲最大之條件進行。亦即以 由表5所示碳氟化合物系反應氣體與惰性氣體之組合所構 成之混合氣體構成原料氣體G，將惰性氣體之比率設定爲 混合氣體全量之8 0%以上。將此時之處理壓力設定爲 100 至 500m Torr。 表5 蝕刻BPSG層，提高對S i3N4之選擇比之 條件 反應氣體（碳氟系氣體） 惰性氣體 C 4 F 8 He,Ar,Kr,Xe C 2 F 4 He,Ne,Ar 第4圓表示B P S G膜9之蝕刻進行至中途，而場絕 緣膜2上之氮化矽膜8露出於開孔11底部之狀態。 第5圖爲B P S G膜9之蝕刻終了時之狀態。本實施 例中，因爲以對氮化矽膜8之選擇比成爲最大之條件蝕刻 B P S G膜9，故氮化矽膜8成爲蝕刻之止動膜，即使進 行充分之過蝕刻，仍可防止場絕緣膜2被刻削。 第6圖表示以蝕刻法去除殘餘之氮化矽膜8，藉此完 成到達MI SFET之半導體領域5之連接孔1 2之狀態 本紙張尺度適用中國國家揉準（CNS ) A4規格（210X297公釐）_ _ 一 訂 線 · ' - : (請先閱讀背面之注意事項再填寫本頁) 經濟部中央標準局属工消费合作社印製 A7 __B7 五、發明説明（is) 〇 氮化矽膜8之蝕刻係使用微波等離子體蝕刻裝置 1 0 0以氮化矽膜8對基層之半導體基板1之選擇比成爲 最大之條件進行。亦即以由表6所示碳氟化合物系反應氣 體與惰性氣體之組合所構成之混合氣體構成原料氣體G， 將惰性氣體之比率設定爲混合氣體全量之8 0 %以上。此 時之處理壓力係設定爲1 00至500m To r r。 表6 蝕刻S i 3N4層以便提高對S i之選擇比之條件 反應氣體（碳氟化合物系氣體） 惰性氣體 CH2F2 He,Ar,Kr,Xe 如上所述，依照本實施例，不會刻削場絕緣膜2而可 形成一部分重叠於場絕緣膜2之連接孔1 2，故可實現設 計規則爲0. 3em左右之LSI 。 (實施例2 ) 第7圚爲本實施例中使用之等離子體蝕刻裝置2 0 0 之概略圖。該等離子體蝕刻裝置2 0 0之構造爲在石英製 圔筒2 0 1周圍設置天線2 0 2，在天線2 0 2上施加髙 頻而將電磁波導入圓筒2 0 1內。在真空室2 0 3外側設 本紙張尺度逋用中國國家標準（0阳）八4規格（210'乂 297公釐）_21_ (請先閱讀背面之注意事項再填寫本頁)Kobayash i, N. Kurita, H. Kumahora, and K. Tago, Phys. Rev. A 4 3, 5810 (199l); K. Tago, H. Kumahora, N. Sadaoka, and K. Kobayashi, Int. J. Supercomp. App 1.2 (1988) 58 ° (Note 3) M. Tsuji, K. Kobayashi, S. Yamaguch i, and Y. Nishimura, Che. Phys. Lett. 158, 470 (1989) This paper size is applicable China National Standardization (CNS) A4 specification (210X 297 mm) _ _ Printed by the Ministry of Economic Affairs Central Standards Bureau Employee Consumer Cooperative A7 B7 V. Description of the invention (12) 〇 From Table 3, we can know that according to the molecular orbit, it can be calculated in 1 e The accuracy within V predicts the energy of the molecule's anti-binding orbital. Based on molecular orbital calculations, it can be known that in order to generate the selective dissociation species in Table 2, the molecules must be selected. According to the dissociation species shown in Table 3, and the calculation of the molecule that produced the dissociation species, it can be seen that the energy required for neutral dissociation is 2 e V or more, and the minimum energy required to stimulate the anti-combination orbit is 5 to 1 2 e V, and the ionization potential of the dissociated species is 10 to 13 e V. It can be seen from this that the energy required for ion dissociation is above 12 e V. Therefore, ion dissociation species and neutral dissociation species can be selectively generated from He and Ne, and neutral dissociation can be selectively produced from Ar, Kr, and Xe. When the dissociation from the anti-binding orbital is calculated based on molecular orbital calculation, it can be known whether there is an anti-binding orbital that produces the selective dissociation species of Table 2 in each molecule. Table 4 shows the existence of such anti-combination orbits, and the molecules whose excitation energy is close to the quasi-stabilized level energy of rare gases. The generated molecules are C F4, C H F3, C 2 H 4 * C ^ Fs in fluorocarbon gas. This paper scale is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) _ j 5 -----: — I: -I -----— IT: ------ Qi. ( (Please read the precautions on the back before filling out this page) 308717 A7 B7 V. Description of the invention (I3) Printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs. 4 The fluorocarbon meter gas with anti-combination orbits that produces selective dissociation species Molecular rare gas selective ionization has anti-binding that does not produce non-selective edema. Liver has liver that generates non-selective separation of anti-hepatite He cf2 + C2F4, CH2F2 C2F4 + C ^ Fe chf2 + CH2F2 cf2 C2F4 c2f4 C- iFs Ne cf2 + C2F4 UF8 (transition from non-anti-combination orbital) C2F4 + CH2F2 CHFa chf2 + C2F4, CH2F2 cf2 C4F8 (same as above) C2F4 C4Fs (as above) CHF chf3 Ar CF2 C2F4, C4F8 chf3f2chf3ch2ff3ch2 C4F8 chf2 CH2F2 CHFa CHF CH2F2 Xe cf2 CH2F < l CH2F2 C2F4 C4F8 (please read the precautions on the back and then fill out this page), -ιτ level This paper size is applicable to the Chinese National Standard (CNS) A4 size (210X 297mm _ 16 A7 B7 printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs V. Description of the invention (14) Dissociation caused by electrons in a few plasmas when the selective departure formed by the interaction with the quasi-stabilized rare gas Of existence. In the actual etching process, the possibility of non-selective dissociation may pop up due to the incidence of ions. Therefore, in order to protect the side walls, it is necessary to mix CHF or CF with adhesion and low etching rate. In this case, just use the dissociation from the selection of CH2F2. If this kind of protective dissociation species is used in combination, even if the non-selective dissociation species are used, the selective leaving of CHF3 can still perform the desired etching. However, because the amount of non-selective dissociation species of CH4 is large, the amount of protective gas must be increased when combining. The conventional etching method that does not use the selective dissociation formed by the interaction with the rare gas in the quasi-stable state, or the selective dissociation etching method that uses a large amount of non-selective dissociation species and the selective dissociation etching method of the present invention The combination can still control the ratio of dissociated species due to the mixing ratio, so it can produce good results. If it is desired to suppress the dissociation formed by the electrons in the plasma and perform the selective dissociation formed by the interaction with the rare gas in the quasi-stable state, as long as the rare gas plasma chamber and the dissociation reaction chamber introducing the gas molecules are spatially Just separate. Separation of the two chambers by a grid allows the introduction of positive ions and rare gases that become electrically neutral in a quasi-stable state into the dissociation reaction chamber, so selective dissociation and ion trapping etching can be performed. The embodiments of the present invention will be described below with reference to the drawings. (Example 1) This paper standard is applicable to China National Standard (CNS) A4 (210X297mm) _ 17-(Please read the notes on the back before filling this page). Printing A7_B7 5. Description of the invention (l5) FIG. 1 is a schematic diagram of a microwave plasma etching apparatus 100 used in this embodiment. In the figure, 101 is a microwave waveguide, 102a and 102b are magnets, 103 is a plasma generation chamber, and 106 is a reaction chamber. The 2. 4 5 GHZ microwave generated by the magnetron is introduced into the plasma generation chamber through the microwave waveguide 10 1》 the raw material gas G is introduced into the plasma generation chamber 10 3 through the gas introduction port 104. The microwave is introduced into the plasma generation chamber 103, and the magnets 102a, 102b provided outside the plasma generation chamber 103 generate a magnetic field of 1K Gauss, thereby guiding the raw material gas G to an ECR with a magnetic beam density of 875 Gauss. The position is plasmatized due to resonance of the electron cyclotron. At this time, the neutral dissociated species and ion dissociated species generated from the raw material gas G are transported to the surface of the semiconductor substrate (crystal) 1 in the reaction chamber 106. The crystal pattern supporting table 1 0 7 supporting the semiconductor substrate 1 is connected to a high-frequency power source 108, and a high frequency is applied to the semiconductor substrate 1 to generate a self-bias voltage to control ion energy. The following describes the etching process of this embodiment using the microwave plasma etching apparatus 100. This process is to form a contact hole in the insulating film to form a contact on a silicon substrate adjacent to a field insulating film of L 0 C Ο S (Local Oxidation of Silicon) structure, which is widely used as a device separation technology. In the past • The connection holes formed to make contact with the substrate must be arranged so as not to overlap the field insulating film. The reason is that when the insulating film is dry-etched to form the connection hole, if the base layer field insulating film is used by the engraved paper scale due to excessive etching, the Chinese national standard (€ 邶) 84 specifications (2 丨 0/297 %) _18 _ (Please read the precautions on the back before filling in this page) * vs A7 B7 Printed by the Beigong Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs V. Invention Instructions (16) 1 The substrate will be exposed when cutting 1 The isolation characteristics of the insulating film are degraded. 1 I 0 However, 9 is not allowed in the configuration design where the connection hole overlaps the field insulating film / -— V 1 1 I in t due to the accuracy of photomask alignment in the process of lithography Restrictions> Please read first 1 1 | It is often not easy to find an LSI with a design rule of 0 3 or less m 〇 Read back 1 I Therefore> In the present invention, 1 is first shown in FIG. | * The main surface of the semiconductor substrate 1 composed of I is formed with L 0 C 0 S structure Item 1 | Another 1 I edge film 2 »Then in the active area surrounded by the field insulating film 2 > Forming a semiconductor device using the usual J method» For example, Μ ISFET 0 page '— ^ 1 I Gate 3 composed of polycrystalline silicon film 3 »1 I Gate insulating film 4 predominantly composed of silicon oxide film, and formed on the semiconductor substrate 1 1 1-For the semiconductor field (source field, sink field) ) 5 6 The upper part and side walls of the gate 3 are protected by the silicon oxide film 7. '1 1 Then, a silicon nitride film 8 with a thickness of 1 1 5 0 0 to 2 0 0 0 A is deposited on the entire semiconductor substrate 1 by a CVD method, and then a film thickness of 5 1 0 0 0 is deposited by a 1 CVD method on it Up to about 1 0 0 0 0 0 A 1 BPSG (Bo r o Phospho Si 1 i cate G 1 as S) film 9 «1 | Then» As shown in Figure 3 > Forming light 1 on the above BPSG film 9 I resistance pattern 1 0 9 The photoresist modulation type 1 0 is half of one side of the MISFET 1 1 | Conductor field 5 has an opening 1 1 〇 The opening 1 1 is configured such that one 1 1 end overlaps the adjacent The state of the field insulating film 2 in the semiconductor field 5 〇1 1 Then * the above semiconductor substrate 1 is carried into the microwave plasma etching apparatus 1 1 set 1 0 0 in the reverse rrfag chamber 1 0 6 inside 9 with the photoresist pattern 10 as The screen will dry-etch 1 1 BPSG film 9 0 This etching is based on BPSG film 1 6 1 1 The paper wave scale is applicable to the Chinese national standard (〇)> 8 4 specifications (210 '; < 297 %) __19 Printed A7 _B7___ of the Negative Workers ’Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economy V. Description of the Invention (1) The selection ratio of the base silicon nitride film 8 is maximized. That is, the fluorocarbon shown in Table 5 The compound is a mixed gas composed of a combination of reaction gas and inert gas to form the raw material gas G, and the ratio of the inert gas is set to 80% or more of the total amount of the mixed gas. The processing pressure at this time is set to 100 to 500 m Torr. Table 5 Etching the BPSG layer to increase the selectivity ratio of Si3N4 Reaction gas (fluorocarbon-based gas) Inert gas C 4 F 8 He, Ar, Kr, Xe C 2 F 4 He, Ne, Ar The 4th circle represents the BPSG film 9 The etching proceeds to the middle, and the silicon nitride film 8 on the field insulating film 2 is exposed to the bottom of the opening 11. Figure 5 is the state when the etching of the BPSG film 9 is completed. In this embodiment, the The BPSG film 9 is etched when the selection ratio of the siliconized film 8 becomes maximum, so that the silicon nitride film 8 becomes a stopper film for etching, and even if sufficient over-etching is performed, the field insulating film 2 can be prevented from being etched. Figure 6 shows the state of removing the remaining silicon nitride film 8 by etching, thereby completing the connection hole 1 2 reaching the semiconductor field 5 of the MI SFET. This paper standard is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm ) _ _ One line · '-: (Please read the precautions on the back before filling in this page) A7 __B7 printed by the Industrial and Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economy V. Invention description (is) 〇Silicon nitride film 8 of Etching is performed using a microwave plasma etching apparatus 100 with the silicon nitride film 8 to the semiconductor layer 1 of the base layer having a maximum selection ratio. That is, the mixed gas composed of the combination of the fluorocarbon-based reaction gas and the inert gas shown in Table 6 constitutes the raw material gas G, and the ratio of the inert gas is set to 80% or more of the total amount of the mixed gas. The treatment pressure at this time is set to 100 to 500 m Torr. Table 6 Conditions for etching Si 3N4 layer in order to improve the selectivity to Si Reactive gas (fluorocarbon-based gas) Inert gas CH2F2 He, Ar, Kr, Xe As mentioned above, according to this embodiment, there will be no cutting field The insulating film 2 can form a part of the connection hole 12 that overlaps the field insulating film 2, so that the design rule is about 0.3em LSI. (Example 2) The seventh image is a schematic view of a plasma etching apparatus 200 used in this example. The plasma etching apparatus 200 has a structure in which an antenna 202 is provided around a quartz barrel 210, a high frequency is applied to the antenna 202, and electromagnetic waves are introduced into the cylinder 201. Set on the outside of the vacuum chamber 2 0 3 This paper scale adopts the Chinese National Standard (0 Yang) 84 specifications (210 '297 mm) _21_ (please read the precautions on the back before filling this page)

經濟部中央橾準局貝工消費合作杜印製 A7 B7 五、發明説明（l9 ) 置雙重線圈204，205 ’以便產生軸方向之磁場。從 氣體導入口 2 0 6導入之原料氣體G由該軸方向磁場及高 頻予以等離子體化，此時產生之中性離解種，離子種被輸 送至半導體基板1表面而進行蝕刻。 在上述實施例1中，蝕刻BPSG膜9時使用之罩幕 爲光阻圖型1 0 »然而，此時必須考慮光阻劑被蝕刻時產 生之生成物對選擇性產生之影響。亦即必須選擇由蝕刻而 產生之生成物不會產生非選擇性離解種之光阻材料或蝕刻 條件。 如第8圖所示，本實施例中在B P S G膜9上以 CVD法堆積膜厚5 0 0至2 0 0 0A左右之氮化矽膜 1 3 ，在該氮化矽膜1 3上形成光阻圖型1 0。該抗光圖 型1 0具有在MI SFET之一方之·半導體領域5上之開 孔1 1 ，而開孔1 1之一端重疊於鄰接半導體領域5之場 絕緣膜2。 然後，如第9圖所示，以光阻圖型1 0做爲罩幕，將 氮化矽膜13以一般之乾式蝕刻條件進行蝕刻。 然後’以灰化法去除光阻圖型1. 0後，以氮化矽膜 1 3做爲罩幕蝕刻BPSG膜9。蝕刻時，係以BPSG 膜9對氮化矽膜13(及氮化矽膜8)之選擇比成爲最大 之條件進行。亦即使用表7所示碳氟化合物系反應氣體與 惰性氣體之混合氣體，將惰性氣體之比率設定爲混合氣體 全量之8 0%以上，以處理壓力1 〇 〇至5 0 0m T 〇 r r進行蝕刻。 氏張尺度ii财酬家料（CNS ) A4«A ( 210X297公釐)~~ ~ -22 - ----------------.-IT------Λ . • * - (請先閱讀背面之注意事項再填寫本頁) 308717 A7 B7 五、發明説明（20 ) 表7 蝕刻BPSG層以便提高對S i3N4之選擇比之條 件 反應氣體 惰性氣體 F 8 He,Ar,Kr,Xe C2F4 He , Ne,Ar 經濟部中央標準局員工消费合作社印製 第1 0圖表示B P S G膜9之蝕刻進行至中途，場絕 緣膜2上之氮化矽膜8露出於開孔11底部時之狀態。 第1 1匾表示BPSG膜9之蝕刻終了時之狀態。因 爲B P S G膜9之蝕刻係在對氮化矽膜8之選擇比成爲最 大之條件下進行，故氮化矽膜8成爲蝕刻時之止動膜，即 使進行充分之過度蝕刻，仍可防止場絕緣膜2被刻削。 第1 2圖表示以蝕刻法去除殘餘之氮化矽膜8，1 3 ，藉此完成到達M I S F E T之半導體領域5之連接孔 1 2之狀態。 氮化矽膜8，1 3之蝕刻時係使用上述等離子體蝕刻 裝置2 0 0，而在氮化矽膜8，1 3對基層之半導體基板 1之選擇比成爲最大之條件下進行》亦即以由表8所示碳 氟化合物系反應氣體與惰性氣體之組合所構成之混合氣體 本紙張尺度逋用中國國家標隼（CNS ) A4*i格（2丨0X297公釐）~~ ---------/:------------^ , •. . (請先閲讀背面之注意事項再填寫本頁) 經濟部中央樣準局員Μ消費合作杜印製 A7 B7___ 五、發明説明（2υ 構成原料氣體G，將惰性氣體之比率設定爲混合氣體全置 之8 0%以上。將此時之處理壓力設定爲1 0 0至 500m Torr之範圍內。 表8 蝕刻Si3F4層以便提高對Si之選擇比之條 件 如上所述，依照不使用光阻劑做爲蝕刻B P S G膜9 時之罩幕之本實施例，可排除因光阻劑被蝕刻而產生之生 成物對選擇性所產生之影響，故可更提高蝕刻之選擇性。 (實施例3 ) 第1 3圚爲本實施例所使用之微波等離子體蝕刻裝置 300之概略圖。圖中，310爲微波導波管，302爲 磁石，303爲等離子體生成物。磁控管所產生之2. 4 5 GHZ之微波通過微波導波管3 0 1被導入等離子體生 成室3 0 3內。 在上述等離子體生成室3 0 3中形成通過氣體導入口 3 0 4導入之惰性氣體之等離子體。在該等離子體中存在 ----------------IT------^- {請先閲讀背面之注意ί項再填寫本頁) 反應氣體 惰性氣體 C Η 2 F 2 He,Ar,Kr,Xe 本紙張尺度逋用中國國家標準（CNS ) Α4规格（2丨0Χ297公釐）_ 24 - 經濟部中央標準局貝工消费合作社印製 A7 ____B7_ 五、發明説明（22 ) 有電子，離子，及準安定原子。 在上述等離子體生成室3 0 3與反應室3 0 5之分界 處設有許多柵極3 0 6。將柵極3 0 6之電位交替的切換 成正負，即可將等離子體中之電子，離子中，只將離子導 入反應室3 0 5內。惰性氣體之準安定原子不受電場之影 響，故以各向同：性的擴散而被導入反應室3 0 5內。 反應氣體經由氣體導入口 3 0 7導入上述反應室 3 0 5中，而由於與上述惰性氣體之準安定原子之相互作 用，生成一定之離解種。該離解種與上述惰性氣體之離子 被輸送至半導體基板1表面而進行蝕刻。 以下說明使用上述微波等離子體蝕刻裝置3 0 0之蝕 刻過程。該過程係爲了在鄰接之2個Μ I S F E T之閘極 間之矽基板上形成接觸而在絕緣膜上形成連接孔之過程。 例如閘極間之空間被細微化成0 . 2 5 4 m左右，而 形成連接孔時使用之光罩之解像度爲0. 3#m時，不可 能在該閘極間形成連接孔。 因此，本實施例中，首先如第1 4圖所示的依照常法 在半導體基板1主面上形成場絕緣膜2，然後，在由該場 絕緣膜2包圍之活性領域內形成由閘極3，閘極絕緣膜4 ，1對半導體領域（源極領域，吸極領域）5，6所構成 之MI SFET。此時，鄰接之閘極3間之空隙爲 0 . 2 5 左右。閘極3之上部及側壁由氧化矽膜7保 護。 然後，以CVD法在半導體基板1全面堆稹膜厚 本紙張尺度逋用中國國家標準（CNS )八4规格（210X297公釐）_ 25 _ ---------i -------ir------Sf - (請先閱讀背面之注意事項再填寫本頁) 經濟部中央橾準局貝工消費合作社印裝 A7 _B7_ 五、發明説明（23 ) 5 0 0至2 Ο Ο 0A左右之氮化矽膜1 5，再於其上以 CVD法堆積膜厚5000至10，000A左右之 B P S G 膜 1 6。 然後，如第15圖所示，在BPSG膜16上形成光 阻圚型1 7。該光阻圖型1 7具有開口於MI SFET之 一方之半導體領域6上方之開孔1 8。該開孔1 8之直徑 爲大於閘極3間之空隙（0. 25#m左右）之 0. 3 。亦即該開孔1 8之一部分重叠於閘極3。 然後，將半導體基板1搬入微波等離子體蝕刻裝置 3 0 0之反應室3 0 5內，以光阻圖型1 7做爲罩幕將 BPSG膜16予以乾式蝕刻。該蝕刻係在BPSG膜 1 6對基層之氮化矽膜1 5之選擇比成爲最大之條件下進 行。 亦即以由上述表7所示碳氟化合物系反應氣體與惰性 氣體之組合所構成之混合氣體形成原料氣體G，將惰性氣 體之比率設定爲混合氣體全量之8 0 %以上。將此時之處 理壓力設定爲100至500m Torr» 第1 6圖表示BPSG膜1 6之蝕刻進行至中途，而 氮化矽膜1 5露出於開孔1 8底部時之狀態。 第17圖爲BPSG膜16之蝕刻終了時之狀態。本 賁施例中，因爲係以對氮化矽膜1 5之選擇比成爲最大之 條件蝕刻BPSG膜1 6，故氮化矽膜1 5成爲蝕刻之止 動膜，結果，即使進行充分之過度蝕刻，仍可防止保護閘 極3之氧化矽膜7被刻削。 本紙張尺度適用中國國家標準（CNS ) A4规格（210X297公釐）_ 26 — (請先閲讀背面之注意事項再填寫本頁) ，-° f. ! A7 B7 經濟部中央揉準局貝工消费合作社印製 五、發明説明（24 ) 第1 8圖爲以蝕刻法去除殘餘之氮化矽膜1 5 ，藉此 完成到達MISFET之半導體領域6之連接孔19時之 狀態。氮化矽膜1 5之蝕刻時係使用微波等離子體蝕刻裝 置3 0 0，以氮化矽膜1 5對基層之半導體基板1之選擇 比成爲最大之條件進行。亦即以由表8所示碳氟化合物系 反應氣體與惰性氣體之組合所構成之混合氣體形成原料氣 體G，將惰性氣體之比率設定爲混合氣體全量之8 0%以 上。將此時之處理壓設定爲1 00至500m To r r 之範圍內。 如上所述，依照本資施例，不會刻削保護閘極3之氧 化矽膜7而可形成重叠於閘極3之連接孔1 9。因此可實 現閘極3間之空隙爲0. 25//m左右之LSI。 (實施例4 ) 在上述實施例3中，使用光阻圖型1 7做爲蝕刻 B P S G膜1 6時之罩幕。然而，此時爲了防止光阻劑被 蝕刻時產生之生成物產生非選擇性離解種，必須選擇適當 之光阻材料或蝕刻條件。 因此，本實施例中，如第1 9園所示，以CVD法在 B P S G膜1 6上堆積膜厚5 0 0至2 0 0 0A左右之氮 化矽膜2 0，而在該氮化矽膜2 0上形成光阻圖型1 7 ° 然後，如第2 0圖所示，以光阻圖型1 7做爲罩幕以 —般之乾式蝕刻條件蝕刻氮化矽膜2 0。 然後，以灰化法去除光阻圖型1 7後，以氮化矽膜 本紙張尺度適用中國國家揉準（CNS ) A4規格（210X297公釐）_ π _ ----------f- -------,玎^------線- {請先閲讀背面之注意事項再填寫本頁) A7 B7 經濟部中央標準局貝工消費合作杜印製 五 、發明説明 ( 25 ) 1 2 0 /r.f. 做 爲 罩 幕 將 B P S G 膜 1 6 予 以 乾 式 蝕 刻 〇 該 蝕 刻 時 I 9 係 使 用 微 波 等 離 子 體 蝕 刻 裝 置 3 0 0 » 在 B P S G 膜 1 1 6 對 氮 化 矽 膜 2 0 ( 及 氮 化 矽 膜 1 5 ) 之 選 擇 比 成 爲 最 1 I 合 物 請 1 1 大 之 條 件 進 行 0 亦 即 使 用 上 述 表 7 所 示 之 碳 氟 化 系 反 先 閱 1 I 應 氣 體 與 惰 性 氣 體 之 混 合 氣 體 > 將 惰 性 氣 體 之 比 率 設 定 爲 讀 背 δ 1 1 I 混 合 氣 體 全 量 之 8 0 % 以 上 釁 而 以 處 理 壓 力 1 0 0 至 之 注 意 1 I 5 0 0 m T 0 r r 進 行 蝕 刻 〇 事 項 1 再 I 第 2 1 圖 表 示 B P S G 膜 1 6 之 蝕 刻 進 行 至 中 途 * 而 填 寫 1 t 本 | 氮 化 矽 膜 1 5 露 出 於 開 孔 1 8 底 部 之 狀 態 0 頁 '—✓ 1 1 第 2 2 圖 表 示 B P S G 膜 1 6 之 蝕 刻 終 了 時 之 狀 態 〇 1 1 因 爲 B P S G 膜 1 6 之 蝕 刻 係 在 對 氮 化 矽 膜 1 5 之 選 擇 比 成 爲 最 大 之 條 件 進 行 故 氣 化 矽 膜 1 5 成 爲 蝕 刻 之 止 動 膜 訂 |· 1 即 使 進 行 過 度 之 蝕 刻 仍 可 防 止 保 護 閘 極 3 之 氧 化 矽 膜 1 1 | 7 被 刻 削 0 1 1 第 2 3 圖 爲 以 蝕 刻 法 去 除 殘 蝕 之 氮 化 矽 膜 1 5 2 0 1 1 1 而 完 成 到 達 Μ I S F E T 之 半 導 體 領 域 6 之 連 接 孔 1 9 森 1 時 之 狀 態 0 氮 化 矽 膜 1 5 之 蝕 刻 時 係 使 用 微 波 等 離 子 體 1 1 蝕 刻 裝 置 3 0 0 而 以 氮 化 矽 膜 1 5 對 基 層 之 半 導 體 基 板 1 1 1 之 選 擇 比 成 爲 最 大 之 條 件 進 行 〇 亦 即 以 由 表 8 所 示 碳 氟 1 I 化 合 物 系 反 應 氣 體 與 惰 性 氣 體 之 組 合 所 構 成 之 混 合 氣 體 形 1 1 成 原 料 氣 體 G t 將 惰 性 氣 體 之 比 率 設 定 爲 混 合 氣 體 全 量 之 1 1 8 0 % 以 上 〇 將 此 時 之 處 理 壓 力 設 定 爲 1 0 0 至 5 0 0 m 1 1 丁 0 Γ Γ 之 範 圍 內 〇 1 1 如 此 * 依 照 不 使 用 光 阻 劑 做 爲 蝕 刻 B P S G 膜 1 6 時 1 1 本紙張尺度適用中國國家標準（CNS ) A4规格（2丨0X297公釐）_ μ A7 B7 五、發明説明（26) 之罩幕之本實施例，可排除光阻劑被蝕刻而產生之生成物 對選擇性產生之影響，故可更提高蝕刻之選擇性。 以上說明本發明之具體實施例，但本發明不受上述實 施例之限制，可在不超越其要旨之範圍內變更實施。 本發明中使用之反應氣體與惰性氣體不受實施例1至 4中所述之組合之限制，亦可爲如表9所示之組合。 I J πΐτ功* — (請先閱讀背面之注意事項再填寫本頁) 經濟部中央揉準局員工消费合作社印製 表9依照選擇性離籠之性質之惰性氣體與麵氣體種挪合之頒 稀有氣體 只產生選擇性離_ 產生選擇脸保護 性之離讎 產生選擇脸比 選擇性之離讎 He C2F4, C‘Fs J· CHsFa 少量 多量 Ne c2f4 CH2F2 C4F8, CHFa Ar C2F4,C^Fs CHFa CF4 Kr C4F8 ch2f2 chf3 CF<t Xe C4F8 CH2F2 本紙張尺度逋用中國國家橾準（CNS ) Α4规格（210 X 297公釐） 經濟部中央橾準局貝工消費合作社印製 3QQ717 A7 _B7 _ 五、發明説明（27 ) 假設表9所示之反應氣體與惰性氣體爲 A :只產生選擇離解種之惰性氣體與反應氣體種之組 合之集合； B :產生選擇性與保護性之離解種之惰性氣體與反應 氣體種之組合之集合； C :產生選擇性與少量非選擇性離解種之惰性氣體與 反應氣體種之組合之集合： D :產生選擇性與多量非選擇性離解種之惰性氣體與 反應氣體種之組合之集合： E :根據等離子體離解之反應氣體種之集合，Printed by Duonggong Consortium of the Central Ministry of Economic Affairs of the Ministry of Economic Affairs A7 B7 V. Description of the invention (l9) The dual coils 204, 205 'are placed in order to generate an axial magnetic field. The raw material gas G introduced from the gas inlet 206 is plasmatized by the axial magnetic field and high frequency. At this time, neutral dissociation species are generated, and ion species are transported to the surface of the semiconductor substrate 1 for etching. In Embodiment 1 described above, the mask used when etching the BPSG film 9 is a photoresist pattern 10 »However, at this time, the influence of the product generated when the photoresist is etched on the selectivity must be considered. That is, it is necessary to select the photoresist material or etching conditions that will not produce non-selectively dissociated species by products produced by etching. As shown in FIG. 8, in this embodiment, a silicon nitride film 1 3 having a thickness of about 500 to 200 A is deposited on the BPSG film 9 by CVD, and light is formed on the silicon nitride film 13 Resistance pattern 10. The light-reflecting pattern 10 has an opening 1 1 in the semiconductor field 5 which is one of the MI SFETs, and one end of the opening 11 overlaps the field insulating film 2 adjacent to the semiconductor field 5. Then, as shown in FIG. 9, using the photoresist pattern 10 as a mask, the silicon nitride film 13 is etched under general dry etching conditions. Then, after removing the photoresist pattern 1.0 by ashing, the BPSG film 9 is etched using the silicon nitride film 13 as a mask. During the etching, the selection ratio of the BPSG film 9 to the silicon nitride film 13 (and the silicon nitride film 8) is maximized. That is, the mixed gas of the fluorocarbon-based reaction gas and the inert gas shown in Table 7 is used, the ratio of the inert gas is set to 80% or more of the total amount of the mixed gas, and the treatment pressure is 100 to 500 m T 〇rr Etch. Zhang's Standard ii Financial Remuneration (CNS) A4 «A (210X297mm) ~~~ -22-----------------.- IT ------ Λ. • *-(Please read the precautions on the back before filling in this page) 308717 A7 B7 5. Description of the invention (20) Table 7 Conditions for etching the BPSG layer in order to improve the selection ratio of Si3N4 Reaction gas inert gas F 8 He , Ar, Kr, Xe C2F4 He, Ne, Ar Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs. Figure 10 shows that the etching of the BPSG film 9 is in progress, and the silicon nitride film 8 on the field insulating film 2 is exposed to the open The state of the bottom of the hole 11. The first plaque indicates the state when the etching of the BPSG film 9 is finished. Because the etching of the BPSG film 9 is performed under the condition that the selection ratio to the silicon nitride film 8 becomes the maximum, the silicon nitride film 8 becomes a stopper film during etching, and even if sufficient over-etching is performed, field insulation can still be prevented The film 2 is cut. FIG. 12 shows the state where the remaining silicon nitride films 8, 1 3 are removed by etching, thereby completing the connection holes 12 that reach the semiconductor area 5 of MIS F E T. The silicon nitride film 8, 13 is etched by using the plasma etching apparatus 200 described above, and is performed under the condition that the selection ratio of the silicon nitride film 8, 13 to the base semiconductor substrate 1 becomes the maximum. The mixed gas composed of the combination of fluorocarbon-based reactive gas and inert gas shown in Table 8 is used in the paper standard China National Standard Falcon (CNS) A4 * i grid (2 丨 0X297mm) ~~ --- ------ /: ------------ ^, •... (Please read the precautions on the back before filling out this page). M-Consumer Cooperation Du Printed by the Central Sample Bureau of the Ministry of Economic Affairs A7 B7___ V. Description of the invention (2υ constitute the raw material gas G, and set the ratio of inert gas to 80% or more of the mixed gas. Set the processing pressure at this time to be within the range of 100 to 500m Torr. Table 8 The conditions for etching the Si3F4 layer in order to improve the selection ratio to Si are as described above. According to the present embodiment in which the photoresist is not used as the mask when etching the BPSG film 9, the products generated by the photoresist being etched can be excluded Due to the influence on the selectivity, the selectivity of the etching can be further improved. (Embodiment 3) The first to third parts are this embodiment A schematic view of the microwave plasma etching apparatus 300 used. In the figure, 310 is a microwave waveguide, 302 is a magnet, and 303 is a plasma product. The microwave generated by the magnetron 2. 4 5 GHZ passes through the microwave guide The tube 30 1 is introduced into the plasma generation chamber 3 0 3. A plasma of an inert gas introduced through the gas introduction port 30 4 is formed in the plasma generation chamber 30 3 above. This plasma exists --- ------------- IT ------ ^-(Please read the notes on the back before filling in this page) Reactive gas inert gas C Η 2 F 2 He, Ar, Kr , Xe This paper scale uses the Chinese National Standard (CNS) Α4 specification (2 丨 0Χ297mm) _ 24-Printed A7 ____B7_ by the Beigong Consumer Cooperative of the Central Standards Bureau of the Ministry of Economy V. Description of the invention (22) There are electrons, ions, And quasi-stable atoms. At the boundary between the plasma generating chamber 303 and the reaction chamber 305, a large number of grids 306 are provided. By alternately switching the potential of the grid 306 to positive and negative, only electrons and ions in the plasma can be led into the reaction chamber 305. Quasi-stabilized atoms of inert gas are not affected by the electric field, so they are introduced into the reaction chamber 305 by isotropic diffusion: The reaction gas is introduced into the reaction chamber 305 through the gas introduction port 307, and due to the interaction with the quasi-stabilized atoms of the inert gas, a certain dissociation species is generated. The ions of the dissociated species and the above-mentioned inert gas are transported to the surface of the semiconductor substrate 1 to be etched. The following describes the etching process using the above microwave plasma etching apparatus 300. This process is a process of forming a contact hole in the insulating film in order to form a contact on the silicon substrate between two adjacent gates of MIS F E T. For example, the space between the gates is refined to about 0.25 4 m, and when the resolution of the mask used when forming the connection hole is 0.3 #m, it is impossible to form a connection hole between the gates. Therefore, in this embodiment, the field insulating film 2 is first formed on the main surface of the semiconductor substrate 1 according to the conventional method as shown in FIG. 14, and then the gate electrode is formed in the active area surrounded by the field insulating film 2 3. Gate insulating film 4, a pair of MI SFETs composed of 5, 6 in the semiconductor field (source field, sink field). At this time, the gap between adjacent gates 3 is about 0.25. The upper part and the side wall of the gate electrode 3 are protected by a silicon oxide film 7. Then, the CVD method is used to pile up the film thickness on the semiconductor substrate 1 in full scale. This paper uses the Chinese National Standard (CNS) 84 specifications (210X297 mm) _ 25 _ --------- i ---- --- ir ------ Sf-(please read the precautions on the back before filling in this page) Printed A7 _B7_ by the Ponggong Consumer Cooperative of the Central Bureau of Economic Affairs of the Ministry of Economic Affairs 5. Description of the invention (23) 5 0 0 to 2 A silicon nitride film 15 of about Ο Ο 0A, and then a BPSG film 16 with a thickness of about 5000 to 10,000A is deposited on it by CVD. Then, as shown in FIG. 15, a photoresist type 17 is formed on the BPSG film 16. The photoresist pattern 17 has an opening 18 that opens above the semiconductor field 6 on the MI SFET side. The diameter of the opening 18 is greater than 0.3 of the gap between the gate electrodes 3 (about 0.25 # m). That is, a part of the opening 18 overlaps the gate electrode 3 partially. Then, the semiconductor substrate 1 is carried into the reaction chamber 305 of the microwave plasma etching apparatus 300, and the BPSG film 16 is dry-etched using the photoresist pattern 17 as a mask. This etching is performed under the condition that the selection ratio of the BPSG film 16 to the silicon nitride film 15 of the base layer becomes maximum. That is, the mixed gas composed of the combination of the fluorocarbon-based reactive gas and the inert gas shown in Table 7 above is used to form the raw material gas G, and the ratio of the inert gas is set to 80% or more of the total amount of the mixed gas. The processing pressure at this time is set to 100 to 500 m Torr »FIG. 16 shows the state when the etching of the BPSG film 16 is carried out halfway, and the silicon nitride film 15 is exposed at the bottom of the opening 18. FIG. 17 shows the state when the etching of the BPSG film 16 is ended. In this embodiment, the BPSG film 16 is etched under the condition that the selection ratio to the silicon nitride film 15 is maximized, so the silicon nitride film 15 becomes the stopper film for etching, and as a result, even if excessive Etching can still prevent the silicon oxide film 7 of the protective gate 3 from being etched. This paper scale is applicable to China National Standard (CNS) A4 specification (210X297mm) _ 26 — (please read the precautions on the back before filling this page),-° f.! Printed by the cooperative. 5. Description of the invention (24) Figure 18 shows the state when the residual silicon nitride film 15 is removed by etching, thereby completing the connection hole 19 in the semiconductor field 6 of the MISFET. The silicon nitride film 15 is etched using a microwave plasma etching apparatus 300 at a condition that the selection ratio of the silicon nitride film 15 to the semiconductor substrate 1 at the base layer is maximized. That is, the mixed gas composed of the combination of the fluorocarbon-based reaction gas and the inert gas shown in Table 8 forms the raw material gas G, and the ratio of the inert gas is set to 80% or more of the total amount of the mixed gas. The treatment pressure at this time is set in the range of 100 to 500 m Torr. As described above, according to this embodiment, the silicon oxide film 7 protecting the gate electrode 3 is not etched, and the connection hole 19 overlapping the gate electrode 3 can be formed. Therefore, an LSI having a gap between the gate electrodes 3 of about 0.25 // m can be realized. (Embodiment 4) In the above Embodiment 3, the photoresist pattern 17 is used as a mask when etching the B P S G film 16. However, at this time, in order to prevent non-selective dissociation of the products generated when the photoresist is etched, it is necessary to select appropriate photoresist materials or etching conditions. Therefore, in this embodiment, as shown in the 19th circle, a silicon nitride film 20 having a film thickness of about 500 to 200 A is deposited on the BPSG film 16 by the CVD method. A photoresist pattern 17 ° is formed on the film 20. Then, as shown in FIG. 20, the silicon nitride film 20 is etched using the photoresist pattern 17 as a mask under normal dry etching conditions. Then, after removing the photoresist pattern 17 by ashing method, the Chinese paper standard (CNS) A4 specification (210X297mm) is applied to the paper standard of silicon nitride film _ π _ --------- -f- -------, 玎 ^ ------ line- (please read the notes on the back before filling in this page) DESCRIPTION OF THE INVENTION (25) 1 2 0 / rf is used as a mask to dry-etch the BPSG film 1 6. During the etching, the I 9 system uses a microwave plasma etching device 3 0 0 »On the BPSG film 1 16 to the silicon nitride film 2 0 (and the silicon nitride film 1 5) selection ratio becomes the most 1 I compound, please 1 1 greater conditions 0. That is, use the fluorocarbon system shown in Table 7 above to read 1 I should be gas and inert Mixed gas of gas> Set the ratio of inert gas to read back δ 1 1 I 80% of the total amount of mixed gas and treat it with the treatment pressure of 1 0 0 to 1 I 5 0 0 m T 0 rr Item 1 Re I Page 2 1 Figure 1 shows the etching of the BPSG film 1 6 to midway * and fill in 1 t of this | silicon nitride film 1 5 state exposed at the bottom of the opening 1 8 Page 0 '-✓ 1 1 2 2 The figure shows the state at the end of the etching of the BPSG film 16. Since the etching of the BPSG film 16 is performed under the condition that the selection ratio of the silicon nitride film 15 is maximized, the vaporized silicon film 1 5 becomes the etching stop. Moving film order | · 1 Even if excessive etching is performed, the silicon oxide film 1 that protects the gate 3 can be prevented from being etched. 0 1 1 The second 2 3 The photo shows the etching away silicon nitride film 1 5 2 0 1 1 1 to complete the connection hole 1 9 sen 1 to the semiconductor area 6 of the MISFET 0 silicon nitride film 15 is etched using a microwave plasma 1 1 etching device 3 0 0 to nitride Silicon film 1 5 The conditions for the selection ratio of the base semiconductor substrate 1 1 1 to be maximized. That is, a mixed gas composed of a combination of a fluorocarbon 1 I compound reaction gas and an inert gas shown in Table 8 is formed as a raw material. Gas G t sets the ratio of inert gas to 1 1 8 0% or more of the total amount of mixed gas. Set the processing pressure at this time to 1 0 0 to 5 0 0 m 1 1 Ding 0 Γ Γ range 〇1 1 so * According to the use of photoresist as the etching BPSG film 1 6 1 1 This paper scale is applicable to the Chinese National Standard (CNS) A4 specifications (2 丨 0X297 mm) _ μ A7 B7 V. The cover of the invention (26) In this embodiment, the influence of the products produced by the photoresist etching on the selectivity can be eliminated, so the selectivity of etching can be further improved. The specific embodiments of the present invention have been described above, but the present invention is not limited to the above-mentioned embodiments, and can be modified and implemented within the scope not exceeding the gist thereof. The reaction gas and the inert gas used in the present invention are not limited by the combinations described in Examples 1 to 4, and may be combinations as shown in Table 9. IJ πΐτ 功 * — (Please read the precautions on the back before filling in this page) The Ministry of Economic Affairs Central Bureau of Accreditation Employee Consumer Cooperative printed a table 9 according to the selective release of inert gas and surface gas species rare The gas only produces selective ionization _ produces protective facets of selective facets. Selective facets produce less selective facets than selective facets. He C2F4, C'Fs J · CHsFa A little more Ne c2f4 CH2F2 C4F8, CHFa Ar C2F4, C ^ Fs CHFa CF4 Kr C4F8 ch2f2 chf3 CF &t; t Xe C4F8 CH2F2 The paper size is printed in China National Standard (CNS) Α4 specification (210 X 297 mm) 3QQ717 A7 _B7 _ Printed by Beicon Consumer Cooperative of Central Central Bureau of Economics (27) Assuming that the reaction gas and inert gas shown in Table 9 are A: only a combination of inert gas and reaction gas species that generate selective dissociation species is generated; B: inert gas and reaction that produce selective and protective dissociation species Set of combinations of gas species; C: Set of combinations of inert gas and reactive gas species that produce selective and small amounts of non-selective dissociation species: D: Generate selective and large quantities of non-selective dissociation species The combined set of the inert gas and the reaction gas species: E: collection of the reaction gas species of the plasma dissociation,

則本發明中使用之反應氣體與惰性氣體之組合中包含A之 要素及其組合，A與B之合併集合中包含A之要素之組合 ，A與B與C之合併集合中包含A之要素之組合，A與B 與D之合併集合中包含A之要素之要素之組合，A與B與 C與D之合併集合中包含A之要素之要素之組合，A與B 與C與D與E之合併集合中包含A之要素之要素之組合等 〇 本發明中，代表性之方法所產生之效果如下。 依照本發明，可精密的進行反應氣體之離解種之組成 控制，可實現高精密度，高選擇比之蝕刻，故可促進半導 體積體電路裝置之細微化，及髙度積體化。 圖式： 第1圓爲本發明之實施例1中所使用之微波等離子體 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐）_ _ ---------'------,訂------ ' (請先閲讀背面之注意事項再填寫本頁) 經濟部中央橾準局員工消费合作杜印製 A7 _B7 五、發明説明（28) 蝕刻裝置之概略圖； 第2圖爲本發明之實施例1之半導體積體電路裝置之 製造方法之半導體基板之要部斷面圖； 第3圖爲本發明之實施例1之半導體稹體電路裝置之 製造方法之半導體基板之要部斷面圖； 第4圖爲本發明之一實施例1之半導體積體電路裝置 之製造方法之半導體基板之要部斷面圖； 第5圖爲本發明之實施例1之半導體積體電路裝置之 製造方法之半導體基板之要部斷面圖； 第6圖爲本發明之實施例1之半導體積體電路裝置之 製造方法之半導體基板之要部斷面圖； 第7圖爲本發明之實施例2中使用之等離子體蝕刻裝 置之概略圖； 第8圖爲本發明之實施例2之半導體積體電路裝置之 製造方法之半導體基板之要部斷面圖； 第9圖爲本發明之實施例2之半導體積體電路裝置之 製造方法之半導體基板之要部斷面圓； 第1 0圖爲本發明之實施例2之半導體積體電路裝置 之製造方法之半導體基板之要部斷面圖； 第1 1圚爲本發明之實施例2之半導體稹體電路裝置 之製造方法之半導體基板之要部斷面園； 第1 2圓爲本發明之實施例2之半導體積體電路裝置 之製造方法之半導體基板之要部斷面圖； 第1 3圖爲本發明之實施例3中使用之微波等離子體 本紙張尺度逋用中國國家標準（CNS > A4规格（210X297公釐）_ 31 _ ----------------ir------< - (請先閲讀背面之注意Ϋ項再填寫本頁) 308717 A7 B7 經濟部中央標準局貝工消费合作社印«. 五 、發明説明 ( 29 ) 1 蝕 刻 裝 置 之 概 略 圖 > 1 1 第 1 4 圖 爲 本 發 明 之 實 施 例 3 之 半 導 體 積 體 電 路 裝 置 I 之 製 造 方 法 之 半 導 體 基 板 之 要 部 斷 面 圖 t 1 I 第 1 5 圖 爲 本 發 明 之 實 施 例 3 之 半 導 Hdh *aCj ΒΞ 積 體 電 路 裝 置 請 先 閲 1 I 之 製 造 方 法 之 半 導 體 基 板 之 要 部 斷 面 圖 t 讀 背 面 1 1 1 第 1 6 圖 爲 本 發 明 之 實 施 例 3 之 半 導 體 積 體 電 路 裝 置 之 注 1 | 意 I 之 製 造 方 法 之 半 導 體 基 板 之 要 部 斷 面 圚 事 項 1 I 再 1 I 第 1 7 圖 爲 本 發 明 之 實 施 例 3 之 半 導 體 積 體 電 路 裝 置 填 寫 本 1 之 製 造 方 法 之 半 導 體 基 板 之 要 部 斷 面 圖 : 頁 1 1 第 1 8 圖 爲 本 發 明 之 實 施 例 3 之 半 導 體 稹 體 電 路 裝 置 1 1 之 製 造 方 法 之 半 導 體 基 板 之 要 部 斷 面 圖 .1 第 1 9 圖 爲 本 發 明 之 實 施 例 4 之 半 導 體 積 體 電 路 裝 置 1 訂 之 製 造 方 法 之 半 等 體 基 板 之 要 部 斷 面 1 〇:1 圖 ; 1 1 第 2 0 rwt 圔 爲 本 發 明 之 誉 施 例 4 之 半 導 體 積 體 fuZ. 電 路 裝 置 1 1 之 製 造 方 法 之 半 導 體 基 板 之 要 部 斷 面 圖 1 1 第 2 1 圖 爲 本 發 明 之 實 施 例 4 之 半 導 體 積 體 119. 電 路 裝 置 1 之 製 造 方 法 之 半 導 體 基 板 之 要 部 me BT 面 圖 ; 1 I 第 2 2 圖 爲 本 發 明 之 實 施 例 4 之 半 導 體 積 體 電 路 裝 置 1 I 之 製 造 方 法 之 半 導 體 基 板 之 要 部 斷 面 圖 1 1 第 2 3 rwi 圚 爲 本 發 明 之 實 施 例 4 之 半 導 體 檟 體 電 路 裝 置 1 1 之 製 造 方 法 之 半 導 體 基 板 之 要 部 斷 面 圖 0 1 1 1 1 1 1 1 1 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐>_Then the combination of reactive gas and inert gas used in the present invention contains the elements of A and the combination thereof, the combined set of A and B contains the combination of A elements, and the combined set of A, B and C contains the elements of A Combination, the combination of elements that contain the elements of A in the combined set of A and B and D, the combination of elements that contain the elements of A in the combined set of A and B and C and D, the combination of A and B and C and D and E Combination of elements including elements of A in the merged set. In the present invention, the effects produced by the representative method are as follows. According to the present invention, the composition control of the dissociation species of the reaction gas can be precisely performed, and etching with high precision and high selectivity can be achieved, so that it is possible to promote the miniaturization of semiconductor volume circuit devices and the integration of high degrees of integration. Drawing: The first circle is the microwave plasma used in Example 1 of the present invention. The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297mm) _ _ ---------'- -----, order ------ '(Please read the precautions on the back before filling in this page) Employee's consumer cooperation of the Central Ministry of Economic Affairs of the Ministry of Economic Cooperation Du Printed A7 _B7 V. Invention description (28) Etching device FIG. 2 is a cross-sectional view of a main part of a semiconductor substrate of a method for manufacturing a semiconductor integrated circuit device according to Embodiment 1 of the present invention; FIG. 3 is a semiconductor wafer circuit device according to Embodiment 1 of the present invention The cross-sectional view of the main part of the semiconductor substrate of the manufacturing method; FIG. 4 is the cross-sectional view of the main part of the semiconductor substrate of the manufacturing method of the semiconductor integrated circuit device according to Embodiment 1 of the present invention; FIG. 5 is the implementation of the present invention Example 1 is a cross-sectional view of the main part of the semiconductor substrate of the manufacturing method of the semiconductor integrated circuit device; FIG. 6 is a cross-sectional view of the main part of the semiconductor substrate of the manufacturing method of the semiconductor integrated circuit device of embodiment 1 of the present invention; Figure 7 is the plasma etching used in Example 2 of the present invention Engraved schematic diagram of the device; FIG. 8 is a cross-sectional view of the main part of the semiconductor substrate of the manufacturing method of the semiconductor integrated circuit device of Embodiment 2 of the present invention; FIG. 9 is a semiconductor integrated circuit of Embodiment 2 of the present invention The main part of the semiconductor substrate of the manufacturing method of the device has a round cross-section; Figure 10 is a cross-sectional view of the main part of the semiconductor substrate of the manufacturing method of the semiconductor integrated circuit device according to Embodiment 2 of the present invention; The main part of the semiconductor substrate of the manufacturing method of the semiconductor device circuit of the second embodiment of the invention is the round section; the first circle 12 is the main part of the semiconductor substrate of the manufacturing method of the semiconductor integrated circuit device of the second embodiment of the invention Cross-sectional view; Figure 13 is the microwave plasma used in Example 3 of the present invention. The paper standard uses the Chinese National Standard (CNS> A4 specification (210X297mm) _ 31 _ ------- --------- ir ------ <-(Please read the note Ϋ on the back before filling in this page) 308717 A7 B7 Printed by Beigong Consumer Cooperatives, Central Bureau of Standards, Ministry of Economic Affairs «. V. DESCRIPTION OF THE INVENTION (29) 1 Schematic diagram of an etching apparatus & g t; 1 1 FIG. 1 4 is a cross-sectional view of the main part of the semiconductor substrate of the manufacturing method of the semiconductor integrated circuit device I according to Embodiment 3 of the present invention t 1 I FIG. 15 is a half of Embodiment 3 of the present invention For the Hdh * aCj ΒΞ integrated circuit device, please read the cross-sectional view of the main part of the semiconductor substrate of the manufacturing method of 1 I. The back side of the reading 1 1 1 1 16 is the semiconductor integrated circuit device of the third embodiment of the present invention. Note 1 | The main part of the semiconductor substrate of the manufacturing method of the Italian I cross section 1 I then 1 I Figure 1 7 is the semiconductor integrated circuit device of the embodiment 3 of the present invention filled in the semiconductor substrate of the manufacturing method of this 1 Sectional view of main parts: Page 1 1 Figure 18 is a method for manufacturing a semiconductor device circuit 1 1 according to Embodiment 3 of the present invention A cross-sectional view of the main part of the semiconductor substrate. 1 Figure 1 9 is a cross-sectional view of the main part of the semi-isoelectric substrate of the semiconductor integrated circuit device 1 according to the fourth embodiment of the present invention 1 〇: 1 Figure; 1 1 No. 2 0 rwt is the semiconductor integrated circuit fuZ of the well-known embodiment 4 of the present invention. The cross section of the main part of the semiconductor substrate of the manufacturing method of the circuit device 1 1 FIG. 1 1 FIG. 2 1 is the semiconductor of the embodiment 4 of the present invention Integrated body 119. The main part of the semiconductor substrate me BT surface view of the manufacturing method of the circuit device 1; FIG. 2 2 FIG. 2 is the requirements of the semiconductor substrate of the manufacturing method of the semiconductor integrated circuit device 1 I of the embodiment 4 of the present invention Sectional cross-sectional view 1 1 The second 2 3rd rwi is a cross-sectional view of the main part of the semiconductor substrate of the manufacturing method of the semiconductor body circuit device 1 1 of Embodiment 4 of the present invention 0 1 1 1 1 1 1 1 1 Paper size suitable Chinese National Standard (CNS) A4 size (210X297 mm > _

Claims (1)

六、申請專利範圍 附件1 : 第84102625號專利申請案 中文申請專利範園修正本 民國85年7月修正 1 .—種半導體積體電路裝置之製造方法，其特徴爲 :在以乾式蝕刻法蝕刻半導體基板之薄膜時，使在等離子 體中以準安定狀態激起之惰性氣體，及薄膜之乾式蝕刻時 需要之反應氣體互相作用而選擇性的形成之離解種。 2 .如申請專利範圍第1項之方法，其中將等離子體 乾式蝕刻裝置之等離子體生成室與反應室分離，阻止等離 子體中之電子被導入反應室內，藉此降低因與電子相撞而 解離之反應氣體之離解度。 3. —種半導體稹體電路裝置之製造方法，其特徵爲 :在以乾式蝕刻法蝕刻半導體基板上之氧化矽膜時，使在 等離子體中以準安定狀態激起之惰性氣體與碳氟化合物系 氣體互相作用而選擇性的形成所需之離解種。 經濟部中央標準局貝工消費合作社印袋 (請先閲讀背面之注意事項再填寫本頁) 4 .如申請專利範圍篇3項之方法，其中上述碳氟化 合物系氣體爲碳數量爲2或更多之鏈狀高碳氟化合物。 5.如申請專利範圍第3項之方法，其中上述碳氟化 合物系氣體爲碳數量2至6之範圍內之鏈狀高碳氟化合物 Ο · 6 .如申請專利範圍第3項之方法，其中上述碳氟化 合物系氣體爲碳數量3或更多之環狀高碳氟化合物。 7.如申請專利範圍第3 ，4 ，5或6項之方法，其 本紙張尺度適用中國國家標準（CNS > A4规格（210X297公釐） 經濟部中央標準局貝工消費合作社印製 A8 δδ C8 D8 六、申請專利範圍 中上述惰性氣體係由He ，Ne ，Ar ，Kr或Xe所形 成之群中選擇之一種或2種以上之稀有氣體。 8. 如申請專利範圍第3，4 ，5 ，6或7項之方法 ，其中形成對氮化矽之選擇比高之離解種。 9. 如申請專利範圍第3，4 ，5，6 ，7或8項之 方法，其中將上述惰性氣體之比率設定爲全氣體流量之 5 0%以上，將處理壓力設定爲1 0 Om To r r至 ITorr之範圍內。 1 0 .如申請專利範圍第3，4 ，5，6 ，7或8項 之方法，其中將上述惰性氣體之比率設定爲全氣體流量之 80%以上，將處理壓力設定爲1 00m Torr至 500m Torr之範園內。 1 1 .如申請專利範圍第3 ，4 ，5 ，6 ，7 ，8 ， 9或1 0項之方法，其中使用無機材料做爲乾式蝕刻之罩 幕。 1 2 .—種半導體稹體電路裝置之製造方法，其特徵 爲：在以乾式蝕刻法蝕刻半導體基板上之氮化矽膜時，使 在等離子髏中以準安定狀態激起之惰性氣體與碳氟化合物 系氣體互相作用而選擇性的形成所需之離解種。 1 3.如申請專利範圍第1 2項之方法，其中上述惰 性氣體係使用從He，Ar，Kr或Xe所形成之群中選 擇之一種或2種以上之稀有氣髓，上述碳氟化合物系氣體 係使用二氟甲烷，藉此形成對矽之選擇比高之離解種。 14.如申請專利範圍第12或14項之方法，其中 本紙張尺度適用中國國家標準（CNS > A4规格（210X297公釐） ^^1 n nn ^^^1 HI ϋ— mf ^ n an n ^ J . '，不 、ve (請先閲讀背面之注意事項再填寫本頁) A8 B8 C8 D8 經濟部中央標準局貝工消費合作社印策 -i-、 申請專利範丨 S 1 I 將 上 述 惰 性 氣 體 之 比 率 設 定 爲 全 氣 體 流 童 之 8 0 % 以 上 9 1 I 將 處 理 壓 力 設 定 爲 1 0 0 m T 0 r r 至 5 0 0 m 1 T 0 r r 之 範 園 0 —n 1 I 請 I 1 5 一 種 半 導 體 積 體 電 路 裝 置 之 製 造 方 法 ， 其 特 徴 先 閱 1 I 讀 1 I 爲 包 括 以 下 之 過 程 ( a ) 至 ( d ) > 背 面 1 1 ( a ) 在 半 導 體 基 板 主 面 上 形 成 L 0 C 0 S 構 造 之 場 意 1 事 1 絕 緣 膜 之 後 在 由 上 述 場 絕 緣 膜 包 圍 之 活 性 領 域 內 形 成 半 項 再 1 填 1 導 髏 元 件 之 過 程 » % 本 | ( b ) 在 上 述 半 導 體 基 板 全 面 甘 堆 積 第 1 絕 緣 膜 後 9 頁 1 1 I 在 上 述 第 1 絕 緣 膜 上 堆 稹 蝕 刻 速 率 與 上 述 第 1 絕 緣 膜 不 相 1 1 同 之 第 2 絕 緣 膜 之 過 程 1 ( C ) 使 在 等 離 子 體 中 以 準 安 定 狀 態 激 起 之 惰 性 氣 體 訂 與 碳 氟 化 合 物 系 氣 體 互 相 作 用 5 藉 此 選 擇 性 的 生 成 上 述 第 1 I 2 絕 緣 膜 收f 對 上 述 第 1 絕 緣 膜 之 選 擇 比 成 爲 所 需 數 値 之 離 解 1 I 種 以 該 離 解 種 蝕 刻 上 述 第 2 絕 緣 膜 之 過 程 * 及 1 1 ( d ) 使 在 等 離 子 體 中 以 準 安 定 狀 態 激 起 之 惰 性 氣 體 丨 .與 碳 氟 化 合 物 系 氣 體 互 相 作 用 ， 藉 此 選 擇 性 的 生 成 上 述 第 1 1 1 絕 緣 膜 對 上 述 半 導 體 基 板 之 選 擇 比 成 爲 所 需 數 値 之 離 解 1 1 種 9 以 該 離 解 種 蝕 刻 上 述 第 1 絕 緣 膜 而 形 成 連 接 於 上 述 半 I 導 體 元 件 ， 而 且 —- 部 分 重 叠 於 上 述 場 絕 緣 膜 之 接 觸 孔 之 過 I 程 Ο 1 1 | 1 6 如 丰 請 專 利 範 園 第 1 5 項 之 方 法 ， 其 中 以 形 成 1 1 1 於 上 述 第 2 絕 W 膜 上 之 m 機 材 料 做 爲 罩 -jf :τττ: 9 蝕 刻 上 述 第 2 1 1 絕 m 膜 0 1 1 本紙張尺度適用中國國家標準（CNS ) M说格（210X297公釐〉 經濟部中夾揲準局負工消费合作社印製 A8 B8 C8 D8 々、申請專利範圍 1 7.如申請專利範圍第1 5或1 6項之方法，其中 上述接觸孔之直徑爲0. 3#m或小於0. 3^m。 1 8.如申請專利範圍第1 5 ，1 6或1 7項之方法 ，其中以與上述第1絕緣膜相同之材料形成由上述無機材 料所形成之罩幕。 1 9 . 一種半導髏稹體電路裝置之製造方法，其特徵 爲包括如下（a)至（d)之過程， (a )在半導體基板主面上形成MI SFET之過程 » (b )在上述半導體基板全面上堆積第1絕緣膜後， 在上述第1絕緣膜上堆積蝕刻速率與上述第1絕緣膜不同 之第2絕緣膜之過程： (c )使在等離子體中以準安定狀態激起之惰性氣體 ，與碳氟化合物系氣體互相作用，藉此選擇性的生成上述 第2絕緣膜對上述第1絕緣膜之選擇比成爲所需數値之離 解種，以該離解種蝕刻上述第2絕緣膜之過程；及 (d )使在等離子體中以準安定狀態激起之惰性氣體 與碳氟化合物系氣體互相作用，藉此選擇性的生成上述第 1絕緣膜對上述半導體基板之選擇比成爲所需數値之離解 種，以該離解種蝕刻上述第1絕緣膜，藉此形成連接於上 述Μ I S F ET之閘極與其鄰接之Μ I S F Ε·Τ之閘極間 之半導體基板，而且一部分重叠於上述閘極之接觸孔之過 程。 2 0 .如申請專利範園第1 9項之方法，其中以形成 本紙張尺度逋用中國國家梯準（CNS ) A4規格（210X297公釐） ^^1 nn ^^^1 nn m· In HI HI IX . 私 In In ^^^1 (請先鬩讀背面之注意事項再填寫本頁) 經濟部中央揉準局負工消费合作社印製 A8 B8 C8 D8 七、申請專利範圍 於上述第2絕緣膜上之無機材料做爲罩幕蝕刻上述第2絕 緣膜。 21.如申請專利範圍第19項之方法，其中上述 MI SFET之閘極與其鄰接之MI SFET之閘極間之 空隙爲0. 2 5"m或0. 2 5#m以下。 2 2 .如申請專利範圍第1 9 ，2 0或2 1項之方法 ，其中以與上述第1絕緣膜相同之材料形成由上述無機材 料製成之軍幕。 2 3 . —種半導體積體電路裝置之製造方法，其特徵 爲包括： (a )在眞空氣相反應室內導入在其中一方之主面上 之幾乎全面上形成有氧化矽膜之被處理半導體晶圚之過程 (b )在上述眞空氣相反應室內，於至少主鏈之碳數 量爲2或2以上之環狀碳氟化合物系反應氣體與具有產生 特定之激起種或離解種之作用之添加惰氣體之存在下，以 等離子體乾式蝕刻法選擇性的去除上述被處理半導體晶園 之上述一方的主面上之上述氧化矽膜而進行圖型化之過程 0 2 4 .如申請專利範圍第2 3項之方法，其中上述等 離子體乾式蝕刻係在上述一方之主面上之上述_氧化矽膜上 未形成有主要由有機物所構成之薄膜之狀態下進行。 2 5.如申請專利範園第2 3項之方法，其中在上述 氧化矽膜下方形成有與其接觸而較其更薄之氮化矽膜。 本紙張尺度適用中國國家橾準（CNS ) A4规格（210X297公釐） (請先閱讀背面之注意事項再填寫本頁) 1訂 經濟部中央標準局貝工消費合作社印褽 A8 B8 C8 D8 ^、申請專利範圍 2 6 .如申請專利範圍第2 4項之方法，其中在上述 氧化矽膜下方形成有與其接觸而較其更薄之氮化矽薄膜。 (請先閱讀背面之注意事項再填寫本頁) ’衣. - ，1T 本紙張尺度逋用中國國家標準（CNS ) Α4规格（210Χ297公釐）Sixth, the scope of the patent application Annex 1: The Chinese Patent Application No. 84102625, the application for patent Fan Garden Amendment July, 1985, Amendment 1.-A method of manufacturing a semiconductor integrated circuit device, its special features are: etching by dry etching When forming a thin film on a semiconductor substrate, an inert gas excited in a quasi-steady state in plasma and a reactive gas required for dry etching of the thin film interact to form a dissociative species selectively. 2. The method as claimed in item 1 of the patent scope, wherein the plasma generating chamber of the plasma dry etching device is separated from the reaction chamber to prevent electrons in the plasma from being introduced into the reaction chamber, thereby reducing dissociation due to collision with electrons The degree of dissociation of the reaction gas. 3. A method for manufacturing a semiconductor device circuit, characterized in that when the silicon oxide film on a semiconductor substrate is etched by dry etching, an inert gas and a fluorocarbon excited in a quasi-steady state in plasma The gas interacts to form the desired dissociative species selectively. Printed bags of Beigong Consumer Cooperatives, Central Bureau of Standards, Ministry of Economic Affairs (please read the precautions on the back before filling in this page) 4. For the method of applying for item 3 of the patent scope, where the above-mentioned fluorocarbon gas is 2 or more carbon Many chain high fluorocarbon compounds. 5. The method as claimed in item 3 of the patent scope, wherein the fluorocarbon-based gas is a chain-shaped high-carbon fluorocarbon in the range of 2 to 6 carbons. 6. The method as claimed in item 3 of the patent scope, wherein The above-mentioned fluorocarbon-based gas is a cyclic high fluorocarbon compound having a carbon number of 3 or more. 7. If the method of applying for patent scope items 3, 4, 5 or 6 is adopted, the original paper scale is applicable to the Chinese National Standard (CNS > A4 specification (210X297 mm) A8 δδ printed by the Beigong Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs C8 D8 VI. One or more rare gases selected from the group formed by He, Ne, Ar, Kr or Xe in the above-mentioned inert gas system in the scope of patent application. 8. If the scope of patent application is No. 3, 4, 5 The method of item 6 or 7, which forms a dissociative species with a high selectivity to silicon nitride. 9. The method of item 3, 4, 5, 6, 7 or 8 of the patent application scope, wherein the above inert gas is used The ratio is set to more than 50% of the total gas flow rate, and the processing pressure is set to be within the range of 10 Om To rr to ITorr. 1 0. If the method of applying for patents is 3, 4, 5, 6, 7 or 8 , Where the ratio of the above inert gas is set to more than 80% of the total gas flow rate, and the processing pressure is set within the range of 100m Torr to 500m Torr. 1 1. If the scope of patent application is No. 3, 4, 5, 6, The method of 7, 8, 9, or 10, which uses inorganic materials It is used as a mask for dry etching. 1 2. A method for manufacturing a semiconductor device circuit, which is characterized in that when the silicon nitride film on a semiconductor substrate is etched by dry etching, it is quasi-stable in the plasma The state-invigorated inert gas interacts with the fluorocarbon-based gas to selectively form the desired dissociation species. 1 3. The method as described in item 12 of the patent application, wherein the above-mentioned inert gas system uses He, Ar, One or more rare gas marrows selected from the group formed by Kr or Xe. The above fluorocarbon gas system uses difluoromethane to form a dissociated species with a high selection ratio to silicon. 14. If applying for a patent The method of item 12 or 14 of the scope, in which the paper size is in accordance with Chinese National Standard (CNS > A4 specification (210X297 mm) ^^ 1 n nn ^^^ 1 HI ϋ— mf ^ n an n ^ J. ', No, ve (please read the precautions on the back before filling in this page) A8 B8 C8 D8 Central Bureau of Economic Affairs Beigong Consumer Cooperatives Co., Ltd.-I-, Patent Application Model S 1 I Set the above inert gas ratio 80% or more of the full gas flow rate 9 1 I Set the processing pressure to a range of 1 0 0 m T 0 rr to 5 0 0 m 1 T 0 rr 0-n 1 I Please I 1 5 A semiconductor integrated body The manufacturing method of the circuit device, its first reading 1 I reading 1 I includes the following processes (a) to (d) > back side 1 1 (a) The field where the L 0 C 0 S structure is formed on the main surface of the semiconductor substrate Intention 1 Event 1 After the insulating film, a half-term is formed in the active field surrounded by the above field insulating film, and then 1 is filled in. The process of the skull element »% This | (b) After the first insulating film is deposited on the entire semiconductor substrate 9 Page 1 1 I The stacking etching rate on the above first insulating film is not the same as the above first insulating film 1 1 The second insulating film process 1 (C) that makes the plasma The inert gas excited in the quasi-stable state in the daughter body interacts with the fluorocarbon-based gas 5 to thereby selectively generate the first I 2 insulating film and the selection ratio to the first insulating film becomes the required number Value dissociation 1 I process of etching the above second insulating film with the dissociation species * and 1 1 (d) Inert gas excited in a quasi-stable state in the plasma 丨. Interaction with fluorocarbon-based gas, By this, the selectivity of the first 1 1 1 insulating film to the semiconductor substrate is selectively generated to be the desired number of dissociations 1 1 9 9 The first insulating film is etched with the dissociated species to form the semi-I conductor element connected , And — the process of partially overlapping the contact hole of the above field insulating film Ο 1 1 | 1 6 1 1 1 The machine material on the second W film is used as a cover-jf: τττ: 9 Etching the above 2 1 1 M film 0 1 1 This paper scale is applicable to the Chinese National Standard (CNS) M said grid ( 210X297mm> A8 B8 C8 D8 printed by the Negative Bureau of the Ministry of Economic Affairs of the Ministry of Economic Affairs and Consumer Cooperatives 々, patent application scope 1 7. If the method of applying for patent scope item 15 or 16, the diameter of the contact hole is 0.3 # m or less than 0.3 ^ m. 1 8. The method as claimed in item 15, 16 or 17 of the patent application, wherein the mask formed of the above-mentioned inorganic material is formed of the same material as the above-mentioned first insulating film. 1 9. A method for manufacturing a semiconducting husk body circuit device, which is characterized by the following processes (a) to (d), (a) the process of forming a MI SFET on the main surface of a semiconductor substrate »(b) in the above After depositing the first insulating film on the entire surface of the semiconductor substrate, the process of depositing a second insulating film on the first insulating film with an etching rate different from that of the first insulating film: (c) Stimulate the plasma in a quasi-stable state The inert gas interacts with the fluorocarbon-based gas to selectively generate a dissociative species in which the selection ratio of the second insulating film to the first insulating film becomes a desired number, and the second species is etched with the dissociated species The process of the insulating film; and (d) the inert gas excited in the quasi-stabilized state in the plasma interacts with the fluorocarbon-based gas, thereby selectively generating the selection ratio of the first insulating film to the semiconductor substrate It becomes a desired number of dissociation species, and the first insulating film is etched with the dissociation species, thereby forming a semiconductor substrate connected between the gate of the above-mentioned M ISF ET and the gate of the adjacent M ISF Ε · Τ, and a unit The process of overlapping the contact hole of the gate. 2 0. For example, the method of applying for item 19 of the Patent Fan Garden, which uses the Chinese National Standard (CNS) A4 specification (210X297 mm) to form the paper scale ^^ 1 nn ^^^ 1 nn m · In HI HI IX. Private In In ^^^ 1 (please read the precautions on the back before filling in this page) A8 B8 C8 D8 printed by the Ministry of Economic Affairs, Central Bureau of Accreditation and Consumer Cooperative VII. The scope of patent application is in the second insulation above The inorganic material on the film is used as a mask to etch the second insulating film. 21. The method of claim 19, wherein the gap between the gate of the MI SFET and the gate of the adjacent MI SFET is 0.2 5 " m or 0.2 5 # m or less. 2 2. The method as claimed in item 19, 20 or 21 of the patent application scope, in which a military curtain made of the above-mentioned inorganic materials is formed with the same material as the above-mentioned first insulating film. 2 3. A method for manufacturing a semiconductor integrated circuit device, which is characterized by including: (a) Introduced into the air-phase reaction chamber a processed semiconductor crystal with a silicon oxide film formed on almost the entire main surface of one of them Process (b) In the above-mentioned air-phase reaction chamber, the addition of a cyclic fluorocarbon-based reaction gas with at least the main chain carbon number of 2 or more and a function of generating a specific stimulating species or dissociating species In the presence of inert gas, the process of patterning the silicon oxide film on the main surface of the one side of the semiconductor wafer to be selectively removed by the plasma dry etching method 0 2 4 The method of item 23, wherein the plasma dry etching is performed in a state where a thin film mainly composed of an organic substance is not formed on the silicon oxide film on the main surface of the one side. 2 5. The method as claimed in item 23 of the patent application park, in which a thinner silicon nitride film is formed below the silicon oxide film in contact with it. This paper scale is applicable to China National Standard (CNS) A4 (210X297mm) (please read the notes on the back before filling in this page) 1 Ordered by the Ministry of Economic Affairs Central Standards Bureau Beigong Consumer Cooperative Printed A8 B8 C8 D8 ^, Patent application scope 26. The method as described in item 24 of the patent application scope, in which a silicon nitride film thinner than the silicon oxide film in contact therewith is formed. (Please read the precautions on the back before filling in this page) ’Clothes.-, 1T This paper uses the Chinese National Standard (CNS) Α4 specification (210Χ297mm)
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