TW308714B - - Google Patents
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- TW308714B TW308714B TW085114063A TW85114063A TW308714B TW 308714 B TW308714 B TW 308714B TW 085114063 A TW085114063 A TW 085114063A TW 85114063 A TW85114063 A TW 85114063A TW 308714 B TW308714 B TW 308714B
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- glass film
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- 238000000034 method Methods 0.000 claims description 31
- 239000005380 borophosphosilicate glass Substances 0.000 claims description 29
- 238000010438 heat treatment Methods 0.000 claims description 15
- 239000013078 crystal Substances 0.000 claims description 14
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 13
- 229910052796 boron Inorganic materials 0.000 claims description 13
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 10
- 239000007789 gas Substances 0.000 claims description 10
- 229910052698 phosphorus Inorganic materials 0.000 claims description 10
- 239000011574 phosphorus Substances 0.000 claims description 10
- 239000005368 silicate glass Substances 0.000 claims description 6
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims description 5
- 230000001681 protective effect Effects 0.000 claims description 4
- 239000012299 nitrogen atmosphere Substances 0.000 claims description 3
- 239000011521 glass Substances 0.000 claims description 2
- PCTMTFRHKVHKIS-BMFZQQSSSA-N (1s,3r,4e,6e,8e,10e,12e,14e,16e,18s,19r,20r,21s,25r,27r,30r,31r,33s,35r,37s,38r)-3-[(2r,3s,4s,5s,6r)-4-amino-3,5-dihydroxy-6-methyloxan-2-yl]oxy-19,25,27,30,31,33,35,37-octahydroxy-18,20,21-trimethyl-23-oxo-22,39-dioxabicyclo[33.3.1]nonatriaconta-4,6,8,10 Chemical compound C1C=C2C[C@@H](OS(O)(=O)=O)CC[C@]2(C)[C@@H]2[C@@H]1[C@@H]1CC[C@H]([C@H](C)CCCC(C)C)[C@@]1(C)CC2.O[C@H]1[C@@H](N)[C@H](O)[C@@H](C)O[C@H]1O[C@H]1/C=C/C=C/C=C/C=C/C=C/C=C/C=C/[C@H](C)[C@@H](O)[C@@H](C)[C@H](C)OC(=O)C[C@H](O)C[C@H](O)CC[C@@H](O)[C@H](O)C[C@H](O)C[C@](O)(C[C@H](O)[C@H]2C(O)=O)O[C@H]2C1 PCTMTFRHKVHKIS-BMFZQQSSSA-N 0.000 claims 1
- 239000012298 atmosphere Substances 0.000 claims 1
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
- 235000012431 wafers Nutrition 0.000 description 18
- 239000012535 impurity Substances 0.000 description 8
- 238000000151 deposition Methods 0.000 description 6
- 230000008021 deposition Effects 0.000 description 6
- 230000007547 defect Effects 0.000 description 4
- 239000004020 conductor Substances 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000008267 milk Substances 0.000 description 2
- 210000004080 milk Anatomy 0.000 description 2
- 235000013336 milk Nutrition 0.000 description 2
- 229910052778 Plutonium Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- OYEHPCDNVJXUIW-UHFFFAOYSA-N plutonium atom Chemical compound [Pu] OYEHPCDNVJXUIW-UHFFFAOYSA-N 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31051—Planarisation of the insulating layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/02129—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Formation Of Insulating Films (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
經濟部中央標準局員工消費合作社印$L ------— _______B7_____ 五、發明説明(1 ) 發明背景 發明範固 —般言之,本發明係關於一方法,用以將一晶圓之表面 平坦化’更特定言之,係關於一方法’用以於一晶圓之表 面上形成硼磷矽酸鹽破璃(本文後稱爲BPSG)膜,藉以避免 晶體缺陷產生^ 先前技藝描述 當半導體裝置集積度越高,即需要形成多層導電膜以確 保更廣寬之主動區,因此造成製程步驟之增加。所以,即 需要如將晶圓表面平坦化之一般後續工作=典型而言,此 類型之平坦化製程多以BPSG膜進行之。 爲了能對本發明之背景有更進一步之了解,本文將先描 述形成一BPSG膜之習知方法。 首先’以電漿輔助化學氣相沈積(本文後稱爲PECVD)製 程或氣壓化學氣相沈積(本文後稱爲APCVD)製程於一晶圓 上形成一 BPSG膜,同時維持一高濃度之硼及磷。 然後,將沈積著BPSG膜之晶圓置入一加熱至大約攝氏 t 8〇〇度之擴散爐内。在將擴散爐之溫度昇高至大約攝氏850 至900度之後,於氮氣氣氛内進行一氣流熱處理將BPSG膜 平坦化3 在表面平坦化完成之後,將爐子冷卻至大約攝氏65 0至 800度,並將晶圓自爐内取出。 然而’當以上述習知方式進行此種氣流將B P S G膜平坦化 時,使其過摻雜以改善氣流之硼及磷不純物極易自BPSG膜 本紙乐尺度適用中國國家橾牟(CNS ) A4規格(BOX 297公釐) ---------^------1T------^ (請先閱讀背面•之注意事項再填寫本頁) ^08714 at __ B7 經濟部中央棣準局員工消費合作社印製 五、發明説明(2) 表面向外擴散,因此在氣流過程中,不純物之濃度將會超 過BPSG膜表面飽和濃度。若將此狀態之晶圓自高溫壚中取 出而置於室溫中,此過飽和之不純物將因遽降之溫度及大 乳中之濕乳而於晶圊表面上沈積,形成晶禮狀。這些沈積 在表面之晶體缺陷將使導體間之絕緣特性劣化,而造成困 擾0 發明概述 因此,本發明之一個目的係克服先前技藝中所遭遇到之 上述困擾’並提供一種將BPSG膜平坦化之方法,對於半導 體裝置之製造相當有用。 本發明之另一個目的係提供一種將BPS G膜平坦化之方法 ,此法可避免在高不純度密度B P S G膜之平坦化氣流製程中 於BPSG膜之表面上沈積形成晶體。 奠基於發明者之密集及澈底之研究,上述目的皆可經由 提供一用以將一晶圓表面平坦化之方法而達成,此方法包 含以下步樣:於該晶圓表面形成一具高濃度棚及鱗之棚_ 矽酸鹽玻璃膜;於一維持於一低溫及低壓之反應爐内對已 形成领續:碎酸鹽玻璃膜之晶圓進行熱處理,以降低蝴鱗妙 酸鹽玻璃膜之表面内硼及鱗之濃度;藉由於高溫下之熱處 理將硼磷矽酸鹽玻璃膜平坦化;藉將預定氣體導入反應遽 内,以於硼磷矽酸鹽玻璃膜上形成一薄保護氧化物膜;以 及於一低溫下對該硼磷矽酸鹽玻璃膜進行熱處理。 發明詳述 當根據本發明使晶圓平坦化用之BpS G膜經過氣流製程時 ---------^------.訂------i ί' - (請先閱讀背&之注意事項再填寫本頁) 本紙乐尺度適用中国國家標孪(CNS ) A4規格(210X297公釐) 經濟部中央標準局員工消f合作社印製 A7 ________B7_ 五、發明説明(3 ) ’可藉由使用低氣壓化學氣相沈積(本文後稱爲LPCVD)設 備之三步驟熱處理,避免晶體缺陷之發生。 詳細言之,首先係於一 PECVD或一 APCVD製程中將 BPSG膜沈積於一晶圓上,其硼及磷之濃度係維持得夠高以 改善平坦化》典型而言,硼之濃度應爲4.5至5.5重量百分 比’且磷之濃度應爲4.2至5.0重量百分比。 由於經過摻雜以改善平坦化之不純物,如硼及磷等,極 易自BPSG膜之表面向外擴散,因此不純物之濃度亦非常易 於超過BPSG膜表面之飽和濃度。如先前已提過,當晶圓自 高溫擴散爐中取出而至室溫時,已過飽和之不純物將因遽 降之溫度及空氣中之濕氣而於BPSG膜之表面沈積成晶體3 爲了避免晶體之沈積,先將遮蓋著BPSG膜之晶圓放置於一 維持在攝氏650至750度之LPCVD設備内,並根據本發明 之第一個熱處理步驟於相同溫度、10至100毫托耳之壓力下 進行熱處理40至100分鐘。 此時,BPSG膜表面内之硼及磷係向外擴散中,因此 BPSG膜表面内之不純物濃度正降低中。這將導致於進行平 坦化之氣流製程時,可避免不純物之濃度較B p s G膜表面内 之飽和度高》自BPSG膜表面擴散而出之硼及磷將直接自壚 内抽氣而出3 根據第二個熱處理步驟,係將爐子加熱至攝氏85〇至9〇〇 度’然後將生成之晶圓於氮氣氣氛中進行大約15至45分鐘 之熱處理,以使BPSG膜通過氣流進行平坦化3 最後’當表面平坦化一結束之後,即導入N 2 〇氣體及 -6 - 本紙張尺度適用中國國家標準(CNS ) A4規格(210X 297公釐、' -- 裝 訂 線 (請先閱讀背面之注意事項再填寫本頁) 經濟部中央糅準局員工消費合作社印製 A7 ---—______ B7 五、發明説明(4 )Printed by the Consumers ’Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs $ L ---------- ________B7_____ V. Description of the invention (1) Background of the invention Fan Gu—Generally speaking, the present invention relates to a method for converting a wafer Surface planarization 'more specifically, relates to a method' for forming a borophosphosilicate broken glass (hereafter referred to as BPSG) film on the surface of a wafer to avoid crystal defects ^ The higher the degree of integration of the semiconductor device, it is necessary to form a multi-layer conductive film to ensure a wider and wider active area, thus causing an increase in process steps. Therefore, the general follow-up work required to planarize the wafer surface = typically, this type of planarization process is mostly performed with BPSG film. In order to gain a better understanding of the background of the present invention, this article will first describe a conventional method of forming a BPSG film. Firstly, a plasma-assisted chemical vapor deposition (hereinafter referred to as PECVD) process or a gas pressure chemical vapor deposition (hereinafter referred to as APCVD) process is used to form a BPSG film on a wafer while maintaining a high concentration of boron and phosphorus. Then, the wafer on which the BPSG film is deposited is placed in a diffusion furnace heated to about t 800 degrees Celsius. After raising the temperature of the diffusion furnace to about 850 to 900 degrees Celsius, perform a gas flow heat treatment in a nitrogen atmosphere to flatten the BPSG film 3 After the surface flattening is completed, cool the furnace to about 65 to 800 degrees Celsius, And take the wafer out of the furnace. However, when the BPSG film is planarized by the above-mentioned conventional method, the boron and phosphorus impurities that are over-doped to improve the air flow are very easy to use from the BPSG film. The paper music standard is applicable to the Chinese National Mouth (CNS) A4 specification (BOX 297mm) --------- ^ ------ 1T ------ ^ (please read the notes on the back first and then fill out this page) ^ 08714 at __ B7 Economy Printed by the Employee Consumer Cooperative of the Central Bureau of Precision Industry. 5. Description of the invention (2) The surface diffuses outwards. Therefore, during the air flow, the concentration of impurities will exceed the saturation concentration of the BPSG membrane surface. If the wafer in this state is taken from the high temperature and placed at room temperature, the supersaturated impurities will be deposited on the surface of the crystal due to the drop in temperature and the wet milk in the milk, forming a crystal form. These crystal defects deposited on the surface will deteriorate the insulation properties between the conductors and cause troubles. SUMMARY OF THE INVENTION Therefore, an object of the present invention is to overcome the aforementioned troubles encountered in the prior art and provide a method for planarizing the BPSG film The method is very useful for the manufacture of semiconductor devices. Another object of the present invention is to provide a method for planarizing a BPS G film. This method can avoid the formation of crystals on the surface of the BPSG film during the planarization airflow process of the high-purity density B P S G film. Based on the intensive and thorough research of the inventors, the above objectives can all be achieved by providing a method for planarizing a wafer surface. This method includes the following steps: forming a high concentration shed on the wafer surface And scales shed _ silicate glass film; heat treatment of wafers with formed silicate glass film in a reaction furnace maintained at a low temperature and low pressure to reduce the silicate glass film The concentration of boron and scales on the surface; the borophosphosilicate glass film is flattened by heat treatment at high temperature; by introducing a predetermined gas into the reaction, a thin protective oxide is formed on the borophosphosilicate glass film Film; and heat treating the borophosphosilicate glass film at a low temperature. DETAILED DESCRIPTION OF THE INVENTION When the BpS G film for flattening a wafer according to the present invention undergoes an airflow process --------- ^ ------. Subscribe ------ i ί '-( Please read the back & precautions before filling out this page) This paper music standard is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm). The A7 printed by the employees ’cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs ________B7_ V. Description of invention ( 3) 'Through the three-step heat treatment of low-pressure chemical vapor deposition (hereinafter referred to as LPCVD) equipment, the occurrence of crystal defects can be avoided. In detail, first, the BPSG film is deposited on a wafer in a PECVD or an APCVD process, and the concentration of boron and phosphorus is maintained high enough to improve planarization. Typically, the concentration of boron should be 4.5 To 5.5% by weight and the concentration of phosphorus should be 4.2 to 5.0% by weight. Impurities, such as boron and phosphorus, which are doped to improve planarization, easily diffuse out from the surface of the BPSG film, so the concentration of impurities is also very easy to exceed the saturation concentration of the BPSG film surface. As mentioned earlier, when the wafer is taken out from the high temperature diffusion furnace to room temperature, the supersaturated impurities will be deposited as crystals on the surface of the BPSG film due to the drop in temperature and the moisture in the air. 3 To avoid crystals For the deposition, the wafer covered with the BPSG film is first placed in an LPCVD apparatus maintained at 650 to 750 degrees Celsius, and under the same temperature and pressure of 10 to 100 mTorr according to the first heat treatment step of the present invention The heat treatment is performed for 40 to 100 minutes. At this time, the boron and phosphorus in the surface of the BPSG film are diffusing outward, so the concentration of impurities in the surface of the BPSG film is decreasing. This will lead to a higher concentration of impurities than the B ps G film surface during the flattened air flow process. Boron and phosphorus diffused from the surface of the BPSG film will be directly pumped out of the plutonium 3 According to the second heat treatment step, the furnace is heated to 85 to 900 degrees Celsius, and then the resulting wafer is heat-treated in a nitrogen atmosphere for about 15 to 45 minutes to flatten the BPSG film by airflow. 3 Finally, 'After the surface flattening is finished, N 2 〇 gas and -6 are introduced-This paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X 297 mm,'-binding line (please read the note on the back first Please fill in this page again) A7 -----______ B7 printed by the Employee Consumer Cooperative of the Central Ministry of Economic Affairs of the Ministry of Economy V. Description of the invention (4)
Sil^Ch氣體,以生成一厚約1〇〇至2〇〇埃之保護性氧化物 膜。然後根據第三個熱處理之步驟,在將晶圓取出之前, 先將爐子冷卻至攝氏650至750度》 如前所建議’根據本發明,BPSG膜之晶體缺陷將可於下 列三個方面加以避免。 第一,BPSG膜表面上之晶體沈積可經由將BPS(5膜表面 内硼及磷之濃度降低而減少,這將可藉於LPCVD設備内大 約攝氏650至750度之低溫下,同時維持較低壓力對晶圓進 行一段長時間之熱處理而完成。 第二,BPSG膜表面上晶體沈積之可能性可藉於剛完成平 坦化iBPSG膜上形成一保護性氧化物膜而將以消除。平坦 化製程係於低溫處理—結束之後,即將爐子加熱至大約攝 氏8 5 0至900度之可進行81>5(}膜氣流製程溫度。可使用 ΝΑ氣體及SiHiCU氣體以形成氧化物膜。 最後,在將該晶圓帶回室溫之前,先將爐子冷卻至一較 低溫度,藉以避免由於遽降之溫度及空氣内之濕氣而導致 晶體沈積。 如前文中所述,根據本發明,半導體之特性及生產良率 可藉著避免BPSG膜表面之晶體沈積而加以改善,此_晶禮 沈積可能於後續製程中干擾到裝置圖案之生成,並且造成 一導體至另一導體間絕緣性之劣化。 本發明已以舉例説明乏古彳、c &、+· ^ <万式加以描述,而且應了解其所 使用之術語本質上皆係用以描述而非限制。 由於上述敎示之啓發,尚可針對本發明進行許多之改善 本紙乐尺度適用中國国家標隼(CN_S ) A4規^7^_〇>< 297公慶 f請先网讀背面之注意事項再4寫本頁) .裝·Sil ^ Ch gas to produce a protective oxide film with a thickness of about 100 to 200 angstroms. Then according to the third heat treatment step, before the wafer is taken out, the furnace is first cooled to 650 to 750 degrees Celsius. ”As previously suggested, according to the present invention, crystal defects of the BPSG film can be avoided in the following three aspects . First, the crystal deposition on the surface of the BPSG film can be reduced by reducing the concentration of boron and phosphorus in the surface of the 5 film (BPS), which can be maintained at a low temperature of about 650 to 750 degrees Celsius while maintaining a low temperature in the LPCVD equipment The pressure is applied to the wafer for a long time to complete the heat treatment. Second, the possibility of crystal deposition on the surface of the BPSG film can be eliminated by forming a protective oxide film on the iBPSG film just after planarization. The planarization process After the low temperature treatment-after the end, the furnace is heated to a temperature of about 8 5 0 to 900 degrees Celsius, which can be 81> 5 (} film flow process temperature. NA gas and SiHiCU gas can be used to form an oxide film. Finally, the Before bringing the wafer back to room temperature, the furnace is cooled to a lower temperature to avoid crystal deposition due to the drop in temperature and the moisture in the air. As described above, according to the present invention, the characteristics of semiconductors The production yield can be improved by avoiding crystal deposition on the surface of the BPSG film. This deposition may interfere with the generation of device patterns in the subsequent process and cause one conductor to another Deterioration of insulation between conductors. The present invention has been described by way of illustrations, C &, +, ^ < ten thousand, and it should be understood that the terms used are essentially for description rather than limitation. Due to the inspiration of the above instructions, many improvements can be made to the present invention. The standard of paper music is applicable to the Chinese National Standard Falcon (CN_S) A4 regulation ^ 7 ^ _〇 > < 297 Gongqing f Please read the notes on the back first 4 again write this page).
,1T A 7 B7 五、發明説明(5 ) 及變化。因此,可了解本發明係可於下列申請專利範圍所 限制之範疇内實施,而非儘限於特定描述者。 訂 線 (请先睃讀背&之注意事項再填寫本貢) 經濟部中央標準局員工消費合作社印製 本紙伕尺度適用中國國家標準(CNS ) A4規格(2丨Ο X 297公釐), 1T A 7 B7 V. Description of the invention (5) and changes. Therefore, it can be understood that the present invention can be implemented within the scope limited by the following patent application scope, and not limited to the specific description. Booking line (please read the notes on the back & fill in this tribute first) Printed by the Employee Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs This paper is applicable to the Chinese National Standard (CNS) A4 (2 丨 Ο X 297mm)
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KR1019950050997A KR100214073B1 (en) | 1995-12-16 | 1995-12-16 | Bpsg film forming method |
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TW308714B true TW308714B (en) | 1997-06-21 |
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JP (1) | JP2859864B2 (en) |
KR (1) | KR100214073B1 (en) |
CN (1) | CN1159489A (en) |
DE (1) | DE19651778A1 (en) |
GB (1) | GB2308229A (en) |
TW (1) | TW308714B (en) |
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JP2994616B2 (en) * | 1998-02-12 | 1999-12-27 | キヤノン販売株式会社 | Underlayer surface modification method and semiconductor device manufacturing method |
US6608327B1 (en) | 1998-02-27 | 2003-08-19 | North Carolina State University | Gallium nitride semiconductor structure including laterally offset patterned layers |
US6051849A (en) | 1998-02-27 | 2000-04-18 | North Carolina State University | Gallium nitride semiconductor structures including a lateral gallium nitride layer that extends from an underlying gallium nitride layer |
US6265289B1 (en) | 1998-06-10 | 2001-07-24 | North Carolina State University | Methods of fabricating gallium nitride semiconductor layers by lateral growth from sidewalls into trenches, and gallium nitride semiconductor structures fabricated thereby |
US6177688B1 (en) | 1998-11-24 | 2001-01-23 | North Carolina State University | Pendeoepitaxial gallium nitride semiconductor layers on silcon carbide substrates |
US6255198B1 (en) | 1998-11-24 | 2001-07-03 | North Carolina State University | Methods of fabricating gallium nitride microelectronic layers on silicon layers and gallium nitride microelectronic structures formed thereby |
US6521514B1 (en) | 1999-11-17 | 2003-02-18 | North Carolina State University | Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on sapphire substrates |
US6380108B1 (en) | 1999-12-21 | 2002-04-30 | North Carolina State University | Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on weak posts, and gallium nitride semiconductor structures fabricated thereby |
US6403451B1 (en) | 2000-02-09 | 2002-06-11 | Noerh Carolina State University | Methods of fabricating gallium nitride semiconductor layers on substrates including non-gallium nitride posts |
US6261929B1 (en) | 2000-02-24 | 2001-07-17 | North Carolina State University | Methods of forming a plurality of semiconductor layers using spaced trench arrays |
KR20120098095A (en) * | 2011-02-28 | 2012-09-05 | 에스케이하이닉스 주식회사 | Method for manufacturing semiconductor device |
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JP2538722B2 (en) * | 1991-06-20 | 1996-10-02 | 株式会社半導体プロセス研究所 | Method for manufacturing semiconductor device |
-
1995
- 1995-12-16 KR KR1019950050997A patent/KR100214073B1/en not_active IP Right Cessation
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1996
- 1996-11-16 TW TW085114063A patent/TW308714B/zh active
- 1996-12-05 GB GB9625363A patent/GB2308229A/en not_active Withdrawn
- 1996-12-12 DE DE19651778A patent/DE19651778A1/en not_active Withdrawn
- 1996-12-16 JP JP8336172A patent/JP2859864B2/en not_active Expired - Fee Related
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DE19651778A1 (en) | 1997-06-19 |
KR970052884A (en) | 1997-07-29 |
JP2859864B2 (en) | 1999-02-24 |
GB2308229A (en) | 1997-06-18 |
GB9625363D0 (en) | 1997-01-22 |
KR100214073B1 (en) | 1999-08-02 |
CN1159489A (en) | 1997-09-17 |
JPH09181071A (en) | 1997-07-11 |
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