JPH05152288A - Manufacture of semiconductor device and manufacturing device of semiconductor device - Google Patents

Manufacture of semiconductor device and manufacturing device of semiconductor device

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Publication number
JPH05152288A
JPH05152288A JP31425391A JP31425391A JPH05152288A JP H05152288 A JPH05152288 A JP H05152288A JP 31425391 A JP31425391 A JP 31425391A JP 31425391 A JP31425391 A JP 31425391A JP H05152288 A JPH05152288 A JP H05152288A
Authority
JP
Japan
Prior art keywords
film
silicon nitride
oxide film
nitride film
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP31425391A
Other languages
Japanese (ja)
Inventor
Kenji Yoneda
健司 米田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP31425391A priority Critical patent/JPH05152288A/en
Publication of JPH05152288A publication Critical patent/JPH05152288A/en
Pending legal-status Critical Current

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  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To provide a method for improving oxidation velocity of a silicon nitride film and for forming a thick silicon oxide film on the silicon nitride film and a method and a device for forming a good oxide film of low interface level density on a silicon substrate. CONSTITUTION:In a semiconductor volume insulating film constituted of a silicon nitride film 6/a silicon oxide film 8, the silicon nitride film 6 is oxidized at 750 to 1200 deg.C with ozone of 2 to 20% added to an oxidizer; thereby, an upper silicon oxide film 8 of a specified film thickness can be acquired at a low temperature in a short time. A good gate oxide film of low interface level density is provided by thermally oxidizing a silicon substrate in an ozone-added oxidizing atmosphere.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、DRAM(ダイナミッ
クランダムアクセスメモリー)の容量絶縁膜、EEPR
OM(エレクトリカリーイレーサブルアンドプログラマ
ブルリードオンリーメモリー)のトンネル絶縁膜および
制御ゲート絶縁膜、EPROM(エレクトリカリープロ
グラマブルリードオンリーメモリー)およびFPGA
(フィールドプログラマブルゲートアレイ)のアンチヒ
ューズ絶縁膜およびMOSデバイスのゲート絶縁膜など
を有する半導体装置の製造方法および製造装置に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a capacitive insulating film for DRAM (Dynamic Random Access Memory), EEPR.
OM (Electrically Erasable and Programmable Read Only Memory) tunnel insulation film and control gate insulation film, EPROM (Electrically Programmable Read Only Memory) and FPGA
The present invention relates to a method and an apparatus for manufacturing a semiconductor device having an antifuse insulating film of (field programmable gate array) and a gate insulating film of a MOS device.

【0002】[0002]

【従来の技術】メモリーデバイス、とりわけDRAMの
高集積化により、メモリーセルを構成する容量絶縁膜の
面積は減少する一方、容量絶縁膜には高誘電率および高
信頼性の膜が要求される。デバイスの構造も従来用いら
れてきた平板型容量から溝型や積層型容量、さらには溝
型積層容量など3次元化が進んでいる。このため、従
来、平板型容量の絶縁膜として用いられてきたシリコン
酸化膜では十分な容量および信頼性を確保することが困
難になってきている。このため最近ではシリコン酸化膜
に対し、約2倍の誘電率を持つシリコン窒化膜が注目を
集めている。しかし、シリコン窒化膜それ自身は、高誘
電率ではあるが膜を流れるリーク電流が大きく、またシ
リコン窒化膜内には数多くの欠陥が存在し絶縁特性およ
び信頼性に依然問題がある。このため、シリコン窒化膜
をそれ単体で使用するのではなくシリコン酸化膜/シリ
コン窒化膜/シリコン酸化膜のいわゆるONO3層膜も
しくはシリコン窒化膜/シリコン酸化膜のいわゆるON
2層膜などの複合膜として使用するのが一般的になって
いる。この工程において下層の酸化膜は通常の熱酸化に
より形成され、中間層のシリコン窒化膜は減圧化学気相
堆積法により形成されるのが一般的である。またシリコ
ン窒化膜上のシリコン酸化膜形成には一般には、900
〜1100℃の乾燥酸素雰囲気中もしくは水蒸気雰囲気
中での熱酸化が用いられている。シリコン窒化膜上のシ
リコン酸化膜の膜厚および膜質はこれらの複合酸化膜の
電気特性および絶縁破壊信頼性に非常に大きな影響を及
ぼすことが知られている。
2. Description of the Related Art While the area of a capacitance insulating film constituting a memory cell is reduced due to high integration of a memory device, especially a DRAM, a film having a high dielectric constant and high reliability is required for the capacitance insulating film. The structure of the device has been three-dimensionally advanced from the conventionally used flat plate type capacitor to the groove type and laminated type capacitors, and further to the groove type laminated capacitor. For this reason, it has become difficult to secure sufficient capacitance and reliability with a silicon oxide film that has been conventionally used as a flat-plate capacitance insulating film. Therefore, recently, a silicon nitride film having a dielectric constant about twice that of a silicon oxide film has been attracting attention. However, although the silicon nitride film itself has a high dielectric constant, the leak current flowing through the film is large, and many defects are present in the silicon nitride film, and there are still problems with insulation properties and reliability. Therefore, the silicon nitride film is not used alone, but the so-called ONO3 layer film of silicon oxide film / silicon nitride film / silicon oxide film or the so-called ON of silicon nitride film / silicon oxide film.
It is generally used as a composite film such as a two-layer film. In this step, the lower oxide film is generally formed by ordinary thermal oxidation, and the intermediate silicon nitride film is generally formed by the low pressure chemical vapor deposition method. In addition, 900 silicon is generally used for forming a silicon oxide film on a silicon nitride film.
Thermal oxidation in a dry oxygen atmosphere or steam atmosphere at ˜1100 ° C. has been used. It is known that the film thickness and film quality of the silicon oxide film on the silicon nitride film have a great influence on the electrical characteristics and dielectric breakdown reliability of these composite oxide films.

【0003】図8はシリコン窒化膜上のシリコン酸化膜
の膜厚と複合膜を流れるリーク電流の関係を示したもの
である。シリコン窒化膜上のシリコン酸化膜が薄いと、
上部電極からの正孔の注入を阻止できないためリーク電
流は増加する。上部シリコン酸化膜が厚くなるに従い、
リーク電流は減少する。一方、図9は上部シリコン酸化
膜厚と容量および信頼性の関係を示したものである。上
部酸化膜厚の増加にともない容量は減少するが、信頼性
は極値を持つ。すなわち、図8のリーク電流および図9
の容量および信頼性はトレードオフの関係にある。ここ
で、従来、一般的に用いられている乾燥酸素雰囲気中で
の熱酸化について考える。900℃、30分間の乾燥酸
素雰囲気中での熱酸化をシリコン窒化膜に行うと、約
0.8nmのシリコン酸化膜が成長する。このときシリ
コン基板上には同一条件で13nmのシリコン酸化膜が
成長する。このような上部酸化膜においてはリーク電流
を十分抑制することができない上、容量こそやや大きい
値が得られるものの信頼性についても満足できる結果は
得られない。一方酸化膜厚を稼ぐために、酸化時間を9
0間分に延長した場合でも、シリコン窒化膜上のシリコ
ン酸化膜厚は約1.1nmとほとんど増加しない。この
とき、シリコン基板上のシリコン酸化膜厚は25nmで
あり、シリコン酸化膜上での酸化速度がシリコン窒化膜
上では全く反映されていない。このため、乾燥酸素中で
の熱酸化では酸化時間を延ばしても、図9に示した信頼
性が最大となる最適上部酸化膜厚を得ることが非常に難
しい。これは、乾燥酸素雰囲気中ではシリコン窒化膜の
酸化機構が酸素分子の拡散速度により律速され、酸素分
子の拡散速度がシリコン窒化膜中では十分遅いことに起
因する。従って、酸素分子の拡散速度を向上させるため
には高温中での酸化が有効であるがこの場合、熱処理量
は温度と時間の積になるのでこのような高温、長時間の
熱処理は最近の高集積デバイスには全く受け入れること
ができず非実用的である。
FIG. 8 shows the relationship between the film thickness of the silicon oxide film on the silicon nitride film and the leak current flowing through the composite film. If the silicon oxide film on the silicon nitride film is thin,
Since the injection of holes from the upper electrode cannot be blocked, the leak current increases. As the upper silicon oxide film becomes thicker,
Leakage current is reduced. On the other hand, FIG. 9 shows the relationship between the upper silicon oxide film thickness and the capacity and reliability. The capacity decreases as the thickness of the upper oxide film increases, but the reliability has an extreme value. That is, the leakage current of FIG. 8 and the leakage current of FIG.
There is a trade-off between the capacity and reliability of the. Here, let us consider thermal oxidation in a dry oxygen atmosphere which is generally used conventionally. When thermal oxidation is performed on the silicon nitride film at 900 ° C. for 30 minutes in a dry oxygen atmosphere, a silicon oxide film of about 0.8 nm grows. At this time, a 13 nm silicon oxide film is grown on the silicon substrate under the same conditions. In such an upper oxide film, the leakage current cannot be sufficiently suppressed, and although the capacitance is slightly large, the reliability is not satisfactory. On the other hand, in order to obtain the oxide film thickness, the oxidation time is set to 9
Even when the distance is extended to zero, the thickness of the silicon oxide film on the silicon nitride film is about 1.1 nm and hardly increases. At this time, the silicon oxide film thickness on the silicon substrate was 25 nm, and the oxidation rate on the silicon oxide film was not reflected at all on the silicon nitride film. Therefore, in thermal oxidation in dry oxygen, it is very difficult to obtain the optimum upper oxide film thickness which maximizes the reliability shown in FIG. 9, even if the oxidation time is extended. This is because the oxidation mechanism of the silicon nitride film is controlled by the diffusion rate of oxygen molecules in a dry oxygen atmosphere, and the diffusion rate of oxygen molecules is sufficiently slow in the silicon nitride film. Therefore, in order to improve the diffusion rate of oxygen molecules, oxidation at high temperature is effective, but in this case, the amount of heat treatment is the product of temperature and time. It is impractical because it is totally unacceptable for integrated devices.

【0004】また、シリコン基板上の酸化膜ではシリコ
ンとシリコン酸化膜の界面近傍に存在する未結合手(ダ
ングリングボンド、ブロークンボンド)がシリコン酸化
膜の電気特性に悪影響を与えることはよく知られてい
る。この未結合手を防止するためには水素を含有しない
酸化雰囲気中で、なおかつ反応性をあげ未結合を防止す
るために高温での乾燥酸素雰囲気中での酸化が有望であ
る。しかし、この場合も熱処理量が増加するために高集
積デバイスにとっては現実的な解決策ではない。
It is well known that in an oxide film on a silicon substrate, dangling bonds (broken bonds) existing near the interface between silicon and the silicon oxide film adversely affect the electrical characteristics of the silicon oxide film. ing. In order to prevent this dangling bond, oxidation in a hydrogen-free oxidizing atmosphere and in a dry oxygen atmosphere at a high temperature in order to increase reactivity and prevent unbonding are promising. However, even in this case, the amount of heat treatment is increased, which is not a practical solution for a highly integrated device.

【0005】シリコン窒化膜上において比較的厚いシリ
コン酸化膜を成長させるには、シリコン窒化膜を通して
シリコン窒化膜/シリコン酸化膜界面に酸化剤を効率よ
く供給すればよい。このためにはシリコン窒化膜中の拡
散速度の早い酸化剤を使用すればよい。すなわち、水蒸
気酸化などにより、酸化剤をOHとすれば、より速い拡
散速度を得ることができる。
In order to grow a relatively thick silicon oxide film on the silicon nitride film, it is sufficient to efficiently supply the oxidizer to the silicon nitride film / silicon oxide film interface through the silicon nitride film. For this purpose, an oxidizer having a high diffusion rate in the silicon nitride film may be used. That is, if oxidizer is OH by steam oxidation or the like, a higher diffusion rate can be obtained.

【0006】[0006]

【発明が解決しようとする課題】しかしながら上記従来
の構成では、高温、長時間の熱処理、また水蒸気酸化の
場合には残留水素等の影響で容量絶縁膜の電気特性に悪
影響を及ぼし、リーク電流が大きくなるという課題があ
る。
However, in the above conventional structure, in the case of heat treatment at a high temperature for a long time, or in the case of steam oxidation, residual hydrogen or the like adversely affects the electrical characteristics of the capacitive insulating film, resulting in a leakage current. There is a problem of getting bigger.

【0007】本発明は上記課題を解決するもので、界面
準位密度およびトラップ密度の低い絶縁膜を有す半導体
装置の製造方法および製造装置を提供することを目的と
する。
An object of the present invention is to solve the above problems, and an object thereof is to provide a method and an apparatus for manufacturing a semiconductor device having an insulating film having a low interface state density and a low trap density.

【0008】[0008]

【課題を解決するための手段】上記目的を達成するため
に本発明の請求項1は、少なくともシリコン窒化膜を形
成した半導体基板を、酸素および2〜20%のオゾンを
含む酸化性雰囲気中で750〜1200℃の温度範囲で
熱処理し、前記シリコン窒化膜上にシリコン酸化膜を形
成する工程を少なくとも有する構成よりなり、請求項7
は、ランプ加熱部を備えたチャンバーと、オゾン発生部
と、そのオゾン発生部からのオゾンを効率よく均等に前
記チャンバー内に送り込むためオゾン導入ノズルとを有
する構成よりなる。
To achieve the above object, the first aspect of the present invention is to provide a semiconductor substrate having at least a silicon nitride film formed thereon in an oxidizing atmosphere containing oxygen and 2 to 20% of ozone. 8. A structure having at least a step of forming a silicon oxide film on the silicon nitride film by performing heat treatment in a temperature range of 750 to 1200 ° C.
Comprises a chamber provided with a lamp heating section, an ozone generating section, and an ozone introducing nozzle for efficiently and evenly feeding the ozone from the ozone generating section into the chamber.

【0009】[0009]

【作用】上記構成により、通常の乾燥酸素を用いた熱酸
化に比べ、シリコン窒化膜内部での酸化剤の拡散速度は
著しく増大し、従来の乾燥酸素を酸化剤として用いる方
法に比べ低温かつ短時間で所定の膜厚のシリコン酸化膜
をシリコン窒化膜上に形成することができ、このように
して形成した、シリコン酸化膜/シリコン窒化膜/シリ
コン酸化膜もしくはシリコン窒化膜/シリコン酸化膜か
らなる複合絶縁膜を用いた半導体容量では容易に低リー
ク電流、大容量および高信頼性が実現でき、高性能の高
集積DRAMの容量絶縁膜、EEPROMのトンネル絶
縁膜および制御ゲート絶縁膜FPGAのアンチフューズ
絶縁膜が形成できる。また本発明のような酸化法をシリ
コン基板上もしくは多結晶シリコン基板上のシリコン酸
化膜形成に用いることによりシリコン基板/シリコン酸
化膜界面に未結合手の少ない、高品質のシリコン酸化膜
が容易に形成でき、高集積MOSデバイスのゲート酸化
膜として非常に有効となる。
With the above structure, the diffusion rate of the oxidant inside the silicon nitride film is significantly increased as compared with the conventional thermal oxidation using dry oxygen, which is lower in temperature and shorter than the conventional method using dry oxygen as the oxidant. A silicon oxide film having a predetermined film thickness can be formed on the silicon nitride film in a certain period of time, and thus formed of silicon oxide film / silicon nitride film / silicon oxide film or silicon nitride film / silicon oxide film. Low leakage current, large capacity and high reliability can be easily realized with the semiconductor capacitor using the composite insulating film, and the capacitor insulating film of high-performance highly integrated DRAM, tunnel insulating film of EEPROM and antifuse of control gate insulating film FPGA. An insulating film can be formed. Further, by using the oxidation method as in the present invention to form a silicon oxide film on a silicon substrate or a polycrystalline silicon substrate, a high quality silicon oxide film with few unbonded portions at the silicon substrate / silicon oxide film interface can be easily formed. It can be formed and is very effective as a gate oxide film of a highly integrated MOS device.

【0010】[0010]

【実施例】以下本発明の一実施例としてDRAMの容量
絶縁膜を有する半導体装置の製造方法を示す図1を用い
て説明する。まず図1(a)に示すようにP型シリコン
基板1上に形成されたP型ウェル2を持ち、さらにP型
ウェル2内に分離領域3と選択トランジスタに接続され
たN型高濃度拡散層4上に、公知技術であるところの減
圧化学気相堆積法により燐原子を3×1020/cm2含む
下部多結晶シリコン膜5を400nm堆積し、これを容
量の下部電極とする。次に図1(b)に示すように下部
多結晶シリコン膜5上に公知の減圧化学気相堆積法によ
り、シリコン窒化膜6を11nm堆積する。この工程に
おいて厳密には下部多結晶シリコン膜5上に約2〜3n
mの自然酸化膜7が成長するため、すでにこの時点でシ
リコン酸化膜/シリコン窒化膜の2層構造が形成されて
いる。続いて、図1(c)に示すようにシリコン窒化膜
6上を酸化するため温度900℃、乾燥酸素流量毎分8
リッター、オゾン流量毎分400ccで60分間熱酸化を
行う。これによりシリコン窒化膜6上には約2.6nm
の膜厚のシリコン酸化膜8が形成される。続いて、図1
(d)に示すように再び減圧化学気相堆積法により燐原
子を3×1020/cm2含む上部多結晶シリコン膜9を3
00nm堆積し、これを上部電極とする。これにより、
選択トランジスタ10のソース電極に電気的に接続され
た下部多結晶シリコン膜5とセルプレートである上部多
結晶シリコン膜9との間に自然酸化膜7、シリコン窒化
膜6およびシリコン酸化膜8からなる複合容量絶縁膜を
介して半導体容量が形成される。シリコン窒化膜6の酸
化を行う場合には通常、横型もしくは縦型のホットウォ
ールタイプの電気炉が使用されるが、このような電気炉
は熱容量が大きい上、ガスの導入管が長く、さらにプロ
セスチューブ内にガスが導入されてからガスが高温にさ
らされるため非常に分解しやすいオゾンを効率よくウェ
ーハ表面に均一に運搬するのが困難である。したがっ
て、本実施例においては図2に示すような特殊なオゾン
熱処理装置を用いた。11はハロゲンランプ加熱部、1
2はオゾン発生部、13はオゾンを効率よくチャンバー
内に送りこむことのできる導入ノズル、14は反射板、
15はクォーツウンドウ、16はシリコンウェーハ、1
7は石英ピン、18は排気口、19は放射温度形、20
はプラテンである。通常この装置は枚葉式であり、常温
から数秒で900℃まで温度を上昇させることができ
る。図3は図2の導入ノズルの拡大詳細図であり、図4
は図2のオゾン熱処理装置に用いるガス配管系統図で、
図2と同一部分には同一番号を付し、説明を省略する。
21はポンプ、22は反応室、23はランプハウスであ
る。図5には図2のオゾン熱処理における処理シーケン
スを示す。サイクルパージ後、常温にてオゾン暴露を行
うことが有効なオゾンの供給を実現している。通常、図
2のようなオゾン熱処理装置は雰囲気制御が完全であ
り、水分をチャンバー内から容易に除去できるため水素
の影響が少なく、安全してオゾンを供給することができ
る。また、供給されるオゾンはウェーハ表面で急速に加
熱、分解されるためオゾン輸送途中での損失が少なくオ
ゾンを有効にウェーハ表面に輸送し、かつ有効にウェー
ハ表面での反応に寄与することができる。また、本装置
は枚葉式であるため本実施例の条件では著しくスループ
ットが低下するが、酸化温度を1100℃〜1150℃
にすることにより1枚あたりの処理時間は30秒〜60
秒程度となりスループットを向上することができる。ま
た、本装置は熱源にランプを使用しているので昇温、降
温速度が従来の電気炉に比べ著しく速く、前記のような
高温での処理についても熱処理量の点ではまったく問題
はない。また本装置は本実施例のようなシリコン窒化膜
6の酸化にとどまらず、一般のシリコン基板および多結
晶シリコン基板上のシリコン酸化膜形成にも有効である
のは言うまでもない。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG. 1 showing a method of manufacturing a semiconductor device having a capacitive insulating film of DRAM. First, as shown in FIG. 1A, a P-type well 2 is formed on a P-type silicon substrate 1, and an N-type high-concentration diffusion layer connected to a separation region 3 and a selection transistor is further provided in the P-type well 2. on 4, the lower polycrystalline silicon film 5 containing phosphorus atoms 3 × 10 20 / cm 2 to 400nm is deposited by low pressure chemical vapor deposition method where a known technique, which is the lower electrode of the capacitor. Next, as shown in FIG. 1B, a silicon nitride film 6 is deposited to a thickness of 11 nm on the lower polycrystalline silicon film 5 by a known low pressure chemical vapor deposition method. Strictly speaking, in this step, about 2 to 3 n is formed on the lower polycrystalline silicon film 5.
Since the m natural oxide film 7 grows, a two-layer structure of silicon oxide film / silicon nitride film is already formed at this point. Subsequently, as shown in FIG. 1C, a temperature of 900 ° C. for oxidizing the silicon nitride film 6 and a dry oxygen flow rate of 8 per minute.
Thermal oxidation is performed for 60 minutes at a flow rate of 400 cc / min for liter and ozone. As a result, about 2.6 nm is formed on the silicon nitride film 6.
A silicon oxide film 8 having a film thickness of is formed. Then, FIG.
As shown in (d), the upper polycrystalline silicon film 9 containing 3 × 10 20 / cm 2 of phosphorus atoms is again formed by the low pressure chemical vapor deposition method.
00 nm is deposited, and this is used as an upper electrode. This allows
A natural oxide film 7, a silicon nitride film 6 and a silicon oxide film 8 are formed between a lower polycrystalline silicon film 5 electrically connected to the source electrode of the select transistor 10 and an upper polycrystalline silicon film 9 which is a cell plate. A semiconductor capacitor is formed via the composite capacitor insulating film. In order to oxidize the silicon nitride film 6, a horizontal or vertical hot wall type electric furnace is usually used. Such an electric furnace has a large heat capacity, a long gas introduction pipe, and a further process. Since the gas is exposed to a high temperature after the gas is introduced into the tube, it is difficult to efficiently and uniformly convey ozone to the wafer surface. Therefore, in this example, a special ozone heat treatment apparatus as shown in FIG. 2 was used. 11 is a halogen lamp heating unit, 1
2 is an ozone generator, 13 is an introduction nozzle capable of efficiently feeding ozone into the chamber, 14 is a reflector,
15 is Quartz Wound, 16 is a silicon wafer, 1
7 is a quartz pin, 18 is an exhaust port, 19 is a radiation temperature type, 20
Is the platen. Usually, this device is a single-wafer type and can raise the temperature from room temperature to 900 ° C. in a few seconds. FIG. 3 is an enlarged detailed view of the introduction nozzle of FIG.
Is a gas piping system diagram used in the ozone heat treatment apparatus of FIG.
The same parts as those in FIG. 2 are designated by the same reference numerals and the description thereof will be omitted.
21 is a pump, 22 is a reaction chamber, and 23 is a lamp house. FIG. 5 shows a processing sequence in the ozone heat treatment of FIG. After the cycle purge, exposure to ozone at room temperature realizes effective supply of ozone. Normally, the ozone heat treatment apparatus as shown in FIG. 2 has complete atmosphere control and water can be easily removed from the chamber, so that the influence of hydrogen is small and ozone can be supplied safely. Further, since the supplied ozone is rapidly heated and decomposed on the wafer surface, the loss during the transportation of ozone is small and the ozone can be effectively transported to the wafer surface and can contribute to the reaction on the wafer surface effectively. . Further, since the present apparatus is a single-wafer type, the throughput is remarkably reduced under the conditions of the present embodiment, but the oxidation temperature is 1100 ° C to 1150 ° C.
The processing time per sheet is 30 seconds to 60
It is about a second, and the throughput can be improved. In addition, since this apparatus uses a lamp as a heat source, the rate of temperature rise and temperature drop is significantly faster than that of the conventional electric furnace, and there is no problem in the amount of heat treatment in the above high temperature treatment. Needless to say, the present apparatus is effective not only for oxidizing the silicon nitride film 6 as in this embodiment but also for forming a silicon oxide film on a general silicon substrate and a polycrystalline silicon substrate.

【0011】図6は図2のオゾン熱処理装置で図1の実
施例にもとづいて形成したシリコン酸化膜/シリコン窒
化膜/シリコン酸化膜(3.0/11.0/2.6n
m)と、従来の乾燥酸素中900℃、90分間、酸化流
量毎分8リッターで形成したシリコン窒化膜上の酸化膜
を有するシリコン酸化膜/シリコン窒化膜/シリコン酸
化膜(3.0/11.0/1.1nm)のリーク電流特
性を示したものである。従来法ではシリコン窒化膜上に
十分なシリコン酸化膜厚が得られず、リーク電流が大き
いのに対し、本実施例では十分に低いリーク電流を達成
している。図7は横軸にストレス電圧、縦軸に絶縁破壊
にいたる寿命をとったもので、従来例および本実施例の
データをプロットしてある。図7からは本実施例の絶縁
膜の寿命は電圧に対して大きい依存成(大きい傾斜)を
持つため、図7の測定範囲のような高電界の結果を通常
に使用する低電界に外挿した場合、従来法にくらべ絶縁
膜の寿命は著しく長くなり、高信頼性の絶縁膜を形成で
きることがわかる。
FIG. 6 shows a silicon oxide film / silicon nitride film / silicon oxide film (3.0 / 11.0 / 2.6n) formed by the ozone heat treatment apparatus of FIG. 2 based on the embodiment of FIG.
m) and a conventional silicon oxide film / silicon nitride film / silicon oxide film (3.0 / 11) having an oxide film on a silicon nitride film formed at 900 ° C. in dry oxygen for 90 minutes at an oxidation flow rate of 8 liters / min. It shows a leakage current characteristic of 0.0 / 1.1 nm). In the conventional method, a sufficient silicon oxide film thickness cannot be obtained on the silicon nitride film and the leak current is large, whereas in the present embodiment, a sufficiently low leak current is achieved. In FIG. 7, the horizontal axis represents the stress voltage and the vertical axis represents the life until dielectric breakdown, and the data of the conventional example and this example are plotted. From FIG. 7, the life of the insulating film of this embodiment has a large dependence (large slope) on the voltage. Therefore, the result of the high electric field such as the measurement range of FIG. 7 is extrapolated to the low electric field which is normally used. In this case, the life of the insulating film is significantly longer than that of the conventional method, and it can be seen that a highly reliable insulating film can be formed.

【0012】本実施例では常圧のオゾン添加酸化につい
て示したが、この酸化を2〜500気圧の高圧力下で行
うことによりさらに処理温度を低温化でき、処理時間の
短時間化がはかれることはいうまでもない。この場合、
図2に示したような装置においても高圧力下での処理は
可能である。また、オゾンに加えて1−1−1トリクロ
ロエタンおよび1−1−2トリクロロエタンを添加する
ことにより酸化速度はさらに向上する。これらの効果は
DRAMの容量絶縁膜に限らず、シリコン窒化膜の酸化
を用いる半導体装置の製造工程、シリコン基板および多
結晶シリコン膜を形成したシリコン基板または多結晶シ
リコン基板の酸化を含む半導体装置の製造工程等に適用
することができる。またオゾン熱処理装置として従来の
電気炉も効率が悪いながら使用できることは言うまでも
ない。
In the present embodiment, the ozone addition oxidation under normal pressure was shown, but by performing this oxidation under a high pressure of 2 to 500 atm, the treatment temperature can be further lowered and the treatment time can be shortened. Needless to say. in this case,
Even in the apparatus as shown in FIG. 2, processing under high pressure is possible. Further, the oxidation rate is further improved by adding 1-1-1 trichloroethane and 1-1-2 trichloroethane in addition to ozone. These effects are not limited to the capacitance insulating film of DRAM, but are applicable to a semiconductor device manufacturing process using oxidation of a silicon nitride film, a silicon substrate having a silicon substrate and a polycrystalline silicon film formed, or a semiconductor device including oxidation of a polycrystalline silicon substrate. It can be applied to manufacturing processes and the like. Needless to say, a conventional electric furnace can be used as an ozone heat treatment apparatus, although the efficiency is low.

【0013】[0013]

【発明の効果】以上の実施例から明らかなように本発明
は、少なくともシリコン窒化膜を形成した半導体基板
を、酸素および2〜20%のオゾンを含む酸化性雰囲気
中で750〜1200℃の温度範囲で熱処理し、前記シ
リコン窒化膜上にシリコン酸化膜を形成する工程を少な
くとも有する構成によるので、低温かつ短時間でシリコ
ン窒化膜上に所定の厚みのシリコン酸化膜を得ることが
でき、シリコン窒化膜系の複合絶縁膜の上部酸化に本発
明を適用することにより、低リーク電流かつ高信頼性の
半導体容量が容易に実現でき、DRAMの容量絶縁膜、
EEPROMのトンネル絶縁膜、制御ゲート絶縁膜およ
びFPGAのアンチフューズ絶縁膜として高品質の絶縁
膜を有する半導体装置を提供することができるととも
に、本発明を一般の半導体基板および多結晶半導体基板
の酸化に使用することにより、界面準位密度およびトラ
ップ密度の低いゲート酸化膜として非常に高品質な酸化
膜を有する半導体装置を提供できる。
As is apparent from the above examples, according to the present invention, a semiconductor substrate on which at least a silicon nitride film is formed is heated at a temperature of 750 to 1200 ° C. in an oxidizing atmosphere containing oxygen and 2 to 20% of ozone. Since the structure has at least a step of forming a silicon oxide film on the silicon nitride film by heat treatment in a range, a silicon oxide film having a predetermined thickness can be obtained on the silicon nitride film at low temperature and in a short time. By applying the present invention to the upper oxidation of a film-type composite insulating film, a semiconductor capacitor with low leakage current and high reliability can be easily realized, and a capacitor insulating film of DRAM,
It is possible to provide a semiconductor device having a high-quality insulating film as a tunnel insulating film of a EEPROM, a control gate insulating film, and an antifuse insulating film of an FPGA, and at the same time, the present invention can be applied to the oxidation of general semiconductor substrates and polycrystalline semiconductor substrates. By using it, it is possible to provide a semiconductor device having a very high quality oxide film as a gate oxide film having a low interface state density and a low trap density.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例における半導体装置の製造方
法を示す工程断面図
FIG. 1 is a process sectional view showing a method for manufacturing a semiconductor device according to an embodiment of the present invention.

【図2】図1の半導体基板の製造方法に用いる半導体製
造装置
FIG. 2 is a semiconductor manufacturing apparatus used in the method of manufacturing the semiconductor substrate of FIG.

【図3】図1の半導体製造装置のオゾン導入ノズル部の
拡大斜視図
3 is an enlarged perspective view of an ozone introduction nozzle portion of the semiconductor manufacturing apparatus of FIG.

【図4】図2の半導体製造装置に用いるガス配管系統図FIG. 4 is a gas piping system diagram used in the semiconductor manufacturing apparatus of FIG.

【図5】図2の半導体製造装置を用いたオゾン熱処理シ
ーケンスを示す図
5 is a diagram showing an ozone heat treatment sequence using the semiconductor manufacturing apparatus of FIG.

【図6】図1の本発明による半導体装置の複合絶縁膜の
印加電圧に対するリーク電流特性図
FIG. 6 is a characteristic diagram of leakage current with respect to applied voltage of the composite insulating film of the semiconductor device according to the present invention in FIG.

【図7】図1の本発明による半導体装置の複合絶縁膜の
ストレス電圧に対する寿命の関係を示す図
7 is a graph showing the relationship between the stress voltage and the life of the composite insulating film of the semiconductor device according to the present invention in FIG.

【図8】従来の半導体装置のシリコン窒化膜上の上部シ
リコン酸化膜の厚みとリーク電流の関係を示す図
FIG. 8 is a diagram showing a relationship between a thickness of an upper silicon oxide film on a silicon nitride film of a conventional semiconductor device and a leak current.

【図9】従来の半導体装置のシリコン窒化膜上の上部シ
リコン酸化膜と信頼性、容量の関係を示す図
FIG. 9 is a diagram showing a relationship between an upper silicon oxide film on a silicon nitride film of a conventional semiconductor device and reliability and capacitance.

【符号の説明】[Explanation of symbols]

1 P型シリコン基板(半導体基板) 2 P型ウェル 3 分離領域 4 N型高濃度拡散層 5 下部多結晶シリコン膜 6 シリコン窒化膜 7 自然酸化膜 8 シリコン酸化膜 9 上部多結晶シリコン膜 10 選択トランジスタ 1 P-type silicon substrate (semiconductor substrate) 2 P-type well 3 Isolation region 4 N-type high-concentration diffusion layer 5 Lower polycrystalline silicon film 6 Silicon nitride film 7 Natural oxide film 8 Silicon oxide film 9 Upper polycrystalline silicon film 10 Select transistor

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】少なくともシリコン窒化膜を形成した半導
体基板を、酸素および2〜20%のオゾンを含む酸化性
雰囲気中で750〜1200℃の温度範囲で熱処理し、
前記シリコン窒化膜上にシリコン酸化膜を形成する工程
を少なくとも有することを特徴とする半導体装置の製造
方法。
1. A semiconductor substrate having at least a silicon nitride film formed thereon is heat-treated at a temperature range of 750 to 1200 ° C. in an oxidizing atmosphere containing oxygen and 2 to 20% of ozone,
A method of manufacturing a semiconductor device, comprising at least a step of forming a silicon oxide film on the silicon nitride film.
【請求項2】少なくともシリコン窒化膜を形成した半導
体基板に代えて、容量絶縁膜の一つであるシリコン窒化
膜を少なくとも形成した半導体基板としたことを特徴と
する請求項1記載の半導体装置の製造方法。
2. A semiconductor device according to claim 1, wherein a semiconductor substrate having at least a silicon nitride film formed thereon is replaced with a semiconductor substrate having at least a silicon nitride film which is one of capacitive insulating films. Production method.
【請求項3】少なくともシリコン窒化膜を形成した半導
体基板に代えて、半導体基板、多結晶シリコン膜を形成
した半導体基板または多結晶半導体基板としたことを特
徴とする請求項1記載の半導体装置の製造方法。
3. The semiconductor device according to claim 1, wherein a semiconductor substrate, a semiconductor substrate having a polycrystalline silicon film formed thereon, or a polycrystalline semiconductor substrate is used in place of the semiconductor substrate having at least a silicon nitride film formed thereon. Production method.
【請求項4】酸化性雰囲気が2〜500気圧の酸化性雰
囲気であることを特徴とする請求項1,2または3記載
の半導体装置の製造方法。
4. The method of manufacturing a semiconductor device according to claim 1, wherein the oxidizing atmosphere is an oxidizing atmosphere of 2 to 500 atm.
【請求項5】酸化性雰囲気がさらに水蒸気を含むことを
特徴とする請求項1、2または3記載の半導体装置の製
造方法。
5. The method of manufacturing a semiconductor device according to claim 1, 2 or 3, wherein the oxidizing atmosphere further contains water vapor.
【請求項6】酸化性雰囲気が、さらに1−1−1トリク
ロロエタンおよび1−1−2トリクロロエタンを含むこ
とを特徴とする請求項1,2または3記載の半導体装置
の製造方法。
6. The method of manufacturing a semiconductor device according to claim 1, wherein the oxidizing atmosphere further contains 1-1-1 trichloroethane and 1-1-2 trichloroethane.
【請求項7】ランプ加熱部を備えたチャンバーと、オゾ
ン発生部と、そのオゾン発生部からのオゾンを効率よく
均等に前記チャンバー内に送り込むためのオゾン導入ノ
ズルとを少なくとも有することを特徴とする半導体装置
の製造装置。
7. A chamber having a lamp heating section, an ozone generating section, and an ozone introducing nozzle for efficiently and evenly feeding ozone from the ozone generating section into the chamber. Semiconductor device manufacturing equipment.
JP31425391A 1991-11-28 1991-11-28 Manufacture of semiconductor device and manufacturing device of semiconductor device Pending JPH05152288A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP31425391A JPH05152288A (en) 1991-11-28 1991-11-28 Manufacture of semiconductor device and manufacturing device of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31425391A JPH05152288A (en) 1991-11-28 1991-11-28 Manufacture of semiconductor device and manufacturing device of semiconductor device

Publications (1)

Publication Number Publication Date
JPH05152288A true JPH05152288A (en) 1993-06-18

Family

ID=18051128

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31425391A Pending JPH05152288A (en) 1991-11-28 1991-11-28 Manufacture of semiconductor device and manufacturing device of semiconductor device

Country Status (1)

Country Link
JP (1) JPH05152288A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2275366A (en) * 1993-02-19 1994-08-24 Samsung Electronics Co Ltd Semiconductor device manufacture using ozone treatment process
JP2007221065A (en) * 2006-02-20 2007-08-30 Fujitsu Ltd Forming method of ferroelectric capacitor, and manufacturing method of semiconductor device
US7682990B2 (en) 2004-06-07 2010-03-23 Renesas Technology Corp. Method of manufacturing nonvolatile semiconductor memory device
JP2014027287A (en) * 2013-08-28 2014-02-06 Yuutekku:Kk Steam pressure rapid heating device, method for manufacturing oxide material film, and method for manufacturing pzt film

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2275366A (en) * 1993-02-19 1994-08-24 Samsung Electronics Co Ltd Semiconductor device manufacture using ozone treatment process
GB2275366B (en) * 1993-02-19 1997-03-26 Samsung Electronics Co Ltd Semiconductor device and a manufacturing method therefor
US7682990B2 (en) 2004-06-07 2010-03-23 Renesas Technology Corp. Method of manufacturing nonvolatile semiconductor memory device
JP2007221065A (en) * 2006-02-20 2007-08-30 Fujitsu Ltd Forming method of ferroelectric capacitor, and manufacturing method of semiconductor device
JP2014027287A (en) * 2013-08-28 2014-02-06 Yuutekku:Kk Steam pressure rapid heating device, method for manufacturing oxide material film, and method for manufacturing pzt film

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