TW289862B - High-density mask ROM device and process thereof - Google Patents

High-density mask ROM device and process thereof

Info

Publication number
TW289862B
TW289862B TW83111283A TW83111283A TW289862B TW 289862 B TW289862 B TW 289862B TW 83111283 A TW83111283 A TW 83111283A TW 83111283 A TW83111283 A TW 83111283A TW 289862 B TW289862 B TW 289862B
Authority
TW
Taiwan
Prior art keywords
gate oxide
transistor channel
silicon substrate
forming
coding region
Prior art date
Application number
TW83111283A
Other languages
Chinese (zh)
Inventor
Shing-Ren Sheu
Guan-Cherng Su
Jenn-Huei Jong
Yih-Jong Shenq
Original Assignee
United Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by United Microelectronics Corp filed Critical United Microelectronics Corp
Priority to TW83111283A priority Critical patent/TW289862B/en
Application granted granted Critical
Publication of TW289862B publication Critical patent/TW289862B/en

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Abstract

A process of high-density mask ROM device, which is applicable to one silicon substrate, comprises of: (1) via mask patterning performing one ion implantation procedure to form multiple thickly doped source/drain region in the substrate, and forming multiple bit lines extending with one first direction; (2) performing one chemical vapor deposition procedure to form first gate oxide with width at least 500 A on the silicon substrate, and extending with one second direction, and forming transistor channel in silicon substrate between every two joining bit lines under the first gate oxide; (3) via mask patterning one coding region, etching the first gate oxide, making the silicon substrate surface above transistor channel of the coding region expose; (4) performing one oxidization procedure to form one second gate oxide on silicon substrate surface of the coding region with the second gate oxide thickness between 100 A to 300 A; and (5) forming one conductive layer on the gate oxide, and etching back to form multiple gate electrode, forming multiple word lines extending with second direction; in which the transistor channel, two source/drain region connecting to the transistor channel, the gate oxide on the transistor channel and the gate electrode commonly forms one memory cell, by thickness difference of the gate oxide making transistor channel of the memory cells form OFF and ON two states.
TW83111283A 1994-12-05 1994-12-05 High-density mask ROM device and process thereof TW289862B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW83111283A TW289862B (en) 1994-12-05 1994-12-05 High-density mask ROM device and process thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW83111283A TW289862B (en) 1994-12-05 1994-12-05 High-density mask ROM device and process thereof

Publications (1)

Publication Number Publication Date
TW289862B true TW289862B (en) 1996-11-01

Family

ID=51398216

Family Applications (1)

Application Number Title Priority Date Filing Date
TW83111283A TW289862B (en) 1994-12-05 1994-12-05 High-density mask ROM device and process thereof

Country Status (1)

Country Link
TW (1) TW289862B (en)

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