TW273038B - - Google Patents

Info

Publication number
TW273038B
TW273038B TW081108762A TW81108762A TW273038B TW 273038 B TW273038 B TW 273038B TW 081108762 A TW081108762 A TW 081108762A TW 81108762 A TW81108762 A TW 81108762A TW 273038 B TW273038 B TW 273038B
Authority
TW
Taiwan
Application number
TW081108762A
Other languages
Chinese (zh)
Original Assignee
At & T Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by At & T Corp filed Critical At & T Corp
Application granted granted Critical
Publication of TW273038B publication Critical patent/TW273038B/zh

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/04—Housings; Supporting members; Arrangements of terminals
    • H10P74/00—
    • H10W72/012—
    • H10W72/072—
    • H10W72/222—
    • H10W72/241—
    • H10W72/252—
    • H10W72/952—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49147—Assembling terminal to base
    • Y10T29/49149—Assembling terminal to base by metal fusion bonding

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
TW081108762A 1992-08-28 1992-11-03 TW273038B (cg-RX-API-DMAC10.html)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/938,194 US5234149A (en) 1992-08-28 1992-08-28 Debondable metallic bonding method

Publications (1)

Publication Number Publication Date
TW273038B true TW273038B (cg-RX-API-DMAC10.html) 1996-03-21

Family

ID=25471067

Family Applications (1)

Application Number Title Priority Date Filing Date
TW081108762A TW273038B (cg-RX-API-DMAC10.html) 1992-08-28 1992-11-03

Country Status (6)

Country Link
US (1) US5234149A (cg-RX-API-DMAC10.html)
EP (1) EP0587337B1 (cg-RX-API-DMAC10.html)
JP (1) JP2641384B2 (cg-RX-API-DMAC10.html)
KR (1) KR0168463B1 (cg-RX-API-DMAC10.html)
DE (1) DE69325218T2 (cg-RX-API-DMAC10.html)
TW (1) TW273038B (cg-RX-API-DMAC10.html)

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US5503286A (en) * 1994-06-28 1996-04-02 International Business Machines Corporation Electroplated solder terminal
US5447264A (en) * 1994-07-01 1995-09-05 Mcnc Recessed via apparatus for testing, burn-in, and/or programming of integrated circuit chips, and for placing solder bumps thereon
JP3271475B2 (ja) * 1994-08-01 2002-04-02 株式会社デンソー 電気素子の接合材料および接合方法
EP1441388A3 (en) * 1995-03-20 2004-09-22 Unitive International Limited Solder bump fabrication methods and structure including a titanium barrier layer
US5655703A (en) * 1995-05-25 1997-08-12 International Business Machines Corporation Solder hierarchy for chip attachment to substrates
US5816478A (en) * 1995-06-05 1998-10-06 Motorola, Inc. Fluxless flip-chip bond and a method for making
WO1997050127A1 (en) * 1996-06-24 1997-12-31 International Business Machines Corporation Stacked semiconductor device package
US5950906A (en) * 1996-11-25 1999-09-14 Sandia Corporation Reversible brazing process
US6108208A (en) * 1997-12-08 2000-08-22 Unisys Corporation Testing assembly having a pressed joint with a single layer of thermal conductor which is reused to sequentially test multiple circuit modules
US6243944B1 (en) * 1997-12-08 2001-06-12 Unisys Corporation Residue-free method of assembling and disassembling a pressed joint with low thermal resistance
US6235996B1 (en) 1998-01-28 2001-05-22 International Business Machines Corporation Interconnection structure and process module assembly and rework
JPH11340265A (ja) 1998-05-22 1999-12-10 Sony Corp 半導体装置及びその製造方法
SE512906C2 (sv) * 1998-10-02 2000-06-05 Ericsson Telefon Ab L M Förfarande vid lödning av ett halvledarchip samt RF-power transistor för genomförande därav
JP3403677B2 (ja) * 1999-09-06 2003-05-06 マイクロ・テック株式会社 半田ボール形成方法
US6428942B1 (en) * 1999-10-28 2002-08-06 Fujitsu Limited Multilayer circuit structure build up method
JP3397313B2 (ja) 1999-12-20 2003-04-14 富士通株式会社 半導体装置の製造方法及び電子部品の実装方法
US6590283B1 (en) * 2000-02-28 2003-07-08 Agere Systems Inc. Method for hermetic leadless device interconnect using a submount
AU2002228926A1 (en) 2000-11-10 2002-05-21 Unitive Electronics, Inc. Methods of positioning components using liquid prime movers and related structures
US6863209B2 (en) 2000-12-15 2005-03-08 Unitivie International Limited Low temperature methods of bonding components
US6762122B2 (en) * 2001-09-27 2004-07-13 Unitivie International Limited Methods of forming metallurgy structures for wire and solder bonding
US6820794B2 (en) * 2001-12-29 2004-11-23 Texas Instruments Incorporated Solderless test interface for a semiconductor device package
US7531898B2 (en) 2002-06-25 2009-05-12 Unitive International Limited Non-Circular via holes for bumping pads and related structures
WO2004001837A2 (en) 2002-06-25 2003-12-31 Unitive International Limited Methods of forming electronic structures including conductive shunt layers and related structures
US7547623B2 (en) 2002-06-25 2009-06-16 Unitive International Limited Methods of forming lead free solder bumps
TWI225899B (en) 2003-02-18 2005-01-01 Unitive Semiconductor Taiwan C Etching solution and method for manufacturing conductive bump using the etching solution to selectively remove barrier layer
US7244671B2 (en) * 2003-07-25 2007-07-17 Unitive International Limited Methods of forming conductive structures including titanium-tungsten base layers and related structures
US7049216B2 (en) * 2003-10-14 2006-05-23 Unitive International Limited Methods of providing solder structures for out plane connections
US7427557B2 (en) * 2004-03-10 2008-09-23 Unitive International Limited Methods of forming bumps using barrier layers as etch masks
WO2005101499A2 (en) 2004-04-13 2005-10-27 Unitive International Limited Methods of forming solder bumps on exposed metal pads and related structures
US7416980B2 (en) * 2005-03-11 2008-08-26 Intel Corporation Forming a barrier layer in interconnect joints and structures formed thereby
US7687400B2 (en) 2005-06-14 2010-03-30 John Trezza Side stacking apparatus and method
US7560813B2 (en) 2005-06-14 2009-07-14 John Trezza Chip-based thermo-stack
US7838997B2 (en) 2005-06-14 2010-11-23 John Trezza Remote chip attachment
US7767493B2 (en) 2005-06-14 2010-08-03 John Trezza Post & penetration interconnection
US8456015B2 (en) 2005-06-14 2013-06-04 Cufer Asset Ltd. L.L.C. Triaxial through-chip connection
US20060281303A1 (en) * 2005-06-14 2006-12-14 John Trezza Tack & fuse chip bonding
US7786592B2 (en) 2005-06-14 2010-08-31 John Trezza Chip capacitive coupling
US7942182B2 (en) 2005-06-14 2011-05-17 Cufer Asset Ltd. L.L.C. Rigid-backed, membrane-based chip tooling
US7851348B2 (en) 2005-06-14 2010-12-14 Abhay Misra Routingless chip architecture
JP4650220B2 (ja) * 2005-11-10 2011-03-16 パナソニック株式会社 電子部品の半田付け方法および電子部品の半田付け構造
US7932615B2 (en) 2006-02-08 2011-04-26 Amkor Technology, Inc. Electronic devices including solder bumps on compliant dielectric layers
US7674701B2 (en) 2006-02-08 2010-03-09 Amkor Technology, Inc. Methods of forming metal layers using multi-layer lift-off patterns
USD546953S1 (en) 2006-04-04 2007-07-17 3M Innovative Properties Company Appendage wrap
JP4162094B2 (ja) * 2006-05-30 2008-10-08 三菱重工業株式会社 常温接合によるデバイス、デバイス製造方法ならびに常温接合装置
US7687397B2 (en) 2006-06-06 2010-03-30 John Trezza Front-end processed wafer having through-chip connections
US7670874B2 (en) 2007-02-16 2010-03-02 John Trezza Plated pillar package formation
US8293587B2 (en) 2007-10-11 2012-10-23 International Business Machines Corporation Multilayer pillar for reduced stress interconnect and method of making same
US7993971B2 (en) * 2007-12-28 2011-08-09 Freescale Semiconductor, Inc. Forming a 3-D semiconductor die structure with an intermetallic formation
JP5807221B2 (ja) * 2010-06-28 2015-11-10 アユミ工業株式会社 接合構造体製造方法および加熱溶融処理方法ならびにこれらのシステム
US9337613B1 (en) 2013-03-12 2016-05-10 Western Digital Technologies, Inc. Chip on submount carrier fixture
FR3009428B1 (fr) * 2013-08-05 2015-08-07 Commissariat Energie Atomique Procede de fabrication d'une structure semi-conductrice avec collage temporaire via des couches metalliques
EP3208028B1 (en) * 2016-02-19 2021-04-07 Max-Planck-Gesellschaft zur Förderung der Wissenschaften e.V. A method and device for reversibly attaching a phase changing metal to an object

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US3141226A (en) * 1961-09-27 1964-07-21 Hughes Aircraft Co Semiconductor electrode attachment
US3429040A (en) * 1965-06-18 1969-02-25 Ibm Method of joining a component to a substrate
US3436818A (en) * 1965-12-13 1969-04-08 Ibm Method of fabricating a bonded joint
US3634923A (en) * 1969-08-22 1972-01-18 Gen Motors Corp Method of reclaiming tungsten carbide tool bits
US3716907A (en) * 1970-11-20 1973-02-20 Harris Intertype Corp Method of fabrication of semiconductor device package
US4396140A (en) * 1981-01-27 1983-08-02 Bell Telephone Laboratories, Incorporated Method of bonding electronic components
US4889275A (en) * 1988-11-02 1989-12-26 Motorola, Inc. Method for effecting solder interconnects
US4940181A (en) * 1989-04-06 1990-07-10 Motorola, Inc. Pad grid array for receiving a solder bumped chip carrier
US5007163A (en) * 1990-04-18 1991-04-16 International Business Machines Corporation Non-destructure method of performing electrical burn-in testing of semiconductor chips
US5130779A (en) * 1990-06-19 1992-07-14 International Business Machines Corporation Solder mass having conductive encapsulating arrangement
US5060844A (en) * 1990-07-18 1991-10-29 International Business Machines Corporation Interconnection structure and test method
US5011066A (en) * 1990-07-27 1991-04-30 Motorola, Inc. Enhanced collapse solder interconnection

Also Published As

Publication number Publication date
DE69325218D1 (de) 1999-07-15
DE69325218T2 (de) 1999-11-11
EP0587337B1 (en) 1999-06-09
EP0587337A1 (en) 1994-03-16
JPH06268358A (ja) 1994-09-22
KR940004770A (ko) 1994-03-15
KR0168463B1 (ko) 1999-02-01
US5234149A (en) 1993-08-10
JP2641384B2 (ja) 1997-08-13

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