TW268166B - CMOS inverter of base-source electrode forward bias - Google Patents

Abstract

A CMOS inverter of base-source electrode forward bias comprises: multiple CMOS transistors constituting main body of inverter; and multiple base bias device whose one end connects to base of CMOS transistor; by effect of base bias device making base and source of CMOS transistor represent forward bias.

Description

A7 268166 B7 5. Description of the invention () The present invention relates to a base-source forward biased complementary metal-oxygen semi-inverter, which includes: a complex complementary metal-oxygen semi-transistor, and a complex base-bias bias Device (connected to the base of complementary metal oxide semi-transistor). The base bias device applies a forward bias to the base. In this way, the base forward bias voltage can be generated in time to reduce the threshold voltage value and increase the size of the drive current * and the transistor in the circuit The original threshold voltage value does not need to be adjusted through the process parameters in advance, so the cut-off leakage current M is kept at a very low level to achieve the effects of low voltage operation, maintaining high operation speed, and reducing static power consumption. Recently, in accordance with the development needs of personal portable electronic devices (such as palmtop computers, smart interface cards, wireless telephones, etc.), the operating voltage is reduced to 1.5V (or under K), and those who use dry battery power, Gradually become the inevitable trend of the future 1C circuit. Due to the development of element manufacturing technology, the number of elements per unit area on each crystal H is continuously increasing, so the power consumption per unit area is also relatively increasing. Because the total power consumption is directly proportional to the operating voltage, reducing the operating voltage becomes the most effective way to reduce the power consumption of the circuit. However, the operating speed of the conventional CMOS circuit decreases due to the decrease of the operating voltage. This is because the driving current of the transistor decreases as the operating voltage decreases. To solve this problem, process parameters can be used to lower the threshold voltage value (Threshold Voltage Value) of the transistor, so the driving current is increased. However, the cutoff leakage current (Cutoff Leakage Current) of the ground transistor will increase exponentially as the threshold voltage decreases. Therefore, the standby power consumption of the circuit (Standby Po This paper standard is applicable to the Chinese National Standard (CNS) A4 specification (210X 297 mm) ------ ^ ------- 叫 装 -If _ (please first Read the precautions on the back and then fill out this page) A7 B7 268166 printed by the Staff Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economy V. Invention Instructions (wer Dissipation) will also become larger. Please refer to the first figure for a circuit diagram of a conventional inverter. The circuit is composed of a pair of complementary metal oxide semi-transistors, one of which is a P-type metal oxide semi-transistor and the other is an N-type metal oxide semi-transistor. The input is connected to the gate of the complementary transistor, and the output is connected to the drain of the complementary transistor. The source of the P-type metal oxide semi-transistor is connected to the voltage source, and the source of the N-type metal oxide semi-transistor is grounded. The N-type base of the transistor and the P-type base of the transistor are connected to their sources respectively, that is, the base and the source are at zero bias. The load capacitance is the load that the inverter wants to drive. The working principle of the conventional inverter is as follows: when the input voltage of the input terminal is 0V, the P-type transistor is turned on and the N-type transistor is closed, and the K load capacitor is charged to the power supply voltage VDD; otherwise, when the input voltage of the input terminal is At V DD, the P-type transistor is turned off and the N-type transistor is turned on, so the load capacitance is discharged to 0V. The charging and discharging speed of the load capacitor (that is, the operating speed of the inverter) depends on the magnitude of the charging and discharging current. When the operating power supply voltage V DD decreases to a value close to the threshold voltage of the transistor, the charging and discharging current also decreases, and the operating speed becomes slower. To solve this problem, two methods K can be summarized from the known literature to increase the charge and discharge current, thereby improving the operating speed, that is: (I) using the process parameters to adjust the critical voltage of the transistor; (II) The base voltage is used to adjust the critical voltage of the transistor.

When the process parameters are used to lower the threshold voltage of the transistor, the cut-off leakage current of the transistor will become larger. This is because the magnitude of the cut-off leakage current is exponential and proportional to the magnitude of the critical voltage value. When the operating power supply voltage is 2V, the paper standard is applicable to the Chinese National Standard (CNS) Α4 specification (210X 297mm) I-- "installed" (please read the precautions on the back before filling out this page),? Τ Central Ministry of Economic Affairs A7 B7 26Sl66 printed by the Staff Consumer Cooperative of the Bureau of Standards V. Description of the invention () At Μ, the critical voltage value of the general transistor is greater than 0. 5V; however, in order to meet the operating conditions at 1 V Μ, the critical voltage value of the transistor Need to reduce to 0 · 2V. The difference between the cut-off leakage currents of the two is approximately 100,000 times. By reducing the critical voltage value through the process parameters, although the operation speed is accelerated, the static power consumption of the inverter when it is in the standby mode (Standby mode) will be increased. This is the second way to improve the speed of operation due to the decrease of V DD by using the defect 0 of the first method mentioned above, which is to reduce the critical voltage value of the transistor by using the technique of base forward bias. As shown in the second figure, it is the conventional inverter circuit that directly couples the base forward bias technique. In the figure, the bases of P-type and N-type metal oxide semi-transistors are connected to the input terminal. Its working principle is as follows: when the input voltage is 0V, because the base of the P-type transistor is also 0V, then the base-source of the P-type transistor is extremely forward biased, so its critical voltage value becomes lower. However, at this moment, the base source of the N-type transistor is extremely zero, so its critical voltage value remains unchanged. Since the threshold voltage of the P-type transistor is lowered, the drain current becomes larger, so the charging current becomes larger and the operation speed can become faster. On the other hand, when the input voltage is V DD, since the base-source of the N-type transistor is extremely forward-biased, the threshold voltage value decreases and the drain current becomes larger. Therefore, the discharge current becomes larger and the operation speed becomes faster. However, we should pay special attention to the fact that when the base-source forward bias voltage is too large, the base-source junction leakage current (equivalent to the base-source diode forward current) becomes very large. Therefore, the circuit shown in the second figure is only used at very low VDD (SO. 6V), otherwise, the input terminal will require a large amount of additional drive current, resulting in excessive operating power consumption. Λ — This paper standard applies to China National Standard (CNS) Α4 specification (210Χ297mm) (please read the precautions on the back before filling in this page) Printed by staff consumer cooperatives 268166 A7 B7 V. Description of the invention () The main purpose of the present invention is to provide a complementary oxymetallic semi-inverter based on a source-forward bias, which can be used in a low-voltage power supply (S1 · 5 V) operation; the next object of the present invention is to provide a base-source forward biased complementary metal-oxygen semi-inverter, which has not reduced its operating speed when operating at a low voltage power supply; An objective * To provide a complementary oxygen-oxygen semi-inverter based on a source-source forward bias to maintain very low stand-by power consumption when operating with a low power supply; Another object of the present invention is to provide A base-source forward-biased complementary metal-oxygen semi-inverter, which operates on a low-voltage power supply * makes latch-up difficult to occur. Another object of the present invention is to provide a complementary source metal-oxygen semi-inverter with a base-source forward bias, and its simplified circuit layout structure can reduce the circuit area consumption. In order for your reviewing committee to have a detailed understanding of the structure, excitement and efficacy of the present invention, 21 in conjunction with the drawings, the specific embodiments of the present invention are described in detail as follows: Please refer to the third figure, which is a specific embodiment of the present invention ( A) The circuit diagram. The constant voltage sources (VBP) 31 and (VBN) 32 are connected between the base of the P-type metal oxide semi-transistor 91 and the N-type metal oxide semi-transistor 92 and the source switch, respectively. Using constant voltage sources (VBP) 31 and (VBH) 32K, the base sources of P-type metal oxide semi-transistor 91 and N-type metal oxide semi-transistor 92 are biased. The cut-off value of the critical voltage can be estimated according to the following formula: This paper scale is applicable to China National Standard (CNS) A4 (210X297mm) n ^ i In ^^^ 1 1 ^ 1 n ^ — ll · 1 ^ 1 In ^^^ 1 —LI 0 (Please read the notes on the back before filling this page)

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A 268166 A1 B7 V. Description of invention ()

V ΤΗ, N = al + a2.Ja3-VBN

VTH, P = a 1 + a 2 · J a 3 — V BP where VTH, N and VTH, P represent the critical voltage value of N-type or P-type transistors respectively, VBN and VBP represent N-type or P-type transistors respectively The value of Ji Yiyuan's overseas Chinese pressure. The parameters a 1, a2 and a3 are the device characteristic parameters, which only change with the structure of the device and not with the operating voltage. As a result of the base-source shunqiao, from the above formula, it can be known that the base-source bias voltages VBN and VBP of the transistor increase, the parameters a 1, a 2 and a 3 do not change, then the value in the root sign changes The threshold voltages VTH, N and VTH, P must be lowered accordingly. The fourth graph is the theoretical value and real value of the threshold voltage versus base forward bias function for the specific embodiment (1) of the present invention. The horizontal axis is the base forward bias voltage and the vertical axis is the critical value. Voltage value. Observing the fourth graph, we can know that as the forward bias value of the base phoenix increases, the critical voltage value decreases accordingly, which is consistent with the inference of the formula in the previous section. Due to the decrease of the threshold voltage value, the driving capability of the drain current is increased. We can know that the operation speed of the flip-flop in the embodiment (1) is faster. Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs (please read the precautions on the back before filling in this page). Refer to the fifth figure, which is a specific embodiment of the invention (1) and a conventional inverter circuit (1) Comparison of transient response. We compared the results of the specific embodiment of the present invention (a) and the conventional inverter circuit (a) in the output rise response and output fall response at operating power supply voltages of 1.0V, 0.8V, and 0.6V, respectively. . Observe the fifth figure, the paper size of the present invention is applicable to the Chinese National Standard (CNS) Α4 specification (2 丨 0Χ297mm) 268166 A7 B7 V. Description of the invention () n- ^ — ^ 1— Jm in Hr- I nn vn ^^ 1 (Please read the precautions on the back before filling in this page) The output rise response curve and output fall response curve of the embodiment (1) are better than those of the conventional inverter circuit (1). The output drop curve is steep, and the experimental results prove that the output response of the specific embodiment (1) is indeed better than the conventional inverter circuit (1). The sixth diagram is a comparison of the delay time of the specific embodiment (1) of the present invention and the conventional inverter circuit (1) versus the power supply voltage threshold. As shown in the sixth figure, it is the comparison of the delay time obtained from the experiment in the fifth figure to the power supply voltage. The delay time is defined as half the sum of the rise time and the fall time, and the rise time and the fall time are generally Definition. From the sixth figure, we can know that the specific embodiment (1) of the present invention has a shorter delay time than the conventional inverter circuit (1), and the trend of being influenced by the power supply voltage is more harmonious. -Printed by the employee consumer cooperative of the Central Bureau of Standards of the Ministry of Economics, please refer to the seventh figure, which is the circuit diagram of the specific embodiment (2) of the present invention. Synchronous base bias device to generate base forward bias. The p-type metal oxide semi-transistor 91 and the N-type metal oxide semi-transistor 92 constitute the main body of the inverter. Transistors 93, 94 and transistors 95, 96 are base bias circuits to provide the forward bias required for the bases of transistors 91 and 92, respectively. Input 97 is connected to the gates of transistors 91 and 92, and output 98 is connected to the drains of transistors 94 and 95. The load capacitor 9 9 is connected to the output terminal 9 8. The working principle of the above inverter circuit is as follows: Let the gates of the transistors 9 3 and 9 6 be the ground and the power supply voltage, respectively, to make them in a constant conduction state. This paper scale is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) Α7 Β7 268166 V. Description of invention () When the input voltage of the input terminal 97 is 0V, the transistors 9 1 and 94 are turned on, and the transistor 92 and 95 closed. Since the transistor 94 is turned on, the voltage value of the node A934 is determined by the power supply voltage value of the transistor 93 and the voltage value of the output terminal 98. Assuming that the initial value of the voltage at the terminal 98 during the charging process is 0 Å, the voltage of the node 934 will be less than the power supply voltage VDD, so that the base of the transistor 91 is forward biased. At the same time, because the transistor 95 is turned off, the potential of the node B956 remains grounded due to the constant conduction state of the transistor hip 96. It is the off state of the K transistor 92 when the input voltage of the input terminal 9 7 is 0V and the base and source are biased at zero. When the input voltage at the input terminal 97 is VDD, the transistors 92 and 95 are turned on and the transistors 91 and 94 are turned off. According to the similar reasoning described above, the voltage value of the node A9 34 is maintained at VDD, and the voltage value of the node B9 5 6 is determined by the voltage division of the output terminal 98 through the transistors 95 and 96. It is that the K transistor 9 2 is in the forward-biased conduction state of the base, and the transistor hip 9 1 is in the off-off state of zero bias of the base and source. By the voltage dividing effect of the transistors 93 and 94 and the transistors 95 and 96, when the transistors 9 1 and 9 2 are turned on, the base-source bias value is kept at about the low level of the power supply voltage value V DD-half , To reduce the leakage current of the base-source junction. The specific embodiment (2) of the present invention has the following characteristics due to the design of the base bias circuit described above * (I) The base-bias operation of the transistor makes the charge and discharge currents higher than those of the transistor under traditional operation It is large, so it can be operated under a low-voltage power supply (S1 · 5V) without reducing the operating speed; this paper size is applicable to the Chinese National Standard (CNS) Α4 specification (210X 297 mm) i 1—-Ί—-IT- -"--R (please read the notes on the back before filling this page)

, 1T Printed by the Ministry of Economic Affairs Central Standards Bureau, Gonggong Consumer Cooperative, Α7 Β7 coffee; 166 V. Description of the invention () (II) The initial critical voltage value of the electric crystal hip does not need to be reduced by the process in advance, Μ this, in the waiting state Reduced leakage current * minimizes the power consumption when the transistor is operated on a low-voltage power supply. The specific embodiments (a) and (b) of the present invention can be operated under a low voltage power supply (SI ‘5V) due to the design of the above base bias device. In general, the lock-up voltage (H〇 lding Vol tage) of the complementary metal-oxygen semi-inverter is higher than the operating voltages of the specific embodiments (1) and (2), so the latch-up phenomenon is unlikely to occur. The metal oxide semi-inverter and base bias device of the specific embodiment (2) of the present invention include three P-type metal oxide semi-transistors and three N-type metal oxide semi-transistors. In the circuit layout structure, the transistors of the same type can be degenerated to reduce the circuit area consumption. The description is as follows: The eighth figure is a cross-sectional view of a specific embodiment (2) of the present invention. As shown in the eighth figure, two series-connected P-type metal oxide semi-transistors that generate base forward bias can be connected to the inverter body The P-type metal oxide semi-transistors in the shared the same N-type doped diffusion well region 1 1 7. The buried node of the series-connected transistors can share a heavily doped region 1 1 8 »and one end connected to the power supply voltage can share the same source 111 as the p-type transistor of the inverter body. The signal_input end is the picture number 1 1 2 and the output end is the picture number 1 1 3. The load capacitor 1 1 4 is connected to the output 1 1 3. The gates 115 and 116 are respectively P + type doped and N + type doped polycrystalline silicon gates. Please refer to the ninth figure again, it is the specific embodiment of the invention (2). The paper size is applicable to the Chinese National Standard (CNS) Α4 specification (210X297 mm) (please read the precautions on the back before filling this page) Apparel · Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs Printed by the Employee Consumer Cooperative of the Central Bureau of Precincts of the Ministry of Economic Affairs 268166 A7 _______B7 V. Description of the invention () Top view of the degenerate circuit structure As shown in the figure, 1 2 1 is an N-type doped diffusion well region; 122 is a P-type densely-doped diffusion region; 123 is a P-type doped polycrystalline silicon gate; 124 is an N-type heavily-doped diffusion region. It serves as an ohmic contact region of N-type doped diffusion well region 121. The metal connection 125 is connected to the power supply voltage and the buried P-type heavily doped diffusion region 1 2 2 is the P-type metal oxide semiconductor of the inverter body and the P-type metal oxide semiconductor of the back-gate forward bias circuit The source shared by transistors. Connect Jin 26 to ground. The Jinda wires 1 2 7 and 1 2 8 are the input and output parts, and need to be connected to the gate and drain of the N-type metal oxide semi-transistor in the inverter body. Hereby, in order to make Jun Jugui's reviewer have a deeper understanding of the structure, features and conventional inverters of the present invention, the difference is compared to the following: 1. The conventional complementary metal oxide semi-inverter is more than 2 · Voltage operation on OVK. When operating at low power E (0 · 6 ~ 1 · 5V), its operating speed cannot be maintained at the operating speed at higher operating voltage; the complementary metal-oxygen semi-inverted base-source forward bias of the present invention When operating under low voltage power supply (S 1 · 5 V), it can still maintain the operating speed at higher operating voltage. In this way, personal portable electronic devices, such as handheld computers, smart interface cards, wireless telephones, etc., can use extremely common dry battery power, reducing the inconvenience caused by the current use of rechargeable batteries. 2. When the conventional complementary metal-oxygen semi-inverter is operated at low current, its static power consumption is higher due to the larger cut-off leakage current; the present invention is based on the forward biased complementary metal-oxygen of the source Semi-inverter, when operating under low-voltage power supply (έl · 5V), the hibiscus bias -10 'This paper scale is applicable to China National Standard (CNS) Α4 specifications (210X2S »7mm) (please read the back (Please fill out this page again) Γ-; Binding A7

26δΪ66 V. Description of the invention () The device can timely control the bias voltage between the base and the source so as not to be too large, reduce the cut-off leakage current, and maintain very low standby power consumption. 3. The lock-up voltage (Ho 1 ding Voltage) of the conventional complementary metal-oxygen semi-inverters are all greater than 0.5-1.5 volts, and latch up-once it occurs * may cause permanent damage to the circuit; The base-source forward biased complementary metal-oxygen semi-inverter of the present invention is smaller than the conventional complementary metal-oxygen semi-inverter when operating under a low voltage power supply (S 1 · 5 V) I keep the holding voltage, so that the latch-up phenomenon is less likely to occur. In summary, it should be known that the "base-source forward biased complementary metal-oxygen semi-inverter" invented in this case has industrial applicability, novelty, and progress, and meets the requirements of the invention patent. The above is only a specific embodiment of the present invention, and the present invention is not limited by K. Professionals who are skilled in this type of technology, according to the shape, structure, characteristics and spirit described in the scope of the following patent applications, are The implementation of modifications, changes, etc. should be included in the patent application scope of the present invention. (1) The first part of the diagram is the conventional inverter circuit (1) The second picture is the conventional inverter circuit (2) The third picture is a specific embodiment of the invention (1 ) The fourth diagram of the circuit diagram is a specific embodiment of the invention (a) the theoretical value and experimental value of the threshold voltage vs. base forward bias function function. The fifth diagram is a specific embodiment of the invention (a) Reverse phase with conventional usage -11-This paper scale is applicable to the Chinese National Standard (CNS) Α4 specification (210X297mm) (please read the precautions on the back before filling this page), install *

、 1T Printed by the Ministry of Economic Affairs, Central Bureau of Standardization and Employee Consumer Cooperation A7 Printed by the Ministry of Economic Affairs and Standardization Bureau, Employee and Consumer Cooperative Society 268166 B7 V. The invention describes the transient response of the device circuit (_-) trtxt. This is a specific embodiment of the present invention (1) compared with the conventional inverter circuit (-); the delay time is compared with the power supply voltage. The ir diagram is the invention: the eighth embodiment of the circuit diagram of the second embodiment The figure is the invention: the cross-sectional view of the embodiment of the wind body (2). The ninth picture is the invention: the top view of the degenerate circuit structure of the specific embodiment (2) (2). Voltage source (V BP) 3 2 Constant voltage source (V BN) 9 1 P-type metal oxide semi-transistor (P Μ 0 S) 9 2 N-type metal oxide semi-transistor (N Μ 〇S) 9 3 P-type gold Oxygen semi-transistor (P Μ 〇S) 9 4 P type gold Semi-transistor (P Μ 0 S) 9 5 N-type metal oxide semi-transistor (N Μ 0 S) 9 6 N-type metal oxide semi-transistor (N Μ 0 S) 9 7 Input 9 8 Output 9 9 Load Capacitor 9 3 4 Node A 9 5 6 Node B 1 1 1 Source 1 1 2 Input 1 1 3 Output 1 1 4 Load capacitance 1 1 5 Gate 1 1 6 Gate 1 1 7 N-type doped diffusion well Area-12----- „------ installed-- (please read the precautions on the back before filling in this page)-* This paper size is applicable to China National Standard (CNS) A4 specification (210X 297mm ) 268166 ΑΊ Β7 V. Description of the invention () 118 Concentrated doped region 121 N-type doped diffusion well region 122 P-type concentrated doped diffusion region 123 P-type doped polycrystalline silicon gate 124 N-type concentrated doped diffusion region 125 Metal Connection 126 Gold connection 127 Metal connection 128 Gold connection (Please read the notes on the back before filling this page)

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* 1T Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs. This paper scale applies the Chinese National Standard (CNS) Α4 specification (210X 297 mm)

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Claims (1)

Printed by Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs 268 丄 66 as B8 C8 ___P8 _ VI. Scope of Patent Application 1. A complementary source-based forward biased metal-oxygen semi-inverter, including: complex complementary The metal oxide semi-transistor is the main body that constitutes the inverter; and the complex base bias device * has one end connected to the base of the complementary metal oxide semi-transistor; by the function of the base bias device, the complementary The base electrode and source electrode of the metal oxide semi-transistor are forward biased. 2. The "base-source forward biased complementary metal-oxygen semi-inverter" as described in item 1 of the patent application scope, in which the other end of the base bias device is connected to the source and is at a certain voltage power supply. 3. The "base-source forward biased complementary metal-oxygen semi-inverter" as described in item 1 of the patent application scope, in which the other end of the base bias device is connected to the input terminal and the base is biased The pressure device includes: an N-type base self-biasing circuit, and a P-type base self-biasing circuit. 4. As mentioned in item 3 of the scope of the patent application, the "base-source forward biased complementary metal-oxygen semi-inverter", in which the N-type base marrow self-bias circuit is composed of two P-type gold Oxygen semi-transistors are connected in series, the source of the previous stage transistor is connected to the positive voltage power supply, the gate is grounded, the drain is connected to the source of the later stage transistor, the latter stage transistor, the gate and the reverse The gate input terminal of the phase device is connected, and its drain electrode is connected to the Ji Jin output terminal of the inverter; the connection terminal of the two transistors is the node connected to the N-type substrate. 5. As stated in item 1 of the scope of patent application, "Basic-Source Forward Bias-14-This paper scale is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) (please read the precautions on the back first (Fill in this page) Installed 268166 ^ C8 ____D8 printed by the Staff Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs VI. Patent-applicable complementary metal-oxygen semi-inverters ", in which the p-type base self-bias circuit consists of two N-type metal oxide semi-transistors are connected in series. The source of the previous stage transistor is grounded, the gate is connected to the positive voltage power supply, the drain is connected to the source of the rear transistor, and the latter stage transistor, the gate The pole is connected to the gate input end of the inverter, and the drain is connected to the drain output end of the inverter; the connection end of the two transistors is a node connected to the P-type base. 6. A base-source forward biased complementary metal-oxygen semi-inverter, comprising: a P-type substrate; an N-type diffusion well region; an N-type metal-oxygen semi-transistor is completed on the P-type substrate , A P-type metal oxide semi-transistor is completed in the N-type diffusion well; the two metal oxide semi-transistors form an inverter; two P-type metal oxide semi-transistors are completed in the P-type The same N-type diffusion well area where the metal oxide semi-transistor is located, the connection node of the two transistors is a common P-type heavily doped area, and is electrically connected to the N-type diffusion well area; one of the P-type metal oxide semi-oxide The transistor is connected to the voltage power supply, and the transistor and the P-type metal oxide semi-transistor in the inverter share the same source diffusion region; the other P-type metal oxide semi-transistor is connected to the output terminal, and the transistor and The P-type metal oxide semi-transistors in the inverter share the same drain diffusion region; these two P-type metal oxide semi-transistors constitute the N-type base self-bias circuit of the inverter. -15 _ This paper scale is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) .................................... installed ...... (Please read the back of the first Matters needing attention before filling this page) -s