TW231386B - - Google Patents
Info
- Publication number
- TW231386B TW231386B TW082102814A TW82102814A TW231386B TW 231386 B TW231386 B TW 231386B TW 082102814 A TW082102814 A TW 082102814A TW 82102814 A TW82102814 A TW 82102814A TW 231386 B TW231386 B TW 231386B
- Authority
- TW
- Taiwan
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
- G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US79951591A | 1991-11-27 | 1991-11-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW231386B true TW231386B (enExample) | 1994-10-01 |
Family
ID=25176116
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW082102814A TW231386B (enExample) | 1991-11-27 | 1993-04-14 |
Country Status (3)
| Country | Link |
|---|---|
| EP (1) | EP0544247A3 (enExample) |
| JP (1) | JPH05274871A (enExample) |
| TW (1) | TW231386B (enExample) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5537346A (en) * | 1994-05-20 | 1996-07-16 | Samsung Electronics Co., Ltd. | Semiconductor memory device obtaining high bandwidth and signal line layout method thereof |
| KR0164391B1 (ko) * | 1995-06-29 | 1999-02-18 | 김광호 | 고속동작을 위한 회로 배치 구조를 가지는 반도체 메모리 장치 |
| US5995404A (en) * | 1996-07-11 | 1999-11-30 | Texas Instruments Incorporated | DRAM architecture with aligned data storage and bond pads |
| CN102497832B (zh) | 2009-09-08 | 2015-09-09 | 显著外科技术公司 | 用于电外科装置、电外科器械的盒组件及其使用方法 |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4656613A (en) * | 1984-08-29 | 1987-04-07 | Texas Instruments Incorporated | Semiconductor dynamic memory device with decoded active loads |
| DE69129882T2 (de) * | 1990-06-19 | 1999-03-04 | Texas Instruments Inc., Dallas, Tex. | Assoziatives DRAM-Redundanzschema mit variabler Satzgrösse |
-
1992
- 1992-11-25 EP EP19920120068 patent/EP0544247A3/en not_active Withdrawn
- 1992-11-27 JP JP4318607A patent/JPH05274871A/ja active Pending
-
1993
- 1993-04-14 TW TW082102814A patent/TW231386B/zh active
Also Published As
| Publication number | Publication date |
|---|---|
| EP0544247A2 (en) | 1993-06-02 |
| JPH05274871A (ja) | 1993-10-22 |
| EP0544247A3 (en) | 1993-10-20 |