TW202403562A - 用於記憶體位址空間之頁面的「讀值只有x」性質 - Google Patents

用於記憶體位址空間之頁面的「讀值只有x」性質 Download PDF

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Publication number
TW202403562A
TW202403562A TW112105760A TW112105760A TW202403562A TW 202403562 A TW202403562 A TW 202403562A TW 112105760 A TW112105760 A TW 112105760A TW 112105760 A TW112105760 A TW 112105760A TW 202403562 A TW202403562 A TW 202403562A
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TW
Taiwan
Prior art keywords
read
value
memory
property
address
Prior art date
Application number
TW112105760A
Other languages
English (en)
Chinese (zh)
Inventor
格雷姆彼得 巴恩斯
西蒙約翰 克拉斯克
Original Assignee
英商Ａｒｍ股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 英商Ａｒｍ股份有限公司 filed Critical 英商Ａｒｍ股份有限公司
Publication of TW202403562A publication Critical patent/TW202403562A/zh

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1009—Address translation using page tables, e.g. page table structures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1466—Key-lock mechanism
    • G06F12/1475—Key-lock mechanism in a virtual system, e.g. with translation means

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Memory System (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
TW112105760A 2022-03-16 2023-02-17 用於記憶體位址空間之頁面的「讀值只有x」性質 TW202403562A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB2203646.1 2022-03-16
GB2203646.1A GB2616643B (en) 2022-03-16 2022-03-16 Read-as-X property for page of memory address space

Publications (1)

Publication Number Publication Date
TW202403562A true TW202403562A (zh) 2024-01-16

Family

ID=81254766

Family Applications (1)

Application Number Title Priority Date Filing Date
TW112105760A TW202403562A (zh) 2022-03-16 2023-02-17 用於記憶體位址空間之頁面的「讀值只有x」性質

Country Status (9)

Country Link
US (1) US20250181515A1 (https=)
EP (1) EP4494012A1 (https=)
JP (1) JP2025512715A (https=)
KR (1) KR20240159950A (https=)
CN (1) CN118843857A (https=)
GB (1) GB2616643B (https=)
IL (1) IL314979A (https=)
TW (1) TW202403562A (https=)
WO (1) WO2023175289A1 (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20250110902A1 (en) * 2023-09-29 2025-04-03 Ampere Computing Llc Processors employing default tags for writes to memory from devices not compliant with a memory tagging extension and related methods
US20250307190A1 (en) * 2024-03-28 2025-10-02 Advanced Micro Devices, Inc. On-chip collective operations
CN121255663B (zh) * 2025-12-03 2026-03-20 中国科学院软件研究所 污点标签处理方法、装置、设备及介质

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5870097A (en) * 1995-08-04 1999-02-09 Microsoft Corporation Method and system for improving shadowing in a graphics rendering system
US9489313B2 (en) * 2013-09-24 2016-11-08 Qualcomm Incorporated Conditional page fault control for page residency
US20160019168A1 (en) * 2014-07-18 2016-01-21 Qualcomm Incorporated On-Demand Shareability Conversion In A Heterogeneous Shared Virtual Memory
CN106503004B (zh) * 2015-09-07 2020-09-11 腾讯科技（深圳）有限公司 一种信息处理方法及装置、终端
GB2547242B (en) * 2016-02-11 2018-05-23 Advanced Risc Mach Ltd Graphics processing
US10268596B2 (en) * 2017-04-21 2019-04-23 Intel Corporation Memory access compression using clear code for tile pixels
US11139967B2 (en) * 2018-12-20 2021-10-05 Intel Corporation Restricting usage of encryption keys by untrusted software

Also Published As

Publication number Publication date
WO2023175289A1 (en) 2023-09-21
JP2025512715A (ja) 2025-04-22
KR20240159950A (ko) 2024-11-07
IL314979A (en) 2024-10-01
GB202203646D0 (en) 2022-04-27
GB2616643B (en) 2024-07-10
US20250181515A1 (en) 2025-06-05
GB2616643A (en) 2023-09-20
EP4494012A1 (en) 2025-01-22
CN118843857A (zh) 2024-10-25

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