IL314979A - property reads as X for page memory address space - Google Patents

property reads as X for page memory address space

Info

Publication number
IL314979A
IL314979A IL314979A IL31497924A IL314979A IL 314979 A IL314979 A IL 314979A IL 314979 A IL314979 A IL 314979A IL 31497924 A IL31497924 A IL 31497924A IL 314979 A IL314979 A IL 314979A
Authority
IL
Israel
Prior art keywords
page
property
read
memory address
address space
Prior art date
Application number
IL314979A
Other languages
English (en)
Hebrew (he)
Inventor
Graeme Peter Barnes
Simon John Craske
Original Assignee
Advanced Risc Mach Ltd
Graeme Peter Barnes
Simon John Craske
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Risc Mach Ltd, Graeme Peter Barnes, Simon John Craske filed Critical Advanced Risc Mach Ltd
Publication of IL314979A publication Critical patent/IL314979A/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/1027Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/1009Address translation using page tables, e.g. page table structures
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1458Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1466Key-lock mechanism
    • G06F12/1475Key-lock mechanism in a virtual system, e.g. with translation means

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Memory System (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
IL314979A 2022-03-16 2022-12-20 property reads as X for page memory address space IL314979A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB2203646.1A GB2616643B (en) 2022-03-16 2022-03-16 Read-as-X property for page of memory address space
PCT/GB2022/053304 WO2023175289A1 (en) 2022-03-16 2022-12-20 Read-as-x property for page of memory address space

Publications (1)

Publication Number Publication Date
IL314979A true IL314979A (en) 2024-10-01

Family

ID=81254766

Family Applications (1)

Application Number Title Priority Date Filing Date
IL314979A IL314979A (en) 2022-03-16 2022-12-20 property reads as X for page memory address space

Country Status (9)

Country Link
US (1) US20250181515A1 (https=)
EP (1) EP4494012A1 (https=)
JP (1) JP2025512715A (https=)
KR (1) KR20240159950A (https=)
CN (1) CN118843857A (https=)
GB (1) GB2616643B (https=)
IL (1) IL314979A (https=)
TW (1) TW202403562A (https=)
WO (1) WO2023175289A1 (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20250110902A1 (en) * 2023-09-29 2025-04-03 Ampere Computing Llc Processors employing default tags for writes to memory from devices not compliant with a memory tagging extension and related methods
US20250307190A1 (en) * 2024-03-28 2025-10-02 Advanced Micro Devices, Inc. On-chip collective operations
CN121255663B (zh) * 2025-12-03 2026-03-20 中国科学院软件研究所 污点标签处理方法、装置、设备及介质

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5870097A (en) * 1995-08-04 1999-02-09 Microsoft Corporation Method and system for improving shadowing in a graphics rendering system
US9489313B2 (en) * 2013-09-24 2016-11-08 Qualcomm Incorporated Conditional page fault control for page residency
US20160019168A1 (en) * 2014-07-18 2016-01-21 Qualcomm Incorporated On-Demand Shareability Conversion In A Heterogeneous Shared Virtual Memory
CN106503004B (zh) * 2015-09-07 2020-09-11 腾讯科技(深圳)有限公司 一种信息处理方法及装置、终端
GB2547242B (en) * 2016-02-11 2018-05-23 Advanced Risc Mach Ltd Graphics processing
US10268596B2 (en) * 2017-04-21 2019-04-23 Intel Corporation Memory access compression using clear code for tile pixels
US11139967B2 (en) * 2018-12-20 2021-10-05 Intel Corporation Restricting usage of encryption keys by untrusted software

Also Published As

Publication number Publication date
WO2023175289A1 (en) 2023-09-21
TW202403562A (zh) 2024-01-16
JP2025512715A (ja) 2025-04-22
KR20240159950A (ko) 2024-11-07
GB202203646D0 (en) 2022-04-27
GB2616643B (en) 2024-07-10
US20250181515A1 (en) 2025-06-05
GB2616643A (en) 2023-09-20
EP4494012A1 (en) 2025-01-22
CN118843857A (zh) 2024-10-25

Similar Documents

Publication Publication Date Title
IL314979A (en) property reads as X for page memory address space
EP3881186A4 (en) MEMORY ADDRESS OBSCURATION
IL315722A (en) Piperazine-substituted indazole compounds as PARG inhibitors
EP3844651A4 (en) SECURITY CONFIGURATION FOR MEMORY ADDRESS TRANSLATION FROM OBJECT-SPECIFIC VIRTUAL ADDRESS SPACES TO A PHYSICAL ADDRESS SPACE
GB2607476B (en) Storage class memory
GB2613350B (en) Two-stage address translation
GB202304323D0 (en) Direct memory access controller
GB2595256B (en) Translation table address storage circuitry
IL309013A (en) Converted pyrimidinylpyrazoles as CDK2 inhibitors
PL4348432T3 (pl) Instrukcja resetowania ochrony dynamicznej translacji adresów
GB202019835D0 (en) Memory access
GB2606355B (en) Technique for constraining access to memory using capabilities
GB2637270B (en) Fast memory clear of system memory
GB2602636B (en) Technique for tracking modification of content of regions of memory
GB202302655D0 (en) Predetermined less-secure memory property
GB202318221D0 (en) Memory address access frequency
GB2628371B (en) Storing coalesced memory address translations
GB2578412B (en) Efficient testing of direct memory address translation
GB202114690D0 (en) Location based medium access control address
EP4405346A4 (en) SMALL MOLECULE INHIBITORS OF TEAD-YAP
IL290753A (en) Low-latency encryption for ddr-dram memory
GB2595368B (en) Memory for storing data blocks
GB202403963D0 (en) Tag-locating address determination
EP4586257A4 (en) MEMORY
GB202314593D0 (en) Unified memory address translation