TW202401963A - Power supply device for suppressing surge - Google Patents

Abstract

A power supply device for suppressing surges includes a bridge rectifier, a first transformer, an output stage circuit, a buffer circuit, a power switch element, a PWM (Pulse Width Modulation) IC (Integrated Circuit), a first discharge circuit, a second discharge circuit, and a third discharge circuit. The buffer circuit is coupled to the bridge rectifier. The PWM IC is coupled to a first ground voltage. The buffer circuit is coupled through the first discharge circuit to a ground. The buffer circuit is further coupled through the second discharge circuit to a second ground voltage. The first discharge circuit is further coupled through the third discharge circuit to the first ground voltage.

Description

Surge suppression power supply

The present invention relates to a power supply, and in particular to a power supply capable of suppressing surges.

Among the causes of surges in power supplies, the most serious ones are surges caused by lightning strikes. Lightning surges are caused by natural phenomena. If the power supply is used in areas prone to lightning, it is necessary to add appropriate lightning surge protection. However, if the lightning surge energy is too large and exceeds the range that the protection mechanism can withstand, it will still cause damage to the power supply. In view of this, it is necessary to propose a new solution to overcome the shortcomings of previous technologies.

In a preferred embodiment, the present invention proposes a power supply for suppressing surges, including: a bridge rectifier that generates a rectified potential based on a first input potential and a second input potential; a first transformer including a a first main coil and a first auxiliary coil, wherein the first main coil receives the rectified potential, and the first auxiliary coil generates an induced potential; an output stage circuit generates an output potential according to the induced potential; A buffer circuit coupled to the bridge rectifier; a power switch that selectively couples the first main coil to the buffer circuit according to a pulse width modulation potential; a pulse width modulation integrated circuit a circuit coupled to a first ground potential and generating the pulse width modulation potential; a first discharge circuit, wherein the buffer circuit is coupled to the earth via the first discharge circuit; a second discharge circuit, The buffer circuit is further coupled to a second ground potential via the second discharge circuit; and a third discharge circuit, wherein the first discharge circuit is further coupled to the first ground potential via the third discharge circuit.

In order to make the purpose, features and advantages of the present invention more obvious and easy to understand, specific embodiments of the present invention are listed below and described in detail with reference to the accompanying drawings.

Certain words are used in the specification and patent claims to refer to specific components. Those skilled in the art will understand that hardware manufacturers may use different names to refer to the same component. This specification and the patent application do not use differences in names as a way to distinguish components, but differences in functions of components as a criterion for distinction. The words "include" and "include" mentioned throughout the specification and the scope of the patent application are open-ended terms, and therefore should be interpreted as "include but not limited to." The term "approximately" means that within an acceptable error range, those skilled in the art can solve the technical problem and achieve the basic technical effect within a certain error range. In addition, the word "coupling" in this specification includes any direct and indirect electrical connection means. Therefore, if a first device is coupled to a second device, it means that the first device can be directly electrically connected to the second device, or indirectly electrically connected to the second device via other devices or connections. Two devices.

Figure 1 is a schematic diagram of a power supply 100 according to an embodiment of the present invention. For example, the power supply 100 can be applied to a desktop computer, a notebook computer, or an all-in-one computer. As shown in Figure 1, the power supply 100 includes: a bridge rectifier 110, a first transformer 120, an output stage circuit 130, a buffer circuit 140, a power switch 150, a pulse width modulation Pulse Width Modulation Integrated Circuit (PWM IC) 160, a first discharge circuit 170, a second discharge circuit 180, and a third discharge circuit 190. It should be noted that, although not shown in FIG. 1 , the power supply 100 may further include other components, such as a voltage regulator or/and a negative feedback circuit.

The bridge rectifier 110 can generate a rectified potential VR according to a first input potential VIN1 and a second input potential VIN2, wherein one of the first input potential VIN1 and the second input potential VIN2 can have any frequency and any amplitude. AC voltage. For example, the frequency of the AC voltage can be about 50Hz or 60Hz, and the root mean square value of the AC voltage can be about 90V to 264V, but it is not limited thereto. The first transformer 120 includes a first main coil 121 and a first auxiliary coil 122. The first main coil 121 can be located on one side of the first transformer 120, and the first auxiliary coil 122 can be located opposite to the first transformer 120. other side. The first primary coil 121 can receive the rectified potential VR, and in response, the first secondary coil 122 can generate an induced potential VS. The output stage circuit 130 can generate an output potential VOUT according to the induced potential VS. For example, the output potential VOUT can be a direct current potential, and its potential level can be between 18V and 20V, but it is not limited thereto. The buffer circuit 140 is coupled to the bridge rectifier 110 . The power switch 150 can selectively couple the first main coil 121 to the buffer circuit 140 according to a pulse width modulation potential VM. For example, if the pulse width modulation potential VM is a high logic level, the power switch 150 can couple the first main coil 121 to the buffer circuit 140 (that is, the power switch 150 can be approximately a short-circuit path) ; On the contrary, if the pulse width modulation potential VM is a low logic level, the power switch 150 will not couple the first main coil 121 to the buffer circuit 140 (that is, the power switch 150 can be approximated as an open circuit path). The pulse width modulation integrated circuit 160 is coupled to a first ground potential VSS1. The pulse width modulation integrated circuit 160 can be used to generate the pulse width modulation potential VM. The buffer circuit 140 may be coupled to ground 199 via the first discharge circuit 170 . For example, the ground 199 may refer to the earth, or any ground path coupled to the earth, which is not an internal component of the power supply 100 . The buffer circuit 140 may be further coupled to a second ground potential VSS2 via the second discharge circuit 180, where the second ground potential VSS2 may be the same as or different from the first ground potential VSS1. In addition, the first discharging circuit 170 may also be coupled to the first ground potential VSS1 via the third discharging circuit 190 . Under this design, when a surge with high voltage is applied to the power supply 100, the buffer circuit 140 can be used to absorb the energy of the surge, and the aforementioned energy can also be passed through the first discharge circuit 170 and the second discharge circuit. 180, and the third discharge circuit 190 further releases it (for example, it can be released to the first ground potential VSS1, the second ground potential VSS2, or (and) the earth 199). According to actual measurement results, this circuit design method can prevent the power supply 100 from being accidentally damaged due to high voltage surges, thereby effectively improving the overall reliability of the power supply 100.

The following embodiments will introduce the detailed structure and operation of the power supply 100 . It must be understood that these drawings and descriptions are only examples and are not intended to limit the scope of the invention.

Figure 2 is a circuit diagram of a power supply 200 according to an embodiment of the present invention. In the embodiment of FIG. 2, in the embodiment of FIG. 2, the power supply 200 has a first input node NIN1, a second input node NIN2, and an output node NOUT, and includes: a bridge rectifier 210 , a first transformer 220, an output stage circuit 230, a buffer circuit 240, a power switch 250, a pulse width modulation integrated circuit 260, a first discharge circuit 270, a second discharge circuit 280, and A third discharge circuit 290. The first input node NIN1 and the second output node NIN2 of the power supply 200 can respectively receive a first input potential VIN1 and a second input potential VIN2 from an external input power source, and the output node NOUT of the power supply 200 can be An output potential VOUT is output to an electronic device (not shown).

The bridge rectifier 210 includes a first diode D1, a second diode D2, a third diode D3, and a fourth diode D4. The first diode D1 has an anode and a cathode, wherein the anode of the first diode D1 is coupled to the first input node NIN1, and the cathode of the first diode D1 is coupled to a first node N1 To output the rectified potential VR. The second diode D2 has an anode and a cathode, wherein the anode of the second diode D2 is coupled to the second input node NIN2, and the cathode of the second diode D2 is coupled to the first node N1. The third diode D3 has an anode and a cathode, wherein the anode of the third diode D3 is coupled to a second node N2, and the cathode of the third diode D3 is coupled to the first input node NIN1 . The fourth diode D4 has an anode and a cathode, wherein the anode of the fourth diode D4 is coupled to the second node N2, and the cathode of the fourth diode D4 is coupled to the second input node NIN2.

The first transformer 220 includes a first main coil 221 and a first auxiliary coil 222, wherein the first transformer 220 may further have a built-in magnetizing inductor LM. The exciting inductor LM may be an inherent component produced when the first transformer 220 is manufactured, and is not an external independent component. The first main coil 221 and the exciting inductor LM may be located on the same side of the first transformer 220 (for example, the primary side), while the first secondary coil 222 may be located on the opposite side of the first transformer 220 (for example, the secondary side). side, which can be isolated from the primary side). The first main coil 221 has a first end and a second end, wherein the first end of the first main coil 221 is coupled to the first node N1 to receive the rectified potential VR, and the second end of the first main coil 221 is coupled to a third node N3. The exciting inductor LM has a first end and a second end, wherein the first end of the exciting inductor LM is coupled to the first node N1, and the second end of the exciting inductor LM is coupled to the third node N3 . The first auxiliary coil 222 has a first end and a second end, wherein the first end of the first auxiliary coil 222 is coupled to a fourth node N4 to output an induced potential VS, and the first end of the first auxiliary coil 222 The two terminals are coupled to a second ground potential VSS2.

The output stage circuit 230 includes a fifth diode D5 and a first capacitor C1. The fifth diode D5 has an anode and a cathode, wherein the anode of the fifth diode D5 is coupled to the fourth node N4 to receive the induced potential VS, and the cathode of the fifth diode D5 is coupled to the output Node NOUT. The first capacitor C1 has a first terminal and a second terminal, wherein the first terminal of the first capacitor C1 is coupled to the output node NOUT, and the second terminal of the first capacitor C1 is coupled to the second ground potential VSS2 .

The buffer circuit 240 includes a first inductor L1, a second inductor L2, a third inductor L3, a first resistor R1, a second resistor R2, and a third resistor R3. The first inductor L1 has a first terminal and a second terminal, wherein the first terminal of the first inductor L1 is coupled to the second node N2, and the second terminal of the first inductor L1 is coupled to a The fifth node N5. The first resistor R1 has a first terminal and a second terminal, wherein the first terminal of the first resistor R1 is coupled to the fifth node N5, and the second terminal of the first resistor R1 is coupled to a The sixth node N6. The second inductor L2 has a first terminal and a second terminal, wherein the first terminal of the second inductor L2 is coupled to the second node N2, and the second terminal of the second inductor L2 is coupled to a The seventh node N7. The second resistor R2 has a first terminal and a second terminal, wherein the first terminal of the second resistor R2 is coupled to the seventh node N7, and the second terminal of the second resistor R2 is coupled to the seventh node N7. Six nodes N6. The third inductor L3 has a first terminal and a second terminal, wherein the first terminal of the third inductor L3 is coupled to the second node N2, and the second terminal of the third inductor L3 is coupled to a The eighth node N8. The third resistor R3 has a first terminal and a second terminal, wherein the first terminal of the third resistor R3 is coupled to the eighth node N8, and the second terminal of the third resistor R3 is coupled to the eighth node N8. Six nodes N6. For example, the inductance value of each of the first inductor L1, the second inductor L2, and the third inductor L3 may be greater than or equal to 1 mH, and the first resistor R1, the second resistor R2, and the third resistor L3 may have an inductance value greater than or equal to 1 mH. The resistance value of each of the resistors R3 may be greater than or equal to 1 MΩ. The present invention is not limited to this. In other embodiments, the buffer circuit 240 may also include fewer or more inductors and resistors.

The power switch 250 includes a transistor M1. For example, the transistor M1 may be an N-type Metal-Oxide-Semiconductor Field-Effect Transistor (NMOSFET). The transistor M1 has a control terminal (for example: a gate), a first terminal (for example: a source), and a second terminal (for example: a drain), wherein the control terminal of the transistor M1 is used for Receiving a pulse width modulation potential VM, the first terminal of the transistor M1 is coupled to the second node N2, and the second terminal of the transistor M1 is coupled to the third node N3.

The pulse width modulation integrated circuit 260 is coupled to a first ground potential VSS1. The pulse width modulation integrated circuit 260 can be used to generate the pulse width modulation potential VM. For example, the pulse width modulation potential VM can be maintained at a fixed potential when the power supply 200 is initialized, and can provide a periodic clock waveform after the power supply 200 enters the normal use stage.

The first discharge circuit 270 includes a second transformer 275, a sixth diode D6, a second capacitor C2, a fourth resistor R4, and a fifth resistor R5. The sixth diode D6 has an anode and a cathode, wherein the anode of the sixth diode D6 is coupled to a ninth node N9, and the cathode of the sixth diode D6 is coupled to the second node N2. The second transformer 275 includes a second main coil 276 and a second auxiliary coil 277. The second main coil 276 can be located on one side of the second transformer 275 (for example, the secondary side), and the second auxiliary coil 277 can Located on the opposite side of the second transformer 275 (for example, the primary side). In detail, the second main coil 276 has a first end and a second end, wherein the first end of the second main coil 276 is coupled to the second node N2, and the second end of the second main coil 276 is coupled to the second node N2. coupled to a tenth node N10. The second secondary coil 277 has a first end and a second end, wherein the first end of the second secondary coil 277 is coupled to an eleventh node N11, and the second end of the second secondary coil 277 is coupled to to a twelfth node N12. The fourth resistor R4 has a first terminal and a second terminal, wherein the first terminal of the fourth resistor R4 is coupled to the second node N2, and the second terminal of the fourth resistor R4 is coupled to the second node N2. Ten nodes N10. The second capacitor C2 has a first terminal and a second terminal, wherein the first terminal of the second capacitor C2 is coupled to the eleventh node N11, and the second terminal of the second capacitor C2 is coupled to the twelfth node N11. Node N12. The fifth resistor R5 has a first terminal and a second terminal, wherein the first terminal of the fifth resistor R5 is coupled to the ground 299 , and the second terminal of the fifth resistor R5 is coupled to the eleventh Node N11. For example, the ground 299 may refer to the earth, or any ground path coupled to the earth, which is not an internal component of the power supply 200 .

The second discharge circuit 280 includes a third transformer 285, a third capacitor C3, and a sixth resistor R6. The third transformer 285 includes a third main coil 286 and a third auxiliary coil 287. The third main coil 286 can be located on one side of the third transformer 285 (for example, the primary side), and the third auxiliary coil 287 can be located on one side of the third transformer 285. The opposite side of the third transformer 285 (for example, the secondary side). In detail, the third main coil 286 has a first end and a second end, wherein the first end of the third main coil 286 is coupled to the sixth node N6, and the second end of the third main coil 286 is coupled to the ninth node N9. The third secondary coil 287 has a first end and a second end, wherein the first end of the third secondary coil 287 is coupled to a thirteenth node N13, and the second end of the third secondary coil 287 is coupled to to a fourteenth node N14. The sixth resistor R6 has a first terminal and a second terminal, wherein the first terminal of the sixth resistor R6 is coupled to the thirteenth node N13, and the second terminal of the sixth resistor R6 is coupled to Second ground potential VSS2. The third capacitor C3 has a first terminal and a second terminal, wherein the first terminal of the third capacitor C3 is coupled to the fourteenth node N14, and the second terminal of the third capacitor C3 is coupled to the second ground. Potential VSS2.

The third discharge circuit 290 includes a seventh diode D7. The seventh diode D7 has an anode and a cathode, wherein the anode of the seventh diode D7 is coupled to the twelfth node N12, and the cathode of the seventh diode D7 is coupled to the pulse width modulation The first ground potential VSS1 of the integrated circuit 260 .

In some embodiments, the operating principle of the power supply 200 may be as follows. For example, high voltage surges may be caused by lightning strikes or static electricity. When a surge with a high voltage enters the first input node NIN1 or the second input node NIN2 of the power supply 200 , the energy of the surge will first be absorbed by the buffer circuit 240 . Then, most of the surge energy can be released to the ground 299 through the first discharge circuit 270, and a small part of the surge energy can be released to the second ground potential VSS2 through the second discharge circuit 280. In addition, another part of the surge energy can also be released to the first ground potential VSS1 through the third discharge circuit 290. It must be noted that since the third discharge circuit 290 is coupled between the first discharge circuit 270 and the first ground potential VSS1, it can not only provide an additional discharge path, but also establish the bridge rectifier 210 and the pulse width. A complete current loop between the modulation integrated circuit 260.

Figure 3 shows a potential waveform diagram of the power supply 200 according to an embodiment of the present invention, in which the horizontal axis represents time and the vertical axis represents potential level. As shown in Figure 3, a first curve CC1 can represent the operating characteristics of the first ground potential VSS1 of the conventional power supply, and a second curve CC2 can represent the first characteristic of the power supply 100 (or 200) of the present invention. Operating characteristics of ground potential VSS1. According to the comparison results in Figure 3, when a high-voltage surge enters a traditional power supply, the potential level of its first ground potential VSS1 will quickly rise to 20,000V, which may cause damage to the traditional power supply. On the contrary, when a surge with a high voltage enters the power supply 100, the potential level of the first ground potential VSS1 will only rise to a relatively low 20V. In other words, the design of the present invention can suppress the surge reaction potential of the power supply 100 by more than 90%, so it can significantly reduce the probability of accidental damage to the power supply 100.

The present invention proposes a novel power supply that can effectively suppress surges in the power supply and comply with the specifications of IEC (International Electrical Commission) 61000-4-5. According to actual measurement results, the safety and reliability of the power supply using the above-mentioned design can be greatly improved, so it is very suitable for use in various devices.

It is worth noting that the above-mentioned potential, current, resistance value, inductance value, capacitance value, and other component parameters are not limiting conditions of the present invention. Designers can adjust these settings according to different needs. The power supply of the present invention is not limited to the state shown in Figures 1-3. The present invention may only include any one or multiple features of any one or multiple embodiments of Figures 1-3. In other words, not all features shown in the figures need to be implemented in the power supply of the present invention at the same time. Although the embodiment of the present invention uses a metal oxide semi-field effect transistor as an example, the present invention is not limited thereto. Those skilled in the art can use other types of transistors, such as junction field effect transistors or fins. type field effect transistor, etc., without affecting the effect of the present invention.

The ordinal numbers in this specification and the scope of the patent application, such as "first", "second", "third", etc., have no sequential relationship with each other. They are only used to distinguish two items with the same Different components with names.

Although the present invention is disclosed above in terms of preferred embodiments, they are not intended to limit the scope of the present invention. Anyone skilled in the art can make slight changes and modifications without departing from the spirit and scope of the present invention. Therefore, The protection scope of the present invention shall be determined by the appended patent application scope.

100,200:Power supply 110,210: Bridge rectifier 120,220:First transformer 121,221: first main coil 122,222: first secondary coil 130,230: Output stage circuit 140,240:Buffer circuit 150,250:Power switcher 160,260: Pulse width modulation integrated circuit 170,270: First discharge circuit 180,280: Second discharge circuit 190,290: Third discharge circuit 199,299:Earth 275:Second transformer 276: Second main coil 277: Second secondary coil 285:Third transformer 286:Third main coil 287: The third secondary coil C1: first capacitor C2: Second capacitor C3: The third capacitor CC1: first curve CC2: Second curve D1: first diode D2: Second diode D3: The third diode D4: The fourth diode D5: The fifth diode D6: The sixth diode D7: The seventh diode L1: first inductor L2: Second inductor L3: The third inductor LM: Magnetizing inductor M1: Transistor N1: first node N2: second node N3: The third node N4: fourth node N5: fifth node N6: The sixth node N7: The seventh node N8: The eighth node N9: Ninth node N10: tenth node N11: The eleventh node N12: Twelfth node N13: The thirteenth node N14: The fourteenth node NIN1: first input node NIN2: second input node NOUT: output node R1: first resistor R2: second resistor R3: The third resistor R4: The fourth resistor R5: fifth resistor R6: The sixth resistor VIN1: first input potential VIN2: second input potential VM: pulse width modulation potential VOUT: output potential VR: rectifier potential VS: induced potential VSS1: first ground potential VSS2: Second ground potential

Figure 1 is a schematic diagram of a power supply according to an embodiment of the present invention. Figure 2 is a circuit diagram showing a power supply according to an embodiment of the present invention. Figure 3 shows a potential waveform diagram of a power supply according to an embodiment of the present invention.

100:Power supply

110: Bridge rectifier

120:First transformer

121: First main coil

122: First secondary coil

130:Output stage circuit

140:Buffer circuit

150:Power switcher

160: Pulse width modulation integrated circuit

170: First discharge circuit

180: Second discharge circuit

190:Third discharge circuit

199:Earth

VIN1: first input potential

VIN2: second input potential

VM: pulse width modulation potential

VOUT: output potential

VR: rectifier potential

VS: induced potential

VSS1: first ground potential

VSS2: Second ground potential

Claims (10)

A power supply that suppresses surges, including: A bridge rectifier generates a rectified potential based on a first input potential and a second input potential; a first transformer, including a first main coil and a first secondary coil, wherein the first main coil receives the rectified potential, and the first secondary coil generates an induced potential; An output stage circuit generates an output potential based on the induced potential; a buffer circuit coupled to the bridge rectifier; a power switch that selectively couples the first main coil to the buffer circuit according to a pulse width modulation potential; a pulse width modulation integrated circuit coupled to a first ground potential and generating the pulse width modulation potential; a first discharge circuit, wherein the buffer circuit is coupled to the ground via the first discharge circuit; a second discharge circuit, wherein the buffer circuit is further coupled to a second ground potential via the second discharge circuit; and A third discharge circuit, wherein the first discharge circuit is further coupled to the first ground potential via the third discharge circuit. The power supply of claim 1, wherein the bridge rectifier includes: a first diode having an anode and a cathode, wherein the anode of the first diode is coupled to a first input node to receive the first input potential, and the first diode The cathode is coupled to a first node to output the rectified potential; a second diode having an anode and a cathode, wherein the anode of the second diode is coupled to a second input node to receive the second input potential, and the The cathode is coupled to the first node; A third diode having an anode and a cathode, wherein the anode of the third diode is coupled to a second node, and the cathode of the third diode is coupled to the first input node; and a fourth diode having an anode and a cathode, wherein the anode of the fourth diode is coupled to the second node, and the cathode of the fourth diode is coupled to the second node Enter the node. The power supply of claim 2, wherein the first transformer further builds a magnetizing inductor, the first main coil has a first end and a second end, and the first end of the first main coil is coupled Connected to the first node to receive the rectified potential, the second end of the first main coil is coupled to a third node, the exciting inductor has a first end and a second end, and the exciting inductor has a first end and a second end. The first terminal is coupled to the first node, the second terminal of the exciting inductor is coupled to the third node, the first secondary coil has a first terminal and a second terminal, the first The first end of the secondary coil is coupled to a fourth node to output the induced potential, and the second end of the first secondary coil is coupled to the second ground potential. The power supply of claim 3, wherein the output stage circuit includes: A fifth diode having an anode and a cathode, wherein the anode of the fifth diode is coupled to the fourth node to receive the induced potential, and the cathode of the fifth diode is coupled Connected to an output node to output the output potential; and a first capacitor having a first terminal and a second terminal, wherein the first terminal of the first capacitor is coupled to the output node, and the second terminal of the first capacitor is coupled to the 2. Ground potential. The power supply of claim 2, wherein the buffer circuit includes: A first inductor having a first terminal and a second terminal, wherein the first terminal of the first inductor is coupled to the second node, and the second terminal of the first inductor is coupled to Connected to a fifth node; A first resistor having a first terminal and a second terminal, wherein the first terminal of the first resistor is coupled to the fifth node, and the second terminal of the first resistor is coupled to Connected to a sixth node; a second inductor having a first terminal and a second terminal, wherein the first terminal of the second inductor is coupled to the second node, and the second terminal of the second inductor is coupled to Connected to a seventh node; a second resistor having a first terminal and a second terminal, wherein the first terminal of the second resistor is coupled to the seventh node, and the second terminal of the second resistor is coupled to Connect to the sixth node; A third inductor having a first terminal and a second terminal, wherein the first terminal of the third inductor is coupled to the second node, and the second terminal of the third inductor is coupled to connected to an eighth node; and A third resistor having a first terminal and a second terminal, wherein the first terminal of the third resistor is coupled to the eighth node, and the second terminal of the third resistor is coupled to Connect to the sixth node. The power supply of claim 3, wherein the power switch includes: A transistor has a control terminal, a first terminal, and a second terminal, wherein the control terminal of the transistor is used to receive the pulse width modulation potential, and the first terminal of the transistor is is coupled to the second node, and the second terminal of the transistor is coupled to the third node. The power supply of claim 5, wherein the first discharge circuit includes a second transformer, the second transformer includes a second main coil and a second secondary coil, the second discharge circuit includes a third transformer, and The third transformer includes a third main coil and a third auxiliary coil. The power supply of claim 7, wherein the first discharge circuit further includes: A sixth diode having an anode and a cathode, wherein the anode of the sixth diode is coupled to a ninth node, and the cathode of the sixth diode is coupled to the second node; a fourth resistor having a first terminal and a second terminal, wherein the first terminal of the fourth resistor is coupled to the second node, and the second terminal of the fourth resistor is coupled to Connect to a tenth node; a second capacitor having a first terminal and a second terminal, wherein the first terminal of the second capacitor is coupled to an eleventh node, and the second terminal of the second capacitor is coupled to a twelfth node; and a fifth resistor having a first terminal and a second terminal, wherein the first terminal of the fifth resistor is coupled to the ground, and the second terminal of the fifth resistor is coupled to The eleventh node; The second main coil has a first end and a second end, the first end of the second main coil is coupled to the second node, and the second end of the second main coil is coupled to At the tenth node, the second secondary coil has a first end and a second end, the first end of the second secondary coil is coupled to the eleventh node, and the second end of the second secondary coil Two terminals are coupled to the twelfth node. The power supply of claim 8, wherein the second discharge circuit further includes: a sixth resistor having a first terminal and a second terminal, wherein the first terminal of the sixth resistor is coupled to a thirteenth node, and the second terminal of the sixth resistor is coupled to the second ground potential; and a third capacitor having a first terminal and a second terminal, wherein the first terminal of the third capacitor is coupled to a fourteenth node, and the second terminal of the third capacitor is coupled to the second ground potential; The third main coil has a first end and a second end, the first end of the third main coil is coupled to the sixth node, and the second end of the third main coil is coupled to The ninth node, the third secondary coil has a first end and a second end, the first end of the third secondary coil is coupled to the thirteenth node, and the third end of the third secondary coil Two terminals are coupled to the fourteenth node. The power supply of claim 8, wherein the third discharge circuit includes: A seventh diode having an anode and a cathode, wherein the anode of the seventh diode is coupled to the twelfth node, and the cathode of the seventh diode is coupled to the twelfth node a ground potential.

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