TW202330996A - Device and method for back-sealing silicon wafer - Google Patents
Device and method for back-sealing silicon wafer Download PDFInfo
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- 238000007789 sealing Methods 0.000 title claims abstract description 34
- 238000000034 method Methods 0.000 title claims abstract description 14
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title abstract description 6
- 229910052710 silicon Inorganic materials 0.000 title abstract description 4
- 239000010703 silicon Substances 0.000 title abstract description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 51
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 51
- 238000000151 deposition Methods 0.000 claims abstract description 36
- 230000008021 deposition Effects 0.000 claims abstract description 28
- 235000012431 wafers Nutrition 0.000 claims description 68
- 239000007789 gas Substances 0.000 claims description 63
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 8
- 239000001301 oxygen Substances 0.000 claims description 8
- 229910052760 oxygen Inorganic materials 0.000 claims description 8
- QYKABQMBXCBINA-UHFFFAOYSA-N 4-(oxan-2-yloxy)benzaldehyde Chemical compound C1=CC(C=O)=CC=C1OC1OCCCC1 QYKABQMBXCBINA-UHFFFAOYSA-N 0.000 claims description 7
- 238000005229 chemical vapour deposition Methods 0.000 claims description 5
- 230000001681 protective effect Effects 0.000 claims description 3
- 238000010438 heat treatment Methods 0.000 claims description 2
- 238000005507 spraying Methods 0.000 claims description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims 1
- 239000004615 ingredient Substances 0.000 claims 1
- 229910052990 silicon hydride Inorganic materials 0.000 claims 1
- 238000004140 cleaning Methods 0.000 description 10
- 238000005516 engineering process Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 125000004430 oxygen atom Chemical group O* 0.000 description 3
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 230000002378 acidificating effect Effects 0.000 description 2
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 2
- 238000011109 contamination Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 230000001629 suppression Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 238000006748 scratching Methods 0.000 description 1
- 230000002393 scratching effect Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02016—Backside treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
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Abstract
Description
本發明屬於半導體晶圓生產領域,尤指一種用於背封晶圓的設備和方法。The invention belongs to the field of semiconductor wafer production, in particular to a device and method for back-sealing wafers.
在晶圓的生產過程中,經常需要完成對晶圓進行背封的操作,即在晶圓的背面例如通過化學氣相沉積的方式生長一層矽氧化物層。舉例而言,作為積體電路產業的基礎材料的磊晶晶圓,特別是比如用於製造互補型金屬氧化物半導體圖像感測器的重摻磊晶片在磊晶生長過程中不可避免地會存在自摻雜現象,自摻雜現象會導致晶圓電阻率漂移,從而嚴重影響磊晶晶圓的品質,為了防止自摻雜現象的發生,通常會在磊晶生長之前首先對晶圓進行背封,從而有效抑制自摻雜,減小對電阻率的影響,改善磊晶矽晶圓的品質。During the production process of the wafer, it is often necessary to complete the operation of back sealing the wafer, that is, to grow a layer of silicon oxide layer on the back of the wafer, for example, by means of chemical vapor deposition. For example, the epitaxial wafer, which is the basic material of the integrated circuit industry, especially the heavily doped epitaxial wafer used in the manufacture of complementary metal-oxide semiconductor image sensors, will inevitably be degraded during the epitaxial growth process. There is self-doping phenomenon, which will lead to the drift of wafer resistivity, which will seriously affect the quality of epitaxial wafers. Sealing, thereby effectively suppressing self-doping, reducing the impact on resistivity, and improving the quality of epitaxial silicon wafers.
但是,在晶圓的背封完成後,在進入後續處理之前,通常會利用比如酸性或鹼性的腐蝕性清洗液對晶圓進行清洗,以使後續處理能夠更為順利地完成。舉例而言,已背封的晶圓的正面通常需要進行化學機械拋光,然後才適於在磊晶設備中完成磊晶生長,而在化學機械拋光之前,會有對晶圓進行清洗以去除晶圓表面汙染顆粒的需求,這樣才能避免在化學機械拋光過程中汙染顆粒將晶圓劃傷。However, after the back sealing of the wafer is completed, before the subsequent processing, the wafer is usually cleaned with an acidic or alkaline corrosive cleaning solution, so that the subsequent processing can be completed more smoothly. For example, the front side of a back-sealed wafer usually requires chemical mechanical polishing before it is suitable for epitaxial growth in the epitaxial equipment, and before chemical mechanical polishing, the wafer will be cleaned to remove the epitaxy. The need for contamination particles on the round surface, so as to avoid the contamination particles scratching the wafer during the chemical mechanical polishing process.
由此產生的問題是,在對晶圓進行清洗的過程中,背封膜或者說矽氧化物層也有可能例如在酸性清洗液的作用下被部分地清洗掉,或者說產生減薄,導致背封膜不再能夠滿足後續處理要求,比如不再能夠對自摻雜現象的出現產生抑製作用或抑製作用被降低。The resulting problem is that in the process of cleaning the wafer, the back seal film or the silicon oxide layer may also be partially cleaned, or thinned, resulting in the The sealing film is no longer able to meet the requirements of subsequent processing, such as the suppression of the occurrence of self-doping phenomena is no longer possible or the suppression effect is reduced.
為解決上述技術問題,本發明期望提供一種用於背封晶圓的設備和方法,使得已背封的晶圓在經歷清洗作業的情況下,背封膜被清洗掉的程度或者說減薄的程度得到最小化,由此最大程度地滿足後續處理要求。In order to solve the above technical problems, the present invention expects to provide a device and method for backsealing wafers, so that the backsealing film is cleaned or thinned when the backsealing wafer undergoes cleaning operations. The degree is minimized, thereby satisfying the subsequent processing requirements to the greatest extent.
本發明的技術方案是這樣實現的:第一方面,本發明提供了一種用於背封晶圓的設備,背封晶圓的設備包括:第一沉積模組,第一沉積模組用於在晶圓的背面沉積具有第一緻密性的第一矽氧化物層第二沉積模組,第二沉積模組用於在第一矽氧化物層上沉積具有第二緻密性的第二矽氧化物層,其中,第二致密性高於第一致密性。The technical solution of the present invention is achieved in the following way: In the first aspect, the present invention provides a device for back-sealing a wafer, the device for back-sealing a wafer includes: a first deposition module, the first deposition module is used for A second deposition module for depositing a first silicon oxide layer with a first density on the back side of the wafer, the second deposition module is used to deposit a second silicon oxide layer with a second density on the first silicon oxide layer layer, wherein the second density is higher than the first density.
第二方面,本發明提供了一種用於背封晶圓的方法,其步驟包括:在晶圓的背面沉積具有第一緻密性的第一矽氧化物層在第一矽氧化物層上沉積具有第二緻密性的第二矽氧化物層,其中,第二緻密性高於第一緻密性。In a second aspect, the present invention provides a method for backsealing a wafer, the steps of which include: depositing a first silicon oxide layer with a first density on the back of the wafer, depositing a silicon oxide layer with A second silicon oxide layer with a second density, wherein the second density is higher than the first density.
本發明提供了一種用於背封晶圓的設備和方法,已背封的晶圓即使在進入後續處理之前經歷腐蝕性清洗液的清洗,但由於整個背封膜中直接與清洗液接觸的部分為位於最表層的緻密性較高的第二矽氧化物層,而這樣的矽氧化物層是不容易被清洗掉的,因此儘管背封膜也會發生減薄,但減薄的量是較小的,使得整個背封膜能夠更大程度地滿足後續處理的要求,另一方面,對於完成磊晶生長的晶圓或者說已磊晶晶圓而言,需要將整個背封膜都去除後才能夠在後續技術中使用,比如利用刻蝕的方法將背封膜去除,因此,與將整個背封膜的緻密性增大相比,由於第一矽氧化物層的緻密性是較低的,因此這樣的去除是更容易實現的。The present invention provides a kind of equipment and method for back-sealed wafer, even if the wafer that has been back-sealed is subjected to the cleaning of corrosive cleaning liquid before entering subsequent processing, but because the part of the whole back-sealed film that is directly in contact with the cleaning liquid It is the denser second silicon oxide layer located on the outermost layer, and such a silicon oxide layer is not easy to be cleaned off, so although the back seal film will also be thinned, the amount of thinning is relatively small. Small, so that the entire back-sealing film can meet the requirements of subsequent processing to a greater extent. On the other hand, for wafers that have completed epitaxial growth or epitaxial wafers, the entire back-sealing film needs to be removed. It can be used in subsequent technologies, such as removing the back-sealing film by etching. Therefore, compared with increasing the compactness of the entire back-sealing film, the density of the first silicon oxide layer is lower , so such removal is easier to implement.
下面將結合本發明實施例中的附圖,對本發明實施例中的技術方案進行清楚、完整地描述。The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the drawings in the embodiments of the present invention.
參見圖1,本發明實施例提供了一種用於背封晶圓的設備1,背封晶圓的設備1可以包括:如在圖1中通過方框示意性地示出的第一沉積模組10,第一沉積模組10用於在晶圓W的背面WB沉積具有第一致密性的第一矽氧化物層L1如在圖1中同樣通過方框示意性地示出的第二沉積模組20,第二沉積模組20用於在第一矽氧化物層L1上沉積具有第二緻密性的第二矽氧化物層L2,其中,第二緻密性高於第一緻密性,對於這裡的緻密性,如本領域人員知曉的,通常可以通過背封膜在被比如酸性的刻蝕液刻蝕的情況下單位時間內被刻蝕掉的量來體現,具體地,在單位時間內被刻蝕的量越多,則代表由矽氧化物構成的背封膜的緻密性越低,而在單位時間內被刻蝕的量越少,則代表由矽氧化物構成的背封膜的緻密性越高,另一方面,從微觀角度考慮,緻密性體現在矽氧化物中矽原子數量與氧原子數量之間的比例,如果用SiO x來代表矽氧化物的話,當X的值在設定的範圍內時,X的值越小,則表明緻密性越高,比如SiO 1.5的緻密性要高於SiO 1.6的緻密性。 Referring to FIG. 1, an embodiment of the present invention provides a device 1 for back-sealing a wafer. The device 1 for back-sealing a wafer may include: a first deposition module as schematically shown by a block in FIG. 1 10. The first deposition module 10 is used to deposit a first silicon oxide layer L1 having a first density on the backside WB of the wafer W, as in the second deposition shown schematically by a box in FIG. 1 Module 20, the second deposition module 20 is used to deposit a second silicon oxide layer L2 having a second density on the first silicon oxide layer L1, wherein the second density is higher than the first density, for The compactness here, as known to those skilled in the art, can usually be reflected by the amount of the back-sealing film being etched per unit time when it is etched by an acidic etchant, specifically, in the unit time The more the etched amount, the lower the density of the back-sealing film made of silicon oxide, and the smaller the etched amount per unit time, the lower the density of the back-sealing film made of silicon oxide. The higher the density, on the other hand, from a microscopic point of view, the density is reflected in the ratio between the number of silicon atoms and the number of oxygen atoms in silicon oxide. If SiO x is used to represent silicon oxide, when the value of X is in Within the set range, the smaller the value of X, the higher the density, for example, the density of SiO 1.5 is higher than that of SiO 1.6 .
對於利用根據本發明實施例的設備獲得的背封晶圓而言,即使在進入後續處理之前經歷腐蝕性清洗液的清洗,但由於整個背封膜中直接與清洗液接觸的部分為位於最表層的緻密性較高的第二矽氧化物層L2,而這樣的矽氧化物層是不容易被清洗掉的,因此儘管背封膜也會發生減薄,但減薄的量是較小的,使得整個背封膜能夠更大程度地滿足後續處理的要求,另一方面,對於完成磊晶生長的晶圓或者說已磊晶晶圓而言,需要將整個背封膜都去除後才能夠在後續技術中使用,比如利用刻蝕的方法將背封膜去除,因此,與將整個背封膜的緻密性增大相比,由於第一矽氧化物層L1的緻密性是較低的,因此這樣的去除是更容易實現的。For the back-sealing wafer obtained by using the equipment according to the embodiment of the present invention, even if it undergoes cleaning with a corrosive cleaning solution before entering the subsequent processing, since the part of the entire back-sealing film that is directly in contact with the cleaning solution is located at the outermost layer The denser second silicon oxide layer L2, and such a silicon oxide layer is not easy to be washed off, so although the back seal film will also be thinned, the amount of thinning is relatively small. The entire back-sealing film can meet the requirements of subsequent processing to a greater extent. On the other hand, for wafers that have completed epitaxial growth or epitaxial wafers, it is necessary to remove the entire back-sealing film before they can be placed on the wafer. In the subsequent technology, for example, the back-sealing film is removed by etching. Therefore, compared with increasing the compactness of the entire back-sealing film, since the density of the first silicon oxide layer L1 is lower, the Such removal is easier to achieve.
上述的在晶圓W的表面沉積膜層可以通過多種方式實現,但是在本發明的可選實施例中,可以採用常壓化學氣相沉積(Atmospheric Pressure Chemical Vapor Deposition,APCVD)技術來完成,對此,參見圖2,第一沉積模組10可以包括第一供氣單元11,第一供氣單元11用於供應通過化學氣相沉積形成第一矽氧化物層L1的第一組氣體G1,如在圖2中通過虛線箭頭組示意性地示出的,第二沉積模組20可以包括第二供氣單元21,第二供氣單元21用於供應通過化學氣相沉積形成第二矽氧化物層L2的第二組氣體G2,如在圖2中通過實線箭頭組示意性地示出的,在這種情況下,對於獲得緻密性不同的背封膜而言,例如可以採用使第一組氣體G1與第二組氣體G2的組成成分不同來實現,但在本實施例中,第一組氣體G1和第二組氣體G2的組成成分可以相同,這樣,能夠便利第一組氣體G1和第二組氣體G2的獲得的,因為所需要的氣體的種類得到減少,而第一矽氧化物層L1和第二矽氧化物層L2的緻密性的不同可以通過第一組氣體G1和第二組氣體G2的組成成分的比例不同實現。The above-mentioned film deposition on the surface of the wafer W can be achieved in various ways, but in an optional embodiment of the present invention, it can be accomplished by using Atmospheric Pressure Chemical Vapor Deposition (APCVD) technology. Here, referring to FIG. 2, the first deposition module 10 may include a first gas supply unit 11, the first gas supply unit 11 is used to supply a first group of gases G1 for forming the first silicon oxide layer L1 by chemical vapor deposition, As schematically shown in FIG. 2 by a set of dotted arrows, the second deposition module 20 may include a second gas supply unit 21 for supplying the second silicon oxide formed by chemical vapor deposition. The second group of gases G2 of the material layer L2 is schematically shown by the group of solid arrows in FIG. The composition of one group of gases G1 and the second group of gases G2 is different, but in this embodiment, the composition of the first group of gases G1 and the second group of gases G2 can be the same, so that the first group of gases G1 can be conveniently and the second group of gases G2, because the types of gases required are reduced, and the difference in the density of the first silicon oxide layer L1 and the second silicon oxide layer L2 can be obtained by the first group of gases G1 and the second The proportions of the components of the two groups of gases G2 are differently realized.
對於上述的兩組氣體的具體組成成分而言,在本發明的可選實施例中,第一組氣體G1和第二組氣體G2都可以包括作為能夠在晶圓的表面生長出矽氧化物的源氣的四氫化矽和氧氣,另外,第一組氣體G1和第二組氣體G2都可以還包括作為四氫化矽和氧氣的載體的氮氣。Regarding the specific composition of the above two groups of gases, in an optional embodiment of the present invention, both the first group of gases G1 and the second group of gases G2 can include Silicon tetrahydride and oxygen are the source gases. In addition, both the first group gas G1 and the second group gas G2 may further include nitrogen as a carrier of silicon tetrahydride and oxygen.
在本發明的可選實施例中,第一組氣體G1中的四氫化矽與氧氣的體積比可以介於1:9至1:11之間,第二組氣體G2中的四氫化矽與氧氣的體積比可以介於1:6至1:7之間,由於第一組氣體G1中的氧氣的含量更高,因此所獲得的矽氧化物中氧原子的數量的比例也相應地更高,這樣的矽氧化物的緻密性則較低,另一方面,這樣的比例能夠同時滿足在清洗過程中使得背封膜不易被清洗掉的要求以及在去除過程中使得背封膜易於被去除的要求。In an optional embodiment of the present invention, the volume ratio of silicon tetrahydride and oxygen in the first group of gases G1 can be between 1:9 and 1:11, and the volume ratio of silicon tetrahydride and oxygen in the second group of gases G2 The volume ratio of can be between 1:6 and 1:7. Since the content of oxygen in the first group of gases G1 is higher, the ratio of the number of oxygen atoms in the obtained silicon oxide is correspondingly higher, The density of such silicon oxide is low. On the other hand, such a ratio can meet the requirements of making the back-sealing film not easy to be cleaned during the cleaning process and the requirements of making the back-sealing film easy to be removed during the removal process. .
對於使晶圓W順次地接受第一沉積模組10和第二沉積模組20的處理而言,在本發明的可選實施例中,參見圖3,背封晶圓的設備1還可以包括傳送帶30,傳送帶30用於對晶圓W進行傳送,在傳送帶30的傳送方向T上第二供氣單元21可以設置在第一供氣單元11的下游。這樣,便可以以自動化的方式使晶圓W首先接受第一沉積模組10的處理並且在背面WB上生長出第一矽氧化物層L1,然後再接受第二沉積模組20的處理並且在第一矽氧化物層L1上生長出第二矽氧化物層L2。For the wafer W to be processed sequentially by the first deposition module 10 and the second deposition module 20, in an optional embodiment of the present invention, referring to FIG. The conveyor belt 30 is used to transport the wafer W, and the second gas supply unit 21 may be disposed downstream of the first gas supply unit 11 in the conveying direction T of the conveyor belt 30 . In this way, the wafer W can first be processed by the first deposition module 10 in an automated manner and the first silicon oxide layer L1 is grown on the backside WB, and then it is processed by the second deposition module 20 and processed by the second deposition module 20. A second silicon oxide layer L2 is grown on the first silicon oxide layer L1.
參見圖3容易理解的是,在上述實施例的情況下,第一供氣單元11供應的第一組氣體G1與第二供氣單元21供應的第二組氣體G2不可避免地會在比如第一供氣單元11和第二供氣單元21相鄰的位置處混合到一起,導致沉積的矽氧化物中的矽原子和氧原子的數量比不再能夠滿足要求。對此,在本發明的可選實施例中,仍然參見圖3,背封晶圓的設備1還可以包括噴頭40,噴頭40用於噴射保護性氣體PG以形成將第一組氣體G1和第二組氣體G2分隔開的氣簾GC。這樣,不僅可以避免第一組氣體G1與第二供氣單元21的混合,而且可以使第一供氣單元11和第二供氣單元21以更緊湊的方式設置在設備1中,從而減小設備1的體積或者說所佔用的空間。Referring to FIG. 3, it is easy to understand that, in the case of the above-mentioned embodiment, the first group of gas G1 supplied by the first gas supply unit 11 and the second group of gas G2 supplied by the second gas supply unit 21 will inevitably be in the Adjacent positions of the first gas supply unit 11 and the second gas supply unit 21 are mixed together, so that the quantity ratio of silicon atoms and oxygen atoms in the deposited silicon oxide can no longer meet the requirements. For this, in an optional embodiment of the present invention, still referring to FIG. 3 , the wafer back sealing device 1 may further include a showerhead 40 for spraying a protective gas PG to form a combination of the first group of gases G1 and the second group of gases. Gas curtain GC separated by two groups of gases G2. In this way, not only can the mixing of the first gas G1 and the second gas supply unit 21 be avoided, but also the first gas supply unit 11 and the second gas supply unit 21 can be arranged in the device 1 in a more compact manner, thereby reducing The volume of the device 1 or the occupied space.
可選地,仍然參見圖3,背封晶圓的設備1還可以包括多個托盤50,多個托盤50以沿著傳送方向T排列的方式擱置在傳送帶30上以被傳送帶30傳送,每個托盤50用於承載單個晶圓W。這樣,可以避免晶圓W的比如將用於生長磊晶層的正面與傳送帶30直接接觸而導致該正面受到損傷,從而不利於磊晶生長。Optionally, still referring to FIG. 3 , the wafer back-sealing device 1 may further include a plurality of trays 50 placed on the conveyor belt 30 in a manner arranged along the transport direction T to be transported by the conveyor belt 30 , each The tray 50 is used to carry a single wafer W. In this way, for example, the front side of the wafer W for growing the epitaxial layer can be avoided from being directly contacted with the conveyor belt 30 , causing the front side to be damaged, which is not conducive to the epitaxial growth.
可選地,仍然參見圖3,背封晶圓的設備1還可以包括間隔開的兩個滾輪60,傳送帶30呈環狀並且繞制在兩個滾輪60上以通過兩個滾輪60的轉動實現運行。Optionally, still referring to FIG. 3 , the device 1 for back-sealing wafers may also include two rollers 60 spaced apart, and the conveyor belt 30 is looped and wound on the two rollers 60 to achieve run.
可選地,背封晶圓的設備1還可以包括用於對被傳送帶30傳送的晶圓W進行加熱的加熱器70。Optionally, the wafer back sealing device 1 may further include a heater 70 for heating the wafer W transported by the conveyor belt 30 .
參見圖4並結合圖1,本發明實施例還提供了一種用於背封晶圓W的方法,其步驟可以包括:S401:在晶圓W的背面WB沉積具有第一致密性的第一矽氧化物層L1,S402:在第一矽氧化物層L1上沉積具有第二緻密性的第二矽氧化物層L2,其中,第二緻密性高於第一緻密性。Referring to FIG. 4 in conjunction with FIG. 1 , an embodiment of the present invention also provides a method for backsealing a wafer W, the steps of which may include: S401: Depositing a first dense layer WB on the back surface of the wafer W. Silicon oxide layer L1, S402: depositing a second silicon oxide layer L2 having a second density on the first silicon oxide layer L1, wherein the second density is higher than the first density.
需要說明的是:本發明實施例所記載的技術方案之間,在不衝突的情況下,可以任意組合。It should be noted that: the technical solutions described in the embodiments of the present invention can be combined arbitrarily if there is no conflict.
以上所述,僅為本發明的具體實施方式,但本發明的保護範圍並不局限於此,任何熟悉本技術領域具通常知識者在本發明揭露的技術範圍內,可輕易想到變化或替換,都應涵蓋在本發明的保護範圍之內。因此,本發明的保護範圍應以申請專利範圍的保護範圍為準。The above is only a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Anyone familiar with the technical field with ordinary knowledge can easily think of changes or substitutions within the technical scope disclosed in the present invention. All should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the patent application.
1:用於背封晶圓的設備 10:第一沉積模組 11:第一供氣單元 20:第二沉積模組 21:第二供氣單元 30:傳送帶 40:噴頭 50:托盤 60:滾輪 70:加熱器 S401~S402:步驟流程 G1:第一組氣體 G2:第二組氣體 GC:氣簾 L1:第一矽氧化物層 L2:第二矽氧化物層 PG:保護性氣體 T:傳送方向 W:晶圓 WB:背面 1: Equipment for backsealing wafers 10: The first deposition module 11: The first air supply unit 20: The second deposition module 21: Second air supply unit 30: Conveyor belt 40: Nozzle 50: tray 60:Roller 70: heater S401~S402: Step process G1: The first group of gases G2: The second group of gases GC: air curtain L1: the first silicon oxide layer L2: the second silicon oxide layer PG: protective gas T: transmission direction W: Wafer WB: back
圖1為根據本發明的實施例的用於背封晶圓的設備的結構示意圖 圖2為根據本發明的另一實施例的用於背封晶圓的設備的結構示意圖 圖3為根據本發明的另一實施例的用於背封晶圓的設備的結構示意圖 圖4為根據本發明的實施例的用於背封晶圓的方法的示意圖。 FIG. 1 is a schematic structural view of an apparatus for backsealing a wafer according to an embodiment of the present invention FIG. 2 is a schematic structural view of an apparatus for backsealing a wafer according to another embodiment of the present invention FIG. 3 is a schematic structural diagram of an apparatus for backsealing a wafer according to another embodiment of the present invention FIG. 4 is a schematic diagram of a method for backsealing a wafer according to an embodiment of the present invention.
10:第一沉積模組 10: The first deposition module
11:第一供氣單元 11: The first air supply unit
20:第二沉積模組 20: The second deposition module
21:第二供氣單元 21: Second air supply unit
G1:第一組氣體 G1: The first group of gases
G2:第二組氣體 G2: The second group of gases
L1:第一矽氧化物層 L1: the first silicon oxide layer
L2:第二矽氧化物層 L2: the second silicon oxide layer
W:晶圓 W: Wafer
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