JP2005039153A - Substrate processing apparatus and method of manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor manufacturing apparatus which reduces high gas-cleaning frequency due to a short period of timing for release of particles and is capable of improving the COO. <P>SOLUTION: A substrate processing apparatus 1 comprises a reaction tube 12, a supporting tool 14 that supports the substrates 16 in the reaction tube 12, and film-forming-gas introducing means 21, 22, 23 that introduce film-forming gases into the reaction tube 12, and forms a thin film on the substrates 16, wherein unevenness having Ra of 2-4 μm is formed at least on the inner wall face of the reaction tube 12. The cleaning is carried out at a cleaning temperature of 400°C or lower when ClF<SB>3</SB>is used, and at a cleaning temperature of 350°C or lower when F<SB>2</SB>gas is used. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a substrate processing apparatus and a method for manufacturing a semiconductor device, and more particularly to a CVD film forming technique, which increases the film thickness of Doped Poly Si, Doped Amorphous Si, and Poly Si films formed on the inner surface of a quartz inner tube. The present invention relates to a semiconductor manufacturing apparatus and a semiconductor device manufacturing method that can prevent the occurrence of film cracks, suppress the generation of particles, reduce the COO by reducing the frequency of gas cleaning, and reduce the manufacturing cost. is there.

  When a quartz inner tube with a surface treatment of less than Ra 0.5 μm is used, when CVD film formation is performed, a film is also formed on the inner surface of the quartz inner tube, and the stress composition vector in the film increases. Will crack the film.

  For example, in the case of a phosphorus (P) doped polysilicon film, particles are generated when the accumulated film thickness on the quartz inner tube is about 3.5 μm. Therefore, when the cumulative film thickness becomes 3.5 μm, gas cleaning is performed to clean the quartz inner tube. However, in the gas cleaning cycle of 3.5 μm, there is a problem that the cleaning frequency is high and the downtime is increased, the cleaning cost is expensive, and as a result, COO (Cost of Ownership) is lowered.

  Note that the same applies to a boron (B) doped polysilicon film, an amorphous silicon film doped with boron (B) or phosphorus (P), a non-doped polysilicon film, and a non-doped amorphous silicon film.

  The main object of the present invention is to manufacture a semiconductor manufacturing apparatus and a semiconductor device capable of improving the COO by reducing the frequency of gas cleaning, which is a problem of the prior art, due to a short particle generation timing. It is to provide a method.

According to a first aspect of the invention,
A reaction tube;
A support for supporting the substrate in the reaction tube;
A substrate processing apparatus for forming a thin film on the substrate, comprising a film forming gas introducing means for introducing a film forming gas into the reaction tube,
There is provided a substrate processing apparatus characterized in that Ra has an unevenness of 2 to 4 μm on at least the inner wall surface of the reaction tube.

According to a second aspect of the invention,
A step of carrying the substrate into a reaction tube in which Ra has a roughness of 2 to 4 μm on the inner wall surface;
Supplying a deposition gas into the reaction tube to form a thin film on the substrate;
Unloading the substrate from within the reaction tube;
And a cleaning step of removing the film adhering to the inner wall of the reaction tube by supplying ClF ₃ gas or F ₂ gas into the reaction tube in the absence of the substrate in the reaction tube. And
In the cleaning step, a semiconductor device manufacturing method is provided, wherein a cleaning temperature is set to 400 ° C. or lower when ClF ₃ gas is used, and a cleaning temperature is set to 350 ° C. or lower when F ₂ gas is used.

Here, Ra means the arithmetic average height (see JIS B 601).
.

  Preferably, in the substrate processing apparatus and the semiconductor device manufacturing method, the unevenness formed on the inner wall surface of the reaction tube is formed by chemical treatment.

  Preferably, in the substrate processing apparatus and the semiconductor device manufacturing method, the film formed on the substrate is a polycrystalline silicon film doped with a dopant (impurity) such as boron (B) or phosphorus (P). Doped poly silicon film, doped amorphous silicon film doped with dopants (impurities) such as boron (B) and phosphorus (P), non-doped One of a polysilicon (Non-Doped Poly Si) film and a non-doped amorphous silicon (Non-Doped Amorphous Si) film.

  ADVANTAGE OF THE INVENTION According to this invention, the semiconductor manufacturing apparatus and the manufacturing method of a semiconductor device which made it possible to reduce the frequency of gas cleaning resulting from the short particle generation timing and to improve COO are provided.

Next, embodiments of the present invention will be described with reference to the drawings.
FIG. 1A is a schematic longitudinal sectional view of a vertical CVD film forming apparatus 1 which is a semiconductor manufacturing apparatus according to an embodiment of the present invention, and FIG. It is the elements on larger scale of a part.

As shown in FIG. 1A, the vertical CVD film forming apparatus 1 includes a heater 13 outside the quartz outer tube 11 so that the inside of the quartz outer tube 11 can be heated uniformly. A quartz inner tube 12 is provided in the quartz outer tube 11. The quartz outer tube 11 is used to maintain a vacuum, and the quartz inner tube 12 is used to form a gas flow path. In the quartz inner tube 12, there is provided a quartz boat 14 on which a plurality of semiconductor wafers are stacked in the vertical direction. The quartz boat 14 is mounted on a cap 15, and is inserted into the quartz inner tube 12 and taken out from the quartz inner tube 12 by moving the cap 15 up and down. The lower part of the quartz outer tube 11 and the quartz inner tube 12 has an open structure, but when the cap 15 is lifted, it is closed by the furnace port seal plate 18 of the cap 15 and has an airtight structure. At the lower part of the quartz inner tube 12, the nozzle tip of the SiH ₄ and PH ₃ supply pipe 21 and the nozzle tip of the cleaning gas supply pipe 24 are provided. The tip of the nozzle of the PH ₃ supply pipe 22 is provided in the middle of the quartz inner tube 12, and the tip of the nozzle of the PH ₃ supply pipe 23 is provided above the inside of the quartz inner tube 12. The upper part of the quartz inner tube 12 is open. In the lower part of the space between the quartz inner tube 12 and the quartz outer tube 11, an exhaust port 17 is provided in communication. The exhaust port 17 communicates with a vacuum pump (not shown), and the inside of the quartz outer tube 11 can be depressurized.

SiH _4, PH ₃ SiH ₄ gas and PH ₃ gas supplied from the tip of the nozzle of the supply pipe 21, then, the quartz inner tube 12 moves from the lower to the upper, a quartz inner tube 12 and the quartz outer tube 11 It flows downward through the space between and is exhausted from the exhaust port 17. The tip of the nozzle of the PH ₃ supply pipe 22 is provided in the middle of the quartz inner tube 12, and the tip of the nozzle of the PH ₃ supply pipe 23 is provided above the inside of the quartz inner tube 12. This is to suppress variations in phosphorus concentration between a plurality of semiconductor wafers stacked and mounted in the vertical direction. Move the PH ₃ supply the tip of the nozzle of the pipe 22 and PH ₃ supply PH ₃ gas supplied from the tip of the nozzle of the pipe 23 within the quartz inner tube 12 to the top, between the quartz inner tube 12 and the quartz outer tube 11 The air flows downward through the space and is exhausted from the exhaust port 17. The cleaning gas supplied from the tip of the nozzle of the cleaning gas supply pipe 24 also moves from the lower part to the upper part in the quartz inner tube 12 and passes through the space between the quartz inner tube 12 and the quartz outer tube 11. The air flows downward and is exhausted from the exhaust port 17.

In the present embodiment, as shown in FIG. 1 (B), unevenness 121 having Ra of 2 to 4 μm is formed on the inner wall surface of the quartz inner tube 12. The irregularities 121 are formed by a chemical treatment that treats the quartz inner tube 12 with a chemical solution.
By repeating the film formation, a film is deposited on the inner wall surface of the quartz inner tube 12, and by repeating the film formation, stress is accumulated in the film due to a temperature change at the time of entering the wafer. Due to the unevenness 121 provided on the surface of the inner wall surface 12, the stress composition vector in the film is changed from one direction (parallel to the film: see FIG. 2A) to two directions (parallel and vertical directions: FIG. 2B). ))), The stress is alleviated. As a result, in the past, film cracks occurred when the cumulative film thickness was about 3.5 μm, but by providing the unevenness 121, it was possible to delay the film crack generation timing until the cumulative film thickness exceeded 5 μm, It became possible to delay the particle generation time. Therefore, the frequency of gas cleaning can be reduced and it is very effective for reducing COO. In FIG. 2, DOPOS is an abbreviation for Doped Poly Si.

  Next, a method for performing gas cleaning when a phosphorus (P) doped polysilicon film is formed using the vertical CVD film forming apparatus 1 will be described.

First, the quartz boat 14 holding a large number of semiconductor silicon wafers 16 is inserted into the quartz inner tube 12 maintained at a temperature of 530.degree.
Next, vacuum exhaust is performed from the exhaust port 17 using a vacuum pump (not shown).
Then, _SiH 4, PH ₃ SiH ₄ were supplied to and PH ₃ from the supply pipe 21 to supply the PH ₃ respectively from PH ₃ supply pipe 22 and 23, while evacuating from the exhaust port 17, the quartz outer tube 11 Then, a phosphorus-doped polysilicon film is formed on the semiconductor silicon wafer 16 to a thickness of 300 nm.
Then, _SiH 4, PH ₃ supply of SiH ₄ and PH ₃ in the feed pipe 21, to stop the supply of PH ₃ from PH ₃ supply pipe 22, the vacuum from the exhaust port 17 to the quartz outer tube 11 Exhaust.
Next, N ₂ purge is performed by flowing N ₂ into the quartz outer tube 11 from the SiH ₄ and PH ₃ supply pipe 21.
Thereafter, the supply of N ₂ is stopped and the inside of the quartz outer tube 11 is evacuated. N ₂ purge and subsequent vacuum evacuation in the quartz outer tube 11 are performed several times as a set.
Thereafter, the inside of the quartz outer tube 11 is returned from the vacuum state to the atmospheric pressure state, and then the quartz boat 14 is lowered and pulled out from the quartz outer tube 11, and then the quartz boat 14 and the semiconductor wafer 16 are lowered to room temperature.
Thereafter, the semiconductor wafer 16 is taken out from the quartz boat 14.
Next, a new semiconductor wafer 16 is mounted on the quartz boat 14 and inserted into the quartz inner tube 12 to form a phosphorus-doped polysilicon film on the semiconductor silicon wafer 16.

  When the method for producing the phosphorus-doped polysilicon film is repeated, as shown in FIG. 3A, the film 30 adheres to the inner wall of the quartz inner tube 12, and the film 30 attached to the inner wall has a predetermined thickness. At that time, the cleaning gas is introduced into the quartz inner tube 12 from the cleaning gas supply pipe 24 to clean the film 30 attached to the inner wall of the quartz inner tube 12.

Next, this cleaning method will be described.
First, the quartz boat 14 not holding the semiconductor wafer 16 is inserted into the quartz inner tube 12 maintained at a predetermined cleaning temperature.
Next, vacuum exhaust is performed from the exhaust port 17 using a vacuum pump (not shown).
Next, the cleaning gas is supplied from the cleaning gas supply pipe, and the quartz inner tube 12 is kept at 120 Pa while the inside of the quartz outer tube 11 is maintained at 120 Pa while being evacuated from the exhaust port 17 using a vacuum pump (not shown). Perform cleaning.
Next, supply of the cleaning gas is stopped, and a vacuum pump (not shown) is used to evacuate the exhaust port 17 to exhaust the remaining cleaning gas.
Next, N ₂ is caused to flow into the quartz outer tube 11 from the SiH ₄ and PH ₃ supply pipe 21 to perform N ₂ purge, and the cleaning gas in the quartz outer tube 11 is removed.
Thereafter, vacuum exhaust is performed from the exhaust port 17 using a vacuum pump (not shown). Several cycles of evacuation and N ₂ purge are performed.
Thereafter, the inside of the quartz outer tube 11 is returned from the vacuum state to the atmospheric pressure state, and then the quartz boat 14 is lowered and pulled out from the quartz outer tube 11.

  Cleaning is affected by the type of cleaning gas and the cleaning temperature.

When ClF ₃ gas is used as a cleaning gas, the selectivity (film etching rate / quartz etching rate) can be increased under cleaning conditions of 400 ° C. or lower, and Ra 2 to 4 μm unevenness formed by chemical treatment. The film 30 adhering to the inner wall of the quartz inner tube 12 can be removed by etching without shaving 121, and even after the etching, the uneven state of the quartz surface can be maintained in the initial state at the time of delivery as shown in FIG. . Therefore, the gas cleaning frequency can be made the same as the gas cleaning frequency in the initial state (gas cleaning once for every 5 μm of accumulated film thickness), which has an excellent effect of improving COO.

When F ₂ gas is used as the cleaning gas, the selection ratio (film etching rate / quartz etching rate) can be increased under F ₂ gas cleaning conditions of 350 ° C. or lower, and Ra 2 −2 formed by chemical treatment. The film 30 adhering to the inner wall of the quartz inner tube 12 can be removed by etching without shaving the 4 μm irregularities 121. Even after etching, the irregularities on the quartz surface are as shown in FIG. 3B. Can be maintained. Therefore, the gas cleaning frequency can be made the same as the gas cleaning frequency in the initial state (gas cleaning once every 5 μm of accumulated film thickness), which has an excellent effect of improving COO.

In the cleaning using a ClF ₃ cleaning gas at a temperature higher than 400 ° C. and the cleaning using an F ₂ cleaning gas at a temperature higher than 350 ° C., as shown in FIG. (Etching rate / quartz etching rate) cannot be made high, and when the film 30 adhering to the inner wall of the quartz inner tube 12 is removed by etching, the unevenness 121 of Ra 2 to 4 μm formed by the chemical treatment is also removed.

  As described above, the cleaning gas type and temperature at the time of cleaning affect the selection ratio (film etching rate / quartz etching rate), and as a result, the uneven state of the inner wall of the quartz inner tube 12 after cleaning is affected. As for the pressure at the time of cleaning, the above is the case of 120 Pa, but the same result as above is obtained at 1 Torr (133 Pa) or less.

FIG. 4 shows the relationship between the cumulative film thickness and the results of measuring the particles generated each time the formation of the phosphorus-doped polysilicon film is repeated. Here, if the particles suddenly increase, it is because the film 30 adhering to the inner wall of the quartz inner tube 12 is cracked, and thus particles are generated, and therefore cleaning is performed thereafter. In this gas cleaning, as shown in FIG. 3 (B), after the gas cleaning, the condition that the uneven state of the quartz surface can be maintained at the time of delivery, specifically, ClF ₃ gas is used as the cleaning gas. Then, cleaning was performed at 400 ° C. In the drawing, 400DRY-CLN means dry cleaning at 400 ° C. In the figure, TOP is a semiconductor wafer 16 held at the top of the quartz boat 14, CTR is a semiconductor wafer 16 held at the center of the quartz boat 14, and BTM is a semiconductor held at the bottom of the quartz boat 14. TC means the semiconductor wafer 16 held between the upper part and the center of the quartz boat 14, and CB means the semiconductor wafer 16 held between the lower part and the center of the quartz boat 14. To do. The particles were measured by a laser scattering method.

  As shown in FIG. 4A, in the case where the unevenness 121 of Ra 2 to 4 μm is formed on the inner wall of the quartz inner tube 12 by chemical treatment, it is not necessary to perform cleaning until the accumulated film thickness becomes 5.4 μm. However, as shown in FIG. 4B, in the case where irregularities of Ra less than 0.5 μm were formed, it was necessary to perform gas cleaning when the accumulated film thickness reached 3.5 μm.

  In this embodiment, the case of a phosphorus (P) doped polysilicon film has been described. However, a boron (B) doped polysilicon film or an amorphous silicon film doped with boron (B) or phosphorus (P). Even a non-doped polysilicon film or a non-doped amorphous silicon film is almost the same as the present embodiment.

  As described above, the gas cleaning cycle is prolonged in the deposition with Doped Poly Si, Doped Amorphous Si, and Non-Doped Poly Si using the quartz inner tube surface (Ra: 2 to 4 μm) in the CVD film forming apparatus. And downtime associated with gas cleaning can be greatly reduced.

FIG. 1A is a schematic longitudinal sectional view of a vertical CVD film forming apparatus according to an embodiment of the present invention, and FIG. 1B is a partially enlarged view of a portion A in FIG. . It is an in-film stress vector block diagram. It is a longitudinal cross-sectional view for demonstrating the cleaning condition by gas cleaning conditions. It is a figure for demonstrating the particle generation timing by the inner tube surface treatment roughness.

Explanation of symbols

1 ... vertical CVD film forming apparatus 11 ... a quartz Autachibu 12 ... a quartz inner tube 13 ... resistance heater 14 ... a quartz boat 15 ... cap 16 ... semiconductor wafer 17 ... exhaust port 18 ... throat seal plate 21 ... _SiH 4, PH ₃ supply piping 22, 23 ... PH ₃ supply piping 24 ... cleaning gas supply piping

Claims (2)

A reaction tube;
A support for supporting the substrate in the reaction tube;
A substrate processing apparatus for forming a thin film on the substrate, comprising a film forming gas introducing means for introducing a film forming gas into the reaction tube,
A substrate processing apparatus, wherein Ra has an unevenness of 2 to 4 μm formed at least on the inner wall surface of the reaction tube. A step of carrying the substrate into a reaction tube in which Ra has a roughness of 2 to 4 μm on the inner wall surface;
Supplying a deposition gas into the reaction tube to form a thin film on the substrate;
Unloading the substrate from within the reaction tube;
And a cleaning step of removing the film adhering to the inner wall of the reaction tube by supplying ClF ₃ gas or F ₂ gas into the reaction tube in the absence of the substrate in the reaction tube. And
In the cleaning step, when a ClF ₃ gas is used, the cleaning temperature is set to 400 ° C. or lower, and when F ₂ gas is used, the cleaning temperature is set to 350 ° C. or lower.

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