TW202320353A - Photodetection apparatus and electronic device - Google Patents

Abstract

To enable accurate adjustment of a bias voltage of a photoelectric conversion element independently of an incident light amount of light. This photodetection apparatus is provided with: a first pixel including a photoelectric conversion element which generates a carrier by photoelectric conversion; a second pixel including a carrier generation part which generates a carrier by a factor other than photoelectric conversion; and a control circuit which controls, on the basis of the carrier generated in the second pixel, a bias voltage to be applied to the photoelectric conversion element and the carrier generation part. The photoelectric conversion element includes a first photoelectric conversion area where photoelectric conversion is possible and a first pinning film which is arranged at a place in contact with the first photoelectric conversion area. The carrier generation part includes a second photoelectric conversion area where photoelectric conversion is possible. Moreover, in the carrier generation part, a second pinning film, which is partially removed, is arranged at a place in contact with the second photoelectric conversion area, or a member which suppresses a dark current is not provided in the entire area of the second photoelectric conversion area.

Description

Photodetection device and electronic equipment

The disclosure relates to a light detection device and an electronic machine.

In order to detect faint light with high precision, a SPAD (Single Photon Avalanche Diode: Single Photon Avalanche Diode) may be used. SPADs are widely used in ToF (Time Of Flight: Time of Flight) sensors and the like. In the SPAD, photodetection is performed in a state where a reverse bias voltage equal to or higher than the breakdown voltage is applied between the anode and the cathode. Upon detection of light, the cathode potential of the SPAD drops dramatically. When the cathode potential of the SPAD drops to the bottom potential (also known as the quenching voltage), the photodetection cannot be restarted until the subsequent recovery to the original voltage level. The bottom potential of SPAD changes according to temperature, etc., which also affects the sensitivity of SPAD. The bottom potential of the SPAD can be variably controlled by adjusting the bias voltage such as the cathode potential of the SPAD.

Therefore, it is disclosed that a SPAD for monitoring is provided separately from the SPAD for pixel signal generation, and the SPAD for monitoring detects the above-mentioned bottom potential, and adjusts the bias voltage of the SPAD based on the detected bottom potential (refer to the patent document 1). [Prior Art Literature] [Patent Document]

[Patent Document 1] Japanese Patent Laid-Open No. 2021-056016

[Problem to be solved by the invention]

In Patent Document 1, light from the outside is incident on a SPAD for monitoring to detect the bottom potential. As described above, since the bottom potential fluctuates with temperature, etc., in Patent Document 1, the bottom potential is measured a plurality of times, and the bottom potential is averaged for each time to improve the accuracy of the bias voltage.

However, when the amount of light incident on the SPAD for monitoring is not sufficient, it is easily affected by noise light. Even if the averaging process is performed, the time variation of the bottom potential becomes large, and the PDE (Photon Detection Efficiency : The time variation of the light detection efficiency) also becomes larger.

Therefore, the present disclosure provides a photodetection device and an electronic device capable of accurately adjusting the bias voltage of a photoelectric conversion element regardless of the amount of incident light. [Technical means to solve the problem]

In order to solve the above problems, according to the present disclosure, a light detection device is provided, which has: a first pixel having a photoelectric conversion element that generates carriers by photoelectric conversion; A second pixel having a carrier generating portion that generates carriers by factors other than photoelectric conversion; and a control circuit that controls a bias voltage applied to the photoelectric conversion element and the carrier generating portion based on the carriers generated in the second pixel; and The above-mentioned photoelectric conversion element has: a first photoelectric conversion region capable of photoelectric conversion; and a first pinning film disposed at a portion in contact with the above-mentioned first photoelectric conversion region; The above-mentioned carrier generating part has a second photoelectric conversion region capable of photoelectric conversion, and a second pinning film that has been partially removed is disposed at a portion adjacent to the second photoelectric conversion region, or it is not used in the second photoelectric conversion region. In the entire area of the area, components to suppress dark current are installed.

The second pinning film may be partially removed on at least one of the surface side of the carrier generation portion opposite to the wiring region and a boundary region with adjacent pixels.

The carrier generation unit may generate the carrier by an interface state generated in the second photoelectric conversion region.

Alternatively, a light shielding member for shielding light incident on the second pixel may be provided.

Alternatively, the material of the light-shielding member may include the same material as that of the pixel separator disposed in the boundary region of the second pixel to shield light from adjacent pixels.

Can also have: an on-chip lens that condenses light onto the first pixel; and a light emitting element that emits light; and The second pixel is arranged in a place different from the area where the light emitted from the light emitting element passes and the area where the light transmitted through the on-chip lens passes.

It may also include: a support that supports the first pixel, the second pixel, the on-chip lens, and the light emitting element; and A part of the above-mentioned support is used as the above-mentioned light-shielding member.

Alternatively, the carrier generating portion may have a P region and an N region joined to each other; The carrier generation unit breaks down when generating the carriers in a state where a potential difference corresponding to the bias voltage is applied between the P region and the N region.

It may also include: a readout circuit that generates a pixel signal corresponding to the carrier generated in the above-mentioned second pixel; and The control circuit controls the bias voltage based on the potential level of the pixel signal.

Can also have: a counting circuit that counts the number of times that the above-mentioned carrier generating portion collapses; and The number comparison determination circuit determines whether the number of times counted by the counting circuit has reached a specific reference number, and changes the operation condition of the second pixel when it is determined that the number of times has reached the reference number.

The number comparison determination circuit may control the potential difference so that the carrier generation unit does not collapse when the counted number reaches the reference number.

The control circuit, the readout circuit, the counting circuit, and the count comparison determination circuit may be provided for each of the second pixels, or for each of a plurality of the second pixels.

Alternatively, the control circuit, the readout circuit, the counting circuit, and the count comparison and determination circuit may be arranged on the same substrate as the first pixel and the second pixel.

Can also have: a first substrate on which the above-mentioned first pixel and the above-mentioned second pixel are arranged; and A second substrate on which at least a part of the control circuit, the readout circuit, the counting circuit, and the count comparison and determination circuit are arranged; and The above-mentioned first substrate and the above-mentioned second substrate are laminated and bonded to each other by conductive members to perform signal transmission.

It may also include: a pixel array unit having a plurality of the first pixels and a plurality of the second pixels; and Each of the above-mentioned plurality of first pixels is provided in association with any of the above-mentioned second pixels, or The above-mentioned 2nd pixel is arranged in a ratio of 1 to 2 or more of the above-mentioned 1st pixel, or The above-mentioned first pixel is provided in a ratio of one to two or more of the above-mentioned second pixels.

Alternatively, the pixel array unit may include: a first pixel area where the plurality of first pixels are arranged; and a second pixel area where the plurality of second pixels are arranged; or Arranging the above-mentioned plurality of second pixels in the pixel area where the above-mentioned plurality of first pixels are arranged, or The plurality of first pixels are arranged in the pixel area where the plurality of second pixels are arranged.

According to the present disclosure, there is provided a photodetection device comprising: a first pixel having a photoelectric conversion element that generates carriers by photoelectric conversion; A second pixel having a carrier generating portion having a carrier generating structure different from that of the photoelectric conversion element; and A control circuit that controls a bias voltage applied to the photoelectric conversion element and the carrier generating unit based on the carriers generated in the second pixel.

Alternatively, the photoelectric conversion element may have a first photoelectric conversion region capable of photoelectric conversion; The above-mentioned carrier generating part has a second photoelectric conversion region capable of photoelectric conversion; The second photoelectric conversion region has a carrier generating source for generating the carrier by factors other than incident light.

The carrier generating source may also include a floating diffusion region disposed in the second photoelectric conversion region and having a higher impurity concentration than the second photoelectric conversion region.

The carrier generating source may include at least one of a crystal defect site and a heavy metal existing site in the second photoelectric conversion region.

The carrier generation source may also include a portion in which the surface of the second photoelectric conversion region is partially removed.

The carrier generating source may have a floating conductive member connected to the second photoelectric conversion region.

The carrier generating part may have a stress imparting member that imparts stress to the second photoelectric conversion region; The carrier generation source includes a portion deformed by the stress of the stress imparting member in the second photoelectric conversion region.

Alternatively, the carrier generating unit may include a transistor arranged in the second photoelectric conversion region; The carrier generation source generates the carriers by controlling the gate voltage of the transistor.

Alternatively, the carrier generation unit may have an electrode connected to the second photoelectric conversion region; The carrier generation source generates the carriers by applying a specific voltage to the electrodes.

Alternatively, the second photoelectric conversion region may have a plurality of diffusion layers arranged at a distance from each other in the plane direction; The carrier generation source generates the carriers moving between the plurality of diffusion layers by applying a potential difference between the plurality of diffusion layers.

Alternatively, the above-mentioned carrier generating part may have: The first semiconductor layer of the first conductivity type; A second semiconductor layer of the second conductivity type, which is arranged in contact with the first semiconductor layer and multiplies the carriers; A third semiconductor layer of the second conductivity type arranged to surround at least a part of the first semiconductor layer and the second semiconductor layer; A first contact electrode for cathode connection, which is connected to the above-mentioned first semiconductor layer; and a second contact electrode for anode connection, which is connected to the above-mentioned third semiconductor layer; and The first contact electrode and the first semiconductor layer are connected to at least one of the second contact electrode and the third semiconductor layer by a Schottky junction; The above-mentioned carrier generation source includes the above-mentioned Schottky-junction site.

According to the present disclosure, there is provided an electronic machine having: a photodetection device that outputs pixel signals corresponding to carriers generated by photoelectric conversion; and a signal processing unit, which performs specific signal processing on the pixel signal; and The above-mentioned light detection device has: a first pixel having a photoelectric conversion element that generates carriers by photoelectric conversion; A second pixel having a carrier generating portion that generates carriers by factors other than photoelectric conversion; and a control circuit that controls a bias voltage applied to the photoelectric conversion element and the carrier generating portion based on the carriers generated in the second pixel; and The above-mentioned photoelectric conversion element has: a first photoelectric conversion region capable of photoelectric conversion; and a first pinning film disposed at a portion in contact with the above-mentioned first photoelectric conversion region; The above-mentioned carrier generating part has a second photoelectric conversion region capable of photoelectric conversion, and a second pinning film that has been partially removed is disposed at a portion adjacent to the second photoelectric conversion region, or it is not used in the second photoelectric conversion region. In the entire area of the area, components to suppress dark current are installed.

Hereinafter, embodiments of the photodetection device and electronic equipment will be described with reference to the drawings. In the following, main components of the photodetection device and electronic equipment will be described, but there may be components or functions in the photodetection device and electronic equipment that are not shown or described. The following description does not exclude components or functions not shown or described.

(first embodiment) Fig. 1 is a block diagram showing a schematic configuration of a photodetection device 1 according to a first embodiment. The photodetection device 1 shown in FIG. 1 includes an imaging pixel (first pixel) 2, a monitoring pixel (second pixel) 3, a first readout circuit 4, a second readout circuit 5, a counting circuit 6, a frequency comparison and determination circuit 7, And control circuit 8.

The imaging pixel 2 is a pixel for detecting incident light, and has a photoelectric conversion element 9 that generates carriers by photoelectric conversion. Carriers refer to electrons or holes generated by photoelectric conversion. The imaging pixels 2 are provided in plural, for example. The photoelectric conversion element 9 has a first photoelectric conversion region capable of photoelectric conversion, and a first pinning film disposed at a portion in contact with the first photoelectric conversion region. The photoelectric conversion element 9 is a SPAD (Single Photon Avalanche Diode) capable of Geiger mode operation. The Geiger mode refers to a mode in which photons are detected in a state where a reverse bias voltage of a potential difference exceeding the breakdown voltage is applied between the anode and the cathode of the SPAD. Hereinafter, the photoelectric conversion element 9 may be referred to as SPAD9. The cross-sectional structure of the photoelectric conversion element 9 will be described later.

The monitor pixel 3 has a carrier generation unit 10 that generates carriers by factors other than photoelectric conversion. The monitor pixel 3 is characterized in that it can generate carriers even when no light is incident on it. For example, a plurality of monitoring pixels 3 are provided. The carrier generation unit 10 has a second photoelectric conversion region capable of photoelectric conversion. The layer configuration or material of the second photoelectric conversion region may be the same as that of the first photoelectric conversion region. As described above, the monitor pixel 3 is characterized in that carriers are generated by factors other than photoelectric conversion, but the element structure of the monitor pixel 3 is similar to that of the imaging pixel 2, and when light enters the monitor pixel 3, photoelectric conversion can also be used. produce carriers. The carrier generating unit 10 has a SPAD capable of operating in the Geiger mode. This SPAD system generates carriers and collapses even when no light is incident on it. Hereinafter, carrier generating unit 10 may be referred to as SPAD10.

In this specification, the imaging pixel 2 has a photoelectric conversion element 9, and the process of generating a pixel signal corresponding to the carrier generated in the photoelectric conversion element 9 is performed in the first readout circuit 4 connected to the imaging pixel 2. illustrate. Similarly, the monitor pixel 3 has a carrier generating unit 10, and the process of generating a pixel signal corresponding to the carrier generated in the carrier generating unit 10 is performed in the second readout circuit 5 connected to the monitor pixel 3. illustrate.

The carrier generating part 10 may have a second pinning film disposed in a portion in contact with the second photoelectric conversion region. The second pinning film is characterized in that at least a part is partially removed. By partially removing the second pinning film, as will be described later, dark current is easily generated, and carriers can be generated by factors other than photoelectric conversion, and the carrier generating part 10 can be collapsed even when no light is incident.

In addition, as will be described later, the second pinning film is not an essential component of the carrier generating section 10 . For example, the carrier generation unit 10 does not need to include a member for suppressing dark current such as a second pinning film. Since there is no means for suppressing dark current, dark current is easily generated on the surface or inside of the second photoelectric conversion region, and carriers are easily generated by factors other than photoelectric conversion.

The first readout circuit 4 generates pixel signals corresponding to the photoelectrically converted carriers generated in the imaging pixels 2 . The first readout circuit 4 has a PMOS (P type Metal Oxide Semiconductor: P-type Metal Oxide Semiconductor) transistor 11 functioning as a current source, and an inverter 12 . Instead of the PMOS transistor 11 and the inverter 12, a plurality of transistors may be provided. The plurality of transistors are, for example, transfer transistors, reset transistors, amplification transistors, selection transistors, and the like.

The second readout circuit 5 generates pixel signals corresponding to carriers generated in the monitor pixels 3 . The second readout circuit 5 has a PMOS transistor 13 functioning as a current source, a buffer 14 , a timing detection circuit 15 , a sample hold circuit 16 , and a buffer 17 .

The buffer 14 on the front side of the sample hold circuit 16 is provided so that the input node of the sample hold circuit 16 matches the capacitance of the output node of the inverter 12 connected to the first readout circuit 4 of the imaging pixel 2 . By providing the buffer 14, the breakdown voltage of the photoelectric conversion element 9 in the imaging pixel 2 and the carrier generating part 10 in the monitor pixel 3 can be made to be the same.

The timing detection circuit 15 monitors the cathode potential of the carrier generating unit 10 . The cathode potential is a power supply potential in a state where no carriers are generated by the carrier generating unit 10 . The timing detection circuit 15 detects the timing at which a certain time elapses from the point when the cathode potential starts to fall from the power supply potential. The sample hold circuit 16 extracts and holds the cathode potential based on the timing detected by the timing detection circuit 15 . The sample hold circuit 16 outputs the hold potential to the buffer 17 .

The counting circuit 6 counts the number of times the timing detection circuit 15 detects the timing. This number indicates the number of times the carrier generating unit 10 collapses.

The count comparison determination circuit 7 judges whether the count counted by the counting circuit 6 has reached a specific reference count, and changes the operating conditions of the monitor pixels 3 when it is determined that the specific reference count has been reached.

A first example of changing the operating conditions of the monitor pixel 3 is that no carrier is generated in the monitor pixel 3 . Thereby, the carrier generating unit 10 does not collapse, and the power consumption in the monitor pixel 3 can be reduced. In addition, a second example of changing the operating conditions of the monitor pixel 3 is to apply a reverse bias with a potential difference lower than the Geiger mode between the anode and the cathode of the carrier generating part 10 in the monitor pixel 3, so that Non-Geiger mode action. If the carrier generating unit 10 is operated in the non-Geiger mode, even if the carrier generating unit 10 generates carriers, there will be no collapse, and power consumption can be reduced compared to when the carrier generating unit 10 operates in the Geiger mode.

The control circuit 8 has an inter-pixel average acquisition unit 21 , a time acquisition unit 22 , and a potential control unit 23 . The inter-pixel average acquisition unit 21 obtains an average of the holding potentials of a plurality of monitor images as an inter-pixel average. The time average obtaining unit obtains a time average value of an average value between pixels. The potential control unit 23 compares with a preset target voltage, and controls the anode potential to be lower as the time average value of the cathode potential is higher. All anodes of the plurality of monitoring pixels 3 and the plurality of imaging pixels 2 are commonly connected to the output node of the potential control unit 23 . Therefore, the potential control unit 23 can control each anode potential.

In addition, the monitor pixel 3 may monitor the anode potential instead of the cathode potential. In this case, the potential control unit 23 controls each cathode potential.

(SPAD cathode potential and excess bias voltage) Fig. 2 is a diagram showing the change of cathode potential Vs with time. Specifically, FIG. 2 shows the relationship between the magnitude of the cathode potential Vs, the anode potential VSPAD, and the bottom potential (quenching voltage) VBT.

As shown in FIG. 1 , a power supply voltage is supplied to the cathode of the carrier generation unit 10 through the PMOS transistor 13 , and in a normal state, the potential of the cathode becomes the power supply voltage. When the carrier generation unit 10 generates carriers by factors other than photoelectric conversion, the cathode potential Vs decreases to the bottom potential VBT. Thereafter, by recharging the cathode potential Vs of the carrier generation unit 10 with the PMOS transistor 13, the cathode potential Vs returns to the original power supply potential.

Here, the potential difference between the power supply potential and the bottom potential VBT is called an excess bias voltage VEX. Also, the potential difference between the bottom potential VBT and the anode potential VSPAD is called a breakdown voltage VBD. If the power supply potential and the anode potential VSPAD do not change, the excess bias voltage VEX changes with the deviation of the breakdown voltage VBD or the temperature.

When the breakdown voltage VBD increases, the bottom potential VBT reached by the breakdown of the carrier generating unit 10 increases. That is, the excess bias voltage VEX decreases. As the excess bias voltage VEX becomes smaller, the sensitivity of the carrier generating part 10 decreases. In this case, the detection efficiency of carriers decreases. In order to improve the carrier detection efficiency, when the potential held by the sample and hold circuit 16 is higher than the specific target value of the bottom potential VBT, the anode potential VSPAD is lowered by the control circuit 8 . On the other hand, when the potential held by the sample-and-hold circuit 16 is lower than the target value of the bottom potential VBT, the element may be damaged because it exceeds the allowable maximum potential of the second readout circuit 5, so the anode potential VSPAD is set to higher. The intended carrier detection efficiency is achieved by this voltage control.

(Sectional structure of SPAD) FIG. 3A is a cross-sectional view of the imaging pixel 2 , and FIG. 3B is a cross-sectional view of the monitoring pixel 3 . The imaging pixel 2 shown in FIG. 3A has a laminated structure in which a sensor substrate 41 , a sensor-side wiring layer 42 , and a logic-side wiring layer 43 are laminated. On the logic-side wiring layer 43, a logic circuit board (not shown) is laminated. On the logic circuit board, the first readout circuit 4, the second readout circuit 5, the counting circuit 6, the count comparison and determination circuit 7, and the control circuit 8 shown in FIG. 1 are arranged. In addition, at least a part of the first readout circuit 4 , the second readout circuit 5 , the counting circuit 6 , the count comparison determination circuit 7 , and the control circuit 8 may be disposed on the sensor substrate 41 side.

The sensor substrate 41 is, for example, a semiconductor substrate obtained by dicing single crystal silicon into thin slices. On the sensor substrate 41, a plurality of photoelectric conversion elements 9 are arranged along the substrate surface. FIG. 3A shows a cross-sectional structure of an imaging pixel 2 having one photoelectric conversion element 9 for one pixel. The photoelectric conversion element 9 has an N-well 51 arranged on a sensor substrate 41, a P-type diffusion layer 52, an N-type diffusion layer 53, a hole storage layer 54, a pinning film (first pinning film) 55, and high Concentration P-type diffusion layer 56. The avalanche multiplication region 57 is formed by a depletion layer formed in a region connected to the P-type diffusion layer 52 and the N-type diffusion layer 53 . The lower end side in FIG. 3A is the light-incident side, which is referred to as the back side in this specification.

The N well 51 is a region where N-type impurity ions are implanted and diffused into the sensor substrate 41 . N well 51 forms an electric field that transfers electrons generated by photoelectric conversion element 9 to avalanche multiplication region 57 . As will be described later, instead of the N well 51, a P well for injecting and diffusing P-type impurity ions may be provided.

The P-type diffusion layer 52 is near the front surface of the sensor substrate 41 and is a denser P-type (P+) diffusion layer formed on the back side of the N-type diffusion layer 53 . The N-type diffusion layer 53 is near the front surface of the sensor substrate 41 and is a denser N-type (N+) diffusion layer formed on the front side relative to the P-type diffusion layer 52 . The N-type diffusion layer 53 is connected to a contact electrode 71 for cathode connection.

The hole storage layer 54 is a P-type diffusion layer formed to surround the side and bottom of the N well 51, and stores holes. In addition, the hole storage layer 54 is connected to the contact electrode 72 for anode connection of the photoelectric conversion element 9, and the bias voltage can be adjusted. Thereby, the hole concentration of the hole storage layer 54 can be enhanced, the pins including the pinning film 55 can be strongly solidified, and the generation of dark current can be suppressed.

The pinning film 55 is a denser P-type (P+) diffused film formed on the outer surface of the hole storage layer 54 (more specifically, the side surface in contact with the back surface of the sensor substrate 41 or the insulating film 62). layer, like the hole storage layer 54, suppresses the generation of dark current.

The high-concentration P-type diffusion layer 56 is a relatively dense P-type (P++) diffusion layer formed near the front surface of the sensor substrate 41 to surround the outer periphery of the N well 51, and is used to connect the hole storage layer 54 with the photoelectric The contact electrode 72 for the anode connection of the conversion element 9 is connected.

The avalanche multiplication region 57 is a high electric field region formed on the boundary surface of the P-type diffusion layer 52 and the N-type diffusion layer 53 by applying a voltage to the N-type diffusion layer 53 through the contact electrode 71 for cathode connection, and will generate a high electric field from incident photoelectric The electrons generated by 1 photon of the conversion element 9 are multiplied.

Between adjacent photoelectric conversion elements 9 , an inter-pixel separation portion 63 having a double structure of a metal film 61 and an insulating film 62 is provided. The adjacent photoelectric conversion elements 9 are insulated and separated from each other in the inter-pixel separating portion 63 . For example, the inter-pixel separating portion 63 is formed to penetrate from the rear surface to the front surface of the sensor substrate 41 .

The metal film 61 is a film formed of a metal (for example, tungsten, etc.) that reflects or absorbs light. The insulating film 62 is an insulating film such as SiO ₂ . For example, the inter-pixel isolation portion 63 is formed by embedding in the sensor substrate 41 so as to cover the surface of the metal film 61 with the insulating film 62 . Adjacent photoelectric conversion elements 9 are electrically and optically separated from each other by the inter-pixel separation portion 63 .

The sensor side wiring layer 42 has contact electrodes 71-73, metal wirings 74-76, contact electrodes 77-79, and metal pads 80-82.

The contact electrode 71 connects the N-type diffusion layer 53 and the metal wiring 74 . The contact electrode 72 connects the high-concentration P-type diffusion layer 56 and the metal wiring 75 . The contact electrode 73 connects the metal film 61 and the metal wiring 76 .

Metal wiring 74 is formed larger than avalanche multiplication region 57 so as to cover at least avalanche multiplication region 57 . The metal wiring 74 reflects the light transmitted through the photoelectric conversion element 9 toward the direction of the photoelectric conversion element 9 .

The metal wiring 75 is formed to overlap the high-concentration P-type diffusion layer 56 so as to cover the outer periphery of the metal wiring 74 . The metal wiring 76 is formed so as to be connected to the metal film 61 at the four corners of the photoelectric conversion element 9 .

The contact electrode 77 connects the metal wiring 74 and the metal pad 80 . The contact electrode 78 connects the metal wiring 75 and the metal pad 81 . The contact electrode 79 connects the metal wiring 76 and the metal pad 82 .

The metal pads 80 to 82 are connected to the metal pads 93 to 95 formed on the logic side wiring layer 43 by Cu-Cu bonding.

The logic-side wiring layer 43 has electrode pads 83-85, an insulating layer 86, contact electrodes 87-92, and metal pads 93-95.

The electrode pads 83-85 can be used for connection with the logic circuit substrate. The insulating layer 86 insulates the electrode pads 83 to 85 from each other.

The contact electrodes 87 and 88 connect the electrode pad 83 and the metal pad 93 . Contact electrodes 89 , 90 connect electrode pad 84 to metal pad 94 . The contact electrodes 91 and 92 connect the electrode pad 85 and the metal pad 95 .

Metal pad 93 is bonded to metal pad 80 . Metal pad 94 is bonded to metal pad 81 . Metal pad 95 is bonded to metal pad 82 .

With such a wiring structure, for example, the electrode pad 83 for cathode connection of the photoelectric conversion element 9 passes through the contact electrodes 87, 88, the metal pad 93, the metal pad 80, the contact electrode 77, the metal wiring 74, and the contact electrode. 71 , electrically connected to the N-type diffusion layer 53 . In addition, the electrode pad 84 for the anode connection of the photoelectric conversion element 9 is electrically connected to the high-concentration electrode 84 via the contact electrodes 89, 90, the metal pad 94, the metal pad 81, the contact electrode 78, the metal wiring 75, and the contact electrode 72. P-type diffusion layer 56 . For example, the cathode potential of the photoelectric conversion element 9 can be adjusted by applying a bias voltage to the electrode pad 83 .

Furthermore, electrode pad 85 is configured to be connected to metal film 61 via contact electrodes 91 , 92 , metal pad 95 , metal pad 82 , contact electrode 79 , metal wiring 76 , and contact electrode 73 . Therefore, in the photoelectric conversion element 9 , the bias voltage supplied from the logic circuit board to the electrode pad 85 can be applied to the metal film 61 . Thereby, the potential of the boundary region between adjacent pixels can be set to a desired potential level.

The cross-sectional structure of the monitor pixel 3 shown in FIG. 3B is similar to that in FIG. 3A , and the corresponding components are marked with the same symbols. In the monitor pixel 3 shown in FIG. 3B , for example, the pinning film (second pinning film) 55 is partially removed. In FIG. 3B , an example in which the pinning film 55 disposed on the surface (light incident surface) opposite to the sensor-side wiring layer 42 is partially removed is shown. As will be described later, the place where the pinning film 55 is partially removed may be a place other than the place along the light incident surface. Also, the size or shape in which the pinning film 55 is partially removed is also arbitrary. Furthermore, the pinning film 55 may be partially removed at multiple locations.

Dark current is likely to be generated in the place where the pinning film is partially removed, and the carrier generation part 10 generates electrons due to the dark current.

The monitor pixel 3 of this embodiment can collapse the carrier generation part 10 regardless of whether light is incident or not, and does not depend on the amount of incident light.

In addition, when light is incident on the carrier generating portion 10 , compared with the case where light is not incident on the carrier generating portion 10 , the above-mentioned bottom potential varies, and there is a possibility that an error may occur in the adjustment of the anode voltage. Therefore, the monitor pixel 3 may also be configured as in the case where no light is incident.

(Light-shielding structure of the carrier generating unit 10 ) FIG. 4 is a cross-sectional view of the monitoring pixel 3 in a modification example of FIG. 3B. In the monitor pixel 3 of FIG. 4 , the light shielding member 25 is disposed on the pinning film 55 on the light incident surface side. The light shielding member 25 of FIG. 4 is also called OPB (Optical Black: optical black). The light shielding member 25 in FIG. 4 can be formed of the same material as the inter-pixel separating portion 63 . In FIG. 4 , part of the pinning film 55 on the light incident surface side is removed, but as described above, the place where the pinning film 55 is partially removed may be a place different from the light incident surface (for example, a border area of a pixel) , the pinning film 55 can also be completely removed.

By covering the light incident surface side of the monitor pixel 3 with the light shielding member 25 , light does not enter the carrier generation portion 10 in the monitor pixel 3 . Therefore, the carrier generation unit 10 can generate carriers only by factors other than photoelectric conversion. This suppresses fluctuations in the bottom potential or excess bias voltage when the carrier generating unit 10 in the monitor pixel 3 collapses, and adjusts the bias voltages of the photoelectric conversion element 9 and the carrier generating unit 10 with high precision.

(Application for ToF sensor) The photodetection device 1 of this embodiment can be used in a ToF sensor for distance measurement. FIG. 5 is a schematic cross-sectional view of the ToF sensor 26 . The ToF sensor 26 in FIG. 5 includes a light emitting unit 27 that irradiates light to an object to be measured for distance, and a light receiving unit 28 that receives reflected light from the object. The photodetection device 1 of this embodiment is used for the photodetector 28 in FIG. 5 . The light receiving unit 28 and the light emitting unit 27 are supported by the supporting member 29 , and the light shielding wall 30 is disposed between the light emitting unit 27 and the light receiving unit 28 so that the light receiving unit 28 does not receive the light emitted from the light emitting unit 27 . The light shielding wall 30 is integrally formed on the supporting member 29 .

The light receiving unit 28 in FIG. 5 has imaging pixels 2 and monitoring pixels 3 . The on-chip lens 2a is arranged on the light incident surface side of the imaging pixel 2, and a condenser lens 31 is arranged in front of the optical axis of the imaging pixel 2 to condense the light incident on the condenser lens 31 and enter the imaging pixel 2 . In addition, a light shielding wall 30 is disposed facing the light incident surface of the monitor pixel 3 so as to prevent the light condensed by the condensing lens 31 and the light emitted by the light emitting unit 27 from entering the monitor pixel 3 .

Since the imaging pixels 2 and the monitoring pixels 3 are formed on the same substrate by a common semiconductor process, there is a possibility that the imaging pixels 2 and the monitoring pixels 3 are arranged close to each other. Therefore, as shown in FIG. 5 , dummy pixels 32 may be arranged around the monitoring pixels 3 such as between the imaging pixels 2 and the monitoring pixels 3 . The dummy pixels 32 are pixels that are neither used as imaging pixels 2 nor monitor pixels 3 , but can also be used for other purposes. In this way, by arranging the dummy pixels 32 around the monitor pixels 3 , the risk of light incident on the monitor pixels 3 can be further reduced.

FIG. 6 is a block diagram showing a schematic configuration of a distance measuring device 40 equipped with the ToF sensor 26 in FIG. 5 . The distance measuring device 40 includes a light emitting unit 27, a light receiving unit 28, a light receiving side optical system (condensing lens) 31, a drive unit 33, a power supply circuit 34, a light emitting side optical system 35, a signal processing unit 36, a control unit 37, and a temperature detection unit. Section 38.

The light emitting unit 27 emits light from a plurality of light sources. The light emitting unit 27 has, for example, a plurality of light emitting elements using VCSEL (Vertical Cavity Surface Emitting LASER: Vertical Cavity Surface Emitting Laser Diode) as each light source, and these light emitting elements are arranged in a specific state such as a matrix. And constitute. The light emitting unit 27 corresponds to the photodetection device 1 in FIG. 1 , and the light emitting element corresponds to the photoelectric conversion element 9 .

The drive unit 33 has a power supply circuit 34 for driving the light emitting unit 27 . The power supply circuit 34 generates the power supply voltage of the drive unit 33 based on, for example, an input voltage from a battery (not shown) provided in the distance measuring device 40 . The drive unit 33 drives the light emitting unit 27 based on the power supply voltage.

The light emitted from the light emitting unit 27 is irradiated to the subject S as a distance measurement target through the light emitting side optical system 35 . Reflected light from the subject S to which light is irradiated enters the light receiving surface of the light receiving unit 28 via the light receiving side optical system 31 .

The light receiving unit 28 has a plurality of imaging pixels 2 as described above. The imaging pixel 2 of the incident reflected light receives the reflected light from the subject S incident through the light-receiving side optical system 31 , converts it into an electrical signal and outputs it.

The light receiving unit 28 converts the electrical signal obtained by photoelectrically converting the received light, for example, a voltage change caused by a breakdown into a digital signal, and outputs it to the subsequent signal processing unit 36 .

In addition, the light receiving unit 28 of this embodiment outputs the frame synchronization signal to the driving unit 33 . Thereby, the driving unit 33 can make the light-emitting elements in the light-emitting unit 27 emit light at the timing corresponding to the frame period of the light-receiving unit 28 .

The signal processing unit 36 is constituted by, for example, a DSP (Digital Signal Processor: digital signal processor) or the like as a signal processing processor. The signal processing unit 36 performs various signal processing on the digital signal input from the light receiving unit 28 .

The control unit 37 is configured, for example, with an information processing device such as a microcomputer or DSP, and the above-mentioned microcomputer has a CPU (Central Processing Unit: central processing unit), a ROM (Read Only Memory: read-only memory), and a RAM (Random Access Memory: random access memory). memory), etc., the control unit 37 controls the driving unit 33 for controlling the light emitting operation of the light emitting unit 27, or controls the light receiving operation of the light receiving unit 28.

The control unit 37 functions as a distance measuring unit 39 . The distance measuring unit 39 measures the distance to the subject S based on the signal input via the signal processing unit 36 (that is, a signal obtained by receiving reflected light from the subject S). The distance measuring unit 39 of this embodiment is capable of specifying the three-dimensional shape of the subject S, and measures the distance of each part of the subject S.

The temperature detection unit 38 detects the temperature of the light emitting unit 27 . As the temperature detection part 38, the structure which performs temperature detection using a diode, for example can be employ|adopted.

The temperature information detected by the temperature detection unit 38 is supplied to the drive unit 33 , whereby the drive unit 33 can drive the light emitting unit 27 based on the temperature information.

As the ToF method, when a so-called direct ToF (dTOF: direct Time of Flight) method is adopted, the light emitting unit 27 is pulse-driven. In this case, the distance measuring unit 39 calculates the time difference from light emission to light reception based on the signal input via the signal processing unit 36, based on the light emitted from the light emitting unit 27 and received by the light receiving unit 28, and calculates the time difference based on the time difference and the speed of light. The distance between each part of the subject S.

In addition, as the ToF method, when a so-called indirect ToF (iTOF: indirect Time of Flight) method (phase difference method) is employed, the distance is detected based on the phase difference of the signal received by the light receiving unit 28 .

(Layout configuration of photodetection device 1) The photodetection device 1 of the present embodiment includes a pixel array unit 45 having a plurality of imaging pixels 2 and a plurality of monitoring pixels 3 . FIG. 7A is a plan view showing part of the pixel array section 45 . In FIG. 7A , one monitor pixel 3 is called a SPAD pixel 46 . In addition, in FIG. 7A , the second readout circuit 5 corresponding to one SPAD pixel 46 is referred to as a readout circuit 47 . In addition, the counting circuit 6 , the count comparison determination circuit 7 , and the control circuit 8 corresponding to one SPAD pixel 46 are referred to as a determination circuit 48 .

In FIG. 7A , the SPAD pixel 46 , the readout circuit 47 , and the determination circuit 48 are arranged close to each other as a configuration corresponding to one pixel. FIG. 7A shows a layout arrangement of four pixels, but the number of pixels in the pixel array section 45 is arbitrary.

FIG. 7B shows an example of the pixel array unit 45 in which one readout circuit 47 and one determination circuit 48 are associated with a plurality of SPAD pixels 46 . In the case of FIG. 7B , a plurality of SPAD pixels 46 share one readout circuit 47 and one determination circuit 48 . Thereby, since the probability of collapse of at least one pixel is increased, a high-frequency bottom potential VBT can be easily obtained. As a result, potential control can be performed in a short time.

FIG. 7C shows an example of laminating a first substrate 49a on which a pixel array section 45 having SPAD pixels 46 is arranged, and a second substrate 49b on which a readout circuit 47 and a determination circuit 48 are arranged. The first substrate 49a and the second substrate 49b are connected by, for example, Cu-Cu bonding, and signal transmission is performed between the two substrates. In the case of FIG. 7C, one SPAD pixel 46 on the first substrate 49a is associated with one readout circuit 47 and one determination circuit 48 on the second substrate 49b.

FIG. 7D is a modification example of FIG. 7C, in which a plurality of SPAD pixels 46 on the first substrate 49a are associated with one readout circuit 47 and one determination circuit 48 on the second substrate 49b. In the case of FIG. 7D, since the degree of integration of the second substrate 49b can be reduced, other circuits can also be arranged on the second substrate 49b.

In FIG. 7C and FIG. 7D, the example in which the SPAD pixel 46, the readout circuit 47, and the determination circuit 48 are separately arranged on the first substrate 49a and the second substrate 49b has been shown, but three or more substrates can also be laminated. The readout circuit 47 and the determination circuit 48 are separately disposed on two or more substrates.

The specific arrangement locations of the plurality of imaging pixels 2 and the plurality of monitor pixels 3 arranged in the pixel array unit 45 are arbitrary, and various arrangement locations can be adopted.

(Layout configuration of imaging pixel 2 and monitoring pixel 3) FIG. 8A is a schematic plan view showing a first example of the arrangement locations of the imaging pixels 2 and the monitoring pixels 3 in the pixel array unit 45 . FIG. 8A shows an example having a first pixel array section 45 a for imaging pixels 2 and a second pixel array section 45 b for monitor pixels 3 . The first pixel array section 45a and the second pixel array section 45b are arranged at places separated from each other on the same substrate 49a. Also, while the plurality of imaging pixels 2 in the first pixel array unit 45a are arranged in two-dimensional directions, the plurality of monitoring pixels 3 in the second pixel array unit 45b are arranged linearly in one direction.

FIG. 8B is a schematic plan view showing a second example of the arrangement locations of the imaging pixels 2 and the monitoring pixels 3 in the pixel array unit 45 . The difference between FIG. 8B and FIG. 8A is that the plurality of monitor pixels 3 in the second pixel array section 45b are arranged in two-dimensional directions.

FIG. 8C is a schematic plan view showing a third example of the arrangement locations of the imaging pixels 2 and the monitoring pixels 3 in the pixel array unit 45 . In FIG. 8C , an example in which a plurality of imaging pixels 2 and a plurality of monitoring pixels 3 are arranged close to the same pixel array section 45 is shown. In FIG. 8C , a plurality of monitor pixels 3 are arranged near the upper end of the pixel array unit 45 , but the arrangement location of the plurality of monitor pixels 3 in the pixel array unit 45 is arbitrary.

FIG. 8D is a schematic plan view showing a fourth example of the arrangement locations of the imaging pixels 2 and the monitoring pixels 3 in the pixel array unit 45 . In FIG. 8D , an example is shown in which a plurality of imaging pixels 2 and a plurality of monitoring pixels 3 are arranged in the same pixel array section 45 while being spaced apart from each other. Between the plurality of imaging pixels 2 and the plurality of monitoring pixels 3 in the pixel array unit 45 , for example, dummy pixels 32 are arranged. The dummy pixels 32 are pixels that are neither used as imaging pixels 2 nor monitor pixels 3 .

FIG. 8E is a schematic plan view showing a fifth example of the arrangement locations of the imaging pixels 2 and the monitoring pixels 3 in the pixel array section 45 . In FIG. 8E , the monitoring pixels 3 are arranged in the gaps of the locations where the plurality of imaging pixels 2 are arranged in the pixel array section 45 where the plurality of imaging pixels 2 are arranged. As a result, the monitor pixels 3 are dispersedly arranged in the pixel array section 45 .

As shown in FIG. 5 , light is expected to be incident on the imaging pixel 2 , whereas light is not incident on the monitor pixel 3 . Therefore, the light shielding member 25 can be arranged between the imaging pixel 2 and the monitoring pixel 3 . As for the light-shielding structure of the photodetection device 1 of the present embodiment, plural forms are conceivable.

(shading structure) Fig. 9A is a top view showing the first example of the light-shielding structure. In the light-shielding structure of FIG. 9A , a light-shielding member 25 is arranged between the first pixel array part 45a in which a plurality of imaging pixels 2 are arranged, and the second pixel array part 45b in which a plurality of monitoring pixels 3 are arranged. The light shielding member 25 extends in the depth direction of the substrate 49a, and the light passing through the first photoelectric conversion region in the imaging pixel 2 is shielded by the light shielding member 25 to prevent it from entering the second photoelectric conversion region in the monitoring pixel 3 .

Fig. 9B is a top view showing a second example of the light-shielding structure. The light-shielding structure in FIG. 9B covers the entire area of the second pixel array portion 45b, and the light-shielding member 25 is arranged above the second pixel array portion 45b where a plurality of monitor pixels 3 are arranged (light incident direction). Thereby, the light incident on the first pixel array section 45 a is shielded by the light shielding member 25 and does not enter the second pixel array section 45 b.

Fig. 9C is a top view showing a third example of the light-shielding structure. The light-shielding structure of FIG. 9C is to separate and arrange a plurality of imaging pixels 2 and a plurality of monitoring pixels 3 in the same pixel array part 45, and arrange dummy pixels 32 between the plurality of imaging pixels 2 and the plurality of monitoring pixels 3. . Above the dummy pixels 32 (light incident direction), the light shielding member 25 is arranged. With the light-shielding member 25 in FIG. 9C , the light incident on the plurality of imaging pixels 2 will not enter the plurality of monitoring pixels 3 .

Fig. 9D is a top view showing a fourth example of the light-shielding structure. The light-shielding structure in FIG. 9D is a variation of FIG. 9C , and the light-shielding member 25 above the dummy pixel 32 (light incident direction) is arranged to cover not only the dummy pixel 32 but also a plurality of monitor pixels 3 . Therefore, compared with the light-shielding member 25 of FIG. 9C , the light-shielding member 25 of FIG. 9D is less likely to enter the monitor pixel 3 , and the light-shielding performance is improved.

FIG. 9E is a top view showing a fifth example of the light-shielding structure. FIG. 9E assumes the ToF sensor 26 as in FIG. 5 . In FIG. 9E , the first pixel array part 45a with a plurality of imaging pixels 2 and the second pixel array part 45b with a plurality of monitor pixels 3 are spaced apart from each other, and between the second pixel array part 45b and The light shielding member 25 is arranged between the light emitting parts 27 . Since the light shielding member 25 extends in the depth direction of the substrate 49 a, the light emitted from the light emitting portion 27 is shielded by the light shielding member 25 and does not enter the monitor pixel 3 .

(Change of operating conditions of monitor pixel 3) The frequency comparison and determination circuit 7 in the photodetection device 1 of FIG. 1 changes the operating conditions of the monitor pixel 3 when the number of times the cathode potential of the carrier generating part 10 in the monitor pixel 3 reaches the bottom potential reaches a specific reference number. FIG. 10A is a diagram showing a first example of changing the operating conditions of the monitor pixel 3 . In FIG. 10A , when the reference count is reached, for example, the current source 13 a including the PMOS transistor in the monitor pixel 3 is turned off. Thereby, the cathode potential of the carrier generation part 10 cannot be raised, and the monitor pixel 3 does not collapse. Alternatively, a cathode potential control circuit 8 including an NMOS (N type Metal Oxide Semiconductor: N-type Metal Oxide Semiconductor) transistor or the like may be connected between the cathode of the carrier generating unit 10 and the ground node, and the carrier generating unit 10 The cathode potential is set to a potential at which the carrier generating unit 10 does not operate in the Geiger mode. Since the carrier generating part 10 operates in Geiger mode when a voltage above the breakdown voltage is applied between the cathode and the anode, the cathode potential control circuit 8 applies a voltage below the breakdown voltage between the cathode and the anode of the carrier generating part 10. The way of the potential difference, set the cathode potential.

FIG. 10B is a diagram showing a second example of changing the operating conditions of the monitor pixel 3 . FIG. 10B is for controlling the anode potential of the carrier generating part 10 . In FIG. 10B , when the reference count is reached, for example, the current source 13b including the NMOS transistor in the monitor pixel 3 is turned off. Thereby, the anode potential of the carrier generation part 10 cannot be lowered, and the monitor pixel 3 does not collapse. Alternatively, an anode voltage control circuit 8a including a PMOS transistor or the like may be connected between the anode of the carrier generating unit 10 and the power supply node, and the anode potential of the carrier generating unit 10 is set so that the carrier generating unit 10 will not be covered by The potential of leather-mode action.

(Processing operation of photodetection device 1) As shown in FIGS. 5 and 6 , the photodetection device 1 of this embodiment can be used in a ToF sensor 26 , but the photodetection device 1 of this embodiment can also be used for purposes other than the ToF sensor 26 . For example, the monitor pixel 3 may also be used for the purpose of adjusting the bias voltage of the photoelectric conversion element 9 in the imaging pixel 2 in consideration of detection of weak light. Alternatively, the monitor pixel 3 and the imaging pixel 2 may operate independently.

FIG. 11 is a flowchart showing processing operations when the monitor pixel 3 is operated in conjunction with the operation of the ToF sensor 26 . First, the distance measuring operation is started (step S1). Specifically, the light emission processing of the light emitting section 27 in the ToF sensor 26 , the generation processing of the pixel signal of the imaging pixel 2 , and the generation processing of the bias voltage of the monitor pixel 3 are started in parallel.

The light emitting unit 27 determines whether the number of times of light emission reaches a specific number of times (step S2 ), and periodically emits a pulse-shaped light signal until the number of times reaches a specific number of times (step S3 ).

On the other hand, the imaging pixel 2 is activated to a state capable of photoelectric conversion (step S4). Activation means that a potential difference equal to or higher than the breakdown voltage is applied between the anode and the cathode of the photoelectric conversion element 9 .

Thereafter, it is determined whether the number of times of receiving light (trigger times) of the photoelectric conversion element 9 in the imaging pixel 2 reaches a specific number of times (step S5 ). The process of detecting the timing of triggering of the photoelectric conversion element 9 or the number of times of triggering is repeated until a specific number of times is reached (step S6). Incidentally, the term "triggered" means that the photoelectric conversion element 9 receives a photon and collapses. When it is determined in step S5 that the specified number of times has been reached, the imaging pixel 2 is deactivated (step S7 ). The term "deactivation" means that a potential difference not reaching the breakdown voltage is applied between the anode and the cathode of the photoelectric conversion element 9 .

On the other hand, the monitor pixel 3 is activated to a carrier-detectable state (step S8), and it is determined whether or not a specific time has elapsed (step S9). If the specified time has not elapsed, the number of triggers of the carrier generating unit 10 is counted, and it is detected that the cathode of the carrier generating unit 10 has reached the bottom potential (step S10). Next, it is determined whether the number of triggers has reached a certain number of times (step S11), and if the number of triggers has not reached a certain number of times, the processing after step S9 is repeated. When the specific number of times is reached, or when it is determined that a specific time has elapsed in step S9, the monitor pixel 3 is deactivated (step S12).

When it is determined in step S2 that the light has been emitted a certain number of times, or when the processing in step S7 or S12 ends, the distance measuring operation ends (step S13).

Next, based on the time when the light emitting unit 27 emits an optical signal and the time when the photoelectric conversion element 9 is triggered in step S6, a distance measurement process is performed (step S14). In parallel with the processing of step S14, the control circuit 8 averages and performs AD (Analog-Digital: analog-digital) conversion etc. on the bottom potential of the cathode of the carrier generating part 10 to generate a voltage between the photoelectric conversion element 9 and the carrier generating part 10. Bias voltage (for example, anode potential) (step S15). Next, the bias voltage (for example, anode potential) of the photoelectric conversion element 9 and the carrier generating unit 10 is adjusted (step S16 ).

FIG. 12 is a flowchart showing processing operations when the imaging pixels 2 and the monitoring pixels 3 are operated in parallel. The processing action in FIG. 12 does not consider the use of the ToF sensor 26 , but is for adjusting the bias voltage of the photoelectric conversion element 9 when the imaging pixel 2 performs light detection.

First, the imaging pixel 2 and the monitoring pixel 3 start exposure in parallel (step S21 ). The imaging pixel 2 performs the same operation as steps S4-S7 in FIG. 11, and counts the number of times the photoelectric conversion element 9 is triggered (steps S22-S25). In step S24, it is not necessary to detect the moment when the photoelectric conversion element 9 is triggered, but only to count the times of triggering.

The monitor pixel 3 performs the same operations as steps S8-S12 in FIG. 11, and detects the number of triggers of the carrier generating unit 10 and the bottom potential of the cathode of the carrier generating unit 10 (steps S26-S30).

After the processing of steps S25 and S30 is finished, the exposure is ended (step S31), and the pixel signal generated in the imaging pixel 2 is output (step S32). In parallel with the process of step S32, the control circuit 8 performs the process of adjusting the bias voltage (for example, anode potential) of the photoelectric conversion element 9 and the carrier generating part 10 in the same manner as steps S15 and S16 in FIG. 11 (steps S33 and S34) .

FIG. 13 is a flow chart showing the processing operation of the monitoring pixel 3 which performs an operation independent of the imaging pixel 2 . The monitor pixel 3 performs the same operations as steps S8 to S13, S15, and S16 in FIG. 11 (steps S41 to S49). Thereby, the monitor pixel 3 can detect the bottom potential of the cathode of the carrier generating part 10 independently of the imaging pixel 2, and control the bias voltage (for example, the anode potential) of the carrier generating part 10 based on the detected bottom potential.

In this way, in the first embodiment, the monitor pixel 3 is provided separately from the imaging pixel 2, and the carrier generation unit 10 in the monitor pixel 3 generates carriers by factors other than photoelectric conversion, and collapses due to the generated carriers. . Detect the bottom potential of the cathode when the carrier generating part 10 collapses, and adjust the bias voltage of the photoelectric conversion element 9 in the imaging pixel 2 and the carrier generating part 10 in the monitoring pixel 3 based on the detected bottom potential (for example, anode potential). Thereby, the bias voltage can be stabilized without the risk of the bias voltage fluctuating depending on the light intensity of the incident light to the monitor pixel 3 .

Also, in the present embodiment, when the carrier generation unit 10 in the monitor pixel 3 is triggered a certain number of times to generate the bias voltage between the photoelectric conversion element 9 and the carrier generation unit 10, the operating conditions of the monitor pixel 3 are changed. . Thereby, the power consumption in the monitor pixel 3 can be reduced.

Furthermore, by arranging the light shielding member 25 so that light does not enter the monitor pixel 3, fluctuations in the bias voltage generated using the monitor pixel 3 can be suppressed.

(Second Embodiment) As described in the first embodiment, the structures of the imaging pixels 2 and the monitor pixels 3 are different from each other. Due to the difference in structure, the imaging pixel 2 performs photoelectric conversion corresponding to incident light, whereas the monitor pixel 3 generates carriers due to factors other than photoelectric conversion. The second embodiment described below is a specific example of the structure of the monitor pixel 3 .

In FIG. 3B, the pinning film (second pinning film) 55 on the side opposite to the wiring layer is partially removed to generate carriers (for example, electrons) generated by dark current. The larger the size of the pinning film 55 is removed, the easier it is to generate a dark current, but the location, size, and shape of the pinning film 55 are arbitrary. Hereinafter, for example, an example of partially removing the pinning film 55 on the surface opposite to the wiring layer (the surface corresponding to the light incident surface) will be described, but the pinning film 55 may be partially removed along the surface of the isolation portion 63 between pixels. remove.

FIG. 14A is a top view showing a first example of the pinning film 55 , and FIG. 14B is a top view showing a second example of the pinning film 55 . FIG. 14A shows a pinning film 55 amounting to 1 pixel. On the outer peripheral side of the pinning film 55 , an inter-pixel separation portion 63 is disposed. In FIG. 14A, the substantially central portion of the pinning film 55 is removed in a rectangular shape 55a. The rectangular size 55a to be removed is arbitrary. For example, as shown in FIG. 14B , the pinning film 55 may be removed with a size 55a of about 1/3 of one side of one pixel. After the pinning film 55 is partially removed, the removed part is more likely to generate dark current than the non-removed part. The electrons generated by the dark current are attracted to the cathode in the carrier generating unit 10 , and the electrons are multiplied in the avalanche multiplication region 57 , and the carrier generating unit 10 collapses.

Since the area of the pinning film 55 in contact with the hole storage layer 54 of FIG. 3B is smaller, dark current is more likely to be generated. Therefore, as shown in FIG. 14C , for example, the pinning film 55 on the side opposite to the wiring layer can be Remove all. In FIG. 14C , an example in which the hole storage layer 54 is exposed as a result of removing the pinning film 55 on the surface opposite to the wiring layer is shown.

In addition, as shown in FIG. 14D , partial removal portions 55 a may be provided at plural locations within the pinning film 55 . By providing the removal sites 55a at multiple sites in the pinning film 55, carriers can be generated at multiple sites in the photoelectric conversion region of the carrier generating section 10, and the carrier detection efficiency can be improved.

Moreover, instead of making the removal part 55a into a rectangular shape, it may be made into a slit shape as shown in FIG. 14E.

Alternatively, as shown in FIG. 14F , a plurality of rectangular removal portions 55 a may be equally arranged on the left, right, up and down. Alternatively, as shown in FIG. 14G , grid-shaped removal portions 55 a may also be provided in the pinning film 55 .

As described above, in the portion 55a from which the pinning film 55 has been removed, carriers due to dark current are easily generated, but in order to further generate carriers, plasma damage can be given to the portion 55a from which the pinning film 55 has been removed. , forming an interface state.

Fig. 15 is a cross-sectional view of the carrier generating unit 10 according to a modified example of the second embodiment. In FIG. 15, a P well 51a is provided instead of the N well 51 of FIG. 3B. In addition, in FIG. 15, the same code|symbol is attached|subjected to the component common to FIG. 3B, and it demonstrates centering on a difference below.

15 shows an example in which the pinning film 55 on the surface opposite to the wiring layer is completely removed, but the pinning film 55 on the surface opposite to the wiring layer may be partially removed.

In FIG. 15, the ion in the plasma collides with the part where the pinning film 55 has been removed to cause damage, and an interface state 55b is generated. The interface state 55b is the source of carrier generation. Therefore, the carrier generation part 10 collapses by the carriers generated in the interface state 55b formed in the vicinity of the surface opposite to the wiring layer.

The use of plasma damage to form the interface state 55b can be applied to any one of FIGS. 14A-14G . By forming the interface state 55b at the portion where the pinning film 55 has been removed, carriers are more easily generated, and the carrier generating portion 10 is more easily collapsed.

Thus, in the second embodiment, by partially removing the pinning film 55 of the carrier generating portion 10 in the monitor pixel 3, carriers can be generated by factors other than photoelectric conversion. Since the pinning film 55 can be partially removed by etching relatively easily, the monitor pixel 3 can be formed in the same manufacturing steps as the imaging pixel 2, and can be easily manufactured. In addition, the pinning film 55 can be partially removed with a size optimal for collapse of the carrier generation portion 10 in the monitor pixel 3 relatively easily.

In addition, in the second embodiment, since the interface state 55b can be formed by plasma damage at the portion where the pinning film 55 has been removed, more carriers can be generated and the carrier generating part 10 can be more easily collapsed.

(third embodiment) In the third embodiment, by partially removing the structural features other than the pinning film 55, the carrier generation part 10 in the monitor pixel 3 generates carriers by factors other than photoelectric conversion.

Fig. 16 is a cross-sectional view of the carrier generating unit 10 according to the third embodiment. In FIG. 16 and FIGS. 18 to 24 described later, a P well 51 a is provided instead of the N well 51 in FIG. 3B . In addition, in FIGS. 16 to 24 , the same reference numerals are attached to the components common to those in FIG. 3B , and the following description will focus on the differences.

In the carrier generating portion 10 of FIG. 16 , a floating high-concentration impurity region 64 is provided in the P-well 51 a on the wiring layer 42 side. The high-concentration impurity region 64 is, for example, a region where P-type impurity ions are implanted from the wiring layer 42 side and diffused. By setting the high-concentration impurity region 64, more electrons can be attracted to the cathode, thereby improving the detection efficiency of electrons.

Originally, on the side of the wiring layer 42 of the hole storage layer 54, a high-concentration P-type diffusion layer 56 is formed in order to be connected to the contact electrode 72. In the step of forming the high-concentration P-type diffusion layer 56, the above-mentioned high-concentration impurity region 64 . Therefore, it is not necessary to provide an additional manufacturing step for forming the high-concentration impurity region 64 in FIG. 16 . In this way, the carrier generating part 10 of FIG. 16 can be manufactured without changing the manufacturing process.

In addition to Fig. 16, multiple structures in which carriers are generated by factors other than photoelectric conversion are considered. Hereinafter, representative structures among these structures will be described in order.

Fig. 17 is a cross-sectional view of the carrier generating unit 10 of the first modification example of the third embodiment. The carrier generation part 10 in FIG. 17 overlaps with the avalanche multiplication region 57 (also referred to as a strong electric field region) of the depletion layer formed in the region connected to the P-type diffusion layer 52 and the N-type diffusion layer 53 in the stacking direction, A concavo-convex structure 65 is provided.

The concave-convex structure 65 is formed by forming a plurality of trenches in the N well 51 disposed on the wiring layer 42 side from the avalanche multiplication region 57 and filling the trenches with, for example, an insulating material. The concavo-convex structure 65 and the avalanche multiplication region 57 are arranged so as to overlap when viewed from the lamination direction.

In the uneven structure 65 , electrons are generated from the interface between the insulating material and the N well 51 . Since the generated electrons are attracted to the cathode, the detection efficiency of the electrons can be improved, and the carrier generating part 10 can be easily collapsed.

18A and 18B are cross-sectional views of the carrier generation unit 10 of the second modification example of the third embodiment. Both of FIGS. 18A and 18B use the crystal defect 66 formed in a partial region of the carrier generating portion 10 as a source of carrier generation. The crystal defect 66 can be relatively easily formed, for example, by implanting silicon or argon into the photoelectric conversion region made of silicon.

In FIG. 18A and FIG. 18B , the positions of the crystal defects 66 are schematically indicated with "x". FIG. 18A shows an example in which crystal defects 66 are formed in the P well 51 a on the side opposite to the wiring layer 42 , and FIG. 18B shows an example in which crystal defects 66 are formed in the P well 51 a on the side close to the wiring layer 42 . In either case of FIG. 18A and FIG. 18B , electrons are generated at the positions of the crystal defects 66 and the generated electrons are attracted to the cathode, thereby causing the carrier generating portion 10 to collapse.

19A and 19B are cross-sectional views of the carrier generating unit 10 according to the third modification example of the third embodiment. Both of FIGS. 19A and 19B use the heavy metal 67 contained in a partial region of the carrier generating portion 10 as a source of carrier generation. The heavy metal 67 is, for example, a metal having a specific gravity of 4 or more such as molybdenum (Mo) or yttrium (It). The heavy metal 67 can be implanted into a partial region of the carrier generating portion 10 by ion implantation, sputtering, or the like. Heavy metals 67 generate electrons. FIG. 19A shows an example of injecting heavy metal 67 into the P well 51a on the wiring layer 42 side, and FIG. 19B shows an example of injecting heavy metal 67 into the P well 51a on the light incident surface side.

Since the electrons generated by the heavy metal 67 are attracted to the cathode, the carrier generating part 10 can be collapsed.

Fig. 20 is a cross-sectional view of the carrier generating unit 10 according to the fourth modification of the third embodiment. In FIG. 20 , when forming the contact electrode 71 for cathode connection and the contact electrode 72 for anode connection, etc., a floating contact electrode 68 is formed in the P well 51 a on the wiring layer 42 side. Therefore, an additional manufacturing step is not required to form the contact electrode 68 . The contact electrode 68 is floating, and generates electrons. The generated electrons are attracted to the cathode. Therefore, the carrier generating unit 10 can be broken down. The size of the contact electrode 68 can be set larger than the contact electrode 71 for cathode connection and the contact electrode 72 for anode connection. Thereby, the generation amount of electrons can be increased. In addition, a plurality of floating contact electrodes 68 may also be provided.

21A and 21B are cross-sectional views of the carrier generating unit 10 according to the fifth modification example of the third embodiment. When stress is applied to the photoelectric conversion region of the carrier generating portion 10 , the photoelectric conversion region deforms to generate carriers (such as electrons). Therefore, in the fifth modification, the stress imparting member 69 is disposed at a position in contact with the P-well 51a that is the photoelectric conversion region. The stress applying member 69 is a member that applies stress to the P well 51a. 21A shows an example where the stress applying member 69 is in contact with the end face of the P well 51a opposite to the wiring layer 42, and FIG. 21B shows an example where the stress applying member 69 is in contact with the end face of the P well 51a on the wiring layer 42 side.

In either case of FIG. 21A and FIG. 21B , the stress imparting member 69 is brought into contact with the P well 51a, whereby stress is generated and deformed in the P well 51a, whereby carriers (such as electrons) can be generated. Since the generated carriers are attracted to the cathode, the detection efficiency of the carriers can be improved.

Fig. 22 is a cross-sectional view of the carrier generating unit 10 according to the sixth modification of the third embodiment. The carrier generation part 10 of FIG. 22 has the transistor 101 formed in the P-well 51a on the wiring layer 42 side. The transistor 101 has a diffused layer 101a for a drain, a diffused layer 101b for a source, a gate insulating film 101c disposed over a channel formed between these diffused layers, and a gate 101d. The diffusion layer 101a for the drain and the diffusion layer 101b for the source are formed by implanting and diffusing impurity ions into the P well 51a.

By controlling the gate voltage of the transistor 101, a current flows between the drain and the source, and carriers (such as electrons) can be generated in the channel region. Since the generated carriers are attracted to the cathode, the detection efficiency of the carriers can be improved.

Fig. 23 is a cross-sectional view of the carrier generating unit 10 according to the seventh modification of the third embodiment. In the carrier generation unit 10 of FIG. 23 , the contact electrode 102 is connected to the P well 51 a on the side of the wiring layer 42 , and a power supply voltage is applied to the contact electrode 102 . Since the contact electrode 102 can be formed in the step of forming the contact electrode 71 for cathode connection and the contact electrode 72 for anode connection, no additional manufacturing steps are required. Thereby, carriers (such as electrons) can be generated in the P-well 51a on the wiring layer 42 side. Since the generated carriers are attracted to the cathode, the detection efficiency of the carriers can be improved.

In addition, the potential level applied to the contact electrode 102 is arbitrary, and the contact electrode 102 can be connected to a ground node, a dedicated power supply node, or a specific bias voltage node.

Fig. 24 is a cross-sectional view of the carrier generating unit 10 according to the eighth modification of the third embodiment. In the carrier generation portion 10 of FIG. 24, a P-type high-concentration impurity region 103 and an N-type high-concentration impurity region 104 are arranged along the end face of the P well 51a on the opposite side of the wiring layer 42. In these impurity regions 103, 104 are connected to contact electrodes 105, 106, respectively. By applying a potential difference between the contact electrodes 105 and 106 , current can flow between the P-type high-concentration impurity region 103 and the N-type high-concentration impurity region 104 . Since carriers can be generated by the current and the generated carriers (such as electrons) are attracted to the cathode, the detection efficiency of the carriers can be improved. The potential level applied to these contact electrodes 105, 106 is arbitrary.

As shown in FIGS. 16 to 24, in the third embodiment, by making the structure of the carrier generation part 10 in the monitor pixel 3 different from the structure of the photoelectric conversion element 9 in the imaging pixel 2, it is possible to generate Inside the portion 10, carriers are generated by factors other than photoelectric conversion. Since the carrier generation part 10 can be collapsed by the generated carriers, the bottom potential of the carrier generation part 10 caused by the collapse can be detected to generate the bias voltage of the photoelectric conversion element 9 and the carrier generation part 10 .

(fourth embodiment) As shown in FIG. 3A and FIG. 3B, the photoelectric conversion element 9 and the carrier generating portion 10, that is, the SPAD, have an avalanche multiplication region 57 formed of a depletion layer formed in a region where the P-type diffusion layer 52 and the N-type diffusion layer 53 are in contact, In addition, a cathode is connected to the N-type diffusion layer 53 through a contact electrode 71 , and an anode is connected to the hole storage layer 54 through a contact electrode 72 .

In order to connect the hole storage layer 54 on the anode side to the contact electrode 72 by ohmic junction, it is necessary to provide a high-concentration P-type diffusion layer 56 on the end side of the hole storage layer 54 . In addition, in order to connect the N-type diffusion layer 53 on the cathode side to the contact electrode 71 by ohmic junction, it is necessary to increase the concentration of the N-type diffusion layer 53 . In order to miniaturize the SPAD, the distance between the anode and the cathode must be shortened, and a strong electric field is generated between the high-concentration P-type diffusion layer 56 and the N-type diffusion layer 53 . When a strong electric field is generated between the high-concentration P-type diffusion layer 56 and the N-type diffusion layer 53, it is difficult to form a depletion layer, and the carrier (electron) multiplication capability of the avalanche multiplication region 57 is reduced.

Therefore, in the present embodiment, connection to at least one electrode on the anode side and the cathode side is not performed by an ohmic junction, but by a Schottky junction. By setting it as a Schottky junction, a strong electric field region is not generated near the avalanche multiplication region 57 , and it is possible to prevent the reduction in the carrier multiplication capability of the avalanche multiplication region 57 .

Fig. 25A is a sectional view of SPAD 110 according to the fourth embodiment. The SPAD 110 of FIG. 25A can be applied to any one of the photoelectric conversion element 9 of the imaging pixel 2 and the carrier generation part 10 of the monitoring pixel 3 . When using the SPAD 110 of FIG. 25A as the carrier generation unit 10, as described above, it is necessary to have a structure in which carriers are generated by factors other than photoelectric conversion by partially removing the pinning film 55 and the like.

Since the SPAD 110 in FIG. 25A has a layer structure similar to that in FIG. 3A , the same symbols are assigned to common components. In the SPAD 110 of FIG. 25A , the high-concentration P-type diffusion layer 56 of FIG. 3A is omitted, and the hole storage layer 54 is directly connected to the contact electrode 72 . The hole storage layer 54 and the contact electrode 72 are connected by a Schottky junction. On the other hand, a high-concentration N-type diffusion layer 58 is disposed on the N-type diffusion layer 53, and the high-concentration N-type diffusion layer 58 is connected to the contact electrode 71 for cathode connection by ohmic junction.

By not disposing a high-concentration P-type diffusion layer at the end of the hole storage layer 54 in FIG. 3A , no strong electric field region is formed near the end, and there is no risk of reducing the carrier multiplication capability of the avalanche multiplication region 57 .

FIG. 25B is an equivalent circuit of the connection between the hole storage layer 54 and the anode in FIG. 25A. In the case of the cross-sectional structure of FIG. 25A , as shown in FIG. 25B , a circuit is formed in which a P-type Schottky barrier diode (hereinafter referred to as SBD (Schottky Barrier Diode)) 111 is connected to the anode side of SPAD 110 . The anode of SPAD 110 is connected to the anode of SBD 111 , and the cathode of SBD 111 is connected to contact electrode 72 which is the positive readout terminal. Since the forward voltage of the SBD111 is small, even if the hole storage layer 54 is connected to the contact electrode 72 by a Schottky junction, it will hardly affect the electrical characteristics of the SPAD110.

Fig. 26A is a cross-sectional view of SPAD 110 according to the first modification example of the fourth embodiment. In the SPAD 110 of FIG. 26A , the wiring connections of both the anode side and the cathode side are Schottky junctions. In the SPAD 110 of FIG. 26A , the hole storage layer 54 is directly connected to the contact electrode 72 , and the N-type diffusion layer 53 is directly connected to the contact electrode 71 . Thereby, the hole storage layer 54 and the contact electrode 72 are connected by the Schottky junction, and the N-type diffusion layer 53 and the contact electrode 71 are connected by the Schottky junction. Therefore, not only near the connecting portion of the hole storage layer 54 and the contact electrode 72, but also near the connecting portion of the N-type diffusion layer 53 and the contact electrode 71, no strong electric field region is formed, and the carrier multiplication of the avalanche multiplication region 57 is not reduced. The risk of ability.

FIG. 26B is an equivalent circuit diagram of a path connected to the SPAD 110 of FIG. 26A. As shown in the figure, the cathode of the P-type SBD111 is connected to the hole readout terminal, that is, the contact electrode 72, and the anode of the P-type SBD111 is connected to the anode of the SPAD110, and the cathode of the SPAD110 is connected to the cathode of the N-type SBD112, and The anode of the N-type SBD 112 is connected to the contact electrode 71 which is the electronic readout terminal.

Fig. 27A is a cross-sectional view of SPAD 110 according to a second modification of the fourth embodiment. In the SPAD 110 of FIG. 27A , the wiring connection on the cathode side is a Schottky junction, and the wiring connection on the anode side is an ohmic junction. In the SPAD 110 of FIG. 27A , a high-concentration P-type diffusion layer is arranged at the end of the hole storage layer 54 , and the high-concentration P-type diffusion layer is connected to the contact electrode 72 through an ohmic junction. The N-type diffusion layer 53 is connected to the contact electrode 71 by Schottky junction. Therefore, in SPAD 110 of FIG. 27A , although a strong electric field region is not formed near the connection portion between the N-type diffusion layer 53 and the contact electrode 71, a strong electric field region may be formed near the end of the hole storage layer 54.

FIG. 27B is an equivalent circuit diagram of a path connected to the SPAD 110 of FIG. 27A. As shown in the figure, the anode of SPAD110 is connected to the positive side readout terminal, that is, the contact electrode 72, the cathode of N-type SBD112 is connected to the cathode of SPAD110, and the anode of N-type SBD112 is connected to the electronic readout terminal, which is the contact electrode. 71.

The Schottky junctions of FIG. 25A, FIG. 26A, and FIG. 27A are, for example, in the case of forming a contact electrode containing metal on an n-type silicon layer, if a metal having a work function greater than the electron affinity of silicon, ie, 4.05 eV, is connected, then Become a Schottky engagement. As a metal material, a material forming an alloy with silicon, that is, a silicide (for example, cobalt, titanium, tantalum, aluminum) is desired.

The Schottky junction region is prone to dark current. Accordingly, detection efficiency of carriers can be improved by attracting carriers (eg, electrons) generated in the Schottky junction region to the cathode.

Thus, in the fourth embodiment, a strong electric field region is not generated in at least one of the vicinity of the connection between the hole storage layer 54 and the contact electrode 72 and the vicinity of the connection between the N-type diffusion layer 53 and the contact electrode 71. At least one of the connection between the hole storage layer 54 and the contact electrode 72 and the connection between the N-type diffusion layer 53 and the contact electrode 71 is set as a Schottky junction. By setting it as a Schottky junction, dark current is easily generated, but the carriers generated by the generation of dark current can be used for breakdown of the carrier generating part 10 .

＜Example of application to moving objects＞ The technology of the present disclosure (the present technology) can be applied to various products. For example, the technology disclosed herein can be implemented as a device mounted on any type of mobile body such as automobiles, electric vehicles, hybrid vehicles, motorcycles, bicycles, personal mobility vehicles, airplanes, drones, ships, and robots.

FIG. 28 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile control system to which the technology of the present disclosure can be applied.

Vehicle control system 12000 includes a plurality of electronic control units connected via communication network 12001 . In the example shown in FIG. 28 , a vehicle control system 12000 includes a drive system control unit 12010 , a vehicle body system control unit 12020 , an outside information detection unit 12030 , an inside information detection unit 12040 , and an integrated control unit 12050 . In addition, as the functional configuration of the integrated control unit 12050, a microcomputer 12051, an audio image output unit 12052, and a vehicle-mounted network I/F (Interface: Interface) 12053 are shown.

The drive system control unit 12010 controls the actions of devices associated with the drive system of the vehicle according to various programs. For example, the driving system control unit 12010 is used as a driving force generating device for generating driving force of the vehicle such as an internal combustion engine or a driving motor, a driving force transmission mechanism for transmitting the driving force to the wheels, a steering mechanism for adjusting the rudder angle of the vehicle, And the control devices such as the brake device that generates the braking force of the vehicle function.

The vehicle body system control unit 12020 controls the actions of various devices equipped on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a keyless start system, a smart key system, a power window device, or a control device for various lights such as headlights, taillights, brake lights, turn signals, and fog lights. In this case, radio waves or signals from various switches can be input to the vehicle body system control unit 12020 from a portable device instead of a key. The vehicle body system control unit 12020 accepts the input of these radio waves or signals, and controls the door lock device, electric window device, lights, etc. of the vehicle.

The outside information detection unit 12030 detects information outside the vehicle on which the vehicle control system 12000 is mounted. For example, the camera unit 12031 is connected to the information detection unit 12030 outside the vehicle. The information detection unit 12030 outside the vehicle causes the imaging unit 12031 to capture an image outside the vehicle, and receives the captured image. The information detection unit 12030 outside the vehicle can perform object detection processing or distance detection processing of people, vehicles, obstacles, signs, or text on the road based on the received images.

The imaging unit 12031 is a photosensor that receives light and outputs an electrical signal corresponding to the received light amount. The imaging unit 12031 can output the electrical signal as an image, or output it as distance measurement information. In addition, the light received by the imaging unit 12031 may be visible light or invisible light such as infrared rays.

The in-vehicle information detection unit 12040 detects the information in the vehicle. To the in-vehicle information detection unit 12040, for example, a driver state detection unit 12041 for detecting the state of the driver is connected. The driver state detection unit 12041 includes, for example, a camera that takes pictures of the driver. Based on the detection information input from the driver state detection unit 12041, the in-vehicle information detection unit 12040 can calculate the driver's fatigue or concentration, and can also determine whether the driver is driving. whether the patient is dozing off.

The microcomputer 12051 can calculate the control target value of the driving force generating device, the steering mechanism or the braking device based on the information inside and outside the vehicle obtained by the external information detection unit 12030 or the internal information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform ADAS (Advanced Driver Assistance System: Advanced Driver Assistance System) including vehicle collision avoidance or impact mitigation, following driving based on inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, or vehicle lane departure warning. The function of the system) is the coordinated control of the purpose.

In addition, the microcomputer 12051 can control the driving force generating device, the steering mechanism, the braking device, etc. based on the information around the vehicle obtained by the information detection unit 12030 or the information detection unit 12040 inside the vehicle, thereby, it is possible to perform the driving without depending on the driver. Coordinated control for the purpose of automatic driving, etc., for autonomous driving.

Furthermore, the microcomputer 12051 can output control commands to the vehicle body system control unit 12030 based on the information outside the vehicle acquired by the information detection unit 12030 outside the vehicle. For example, the microcomputer 12051 can control the headlights according to the position of the vehicle in front or the oncoming vehicle detected by the information detection unit 12030 outside the vehicle, and perform coordinated control for the purpose of anti-glare, such as switching the high beam to the low beam.

The audio-image output unit 12052 transmits an output signal of at least one of audio and video to an output device capable of visually or aurally notifying information to occupants of the vehicle or outside the vehicle. In the example of FIG. 28 , a speaker 12061 , a display unit 12062 , and a dashboard 12063 are exemplified as output devices. The display unit 12062 may include, for example, at least one of an on-vehicle display and a head-up display.

FIG. 29 is a diagram showing an example of the installation position of the imaging unit 12031.

In FIG. 29 , imaging units 12101 , 12102 , 12103 , 12104 , and 12105 are provided as imaging unit 12031 .

The imaging units 12101 , 12102 , 12103 , 12104 , and 12105 are installed, for example, at positions such as the front bumper of the vehicle 12100 , the side mirrors, the rear bumper, the tailgate, and the top of the windshield in the vehicle compartment. The camera unit 12101 installed on the front bumper and the camera unit 12105 installed on the top of the windshield in the vehicle compartment mainly acquire images in front of the vehicle 12100 . The imaging units 12102 and 12103 equipped in the side view mirror mainly acquire images of the side of the vehicle 12100 . The camera unit 12104 equipped on the rear bumper or the tailgate mainly acquires images of the rear of the vehicle 12100 . The camera unit 12105 equipped on the upper part of the windshield in the compartment is mainly used to detect vehicles ahead, or pedestrians, obstacles, signs, traffic signs or lane lines, etc.

In addition, an example of the imaging range of the imaging units 12101 to 12104 is shown in FIG. 29 . The imaging range 12111 represents the imaging range of the imaging unit 12101 installed on the front bumper, the imaging ranges 12112 and 12113 respectively indicate the imaging ranges of the imaging units 12102 and 12103 installed on the side view mirror, and the imaging range 12114 indicates the imaging range installed on the rear bumper or tail The imaging range of the imaging unit 12104 of the door. For example, by superimposing the image data captured by the imaging units 12101 to 12104, a bird's-eye view image of the vehicle 12100 viewed from above can be obtained.

At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera including a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

For example, the microcomputer 12051 calculates the distance from each three-dimensional object within the imaging range 12111 to 12114 based on the distance information obtained from the imaging units 12101 to 12104, and the temporal change of the distance (relative speed with respect to the vehicle 12100), In this way, in particular, the nearest three-dimensional object on the traveling road of the vehicle 12100 and the three-dimensional object traveling at a specific speed (for example, above 0 km/h) in substantially the same direction as the vehicle 12100 can be extracted as the vehicle in front. Furthermore, the microcomputer 12051 can set the inter-vehicle distance that should be ensured in advance with the vehicle in front, and perform automatic braking control (also includes follow-up stop control) or automatic acceleration control (also includes follow-up start control). In this way, cooperative control for the purpose of autonomous driving, etc., for autonomous driving without depending on the driver's operation can be performed.

For example, based on the distance information obtained from the camera units 12101 to 12104, the microcomputer 12051 can classify the three-dimensional object data related to three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects for retrieval. , and used for automatic avoidance of obstacles. For example, the microcomputer 12051 recognizes obstacles around the vehicle 12100 as obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. In addition, the microcomputer 12051 determines the collision risk indicating the risk of collision with each obstacle, and when the collision risk is higher than the set value and there is a possibility of collision, it outputs a warning to the driver through the speaker 12061 or the display unit 12062, Or through the drive system control unit 12010, forced deceleration or evasive steering can be performed, whereby driving support for avoiding collisions can be performed.

At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can identify a pedestrian by determining whether there is a pedestrian in the images captured by the imaging units 12101 to 12104. The recognition of the pedestrian is carried out, for example, by the following sequence: extracting the feature points in the images captured by the imaging units 12101 to 12104 as infrared cameras; performing pattern matching processing on a series of feature points representing the outline of the object and judging whether it is pedestrian. If the microcomputer 12051 determines that there is a pedestrian in the captured images of the camera units 12101 to 12104, and recognizes the pedestrian, the audio image output unit 12052 controls the identified pedestrian by superimposing and displaying a square contour line for emphasis. Display part 12062. In addition, the audio-image output unit 12052 may control the display unit 12062 so that an icon representing a pedestrian or the like is displayed at a desired position.

An example of a vehicle control system to which the technique of the present disclosure can be applied has been described above. The technology disclosed in the present disclosure can be applied to the imaging unit 12031 and the like in the configuration described above. Specifically, the photodetection device 1 disclosed herein can be applied to the imaging unit 12031 . By applying the technique of the present disclosure to the imaging unit 12031, clearer photographic images can be obtained, thereby reducing fatigue of the driver.

In addition, the present technology may employ the following configurations. (1) A light detection device comprising: a first pixel having a photoelectric conversion element that generates carriers by photoelectric conversion; A second pixel having a carrier generating portion that generates carriers by factors other than photoelectric conversion; and a control circuit that controls a bias voltage applied to the photoelectric conversion element and the carrier generating portion based on the carriers generated in the second pixel; and The above-mentioned photoelectric conversion element has: a first photoelectric conversion region capable of photoelectric conversion; and a first pinning film disposed at a portion in contact with the above-mentioned first photoelectric conversion region; The above-mentioned carrier generating part has a second photoelectric conversion region capable of photoelectric conversion, and a second pinning film that has been partially removed is disposed at a portion adjacent to the second photoelectric conversion region, or it is not used in the second photoelectric conversion region. The entire area of the area is equipped with components to suppress dark current. (2) The photodetection device as described in (1), wherein The second pinning film is partially removed on at least one of the surface side of the carrier generation portion opposite to the wiring region and a boundary region with adjacent pixels. (3) The photodetection device as described in (1) or (2), wherein The carrier generation unit generates the carrier by an interface state generated in the second photoelectric conversion region. (4) The photodetection device described in any one of (1) to (3), which includes: The light shielding member shields the light incident on the second pixel. (5) The photodetection device as described in (4), wherein The material of the light-shielding member includes the same material as that of the pixel separator, and the pixel separator is arranged in the boundary region of the second pixel to shield light from adjacent pixels. (6) The photodetection device described in (4) or (5), which includes: an on-chip lens that condenses light onto the first pixel; and a light emitting element that emits light; and The second pixel is disposed at a position different from a region where light emitted from the light-emitting element passes and a region where light transmitted through the on-chip lens passes. (7) The photodetection device as described in (6), which includes: a support that supports the first pixel, the second pixel, the on-chip lens, and the light emitting element; and A part of the above-mentioned support is used as the above-mentioned light-shielding member. (8) The photodetection device according to any one of (1) to (7), wherein The above-mentioned carrier generating part has a P region and an N region joined to each other; The carrier generation unit breaks down when generating the carriers in a state where a potential difference corresponding to the bias voltage is applied between the P region and the N region. (9) The photodetection device as described in (8), which includes: a readout circuit that generates pixel signals corresponding to carriers generated in the second pixel; and The control circuit controls the bias voltage based on the potential level of the pixel signal. (10) The photodetection device as described in (9), which includes: A counting circuit that counts the number of times the above-mentioned carrier generation collapses; and The number comparison determination circuit determines whether the number of times counted by the counting circuit has reached a specific reference number, and changes the operation condition of the second pixel when it is determined that the number of times has reached the reference number. (11) The photodetection device as described in (10), wherein The count comparison determination circuit controls the potential difference so that the carrier generation unit does not collapse when the counted count reaches the reference count. (12) The photodetection device as described in (10) or (11), wherein The control circuit, the readout circuit, the counting circuit, and the count comparison determination circuit are provided for each of the second pixels, or for each of a plurality of the second pixels. (13) The photodetection device according to any one of (10) to (12), wherein The control circuit, the readout circuit, the counting circuit, and the count comparison and determination circuit are disposed on the same substrate as the first pixel and the second pixel. (14) The photodetection device described in any one of (10) to (12), which includes: a first substrate on which the above-mentioned first pixel and the above-mentioned second pixel are arranged; and A second substrate on which at least a part of the control circuit, the readout circuit, the counting circuit, and the count comparison and determination circuit are arranged; and The above-mentioned first substrate and the above-mentioned second substrate are laminated and bonded to each other by conductive members to perform signal transmission. (15) The photodetection device described in any one of (1) to (14), which includes: a pixel array unit having a plurality of the first pixels and a plurality of the second pixels; and Each of the above-mentioned plurality of first pixels is provided in association with any of the above-mentioned second pixels, or The above-mentioned 2nd pixel is arranged in a ratio of 1 to 2 or more of the above-mentioned 1st pixel, or The above-mentioned first pixel is provided in a ratio of one to two or more of the above-mentioned second pixels. (16) The photodetection device as described in (15), wherein The above-mentioned pixel array section has: a first pixel area where the plurality of first pixels are arranged; and a second pixel area where the plurality of second pixels are arranged; or Arranging the above-mentioned plurality of second pixels in the pixel area where the above-mentioned plurality of first pixels are arranged, or The plurality of first pixels are arranged in the pixel area where the plurality of second pixels are arranged. (17) A photodetection device comprising: a first pixel having a photoelectric conversion element that generates carriers by photoelectric conversion; A second pixel having a carrier generating portion having a carrier generating structure different from that of the photoelectric conversion element; and A control circuit that controls a bias voltage applied to the photoelectric conversion element and the carrier generating unit based on the carriers generated in the second pixel. (18) The photodetection device as described in (17), wherein The above-mentioned photoelectric conversion element has a first photoelectric conversion region capable of photoelectric conversion; The above-mentioned carrier generating part has a second photoelectric conversion region capable of photoelectric conversion; The second photoelectric conversion region has a carrier generating source for generating the carrier by factors other than incident light. (19) The photodetection device as described in (18), wherein The carrier generation source includes a floating diffusion region arranged in the second photoelectric conversion region and having a higher impurity concentration than the second photoelectric conversion region. (20) The photodetection device as described in (18) or (19), wherein The carrier generating source includes at least one of a crystal defect site and a heavy metal existing site in the second photoelectric conversion region. (21) The photodetection device according to any one of (18) to (20), wherein The carrier generation source includes a part where the surface of the second photoelectric conversion region is partially removed. (22) The photodetection device according to any one of (18) to (21), wherein The carrier generation source has a floating conductive member connected to the second photoelectric conversion region. (23) The photodetection device according to any one of (18) to (22), wherein The carrier generation unit has a stress imparting member that imparts stress to the second photoelectric conversion region; The carrier generation source includes a portion deformed by the stress of the stress imparting member in the second photoelectric conversion region. (24) The photodetection device according to any one of (18) to (23), wherein The carrier generating unit has a transistor arranged in the second photoelectric conversion region; The above-mentioned carrier generation source generates the above-mentioned carriers by controlling the gate voltage of the above-mentioned transistor. (25) The photodetection device according to any one of (18) to (24), wherein The carrier generation part has an electrode connected to the second photoelectric conversion region; The carrier generation source generates the carriers by applying a specific voltage to the electrodes. (26) The photodetection device according to any one of (18) to (25), wherein The second photoelectric conversion region has a plurality of diffusion layers arranged at a distance from each other in the plane direction; The carrier generation source generates the carriers moving between the plurality of diffusion layers by applying a potential difference between the plurality of diffusion layers. (27) The photodetection device according to any one of (18) to (24), wherein The above-mentioned carrier generating part has: The first semiconductor layer of the first conductivity type; A second semiconductor layer of the second conductivity type, which is arranged in contact with the first semiconductor layer and multiplies the carriers; A third semiconductor layer of the second conductivity type arranged to surround at least a part of the first semiconductor layer and the second semiconductor layer; A first contact electrode for cathode connection, which is connected to the above-mentioned first semiconductor layer; and a second contact electrode for anode connection, which is connected to the above-mentioned third semiconductor layer; and The first contact electrode and the first semiconductor layer are connected to at least one of the second contact electrode and the third semiconductor layer by a Schottky junction; The above-mentioned carrier generation source includes the above-mentioned Schottky-junction site. (28) The photodetection device according to any one of (18) to (27), wherein The carrier generation source includes a portion where at least a part of the pinning film arranged in the second photoelectric conversion region is removed. (29) The photodetection device as described in (28), wherein The pinning film is partially removed on at least one of a surface side of the carrier generation portion opposite to the wiring region and a boundary region with adjacent pixels. (30) The photodetection device according to any one of (27) to (29), wherein The carrier generation unit generates the carrier by an interface state generated in the second photoelectric conversion region. (31) The photodetection device described in any one of (27) to (30), which includes: The light shielding member shields the light incident on the second pixel. (32) The photodetection device as described in (31), wherein The material of the light-shielding member includes the same material as that of the pixel separator, and the pixel separator is arranged in the boundary region of the second pixel to shield light from adjacent pixels. (33) The photodetection device as described in (31) or (32), which includes: an on-chip lens that condenses light onto the first pixel; and a light emitting element that emits light; and The second pixel is disposed at a position different from a region where light emitted from the light-emitting element passes and a region where light transmitted through the on-chip lens passes. (34) The photodetection device as described in (33), which includes: a support that supports the first pixel, the second pixel, the on-chip lens, and the light emitting element; and A part of the above-mentioned support is used as the above-mentioned light-shielding member. (35) The photodetection device according to any one of (27) to (34), wherein The above-mentioned carrier generating part has a P region and an N region joined to each other; The carrier generation unit breaks down when generating the carriers in a state where a potential difference corresponding to the bias voltage is applied between the P region and the N region. (36) The photodetection device as described in (35), which includes: a readout circuit that generates pixel signals corresponding to carriers generated in the second pixel; and The control circuit controls the bias voltage based on the potential level of the pixel signal. (37) The photodetection device as described in (36), which includes: a counting circuit that counts the number of times that the above-mentioned carrier generating portion collapses; and The number comparison determination circuit determines whether the number of times counted by the counting circuit has reached a specific reference number, and changes the operation condition of the second pixel when it is determined that the number of times has reached the reference number. (38) The photodetection device as described in (37), wherein The count comparison determination circuit controls the potential difference so that the carrier generation unit does not collapse when the counted count reaches the reference count. (39) The photodetection device as described in (37) or (38), wherein The control circuit, the readout circuit, the counting circuit, and the count comparison determination circuit are provided for each of the second pixels, or for each of a plurality of the second pixels. (40) The photodetection device according to any one of (37) to (39), wherein The control circuit, the readout circuit, the counting circuit, and the count comparison and determination circuit are disposed on the same substrate as the first pixel and the second pixel. (41) The photodetection device described in any one of (37) to (39), which includes: a first substrate on which the above-mentioned first pixel and the above-mentioned second pixel are arranged; and A second substrate on which at least a part of the control circuit, the readout circuit, the counting circuit, and the count comparison and determination circuit are arranged; and The above-mentioned first substrate and the above-mentioned second substrate are laminated and bonded to each other by conductive members to perform signal transmission. (42) The photodetection device described in any one of (27) to (41), which includes: a pixel array unit having a plurality of the first pixels and a plurality of the second pixels; and Each of the above-mentioned plurality of first pixels is provided in association with any of the above-mentioned second pixels, or The above-mentioned 2nd pixel is arranged in a ratio of 1 to 2 or more of the above-mentioned 1st pixel, or The above-mentioned first pixel is provided in a ratio of one to two or more of the above-mentioned second pixels. (43) The photodetection device as described in (42), wherein The above-mentioned pixel array section has: a first pixel area where the plurality of first pixels are arranged; and a second pixel area where the plurality of second pixels are arranged; or Arranging the above-mentioned plurality of second pixels in the pixel area where the above-mentioned plurality of first pixels are arranged, or The plurality of first pixels are arranged in the pixel area where the plurality of second pixels are arranged. (44) An electronic device comprising: a photodetection device that outputs pixel signals corresponding to carriers generated by photoelectric conversion; and a signal processing unit, which performs specific signal processing on the pixel signal; and The above-mentioned light detection device has: a first pixel having a photoelectric conversion element that generates carriers by photoelectric conversion; A second pixel having a carrier generating portion that generates carriers by factors other than photoelectric conversion; and a control circuit that controls a bias voltage applied to the photoelectric conversion element and the carrier generating portion based on the carriers generated in the second pixel; and The above-mentioned photoelectric conversion element has: a first photoelectric conversion region capable of photoelectric conversion; and a first pinning film disposed at a portion in contact with the above-mentioned first photoelectric conversion region; The above-mentioned carrier generating part has a second photoelectric conversion region capable of photoelectric conversion, and a partially removed second pinning film is disposed at a portion adjacent to the second photoelectric conversion region, or it is not used in the second photoelectric conversion region. In the entire area of the area, components to suppress dark current are installed. (45) An electronic device comprising: a photodetection device that outputs pixel signals corresponding to carriers generated by photoelectric conversion; and a signal processing unit, which performs specific signal processing on the pixel signal; and The above-mentioned light detection device has: a first pixel having a photoelectric conversion element that generates carriers by photoelectric conversion; A second pixel having a carrier generating portion having a carrier generating structure different from that of the photoelectric conversion element; and A control circuit that controls a bias voltage applied to the photoelectric conversion element and the carrier generating unit based on the carriers generated in the second pixel.

The aspects of the present disclosure are not limited to the above-mentioned embodiments, but also include various changes conceivable by those skilled in the art, and the effects of the present disclosure are not limited to the above-mentioned contents. That is, various additions, changes, and partial deletions can be made without departing from the conceptual idea and gist of this disclosure derived from the contents specified in the claims and their equivalents.

1: Light detection device 2: Imaging pixels 2a: On-chip lens 3: Monitor pixel 4: The first readout circuit 5: The second readout circuit 6: Counting circuit 7: Times comparison judgment circuit 8: Control circuit 8a: Anode voltage control circuit 9: Photoelectric conversion element 10: Carrier generation unit 11: PMOS transistor 12: Inverter 13: PMOS transistor 13a: Current source 13b: Current source 14: Buffer 15: Timing detection circuit 16: Sample and hold circuit 17: Buffer 21: Inter-pixel average acquisition part 22: Time acquisition department 23: Potential Control Department 25: Shading member 26: ToF sensor 27: Luminous Department 28: Light receiving part 29: Support components 30: shading wall 31: Condenser lens (light-receiving side optical system) 32: Dummy pixels 33: Drive Department 34: Power circuit 35: Light-emitting side optical system 36: Signal processing department 37: Control Department 38:Temperature detection department 39: Ranging Department 40: Ranging device 41: Sensor substrate 42: Wiring layer (sensor side wiring layer) 43: Logic side wiring layer 45:Pixel array department 45a: 1st pixel array part 45b: Second pixel array unit 46:SPAD pixel 47: Readout circuit 48: Judgment circuit 49a: 1st substrate 49b: Second substrate 51:N well 51a: Well P 52: P-type diffusion layer 53: N-type diffusion layer 54: Hole storage layer 55:Pinned film 55a: Removal part 55b: interface status 56: High-concentration P-type diffusion layer 57: Avalanche Multiplier Area 58: High-concentration N-type diffusion layer 61: metal film 62: insulating film 63: Separation part between pixels 64: High concentration impurity area 65: bump structure 66:Crystalline defects 67: heavy metal 68: contact electrode 69: Stress imparting components 71: contact electrode 72: direct contact with electrode 72: contact electrode 73: contact electrode 74: Metal wiring 75: metal wiring 76: Metal wiring 77: contact electrode 78: contact electrode 79: contact electrode 80: Metal pad 81: Metal pad 82: Metal pad 83: electrode pad 84: electrode pad 85: electrode pad 86: insulation layer 87: contact electrode 88: contact electrode 89: contact electrode 90: contact electrode 91: contact electrode 92: contact electrode 93: Metal pad 94: Metal welding pad 95: Metal pad 101: Transistor 101a: Diffusion layer 101b: Diffusion layer 101c: Gate insulating film 101d: Gate 102: contact electrode 103: P-type high-concentration impurity region 104: N-type high-concentration impurity region 105: contact electrode 106: contact electrode 110:SPAD 111: Schottky barrier diode 112: SBD 12000: Vehicle control system 12001: Communication network 12010: drive system control unit 12020: Body system control unit 12030: Exterior information detection unit 12031: Camera Department 12040: In-vehicle information detection unit 12041: Driver state detection unit 12050: Integrated control unit 12051: microcomputer 12052: Audio and image output unit 12053: Vehicle network I/F 12061: Loudspeaker 12062: display part 12063:Dashboard 12100: Vehicle 12101～12105: Camera Department 12111～12114: camera range S: Subject S1～S16: Steps S21～S34: steps S41～S49: steps VEX: excess bias voltage VBD: crash voltage VBT: bottom potential Vs: cathode potential VSPAD: anode potential

Fig. 1 is a block diagram showing a schematic configuration of a photodetection device according to a first embodiment. Fig. 2 is a graph showing how the cathode potential varies with time. 3A is a cross-sectional view of an imaging pixel. 3B is a cross-sectional view of a monitor pixel. FIG. 4 is a cross-sectional view of a monitor pixel in a modification example of FIG. 3B. FIG. 5 is a schematic cross-sectional view of a ToF sensor. FIG. 6 is a block diagram showing a schematic configuration of a distance measuring device equipped with the ToF sensor in FIG. 5 . FIG. 7A is a top view showing part of the pixel array section. 7B is a diagram showing an example of a pixel array unit in which one readout circuit and one determination circuit are associated with a plurality of SPAD pixels. FIG. 7C is a diagram showing an example of laminating the first substrate and the second substrate. Fig. 7D is a diagram showing a variation of Fig. 7C. Fig. 8A is a schematic plan view showing a first example of the placement of imaging pixels and monitoring pixels. Fig. 8B is a schematic plan view showing a second example of the placement of imaging pixels and monitoring pixels. FIG. 8C is a schematic plan view showing a third example of the arrangement places of imaging pixels and monitoring pixels. FIG. 8D is a schematic plan view showing a fourth example of the arrangement places of imaging pixels and monitoring pixels. FIG. 8E is a schematic plan view showing a fifth example of the placement of imaging pixels and monitoring pixels. Fig. 9A is a top view showing the first example of the light-shielding structure. Fig. 9B is a top view showing a second example of the light-shielding structure. Fig. 9C is a top view showing a third example of the light-shielding structure. Fig. 9D is a top view showing a fourth example of the light-shielding structure. FIG. 9E is a top view showing a fifth example of the light-shielding structure. Fig. 10A is a diagram showing a first example of changing operating conditions of monitor pixels. Fig. 10B is a diagram showing a second example of changing the operating conditions of the monitor pixels. FIG. 11 is a flow chart showing the processing operation when the monitor pixel is operated in accordance with the operation of the ToF sensor. Fig. 12 is a flow chart showing processing operations when imaging pixels and monitor pixels are operated in parallel. Fig. 13 is a flow chart showing the processing actions of the monitor pixels that perform actions independent of the imaging pixels. Fig. 14A is a top view showing a first example of a pinning film. Fig. 14B is a top view showing a second example of a pinning film. FIG. 14C is a plan view in which the pinning film on the side opposite to the wiring layer is completely removed. Fig. 14D is a top view when partial removal sites are set at multiple sites in the pinning film. FIG. 14E is a top view when a slit-shaped removal site is provided on the pinning film. Fig. 14F is a top view when a plurality of removal sites are equally arranged on the left, right, up and down inside the pinning film. FIG. 14G is a top view when grid-shaped removal sites are set in the pinning film. Fig. 15 is a cross-sectional view of a carrier generating part of a modified example of the second embodiment. Fig. 16 is a cross-sectional view of a carrier generating portion of a third embodiment. Fig. 17 is a cross-sectional view of a carrier generating portion of a first modification example of the third embodiment. Fig. 18A is a cross-sectional view of a carrier generating portion of a second modification example of the third embodiment. Fig. 18B is a cross-sectional view of a modification of Fig. 18A. Fig. 19A is a cross-sectional view of a carrier generating portion of a third modification example of the third embodiment. Fig. 19B is a cross-sectional view of a modification of Fig. 19A. Fig. 20 is a cross-sectional view of a carrier generating portion of a fourth modification example of the third embodiment. Fig. 21A is a cross-sectional view of a carrier generating portion of a fifth modification example of the third embodiment. Fig. 21B is a cross-sectional view of a modification of Fig. 21A. Fig. 22 is a cross-sectional view of a carrier generating portion of a sixth modification example of the third embodiment. Fig. 23 is a cross-sectional view of a carrier generating portion of a seventh modification example of the third embodiment. Fig. 24 is a cross-sectional view of a carrier generating unit in an eighth modification of the third embodiment. Fig. 25A is a sectional view of the SPAD of the fourth embodiment. Fig. 25B is an equivalent circuit of the connecting portion between the hole storage layer and the anode in Fig. 25A. Fig. 26A is a cross-sectional view of the SPAD according to the first modification of the fourth embodiment. FIG. 26B is an equivalent circuit diagram of a path connected to the SPAD of FIG. 26A. Fig. 27A is a cross-sectional view of a SPAD according to a second modification of the fourth embodiment. FIG. 27B is an equivalent circuit diagram of a path connected to the SPAD of FIG. 27A. Fig. 28 is a block diagram showing an example of a schematic configuration of a vehicle control system. Fig. 29 is an explanatory diagram showing an example of the installation positions of the outside information detection unit and the imaging unit.

3: Monitor pixel

10: Carrier generation unit

41: Sensor substrate

42: Wiring layer (sensor side wiring layer)

43: Logic side wiring layer

51:N well

52: P-type diffusion layer

53: N-type diffusion layer

54: Hole storage layer

55:Pinned film

56: High-concentration P-type diffusion layer

57: Avalanche Multiplier Area

61: metal film

62: insulating film

63: Separation part between pixels

71: contact electrode

72: direct contact with electrode

72: contact electrode

73: contact electrode

74: Metal wiring

75: metal wiring

76: Metal wiring

77: contact electrode

78: contact electrode

79: contact electrode

80: Metal pad

81: Metal pad

82: Metal pad

83: electrode pad

84: electrode pad

85: electrode pad

86: insulation layer

87: contact electrode

88: contact electrode

89: contact electrode

90: contact electrode

91: contact electrode

92: contact electrode

93: Metal pad

94: Metal welding pad

95: Metal pad

Claims (28)

A light detection device, which has: a first pixel having a photoelectric conversion element that generates carriers by photoelectric conversion; A second pixel having a carrier generating portion that generates carriers by factors other than photoelectric conversion; and a control circuit that controls a bias voltage applied to the photoelectric conversion element and the carrier generating portion based on the carriers generated in the second pixel; and The above-mentioned photoelectric conversion element has: a first photoelectric conversion region capable of photoelectric conversion; and a first pinning film disposed at a portion in contact with the above-mentioned first photoelectric conversion region; The above-mentioned carrier generating part has a second photoelectric conversion region capable of photoelectric conversion, and a second pinning film that has been partially removed is disposed at a portion adjacent to the second photoelectric conversion region, or it is not used in the second photoelectric conversion region. The entire area of the area is equipped with components to suppress dark current. Such as the light detection device of claim item 1, wherein The second pinning film is partially removed on at least one of the surface side of the carrier generation portion opposite to the wiring region and a boundary region with adjacent pixels. Such as the light detection device of claim item 1, wherein The carrier generation unit generates the carrier by an interface state generated in the second photoelectric conversion region. Such as the photodetection device of claim 1, which has: A light-shielding member that shields light incident on the second pixel. Such as the light detection device of claim 4, wherein The material of the light-shielding member includes the same material as the pixel separator, and the pixel separator is arranged in the boundary region of the second pixel to shield light from adjacent pixels. Such as the light detection device of claim 4, which has: an on-chip lens that condenses light onto the first pixel; and a light emitting element that emits light; and The second pixel is arranged in a place different from the area where the light emitted from the light emitting element passes and the area where the light transmitted through the on-chip lens passes. Such as the light detection device of claim 6, which has: a support that supports the first pixel, the second pixel, the on-chip lens, and the light emitting element; and A part of the above-mentioned support is used as the above-mentioned light-shielding member. Such as the light detection device of claim item 1, wherein The above-mentioned carrier generating part has a P region and an N region joined to each other; The carrier generation unit breaks down when generating the carriers in a state where a potential difference corresponding to the bias voltage is applied between the P region and the N region. Such as the light detection device of claim 8, which has: a readout circuit that generates pixel signals corresponding to carriers generated in the second pixel; and The control circuit controls the bias voltage based on the potential level of the pixel signal. Such as the light detection device of claim 9, which has: a counting circuit that counts the number of times that the above-mentioned carrier generating portion collapses; and The number comparison determination circuit determines whether the number of times counted by the counting circuit has reached a specific reference number, and changes the operation condition of the second pixel when it is determined that the number of times has reached the reference number. Such as the light detection device of claim item 10, wherein The count comparison determination circuit controls the potential difference so that the carrier generation unit does not collapse when the counted count reaches the reference count. Such as the light detection device of claim item 10, wherein The control circuit, the readout circuit, the counting circuit, and the count comparison determination circuit are provided for each of the second pixels, or for each of a plurality of the second pixels. Such as the light detection device of claim item 10, wherein The control circuit, the readout circuit, the counting circuit, and the count comparison and determination circuit are disposed on the same substrate as the first pixel and the second pixel. Such as the light detection device of claim 10, which has: a first substrate on which the above-mentioned first pixel and the above-mentioned second pixel are arranged; and A second substrate on which at least a part of the control circuit, the readout circuit, the counting circuit, and the number comparison and determination circuit are disposed; and The above-mentioned first substrate and the above-mentioned second substrate are laminated and bonded to each other by conductive members to perform signal transmission. Such as the photodetection device of claim 1, which has: a pixel array unit having a plurality of the first pixels and a plurality of the second pixels; and Each of the above-mentioned plurality of first pixels is provided in association with any of the above-mentioned second pixels, or The above-mentioned 2nd pixel is arranged in a ratio of 1 to 2 or more of the above-mentioned 1st pixel, or The above-mentioned first pixel is provided in a ratio of one to two or more of the above-mentioned second pixels. Such as the light detection device of claim 15, wherein The above-mentioned pixel array section has: a first pixel area for arranging the aforementioned plurality of first pixels; and a second pixel area for arranging the aforementioned plurality of second pixels; or Arranging the above-mentioned plurality of second pixels in the pixel area where the above-mentioned plurality of first pixels are arranged, or The plurality of first pixels are arranged in a pixel area where the plurality of second pixels are arranged. A light detection device, which has: a first pixel having a photoelectric conversion element that generates carriers by photoelectric conversion; A second pixel having a carrier generating portion having a structure different from that of the above photoelectric conversion element in generating carriers; and A control circuit that controls a bias voltage applied to the photoelectric conversion element and the carrier generating unit based on the carriers generated in the second pixel. Such as the light detection device of claim 17, wherein The above-mentioned photoelectric conversion element has a first photoelectric conversion region capable of photoelectric conversion; The above-mentioned carrier generating part has a second photoelectric conversion region capable of photoelectric conversion; The second photoelectric conversion region has a carrier generating source for generating the carrier by factors other than incident light. Such as the light detection device of claim 18, wherein The carrier generating source includes a floating diffusion region arranged in the second photoelectric conversion region and having a higher impurity concentration than the second photoelectric conversion region. Such as the light detection device of claim 18, wherein The carrier generating source includes at least one of a crystal defect site and a heavy metal existing site in the second photoelectric conversion region. Such as the light detection device of claim 18, wherein The carrier generation source includes a part where the surface of the second photoelectric conversion region is partially removed. Such as the light detection device of claim 18, wherein The carrier generation source has a floating conductive member connected to the second photoelectric conversion region. Such as the light detection device of claim 18, wherein The carrier generation unit has a stress imparting member that imparts stress to the second photoelectric conversion region; The carrier generation source includes a portion deformed by the stress of the stress imparting member in the second photoelectric conversion region. Such as the light detection device of claim 18, wherein The carrier generating unit has a transistor arranged in the second photoelectric conversion region; The carrier generation source generates the carriers by controlling the gate voltage of the transistor. Such as the light detection device of claim 18, wherein The carrier generation part has an electrode connected to the second photoelectric conversion region; The carrier generation source generates the carriers by applying a specific voltage to the electrodes. Such as the light detection device of claim 18, wherein The second photoelectric conversion region has a plurality of diffusion layers arranged at a distance from each other in the plane direction; The carrier generation source generates the carriers moving between the plurality of diffusion layers by applying a potential difference between the plurality of diffusion layers. Such as the light detection device of claim 18, wherein The above-mentioned carrier generating part has: The first semiconductor layer of the first conductivity type; A second semiconductor layer of the second conductivity type, which is arranged in contact with the first semiconductor layer and multiplies the carriers; A third semiconductor layer of the second conductivity type arranged to surround at least a part of the first semiconductor layer and the second semiconductor layer; A first contact electrode for cathode connection, which is connected to the above-mentioned first semiconductor layer; and a second contact electrode for anode connection, which is connected to the above-mentioned third semiconductor layer; and The first contact electrode and the first semiconductor layer are connected to at least one of the second contact electrode and the third semiconductor layer by a Schottky junction; The above-mentioned carrier generation source includes the above-mentioned Schottky junction site. An electronic machine having: a photodetection device that outputs pixel signals corresponding to carriers generated by photoelectric conversion; and a signal processing unit, which performs specific signal processing on the pixel signal; and The above-mentioned light detection device has: a first pixel having a photoelectric conversion element that generates carriers by photoelectric conversion; A second pixel having a carrier generating portion that generates carriers by factors other than photoelectric conversion; and a control circuit that controls a bias voltage applied to the photoelectric conversion element and the carrier generating portion based on the carriers generated in the second pixel; and The above-mentioned photoelectric conversion element has: a first photoelectric conversion region capable of photoelectric conversion; and a first pinning film disposed at a portion in contact with the above-mentioned first photoelectric conversion region; The above-mentioned carrier generating part has a second photoelectric conversion region capable of photoelectric conversion, and a second pinning film that has been partially removed is disposed at a portion adjacent to the second photoelectric conversion region, or it is not used in the second photoelectric conversion region. The entire area of the area is equipped with components to suppress dark current.

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