TW202304014A - Method for manufacturing connection structure and connection film - Google Patents

Method for manufacturing connection structure and connection film Download PDF

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TW202304014A
TW202304014A TW111117313A TW111117313A TW202304014A TW 202304014 A TW202304014 A TW 202304014A TW 111117313 A TW111117313 A TW 111117313A TW 111117313 A TW111117313 A TW 111117313A TW 202304014 A TW202304014 A TW 202304014A
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rubber layer
wiring board
chip component
film
adhesive layer
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TW111117313A
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Chinese (zh)
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尾怜司
野田大樹
林直樹
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日商迪睿合股份有限公司
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00Working by laser beam, e.g. welding, cutting or boring
    • B23K26/50Working by transmitting the laser beam through or within the workpiece
    • B23K26/57Working by transmitting the laser beam through or within the workpiece the laser beam entering a face of the workpiece from which it is transmitted through the workpiece material to work on a different workpiece face, e.g. for effecting removal, fusion splicing, modifying or reforming
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • HELECTRICITY
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199Material of the matrix
    • H01L2224/292Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199Material of the matrix
    • H01L2224/2929Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/95001Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips involving a temporary auxiliary member not forming part of the bonding apparatus, e.g. removable or sacrificial coating, film or substrate

Abstract

Provided are a manufacturing method for a connection structure and connection film that make it possible to attain an excellent deposition quality and continuity of a chip component by emitting a laser beam. This manufacturing method for a connection structure comprises: a deposition step in which a chip component, which is disposed on a base material that is transparent to laser light, is caused to face a wiring board, and laser light is emitted from the base material side to deposit the chip component onto the wiring substrate side; and a connection step for connecting the chip component to the wiring board via a connection film. The connection film has a rubber layer and a bonding layer. In the deposition step, the connection film is disposed on an electrode surface of the wiring board, and the rubber layer is brought into contact with the electrode surface of the chip component.

Description

連接結構體之製造方法及連接膜Manufacturing method of bonded structure and bonded film

本技術係關於一種使晶片零件連接於基板之連接結構體之製造方法及連接膜。本申請案係以2021年5月12日於日本提出申請之日本專利申請號特願2021-081171為基礎主張優先權者,該申請案藉由參照而引用至本申請案中。The technology relates to a method of manufacturing a connection structure for connecting a chip component to a substrate and a connection film. This application claims priority based on Japanese Patent Application No. Japanese Patent Application No. 2021-081171 filed in Japan on May 12, 2021, and this application is incorporated by reference in this application.

近年來,作為LCD(Liquid Crystal Display)、OLED(Organic Light Emitting Diode)之下一代顯示器,微型LED之開發較為活躍。作為微型LED之課題,需要一種將微尺寸之LED安裝於面板基板之被稱作質量轉移之技術,該技術正於各地進行研究。In recent years, as the next-generation displays of LCD (Liquid Crystal Display) and OLED (Organic Light Emitting Diode), the development of micro LEDs has been active. As a subject of micro-LEDs, a technology called mass transfer for mounting micro-sized LEDs on panel substrates is required, and this technology is being researched in various places.

作為質量轉移當前之主要方式,可例舉使用壓印材將LED移送至面板基板側之方法。圖11係示意性地表示壓印方式之質量轉移之圖。於壓印方式中,如圖11A及圖11B所示,將LED101自轉印材102轉印至壓印材103將其拾取,並如圖11C及圖11D所示,將LED101貼附至面板基板104之連接膜105上。然而,使用壓印材之方法由於LED101之間距取決於壓印材103之圖案,設計自由度較低,晶片轉印率亦較低,亦非常耗時,因此不適於量產。As the current main method of mass transfer, a method of transferring LEDs to the panel substrate side using a stamping material can be cited. Fig. 11 is a diagram schematically showing mass transfer in the imprint method. In the embossing method, as shown in Figure 11A and Figure 11B, the LED101 is transferred from the transfer material 102 to the imprint material 103 to pick it up, and as shown in Figure 11C and Figure 11D, the LED101 is attached to the connection of the panel substrate 104 film 105 on. However, since the distance between LEDs 101 depends on the pattern of the embossing material 103, the method of using the embossing material is not suitable for mass production because the design freedom is low, the chip transfer rate is also low, and it is very time-consuming.

因此,當前使用雷射之晶片配置工法(例如,參照專利文獻1至4)受到關注。圖12係示意性地表示雷射方式之質量轉移之圖。於雷射方式中,如圖12A及圖12B所示,將LED111自轉印材112轉印至釋放材113將其拾取,並如圖12C所示,將雷射光照射至釋放材113而使LED111著落至面板基板114之連接膜115上。與壓印材相比,利用雷射方式之晶片轉印之設計自由度較高,晶片移送節拍(takt)非常快。Therefore, currently, wafer placement methods using lasers (for example, refer to Patent Documents 1 to 4) are attracting attention. Fig. 12 is a diagram schematically showing mass transfer in a laser system. In the laser method, as shown in FIGS. 12A and 12B , the LED 111 is transferred from the transfer material 112 to the release material 113 to be picked up, and as shown in FIG. 12C , the laser light is irradiated to the release material 113 to make the LED 111 land on on the connection film 115 of the panel substrate 114 . Compared with imprinted materials, the design freedom of wafer transfer using laser method is higher, and the wafer transfer takt is very fast.

然而,於使用雷射之晶片配置工法中,使LED飛濺並使其以非常快之速度著落至面板基板側,因此,例如存在如圖12D所示,LED偏移,或產生變形、脫落、破裂等,引起不良之情況。 先前技術文獻 專利文獻 However, in the chip placement method using laser, the LED is splashed and landed on the panel substrate side at a very fast speed, so, for example, as shown in FIG. etc., causing bad situation. prior art literature patent documents

專利文獻1:日本特開2020-096144號公報 專利文獻2:日本特開2020-145243號公報 專利文獻3:日本特開2019-176154號公報 專利文獻4:日本特開2020-053558號公報 Patent Document 1: Japanese Patent Laid-Open No. 2020-096144 Patent Document 2: Japanese Patent Laid-Open No. 2020-145243 Patent Document 3: Japanese Patent Laid-Open No. 2019-176154 Patent Document 4: Japanese Patent Laid-Open No. 2020-053558

[發明所欲解決之課題][Problem to be Solved by the Invention]

本技術係鑒於此種以往之實際情況而提出者,提供一種藉由雷射光之照射而能夠獲得晶片零件之優異之著落性及導通性的連接結構體之製造方法及連接膜。 [解決課題之技術手段] This technology is proposed in view of such conventional circumstances, and provides a method of manufacturing a connection structure and a connection film capable of obtaining excellent landing properties and conductivity of chip parts by irradiation of laser light. [Technical means to solve the problem]

本技術之連接結構體之製造方法具有以下步驟:著落步驟,其使設置於對雷射光具有穿透性之基材之晶片零件與配線基板對向,並自上述基材側照射雷射光而使上述晶片零件著落至上述配線基板側;以及連接步驟,其使上述晶片零件與上述配線基板經由連接膜而連接;上述連接膜具有橡膠層及接著層,且於上述著落步驟中,上述連接膜配置於上述配線基板之電極面,使上述橡膠層與上述晶片零件之電極面碰撞。The manufacturing method of the bonded structure according to the present technology has the following steps: a landing step, which makes the chip part and the wiring board provided on the base material having permeability to laser light face each other, and irradiates the laser light from the side of the above-mentioned base material. The above-mentioned chip component is landed on the side of the above-mentioned wiring board; and a connecting step of connecting the above-mentioned chip component and the above-mentioned wiring board through a connection film; On the electrode surface of the above-mentioned wiring board, the above-mentioned rubber layer is made to collide with the electrode surface of the above-mentioned chip component.

本技術之連接結構體之製造方法具有以下步驟:著落步驟,其使設置於對雷射光具有穿透性之基材之晶片零件與配線基板對向,並自上述基材側照射雷射光而使上述晶片零件著落至上述配線基板側;以及連接步驟,其使上述晶片零件與上述配線基板經由連接膜而連接;上述連接膜具有接著層,上述晶片零件於電極面具有橡膠層,且於上述著落步驟中,上述連接膜配置於上述配線基板之電極面,使上述接著層與上述晶片零件之橡膠層碰撞。The manufacturing method of the bonded structure according to the present technology has the following steps: a landing step, which makes the chip part and the wiring board provided on the base material having permeability to laser light face each other, and irradiates the laser light from the side of the above-mentioned base material. The above-mentioned chip part is landed on the side of the above-mentioned wiring board; and a connecting step of connecting the above-mentioned chip part and the above-mentioned wiring board through a connection film; the above-mentioned connection film has an adhesive layer, the above-mentioned chip part has a rubber layer on the electrode surface, and In the step, the connection film is disposed on the electrode surface of the wiring substrate, so that the adhesive layer collides with the rubber layer of the chip component.

本技術之連接結構體之製造方法具有以下步驟:著落步驟,其使設置於對雷射光具有穿透性之基材之晶片零件與配線基板對向,並自上述基材側照射雷射光而使上述晶片零件著落至上述配線基板側;以及連接步驟,其使上述晶片零件與上述配線基板經由連接膜而連接;上述連接膜具有橡膠層及接著層,且於上述著落步驟中,上述連接膜配置於上述晶片零件之電極面,使上述橡膠層與上述配線基板之電極面碰撞。The manufacturing method of the bonded structure according to the present technology has the following steps: a landing step, which makes the chip part and the wiring board provided on the base material having permeability to laser light face each other, and irradiates the laser light from the side of the above-mentioned base material. The above-mentioned chip component is landed on the side of the above-mentioned wiring board; and a connecting step of connecting the above-mentioned chip component and the above-mentioned wiring board through a connection film; On the electrode surface of the above-mentioned chip component, the above-mentioned rubber layer is made to collide with the electrode surface of the above-mentioned wiring board.

本技術之連接結構體之製造方法具有以下步驟:著落步驟,其使設置於對雷射光具有穿透性之基材之晶片零件與配線基板對向,並自上述基材側照射雷射光而使上述晶片零件著落至上述配線基板側;以及連接步驟,其使上述晶片零件與上述配線基板經由連接膜而連接;上述連接膜具有接著層,上述配線基板於電極面具有橡膠層,且於上述著落步驟中,上述連接膜配置於上述晶片零件之電極面,使上述接著層與上述配線基板之橡膠層碰撞。The manufacturing method of the bonded structure according to the present technology has the following steps: a landing step, which makes the chip part and the wiring board provided on the base material having permeability to laser light face each other, and irradiates the laser light from the side of the above-mentioned base material. The above-mentioned chip component is landed on the above-mentioned wiring board side; and a connecting step of connecting the above-mentioned chip component and the above-mentioned wiring board through a connection film; the above-mentioned connection film has an adhesive layer, the above-mentioned wiring board has a rubber layer on the electrode surface, and In the step, the connection film is disposed on the electrode surface of the chip component, so that the bonding layer collides with the rubber layer of the wiring substrate.

本技術之連接膜具有橡膠層及接著層,且上述橡膠層之厚度為0.5 μm以上3.0 μm以下。 [發明之效果] The connection film of this technique has a rubber layer and an adhesive layer, and the thickness of the rubber layer is not less than 0.5 μm and not more than 3.0 μm. [Effect of Invention]

根據本技術,能夠獲得優異之衝擊吸收性,因此能夠獲得晶片零件之優異之著落性,並能夠獲得優異之導通性。According to the present technology, excellent shock absorbing property can be obtained, and thus excellent landing property of chip parts can be obtained, and excellent electrical conductivity can be obtained.

以下,參照圖式,以下述順序對本技術之實施形態詳細地進行說明。 1.連接結構體之製造方法 2.連接膜 3.實施例 Hereinafter, embodiments of the present technology will be described in detail in the following order with reference to the drawings. 1. Manufacturing method of connected structure 2. Connecting Membrane 3. Example

<1.連接結構體之製造方法> [第1實施形態] 第1實施形態之連接結構體之製造方法具有以下步驟:著落步驟,其使設置於對雷射光具有穿透性之基材之晶片零件與配線基板對向,並自基材側照射雷射光而使晶片零件著落至上述配線基板側;以及連接步驟,其使晶片零件與上述配線基板經由連接膜而連接;連接膜具有橡膠層及接著層,且於著落步驟中,連接膜配置於配線基板之電極面,使橡膠層與晶片零件之電極面碰撞。藉此,於著落步驟中,能夠抑制晶片零件產生偏移、變形、破裂、脫落等不良,而高精度及高效率地轉印晶片零件並使其排列,於連接步驟中,能夠使晶片零件穿破橡膠層,而獲得優異之導通性,因此能夠謀求節拍時間(takt time)之縮短。 <1. Manufacturing method of bonded structure> [First Embodiment] The method of manufacturing the bonded structure according to the first embodiment has the following steps: a step of landing, which makes the chip component provided on the base material transparent to laser light and the wiring board face each other, and irradiates the laser light from the base material side. Landing the chip component on the above-mentioned wiring substrate side; and a connecting step of connecting the chip component and the above-mentioned wiring substrate through a connection film; the connection film has a rubber layer and an adhesive layer, and in the landing step, the connection film is arranged on the wiring substrate On the electrode surface, the rubber layer collides with the electrode surface of the chip part. Thereby, in the landing step, defects such as deviation, deformation, cracking, and falling off of the chip parts can be suppressed, and the chip parts can be transferred and arranged with high precision and high efficiency. In the connecting step, the chip parts can be worn through. The rubber layer is broken to obtain excellent conductivity, so the takt time can be shortened.

連接膜中之接著層較佳為含有導電粒子之各向異性導電接著層。藉此,即便在晶片零件中未設置例如共晶型焊料凸塊等連接部位之情形時,亦能使晶片零件與配線基板連接。又,於晶片零件之電極成為突起狀等,而與配線基板之配線獲得電性連接之情形時,接著層亦可不含有導電粒子。The adhesive layer in the connection film is preferably an anisotropic conductive adhesive layer containing conductive particles. Thereby, even in the case where a connection site such as eutectic solder bump is not provided in the chip component, the chip component and the wiring board can be connected. Moreover, when the electrode of a chip component becomes a protrusion shape, etc., and the wiring of a wiring board is electrically connected, the adhesive layer does not need to contain conductive particle.

作為晶片零件,可例舉半導體晶片、LED晶片等,並無特別限定,本技術之連接結構體之製造方法適宜用於將微尺寸之大量LED晶片安裝於配線基板即面板基板之質量轉移。As chip components, semiconductor chips, LED chips, etc. can be exemplified, and there is no particular limitation. The method of manufacturing the connection structure of this technology is suitable for mass transfer of mounting a large number of micro-sized LED chips on a wiring substrate, that is, a panel substrate.

以下,關於連接結構體之製造方法,以使複數個LED晶片即發光元件排列於面板基板即配線基板而構成發光元件陣列之顯示裝置之製造方法進行說明。Hereinafter, the method of manufacturing the bonded structure will be described as a method of manufacturing a display device in which a plurality of LED chips, that is, light-emitting elements, are arranged on a panel substrate, that is, a wiring substrate, to form a light-emitting element array.

作為發光元件,可使用在單面具有第1導電型電極及第2導電型電極之所謂之覆晶型LED。發光元件與構成1像素之各子像素相對應地排列於基板上,構成發光元件陣列。1像素例如可由3個子像素即R(紅)G(綠)B(藍)所構成,亦可由4個子像素即RGBW(白)、RGBY(黃)所構成,亦可由2個子像素即RG、GB所構成。As a light emitting element, a so-called flip-chip LED having a first conductivity type electrode and a second conductivity type electrode on one surface can be used. The light-emitting elements are arranged on the substrate corresponding to the sub-pixels constituting one pixel to form a light-emitting element array. For example, 1 pixel can be composed of 3 sub-pixels, R (red), G (green), B (blue), or 4 sub-pixels, RGBW (white), RGBY (yellow), or 2 sub-pixels, RG, GB constituted.

作為子像素之排列方法,例如於RGB之情形時,可例舉:條狀排列、馬賽克排列、三角形排列等。條狀排列係將RGB排列成縱條狀而成者,能夠謀求高精細化。又,馬賽克排列係將RGB之同一色斜向配置而成者,能夠獲得較條狀排列而言更自然之圖像。又,三角形排列係將RGB排列成三角形且各點按照場域偏移半個間距而成者,能夠獲得自然之圖像顯示。As an arrangement method of the sub-pixels, for example, in the case of RGB, a stripe arrangement, a mosaic arrangement, a triangle arrangement, and the like can be exemplified. The stripe arrangement is formed by arranging RGB into vertical stripes, which can achieve high definition. Also, the mosaic arrangement is obtained by diagonally arranging the same color of RGB, and a more natural image can be obtained than the strip arrangement. In addition, the triangular arrangement is formed by arranging RGB into a triangle and shifting each point by half a pitch according to the field, so that natural image display can be obtained.

於表1中,表示:於橫向上排列RGB之各晶片之情形時相對於PPI(Pixels Per Inch)之推定RGB間橫間距、推定晶片尺寸、及推定電極尺寸。假定晶片間距離最小為5 μm,推定RGB間距離以於配置為均等間隔時為最大。此係作為用以明確用途而研究本技術之參考值算出者。Table 1 shows the estimated lateral pitch between RGB, estimated chip size, and estimated electrode size with respect to PPI (Pixels Per Inch) when RGB chips are arranged laterally. Assuming that the minimum distance between chips is 5 μm, it is estimated that the distance between RGB is the largest when the arrangement is at equal intervals. This is calculated as a reference value for researching this technology for specific purposes.

[表1]    尺寸 ppi 像素間距(μm) 推定RGB間橫間距(μm) 推定晶片尺寸 推定電極尺寸 用途 英吋 橫(mm) 縱(mm) 橫(μm) 縱(μm) 最小(μm) 最大(μm) 最小(μm) 最大(μm) 最小(μm) 最大(μm) 大型顯示器 120 2657 1494 40 635 635 15 212 10×20 207×417 7×7 150×150 2657 1494 100 254 254 15 85 10×20 80×160 7×7 60×60 大型TV 80 1771 996 80 318 318 15 106 10×20 101×202 7×7 70×70 1771 996 120 212 212 15 71 10×20 66×132 7×7 45×45 中型顯示器 20 443 249 100 254 254 15 85 10×20 80×160 7×7 55×55 443 249 200 127 127 15 42 10×20 37×74 7×7 25×25 平板 10 221 125 200 127 127 15 42 10×20 37×74 7×7 25×25 221 125 400 64 64 15 21 10×20 16×32 7×7 10×10 SMP 6 13.26 7.47 300 85 85 15 28 10×20 23×46 7×7 15×15 13.26 7.47 500 51 51 15 17 10×20 12×24 7×7 8×8 手錶 2 3.59 3.59 300 85 85 15 28 10×20 23×46 7×7 15×15 3.59 3.59 500 51 51 15 17 10×20 12×24 7×7 8×8 VR 1 1.80 1.80 500 51 51 15 17 10×20 12×24 7×7 8×8 1.80 1.80 1000 26 26 9 9 7×14 7×14 5×5 5×5 1.80 1.80 2000 13 13 4 4 - - - - [Table 1] size ppi Pixel pitch (μm) Estimated horizontal spacing between RGB (μm) Estimated Die Size Estimated electrode size use inches Horizontal (mm) Longitudinal (mm) Horizontal (μm) Longitudinal (μm) Minimum (μm) Maximum (μm) Minimum (μm) Maximum (μm) Minimum (μm) Maximum (μm) large monitor 120 2657 1494 40 635 635 15 212 10×20 207×417 7×7 150×150 2657 1494 100 254 254 15 85 10×20 80×160 7×7 60×60 Large TV 80 1771 996 80 318 318 15 106 10×20 101×202 7×7 70×70 1771 996 120 212 212 15 71 10×20 66×132 7×7 45×45 medium monitor 20 443 249 100 254 254 15 85 10×20 80×160 7×7 55×55 443 249 200 127 127 15 42 10×20 37×74 7×7 25×25 flat 10 221 125 200 127 127 15 42 10×20 37×74 7×7 25×25 221 125 400 64 64 15 twenty one 10×20 16×32 7×7 10×10 SMP 6 13.26 7.47 300 85 85 15 28 10×20 23×46 7×7 15×15 13.26 7.47 500 51 51 15 17 10×20 12×24 7×7 8×8 watch 2 3.59 3.59 300 85 85 15 28 10×20 23×46 7×7 15×15 3.59 3.59 500 51 51 15 17 10×20 12×24 7×7 8×8 VR 1 1.80 1.80 500 51 51 15 17 10×20 12×24 7×7 8×8 1.80 1.80 1000 26 26 9 9 7×14 7×14 5×5 5×5 1.80 1.80 2000 13 13 4 4 - - - -

如表1所示,可知藉由將晶片尺寸設為10×20 μm,能夠對應至500 PPI。又,藉由將晶片尺寸設為7×14 μm,能夠對應至1000 PPI,藉由進一步減小晶片尺寸,能夠實現1000 PPI以上。再者,晶片並非必須為長方形,亦可為正方形。As shown in Table 1, it can be seen that by setting the wafer size to 10×20 μm, it is possible to correspond to 500 PPI. Also, by setting the wafer size to 7×14 μm, it is possible to correspond to 1000 PPI, and by further reducing the wafer size, it is possible to realize 1000 PPI or more. Furthermore, the chip does not have to be rectangular, and it can also be square.

以下,參照圖1~圖4,對照射雷射光而使發光元件著落至配線基板側之著落步驟(A1)、及使發光元件與配線基板連接之連接步驟(B1)進行說明。1 to 4, the landing step (A1) of irradiating the light-emitting element to the wiring board side by irradiating laser light and the connecting step (B1) of connecting the light-emitting element to the wiring board will be described.

[著落步驟(A1)] 圖1係示意性地表示設置於基材之發光元件與配線基板上之連接膜對向之狀態之剖視圖,圖2係表示對向之發光元件與配線基板上之連接膜之放大圖。如圖1及圖2所示,首先,於著落步驟(A1)中,使晶片零件基板10與配線基板30對向。 [Landing Step (A1)] Fig. 1 is a cross-sectional view schematically showing a state where a light-emitting element disposed on a substrate faces a connection film on a wiring substrate, and Fig. 2 is an enlarged view showing the facing light-emitting element and a connection film on a wiring substrate. As shown in FIGS. 1 and 2 , first, in the landing step ( A1 ), the wafer component substrate 10 and the wiring substrate 30 are made to face each other.

晶片零件基板10具備基材11、釋放材12及發光元件20,於釋放材12表面貼附有發光元件20。基材11只要對雷射光具有穿透性即可,其中,較佳為遍及全波長地具有較高之光穿透率之石英玻璃。The chip component substrate 10 includes a base material 11 , a release material 12 and a light emitting element 20 , and the light emitting element 20 is attached on the surface of the release material 12 . The base material 11 only needs to be transparent to laser light, and among them, quartz glass having high light transmittance over all wavelengths is preferable.

釋放材12只要對雷射光之波長具有吸收特性即可,藉由雷射光之照射產生衝擊波,而使發光元件20向配線基板30側飛濺。作為釋放材12,例如可例舉聚醯亞胺。釋放材12之厚度T12例如為0.5 μm以上。The release material 12 is only required to have absorption properties for the wavelength of laser light, and shock waves are generated by irradiation of laser light to cause the light-emitting element 20 to splash toward the wiring board 30 side. As the release material 12, polyimide is mentioned, for example. The thickness T12 of the release material 12 is, for example, 0.5 μm or more.

發光元件20具備本體21、第1導電型電極22及第2導電型電極23,第1導電型電極22與第2導電型電極23具有配置於同一面側之水平結構。本體21具備例如由n-GaN所構成之第1導電型包覆層、例如由In xAl yGa 1-x-yN層所構成之活性層、及例如由p-GaN所構成之第2導電型包覆層,具有所謂之雙異質結構。第1導電型電極22藉由鈍化層形成於第1導電型包覆層之一部分,第2導電型電極23形成於第2導電型包覆層之一部分。若於第1導電型電極22與第2導電型電極23之間施加電壓,則載子集中於活性層,發生再結合,藉此產生發光。 The light emitting element 20 includes a body 21 , a first conductivity type electrode 22 and a second conductivity type electrode 23 , and the first conductivity type electrode 22 and the second conductivity type electrode 23 have a horizontal structure arranged on the same side. The body 21 has a cladding layer of the first conductivity type made of, for example, n-GaN, an active layer made of, for example, an InxAlyGa1 -xyN layer, and a second conductivity type of, for example, made of p-GaN The cladding layer has a so-called double heterostructure. The first conductivity type electrode 22 is formed on a part of the first conductivity type coating layer through a passivation layer, and the second conductivity type electrode 23 is formed on a part of the second conductivity type coating layer. When a voltage is applied between the first conductivity type electrode 22 and the second conductivity type electrode 23 , carriers gather in the active layer and recombine to generate light emission.

發光元件20之寬度W20例如為1~100 μm,發光元件20之厚度T20例如為1~20 μm。The width W20 of the light-emitting element 20 is, for example, 1-100 μm, and the thickness T20 of the light-emitting element 20 is, for example, 1-20 μm.

配線基板30係於基材31上具備第1導電型用電路圖案及第2導電型用電路圖案,以發光元件以構成1像素之子像素(副像素)為單位配置之方式,例如於對應於p側之第1導電型電極及n側之第2導電型電極之位置分別具有第1電極32及第2電極33。又,配線基板30例如形成矩陣配線之資料線、位址線等電路圖案,而能夠將與構成1像素之各子像素相對應之發光元件設為斷續(on-off)。又,配線基板30較佳為透光基板,基材31較佳為玻璃、PET(Polyethylene Terephthalate)、聚醯亞胺等透明基材,電路圖案、第1電極32及第2電極33較佳為ITO(Indium-Tin-Oxide)、IZO(Indium-Zinc-Oxide)、ZnO(Zinc-Oxide)、IGZO(Indium-Gallium-Zinc-Oxide)等之透明導電膜。The wiring board 30 is provided with a circuit pattern for the first conductivity type and a circuit pattern for the second conductivity type on the base material 31, and the light-emitting elements are arranged in units of sub-pixels (sub-pixels) constituting one pixel, for example, corresponding to p There are first electrodes 32 and second electrodes 33 at the positions of the electrodes of the first conductivity type on the n side and the electrodes of the second conductivity type on the n side, respectively. In addition, circuit patterns such as data lines and address lines of matrix wiring are formed on the wiring board 30 , and light emitting elements corresponding to each sub-pixel constituting one pixel can be turned on-off. Furthermore, the wiring substrate 30 is preferably a light-transmitting substrate, the substrate 31 is preferably a transparent substrate such as glass, PET (Polyethylene Terephthalate), polyimide, and the circuit pattern, the first electrode 32 and the second electrode 33 are preferably ITO (Indium-Tin-Oxide), IZO (Indium-Zinc-Oxide), ZnO (Zinc-Oxide), IGZO (Indium-Gallium-Zinc-Oxide) and other transparent conductive films.

如下所述,連接膜40具有橡膠層41及各向異性導電接著層42,且以使橡膠層41側與發光元件20對向之方式貼附於配線基板30上。橡膠層41較佳為選自聚矽氧橡膠、丙烯酸橡膠中之1種以上。橡膠層41之厚度較佳為0.5 μm以上3.0 μm以下,更佳為0.5 μm以上2.0 μm以下,進而較佳為0.5 μm以上1.5 μm以下。又,橡膠層41較佳為於內部具有空隙,且較佳為網狀、突起狀等形狀。藉此,能夠於著落步驟中提昇緩衝性,於連接步驟中提昇發光元件20之穿破性。各向異性導電接著層42較佳為於熱硬化性黏合劑中含有導電粒子43者。The connecting film 40 has a rubber layer 41 and an anisotropic conductive adhesive layer 42 as described below, and is attached to the wiring board 30 so that the side of the rubber layer 41 faces the light emitting element 20 . The rubber layer 41 is preferably one or more selected from silicone rubber and acrylic rubber. The thickness of the rubber layer 41 is preferably from 0.5 μm to 3.0 μm, more preferably from 0.5 μm to 2.0 μm, and still more preferably from 0.5 μm to 1.5 μm. Also, the rubber layer 41 preferably has voids inside, and is preferably in a shape such as a mesh shape or a protrusion shape. Thereby, the cushioning property can be improved in the landing step, and the penetration property of the light-emitting element 20 can be improved in the connecting step. The anisotropic conductive adhesive layer 42 preferably contains conductive particles 43 in a thermosetting adhesive.

連接膜40之厚度T40例如為20 μm以下。又,發光元件20與連接膜40之間之距離D較佳為10~1000 μm,更佳為50~500 μm,進而較佳為80~200 μm。The thickness T40 of the connection film 40 is, for example, 20 μm or less. Also, the distance D between the light emitting element 20 and the connecting film 40 is preferably 10-1000 μm, more preferably 50-500 μm, and still more preferably 80-200 μm.

圖3係示意性地表示自基板側照射雷射光,將發光元件轉印至配線基板之特定位置而使其排列後之狀態之剖視圖。如圖2及圖3所示,於著落步驟(A1)中,自基板11側照射雷射光50,將發光元件20轉印至配線基板30之特定位置,而使其排列於連接膜40上。3 is a cross-sectional view schematically showing a state where laser light is irradiated from the substrate side, and light-emitting elements are transferred to specific positions on the wiring substrate and arranged. As shown in FIGS. 2 and 3 , in the landing step ( A1 ), laser light 50 is irradiated from the substrate 11 side to transfer the light emitting element 20 to a specific position on the wiring substrate 30 and arrange it on the connection film 40 .

於發光元件20之轉印中,例如可使用雷射誘導正向轉移(LIFT:Laser Induced Forward Transfer)裝置。雷射誘導正向轉移裝置例如具備:望遠鏡,其使自雷射裝置出射之脈衝雷射光成為平行光;整形光學系統,其將通過了望遠鏡之脈衝雷射光之空間強度分佈整形為均一分佈;光罩,其使經整形光學系統整形之脈衝雷射光以特定圖案通過;場透鏡,其位於整形光學系統與光罩之間;及投影透鏡,其將通過了光罩之圖案之雷射光縮小投影至供體基板(donor substrate);將作為供體基板之晶片零件基板10保持於供體載台,將作為受體基板(receptor substrate)之配線基板30保持於受體載台。For the transfer of the light-emitting element 20 , for example, a laser-induced forward transfer (LIFT: Laser Induced Forward Transfer) device can be used. The laser-induced forward transfer device includes, for example: a telescope, which makes the pulsed laser light emitted from the laser device into parallel light; a shaping optical system, which shapes the spatial intensity distribution of the pulsed laser light passing through the telescope into a uniform distribution; A mask, which makes the pulsed laser light shaped by the shaping optical system pass through in a specific pattern; a field lens, which is located between the shaping optical system and the mask; and a projection lens, which reduces and projects the laser light passing through the pattern of the mask to Donor substrate: Hold the wafer component substrate 10 as the donor substrate on the donor stage, and hold the wiring substrate 30 as the receptor substrate on the receptor stage.

作為雷射裝置,例如可使用使波長為180 nm~360 nm之雷射光振盪之準分子雷射。準分子雷射之振盪波長例如為193、248、308、351 nm,可根據釋放材12之光吸收性自該等振盪波長中適當地進行選擇。As a laser device, for example, an excimer laser that oscillates laser light having a wavelength of 180 nm to 360 nm can be used. The oscillation wavelength of the excimer laser is, for example, 193, 248, 308, and 351 nm, and can be appropriately selected from these oscillation wavelengths according to the light absorption of the release material 12 .

光罩使用以下圖案,該圖案以基材11與釋放材12之交界面中之投影成為所需雷射光之排列之方式,以特定間距形成有特定尺寸之窗之排列。對於光罩,於基材11例如藉由鍍鉻施以圖案,未實施鍍鉻之窗部分穿透雷射光,實施了鍍鉻之部分阻斷雷射光。The photomask uses a pattern that forms an array of windows of a specific size at a specific pitch in such a way that the projection on the interface between the substrate 11 and the release material 12 becomes the desired array of laser light. For the photomask, the substrate 11 is patterned by, for example, chrome plating, the part of the window that is not chrome-plated penetrates the laser light, and the part that is chrome-plated blocks the laser light.

來自雷射裝置之出射光入射至望遠鏡光學系統,並向其前方之整形光學系統傳播。由於對即將入射至整形光學系統之前之雷射光進行以下調整,即,藉由望遠鏡光學系統,以「於該雷射光於該供體載台之X軸之移動範圍內之任一位置均大致成為平行光」之方式進行調整,因此,該雷射光經常以大致同一尺寸、同一角度(垂直)入射至整形光學系統。The outgoing light from the laser device enters the telescope optical system and propagates to the shaping optical system in front of it. Since the following adjustments are made to the laser light just before it is incident on the shaping optical system, that is, by means of the telescope optical system, "at any position of the laser light within the X-axis movement range of the donor stage is approximately Therefore, the laser light is always incident to the shaping optical system at approximately the same size and at the same angle (perpendicular).

通過了整形光學系統之雷射光經由在與投影透鏡之組合中構成圖像側遠心縮小投影光學系統之場透鏡入射至光罩。通過了光罩圖案之雷射光之傳播方向藉由落射鏡變成鉛垂下方,並入射至投影透鏡。自投影透鏡出射之雷射光自基材11側入射,並以光罩圖案之縮小尺寸準確地投影至形成於其表面(下表面)之釋放材12之特定位置。The laser light that has passed through the shaping optical system enters the mask through the field lens that constitutes the telecentric reduction projection optical system on the image side in combination with the projection lens. The propagation direction of the laser light that has passed through the mask pattern becomes vertically downward through the falling mirror, and enters the projection lens. The laser light emitted from the projection lens enters from the side of the substrate 11 and is accurately projected to a specific position of the release material 12 formed on the surface (lower surface) of the mask pattern in a reduced size.

照射至基材11與釋放材12之界面之進行成像之雷射光之脈衝能量較佳為0.001~2 J,更佳為0.01~1.5 J,進而較佳為0.1~1 J。通量(fluence)較佳為0.001~2 J/cm 2,更佳為0.01~1 J/cm 2,進而較佳為0.05~0.5 J/cm 2。脈衝寬度(照射時間)較佳為0.01~1×10 9微微秒,更佳為0.1~1×10 7微微秒,進而較佳為1~1×10 5微微秒。脈衝頻率較佳為0.1~10000 Hz,更佳為1~1000 Hz,進而較佳為1~100 Hz。照射脈衝數較佳為1~30,000,000。 The pulse energy of the imaging laser light irradiated to the interface of the substrate 11 and the release material 12 is preferably 0.001-2 J, more preferably 0.01-1.5 J, and still more preferably 0.1-1 J. The flux (fluence) is preferably 0.001-2 J/cm 2 , more preferably 0.01-1 J/cm 2 , and still more preferably 0.05-0.5 J/cm 2 . The pulse width (irradiation time) is preferably 0.01 to 1×10 9 picoseconds, more preferably 0.1 to 1×10 7 picoseconds, and still more preferably 1 to 1×10 5 picoseconds. The pulse frequency is preferably from 0.1 to 10000 Hz, more preferably from 1 to 1000 Hz, further preferably from 1 to 100 Hz. The number of irradiation pulses is preferably from 1 to 30,000,000.

藉由使用此種雷射誘導正向轉移裝置,能夠使於基材11與釋放材12之交界面被照射雷射光之釋放材12產生衝擊波,將複數個發光元件20自基材11剝離並朝向配線基板30雷射誘導正向轉移,從而使複數個發光元件20經由連接膜40著落至配線基板30之特定位置。By using such a laser-induced forward transfer device, the release material 12 irradiated with laser light at the interface between the base material 11 and the release material 12 can generate shock waves, and the plurality of light-emitting elements 20 can be peeled off from the base material 11 and directed toward The laser-induced forward transfer of the wiring substrate 30 enables the plurality of light emitting elements 20 to land on specific positions of the wiring substrate 30 through the connection film 40 .

連接膜40於複數個發光元件20側配置有橡膠層41,因此能夠緩和以超高速射出之發光元件20著落時之衝擊,抑制發光元件20產生偏移、變形、破裂、脫落等不良,而獲得較高之著落成功率。The connection film 40 is provided with a rubber layer 41 on the side of a plurality of light emitting elements 20, so that the impact of the light emitting element 20 ejected at an ultra-high speed when it lands can be alleviated, and defects such as deviation, deformation, cracking, and falling off of the light emitting element 20 can be suppressed, and the obtained Higher landing success rate.

[連接步驟(B1)] 圖4係示意性地表示在配線基板安裝有發光元件之狀態之剖視圖。如圖4所示,於連接步驟(B1)中,安裝排列於配線基板30之特定位置之發光元件20。 [Connection procedure (B1)] Fig. 4 is a cross-sectional view schematically showing a state in which a light emitting element is mounted on a wiring board. As shown in FIG. 4 , in the connecting step ( B1 ), the light emitting elements 20 arranged at specific positions on the wiring board 30 are mounted.

作為將發光元件20熱壓接合至配線基板30之方法,可適當選擇使用公知之各向異性導電膜中所使用之連接方法。作為熱壓接合條件,例如溫度為150℃~260℃,壓力為5 MPa~60 MPa,時間為5秒~300秒。As a method of thermocompression-bonding the light-emitting element 20 to the wiring board 30, a connection method used in a known anisotropic conductive film can be appropriately selected and used. As thermocompression bonding conditions, for example, the temperature is 150° C. to 260° C., the pressure is 5 MPa to 60 MPa, and the time is 5 seconds to 300 seconds.

連接膜40之橡膠層41於熱壓接合時被發光元件20之第1導電型電極22及第2導電型電極23穿破。繼而,各向異性導電接著層42之導電粒子43夾持於發光元件20之第1導電型電極22及第2導電型電極23與配線基板30之第1電極32及第2電極33之間,藉由各向異性導電接著層42之黏合劑硬化,形成各向異性導電膜。The rubber layer 41 of the connecting film 40 is pierced by the first conductive type electrode 22 and the second conductive type electrode 23 of the light emitting element 20 during thermocompression bonding. Then, the conductive particles 43 of the anisotropic conductive adhesive layer 42 are sandwiched between the first conductive type electrode 22 and the second conductive type electrode 23 of the light emitting element 20 and the first electrode 32 and the second electrode 33 of the wiring substrate 30, The anisotropic conductive film is formed by hardening the adhesive of the anisotropic conductive adhesive layer 42 .

根據第1實施形態之連接結構體之製造方法,於配線基板之電極面配置具有橡膠層及接著層之連接膜,使橡膠層與晶片零件之電極面碰撞,藉此,於著落步驟中,能夠抑制晶片零件產生偏移、變形、破裂、脫落等不良,而高精度及高效率地轉印晶片零件並使其排列,且於連接步驟中,能夠使晶片零件穿破橡膠層,而獲得優異之導通性。According to the method of manufacturing a bonded structure according to the first embodiment, the connection film having the rubber layer and the adhesive layer is disposed on the electrode surface of the wiring board, and the rubber layer collides with the electrode surface of the chip component, whereby, in the landing step, it is possible to Inhibit chip parts from deflecting, deforming, cracking, falling off, etc., and transfer and arrange chip parts with high precision and high efficiency, and in the connecting step, chip parts can be pierced through the rubber layer to obtain excellent results Continuity.

於第1實施形態中,於配線基板上之整個面貼附連接膜,但例如亦可使用質量轉移技術,將連接膜之單片轉印至配線基板上之電極位置。藉由將連接膜選擇性地僅貼於晶片零件所飛到之位置而並非整面貼附,能夠例如提昇發光元件陣列之透明性。In the first embodiment, the connection film is attached to the entire surface on the wiring board, but for example, a mass transfer technique may be used to transfer a single piece of the connection film to the electrode position on the wiring board. By selectively attaching the connection film only to the position where the chip components fly instead of attaching the entire surface, for example, the transparency of the light-emitting element array can be improved.

[第2實施形態] 於第1實施形態中,將具有橡膠層及接著層之連接膜配置於配線基板,但亦可將橡膠層配置於晶片零件之電極面,且將接著層配置於配線基板。 [Second Embodiment] In the first embodiment, the connection film having the rubber layer and the adhesive layer was placed on the wiring board, but the rubber layer may be placed on the electrode surface of the chip component and the adhesive layer may be placed on the wiring board.

即,第2實施形態之連接結構體之製造方法具有以下步驟:著落步驟,其使設置於對雷射光具有穿透性之基材之晶片零件與配線基板對向,並自上述基材側照射雷射光而使晶片零件著落至配線基板側;以及連接步驟,其使晶片零件與配線基板經由連接膜而連接;連接膜具有接著層,晶片零件於電極面具有橡膠層,且於著落步驟中,連接膜配置於配線基板之電極面,使接著層與晶片零件之橡膠層碰撞。That is, the method of manufacturing the bonded structure according to the second embodiment has the following steps: a landing step, which makes the chip component provided on the base material having transparency to laser light and the wiring board face each other, and irradiates from the side of the base material The chip part is landed on the wiring board side by laser light; and a connection step is performed to connect the chip part and the wiring board via a connection film; the connection film has an adhesive layer, the chip part has a rubber layer on the electrode surface, and in the landing step, The connection film is arranged on the electrode surface of the wiring board, so that the adhesive layer collides with the rubber layer of the chip part.

以下,與第1實施形態同樣地,關於連接結構體之製造方法,以使複數個LED晶片即發光元件排列於面板基板即配線基板而構成發光元件陣列之顯示裝置之製造方法中的著落步驟(A2)及連接步驟(B2)進行說明。再者,對與第1實施形態相同之構成標註相同符號並省略說明。Hereinafter, similarly to the first embodiment, regarding the method of manufacturing the bonded structure, a landing step in a method of manufacturing a display device in which a plurality of LED chips, that is, light-emitting elements are arranged on a panel substrate, that is, a wiring substrate, to form a light-emitting element array ( A2) and connection steps (B2) will be described. In addition, the same code|symbol is attached|subjected to the same structure as 1st Embodiment, and description is abbreviate|omitted.

[著落步驟(A2)] 圖5係示意性地表示設置於基材且於電極面具有橡膠層之發光元件與配線基板上之各向異性導電接著層對向之狀態之剖視圖。如圖5所示,首先,於著落步驟(A2)中,使晶片零件基板10與配線基板30對向。 [Landing Step (A2)] 5 is a cross-sectional view schematically showing a state in which a light-emitting element provided on a substrate and having a rubber layer on an electrode surface faces an anisotropic conductive adhesive layer on a wiring substrate. As shown in FIG. 5 , first, in the landing step ( A2 ), the wafer component substrate 10 and the wiring substrate 30 are made to face each other.

晶片零件基板10具備基材11、釋放材12及發光元件20,於釋放材12表面貼附有發光元件20。又,於發光元件20之電極面貼附有橡膠層51。橡膠層51與第1實施形態中之橡膠層41相同,因此省略說明。The chip component substrate 10 includes a base material 11 , a release material 12 and a light emitting element 20 , and the light emitting element 20 is attached on the surface of the release material 12 . In addition, a rubber layer 51 is attached to the electrode surface of the light emitting element 20 . The rubber layer 51 is the same as the rubber layer 41 in the first embodiment, so description thereof will be omitted.

連接膜50係由各向異性導電接著層52所構成,貼附於配線基板30之第1電極32上及第2電極33上之位置。各向異性導電接著層22與第1實施形態中之各向異性導電接著層42相同,因此省略說明。The connection film 50 is composed of an anisotropic conductive adhesive layer 52 , and is pasted on the first electrode 32 and the second electrode 33 of the wiring substrate 30 . The anisotropic conductive adhesive layer 22 is the same as the anisotropic conductive adhesive layer 42 in the first embodiment, so description thereof is omitted.

於著落步驟(A2)中,貼附於發光元件20之橡膠層51能夠緩和以超高速射出之發光元件20著落至各向異性導電接著層52時之衝擊,抑制發光元件20產生偏移、變形、破裂、脫落等不良,而獲得較高之著落成功率。In the landing step (A2), the rubber layer 51 attached to the light-emitting element 20 can alleviate the impact of the light-emitting element 20 ejected at ultra-high speed when it lands on the anisotropic conductive adhesive layer 52, and suppress the deviation and deformation of the light-emitting element 20 , cracking, falling off and other defects, and obtain a higher success rate of landing.

[連接步驟(B2)] 於連接步驟(B2)中,安裝排列於配線基板30之特定位置之發光元件20。將發光元件20熱壓接合至配線基板30之方法與第1實施形態相同。貼附於發光元件20之橡膠層51於熱壓接合時被發光元件20之第1導電型電極22及第2導電型電極23穿破。繼而,各向異性導電接著層52之導電粒子53夾持於發光元件20之第1導電型電極22及第2導電型電極23與配線基板30之第1電極32及第2電極33之間,藉由使各向異性導電接著層52之黏合劑硬化,形成各向異性導電膜。 [Connection procedure (B2)] In the connection step (B2), the light emitting elements 20 arranged at specific positions on the wiring board 30 are mounted. The method of thermocompression bonding the light emitting element 20 to the wiring board 30 is the same as that of the first embodiment. The rubber layer 51 attached to the light emitting element 20 is pierced by the first conductive type electrode 22 and the second conductive type electrode 23 of the light emitting element 20 during thermocompression bonding. Then, the conductive particles 53 of the anisotropic conductive adhesive layer 52 are sandwiched between the first conductive type electrode 22 and the second conductive type electrode 23 of the light emitting element 20 and the first electrode 32 and the second electrode 33 of the wiring substrate 30, By curing the adhesive of the anisotropic conductive adhesive layer 52, an anisotropic conductive film is formed.

根據第2實施形態之連接結構體之製造方法,於晶片零件之電極面配置橡膠層,於配線基板之電極面配置由接著層所構成之連接膜,使橡膠層與連接膜碰撞,藉此,於著落步驟中,能夠抑制晶片零件產生偏移、變形、破裂、脫落等不良,而高精度及高效率地轉印晶片零件並使其排列,且於連接步驟中,能夠使晶片零件穿破橡膠層,而獲得優異之導通性。According to the method of manufacturing the bonded structure of the second embodiment, the rubber layer is disposed on the electrode surface of the chip component, the connection film composed of the adhesive layer is disposed on the electrode surface of the wiring board, and the rubber layer collides with the connection film, thereby, In the landing step, defects such as deviation, deformation, cracking, and falling off of the chip parts can be suppressed, and the chip parts can be transferred and arranged with high precision and high efficiency, and in the connecting step, the chip parts can be pierced through the rubber layer to obtain excellent conductivity.

[第3實施形態] 於第1實施形態中,將具有橡膠層及接著層之連接膜配置於配線基板,但亦可將連接膜配置於晶片零件之電極面。 [third embodiment] In the first embodiment, the connection film having the rubber layer and the adhesive layer was disposed on the wiring board, but the connection film may also be disposed on the electrode surface of the chip component.

即,第3實施形態之連接結構體之製造方法具有以下步驟:著落步驟,其使設置於對雷射光具有穿透性之基材之晶片零件與配線基板對向,並自基材側照射雷射光而使晶片零件著落至配線基板側;以及連接步驟,其使晶片零件與配線基板經由連接膜而連接;連接膜具有橡膠層及接著層,且於著落步驟中,連接膜配置於晶片零件之電極面,使橡膠層與配線基板之電極面碰撞。That is, the manufacturing method of the bonded structure according to the third embodiment has the following steps: a step of landing, which makes the chip component provided on the base material transparent to laser light and the wiring board face each other, and irradiates the laser beam from the base material side. irradiating light to make the chip part land on the wiring board side; and a connecting step of connecting the chip part and the wiring board through a connection film; the connection film has a rubber layer and an adhesive layer, and in the landing step, the connection film is arranged on the chip part On the electrode surface, the rubber layer collides with the electrode surface of the wiring board.

以下,與第1實施形態同樣地,關於連接結構體之製造方法,以使複數個LED晶片即發光元件排列於面板基板即配線基板而構成發光元件陣列之顯示裝置之製造方法中的著落步驟(A3)及連接步驟(B3)進行說明。再者,對與第1實施形態相同之構成標註相同符號並省略說明。Hereinafter, similarly to the first embodiment, regarding the method of manufacturing the bonded structure, a landing step in a method of manufacturing a display device in which a plurality of LED chips, that is, light-emitting elements are arranged on a panel substrate, that is, a wiring substrate, to form a light-emitting element array ( A3) and connection steps (B3) will be described. In addition, the same code|symbol is attached|subjected to the same structure as 1st Embodiment, and description is abbreviate|omitted.

[著落步驟(A3)] 圖6係示意性地表示設置於基材且於電極面具有連接膜之發光元件與配線基板對向之狀態之剖視圖。如圖6所示,首先,於著落步驟(A2)中,使晶片零件基板10與配線基板30對向。 [Landing Step (A3)] 6 is a cross-sectional view schematically showing a state in which a light-emitting element provided on a substrate and having a connection film on an electrode surface faces a wiring board. As shown in FIG. 6 , first, in the landing step ( A2 ), the wafer component substrate 10 and the wiring substrate 30 are made to face each other.

晶片零件基板10具備基材11、釋放材12及發光元件20,於釋放材12表面貼附有發光元件20。又,於發光元件20之電極面貼附有連接膜60。The chip component substrate 10 includes a base material 11 , a release material 12 and a light emitting element 20 , and the light emitting element 20 is attached on the surface of the release material 12 . Moreover, the connection film 60 is attached to the electrode surface of the light emitting element 20 .

連接膜60具有橡膠層61及各向異性導電接著層62,使橡膠層61側與配線基板30對向。橡膠層61及各向異性導電接著層62與第1實施形態中之橡膠層41及各向異性導電接著層42相同,因此省略說明。The connection film 60 has a rubber layer 61 and an anisotropic conductive adhesive layer 62 , and the side of the rubber layer 61 faces the wiring board 30 . The rubber layer 61 and the anisotropic conductive adhesive layer 62 are the same as those of the rubber layer 41 and the anisotropic conductive adhesive layer 42 in the first embodiment, and thus description thereof will be omitted.

於著落步驟(A3)中,貼附於發光元件20之橡膠層61能夠緩和以超高速射出之發光元件20著落至配線基板30之電極面時之衝擊,抑制發光元件20產生偏移、變形、破裂、脫落等不良,而獲得較高之著落成功率。In the landing step (A3), the rubber layer 61 attached to the light-emitting element 20 can relieve the impact of the light-emitting element 20 ejected at ultra-high speed when it lands on the electrode surface of the wiring board 30, and suppress the light-emitting element 20 from shifting, deforming, Cracking, shedding and other defects, and a higher landing success rate.

[連接步驟(B3)] 於連接步驟(B3)中,安裝排列於配線基板30之特定位置之發光元件20。將發光元件20熱壓接合至配線基板30之方法與第1實施形態相同。貼附於發光元件20之橡膠層61於熱壓接合時被各向異性導電接著層62之導電粒子63穿破。繼而,各向異性導電接著層62之導電粒子63夾持於發光元件20之第1導電型電極22及第2導電型電極23與配線基板30之第1電極32及第2電極33之間,藉由使各向異性導電接著層62之黏合劑硬化,形成各向異性導電膜。 [Connection procedure (B3)] In the connection step ( B3 ), the light emitting elements 20 arranged at specific positions on the wiring board 30 are mounted. The method of thermocompression bonding the light emitting element 20 to the wiring board 30 is the same as that of the first embodiment. The rubber layer 61 attached to the light emitting element 20 is pierced by the conductive particles 63 of the anisotropic conductive adhesive layer 62 during thermocompression bonding. Then, the conductive particles 63 of the anisotropic conductive adhesive layer 62 are sandwiched between the first conductive type electrode 22 and the second conductive type electrode 23 of the light emitting element 20 and the first electrode 32 and the second electrode 33 of the wiring substrate 30, By curing the adhesive of the anisotropic conductive adhesive layer 62, an anisotropic conductive film is formed.

根據第3實施形態之連接結構體之製造方法,於晶片零件之電極面配置具有橡膠層及接著層之連接膜,使橡膠層與配線基板之電極面碰撞,藉此,於著落步驟中,能夠抑制晶片零件產生偏移、變形、破裂、脫落等不良,而高精度及高效率地轉印晶片零件並使其排列,且於連接步驟中,能夠獲得優異之導通性。According to the method of manufacturing a bonded structure according to the third embodiment, the connection film having the rubber layer and the adhesive layer is arranged on the electrode surface of the chip component, and the rubber layer collides with the electrode surface of the wiring board, whereby, in the landing step, it is possible to Suppressing chip components from deflecting, deforming, cracking, falling off, etc., transferring and arranging chip components with high precision and high efficiency, and obtaining excellent conductivity during the connection step.

[第4實施形態] 於第1實施形態中,將具有橡膠層及接著層之連接膜配置於配線基板,但亦可將接著層配置於晶片零件之電極面,且將橡膠層配置於配線基板。 [Fourth Embodiment] In the first embodiment, the connection film having the rubber layer and the adhesive layer was arranged on the wiring board, but it is also possible to arrange the adhesive layer on the electrode surface of the chip component and arrange the rubber layer on the wiring board.

即,第4實施形態之連接結構體之製造方法具有以下步驟:著落步驟,其使設置於對雷射光具有穿透性之基材之晶片零件與配線基板對向,並自基材側照射雷射光而使晶片零件著落至配線基板側;以及連接步驟,其使晶片零件與配線基板經由連接膜而連接;連接膜具有接著層,配線基板於電極面具有橡膠層,且於著落步驟中,連接膜配置於晶片零件之電極面,使接著層與配線基板之橡膠層碰撞。That is, the manufacturing method of the bonded structure according to the fourth embodiment has the following steps: a landing step, which makes the chip component provided on the base material transparent to laser light and the wiring board face each other, and irradiates the laser beam from the base material side. irradiating light to make the chip parts land on the wiring board side; and a connecting step, which connects the chip parts and the wiring board through a connecting film; the connecting film has an adhesive layer, and the wiring board has a rubber layer on the electrode surface, and in the landing step, connecting The film is placed on the electrode surface of the chip component, so that the adhesive layer collides with the rubber layer of the wiring board.

以下,與第1實施形態同樣地,關於連接結構體之製造方法,以使複數個LED晶片即發光元件排列於面板基板即配線基板而構成發光元件陣列之顯示裝置之製造方法中的著落步驟(A4)及連接步驟(B4)進行說明。再者,對與第1實施形態相同之構成標註相同符號並省略說明。Hereinafter, similarly to the first embodiment, regarding the method of manufacturing the bonded structure, a landing step in a method of manufacturing a display device in which a plurality of LED chips, that is, light-emitting elements are arranged on a panel substrate, that is, a wiring substrate, to form a light-emitting element array ( A4) and connection steps (B4) will be described. In addition, the same code|symbol is attached|subjected to the same structure as 1st Embodiment, and description is abbreviate|omitted.

[著落步驟(A4)] 圖7係示意性地表示設置於基材且於電極面具有各向異性導電接著層之發光元件與配線基板上之橡膠層對向之狀態之剖視圖。如圖7所示,首先,於著落步驟(A4)中,使晶片零件基板10與配線基板30對向。 [Landing Step (A4)] 7 is a cross-sectional view schematically showing a state in which a light-emitting element provided on a substrate and having an anisotropic conductive adhesive layer on an electrode surface faces a rubber layer on a wiring board. As shown in FIG. 7 , first, in the landing step ( A4 ), the wafer component substrate 10 and the wiring substrate 30 are made to face each other.

晶片零件基板10具備基材11、釋放材12及發光元件20,於釋放材12表面貼附有發光元件20。又,於發光元件20之電極面貼附有由各向異性導電接著層72所構成之連接膜70。各向異性導電接著層72與第1實施形態中之各向異性導電接著層42相同,因此省略說明。The chip component substrate 10 includes a base material 11 , a release material 12 and a light emitting element 20 , and the light emitting element 20 is attached on the surface of the release material 12 . In addition, a connection film 70 composed of an anisotropic conductive adhesive layer 72 is attached to the electrode surface of the light emitting element 20 . The anisotropic conductive adhesive layer 72 is the same as the anisotropic conductive adhesive layer 42 in the first embodiment, so description thereof is omitted.

又,於配線基板30之第1電極32上及第2電極33上之位置貼附有橡膠層71。橡膠層71與第1實施形態中之橡膠層41相同,因此省略說明。Furthermore, rubber layers 71 are attached to positions on the first electrode 32 and the second electrode 33 of the wiring board 30 . The rubber layer 71 is the same as the rubber layer 41 in the first embodiment, so description thereof will be omitted.

於著落步驟(A4)中,貼附於配線基板30之橡膠層71能夠緩和以超高速射出之發光元件20著落時之衝擊,抑制發光元件20產生偏移、變形、破裂、脫落等不良,而獲得較高之著落成功率。In the landing step (A4), the rubber layer 71 attached to the wiring substrate 30 can alleviate the impact of the light-emitting element 20 ejected at ultra-high speed when it lands, and suppress the light-emitting element 20 from causing defects such as deviation, deformation, cracking, and falling off. Obtain a higher landing success rate.

[連接步驟(B4)] 於連接步驟(B4)中,安裝排列於配線基板30之特定位置之發光元件20。將發光元件20熱壓接合至配線基板30之方法與第1實施形態相同。貼附於配線基板30之橡膠層71於熱壓接合時被各向異性導電接著層72之導電粒子73穿破。繼而,各向異性導電接著層72之導電粒子73夾持於發光元件20之第1導電型電極22及第2導電型電極23與配線基板30之第1電極32及第2電極33之間,藉由使各向異性導電接著層72之黏合劑硬化,形成各向異性導電膜。 [Connection procedure (B4)] In the connection step ( B4 ), the light emitting elements 20 arranged at specific positions on the wiring board 30 are mounted. The method of thermocompression bonding the light emitting element 20 to the wiring board 30 is the same as that of the first embodiment. The rubber layer 71 attached to the wiring substrate 30 is pierced by the conductive particles 73 of the anisotropic conductive adhesive layer 72 during thermocompression bonding. Then, the conductive particles 73 of the anisotropic conductive adhesive layer 72 are sandwiched between the first conductive type electrode 22 and the second conductive type electrode 23 of the light emitting element 20 and the first electrode 32 and the second electrode 33 of the wiring substrate 30, By curing the adhesive of the anisotropic conductive adhesive layer 72, an anisotropic conductive film is formed.

根據第4實施形態之連接結構體之製造方法,於晶片零件之電極面配置由接著層所構成之連接膜,於配線基板之電極面配置橡膠層,使接著層與橡膠層碰撞,藉此,於著落步驟中,能夠抑制晶片零件產生偏移、變形、破裂、脫落等不良,而高精度及高效率地轉印晶片零件並使其排列,且於連接步驟中,能夠獲得優異之導通性。According to the method of manufacturing a bonded structure according to the fourth embodiment, a connection film composed of an adhesive layer is arranged on the electrode surface of the chip component, a rubber layer is arranged on the electrode surface of the wiring board, and the adhesive layer collides with the rubber layer, thereby, In the landing step, defects such as deviation, deformation, cracking, and falling off of the chip parts can be suppressed, and the chip parts can be transferred and arranged with high precision and high efficiency, and excellent conductivity can be obtained in the connecting step.

<2.連接膜> 本實施形態之連接膜具有橡膠層及接著層,橡膠層之厚度為0.5 μm以上3.0 μm以下。藉此,能夠提昇例如使用藉由雷射光之質量轉移使晶片零件著落至配線基板之情形時之著落率,而獲得優異之導通性。 <2. Connecting membrane> The connecting film of this embodiment has a rubber layer and an adhesive layer, and the thickness of the rubber layer is not less than 0.5 μm and not more than 3.0 μm. Thereby, it is possible to improve the landing rate when using, for example, a case where a chip component is dropped on a wiring board by mass transfer of laser light, and excellent conductivity can be obtained.

接著層較佳為含有導電粒子之各向異性導電接著層。藉此,即便在晶片零件中未設置焊料凸塊等連接部位之情形時,亦能使晶片零件與配線基板連接。又,各向異性導電接著層較佳為使導電粒子整齊排列於方向而構成,且較佳為使導電粒子偏存於厚度方向之配線基板側。藉此,能夠提昇晶片零件之電極與配線基板之電極之間之導電粒子的捕捉性。再者,於晶片零件之電極成為突起狀等,而與配線基板之配線獲得電性連接之情形時,接著層亦可不含有導電粒子。The adhesive layer is preferably an anisotropic conductive adhesive layer containing conductive particles. Thereby, even in the case where the connection part, such as a solder bump, is not provided in a chip part, it becomes possible to connect a chip part and a wiring board. In addition, the anisotropic conductive adhesive layer is preferably constituted so that conductive particles are aligned in one direction, and the conductive particles are preferably distributed on the side of the wiring board in the thickness direction. Thereby, the capture property of the conductive particle between the electrode of a chip component and the electrode of a wiring board can be improved. Furthermore, in the case where the electrode of the chip component becomes a protruding shape and is electrically connected to the wiring of the wiring board, the adhesive layer may not contain conductive particles.

圖8係示意性地表示連接膜之第1構成例之剖視圖。如圖8所示,連接膜40具有橡膠層41及含有導電粒子43之各向異性導電接著層42。Fig. 8 is a cross-sectional view schematically showing a first configuration example of the connecting film. As shown in FIG. 8 , the connection film 40 has a rubber layer 41 and an anisotropic conductive adhesive layer 42 containing conductive particles 43 .

橡膠層41並無特別限定,只要為緩衝性(衝擊吸收性)較高之彈性體即可,作為具體例,例如可例舉:聚矽氧橡膠、丙烯酸橡膠、丁二烯橡膠、聚胺酯(polyurethane)樹脂(聚胺酯系彈性體)等。其中,橡膠層41較佳為選自聚矽氧橡膠、丙烯酸橡膠中之1種以上。The rubber layer 41 is not particularly limited, as long as it is an elastic body with high cushioning properties (impact absorption). As specific examples, for example, silicone rubber, acrylic rubber, butadiene rubber, polyurethane (polyurethane ) resin (polyurethane elastomer), etc. Among them, the rubber layer 41 is preferably one or more selected from silicone rubber and acrylic rubber.

橡膠層41之厚度較佳為0.5 μm以上3.0 μm以下,更佳為0.5 μm以上2.0 μm以下,進而較佳為0.5 μm以上1.5 μm以下。若橡膠層41之厚度過小,則有難以獲得衝擊吸收性之傾向,若橡膠層41之厚度過大,則有難以獲得導通性之傾向。The thickness of the rubber layer 41 is preferably from 0.5 μm to 3.0 μm, more preferably from 0.5 μm to 2.0 μm, and still more preferably from 0.5 μm to 1.5 μm. If the thickness of the rubber layer 41 is too small, it tends to be difficult to obtain shock absorption, and if the thickness of the rubber layer 41 is too large, it tends to be difficult to obtain conductivity.

橡膠層41之硬度計A(durometer A)硬度較佳為20~40,更佳為20~35,進而較佳為20~30。於硬度計A硬度過高之情形時,有橡膠層過硬,而晶片零件容易產生變形、破裂等不良之傾向,於硬度計A硬度過低之情形時,有橡膠層41過軟,而晶片零件容易產生偏移等不良之傾向。橡膠層41之硬度計A硬度可依據JIS K 6253並使用硬度計A以橡膠硬度(日本工業標準JIS-A硬度)進行測定。The durometer A (durometer A) hardness of the rubber layer 41 is preferably 20-40, more preferably 20-35, and still more preferably 20-30. When the hardness of the durometer A is too high, the rubber layer is too hard, and the chip parts are prone to deformation, cracking and other defects. When the hardness of the durometer A is too low, the rubber layer 41 is too soft, and the chip parts It is easy to produce bad tendency such as offset. The durometer A hardness of the rubber layer 41 can be measured according to JIS K 6253 and using the durometer A as rubber hardness (Japanese Industrial Standard JIS-A hardness).

使用壓入試驗裝置之動態黏彈性試驗之溫度30℃、頻率200 Hz之橡膠層41之儲存模數較佳為60 MPa以下,更佳為40 MPa以下,進而較佳為30 MPa以下。於溫度30℃、頻率200 Hz之儲存模數過高之情形時,無法吸收藉由雷射照射而高速彈出之晶片零件之衝擊,而有晶片零件之轉印率下降之傾向。溫度30℃、頻率200 Hz之橡膠層41之儲存模數可使用壓入試驗裝置,並例如使用直徑為100 μm之平沖頭(flat punch),將目標壓入深度設為1 μm,對頻率1~200 Hz之範圍進行掃描(sweep)而進行測定。The storage modulus of the rubber layer 41 in the dynamic viscoelasticity test using an indentation test device at a temperature of 30°C and a frequency of 200 Hz is preferably 60 MPa or less, more preferably 40 MPa or less, and still more preferably 30 MPa or less. When the storage modulus is too high at a temperature of 30°C and a frequency of 200 Hz, it cannot absorb the impact of the chip parts ejected at high speed by laser irradiation, and the transfer rate of the chip parts tends to decrease. For the storage modulus of the rubber layer 41 at a temperature of 30°C and a frequency of 200 Hz, an indentation test device can be used, and for example, a flat punch with a diameter of 100 μm is used, and the target indentation depth is set to 1 μm. The measurement is performed by sweeping in the range of 1 to 200 Hz.

各向異性導電接著層42亦可為含有導電粒子43之所謂之各向異性導電膜(ACF:Anisotropic Conductive Film)。作為導電粒子,可適當選擇使用公知之各向異性導電膜中所使用之導電粒子。例如可例舉:鎳、銅、銀、金、鈀、焊料等金屬粒子;由鎳、金等金屬被覆聚醯胺、聚苯并胍胺等樹脂粒子之表面而成之金屬被覆樹脂粒子等。藉此,即便在晶片零件中未設置焊料凸塊等連接部位之情形時,亦能導通。The anisotropic conductive adhesive layer 42 may also be a so-called anisotropic conductive film (ACF: Anisotropic Conductive Film) containing conductive particles 43 . As the conductive particles, those used in known anisotropic conductive films can be appropriately selected and used. For example, metal particles such as nickel, copper, silver, gold, palladium, and solder; metal-coated resin particles obtained by coating the surface of resin particles such as polyamide and polybenzoguanamine with metals such as nickel and gold, and the like. Thereby, even in the case where no connecting portion such as a solder bump is provided in the chip component, conduction can be achieved.

又,各向異性導電接著層42較佳為使導電粒子43整齊排列於面方向而構成。藉由使導電粒子整齊排列於面方向而構成,能夠使粒子面密度變得均一,而獲得非常優異之導通性。又,各向異性導電接著層42較佳為使導電粒子43偏存於厚度方向之配線基板側。例如,於上述第1實施形態中,亦可使各向異性導電接著層42內之導電粒子43偏存於橡膠層41之面之相反面側,於上述第3實施形態中,亦可使各向異性導電接著層42內之導電粒子43偏存於橡膠層41之面側。藉此,能夠提昇晶片零件之電極與配線基板之電極之間之導電粒子的捕捉性。In addition, the anisotropic conductive adhesive layer 42 is preferably configured so that the conductive particles 43 are aligned in the plane direction. Constructed by aligning conductive particles in the plane direction, the surface density of the particles can be made uniform, and very excellent conductivity can be obtained. In addition, the anisotropic conductive adhesive layer 42 is preferably such that the conductive particles 43 are segregated on the wiring board side in the thickness direction. For example, in the above-mentioned first embodiment, the conductive particles 43 in the anisotropic conductive adhesive layer 42 may be distributed on the side opposite to the surface of the rubber layer 41, and in the above-mentioned third embodiment, each The conductive particles 43 in the anisotropic conductive adhesive layer 42 are located on the surface side of the rubber layer 41 . Thereby, the capture property of the conductive particle between the electrode of a chip component and the electrode of a wiring board can be improved.

導電粒子43之粒徑並無特別限制,但粒徑之下限較佳為1 μm以上,例如自連接結構體中之導電粒子之捕捉效率之觀點而言,粒徑之上限例如較佳為50 μm以下,進而較佳為20 μm以下。再者,導電粒子之粒徑可設為藉由圖像型粒度分佈儀(作為一例為FPIA-3000:Malvern公司製造)所測定出之值。該個數為1000個以上,較佳為2000個以上。又,導電粒子之粒子面密度可根據晶片零件之電極面積等來決定,例如可設為500~140000 pcs/mm 2之範圍。 The particle size of the conductive particles 43 is not particularly limited, but the lower limit of the particle size is preferably 1 μm or more. For example, from the viewpoint of the capture efficiency of the conductive particles in the bonded structure, the upper limit of the particle size is preferably 50 μm, for example. Below, more preferably below 20 μm. In addition, the particle diameter of an electrically-conductive particle can be made into the value measured with the image type particle size distribution analyzer (FPIA-3000: Malvern company make as an example). The number is 1000 or more, preferably 2000 or more. Also, the surface density of the conductive particles can be determined according to the electrode area of the chip component, etc., and can be set in the range of 500 to 140000 pcs/mm 2 , for example.

各向異性導電接著層42較佳為由含有膜形成樹脂、熱硬化性樹脂及硬化劑之熱硬化型黏合劑所構成。作為熱硬化型黏合劑,並無特別限定,例如可例舉:包含環氧化合物及熱陰離子聚合起始劑之熱陰離子聚合型樹脂組成物、包含環氧化合物及熱陽離子聚合起始劑之熱陽離子聚合型樹脂組成物、包含(甲基)丙烯酸酯化合物及熱自由基聚合起始劑之熱自由基聚合型樹脂組成物等。再者,所謂(甲基)丙烯酸酯化合物,意指丙烯酸單體(低聚物)及甲基丙烯酸單體(低聚物)均包含在內。The anisotropic conductive adhesive layer 42 is preferably composed of a thermosetting adhesive containing a film-forming resin, a thermosetting resin, and a curing agent. The thermosetting adhesive is not particularly limited, for example, thermal anionic polymer resin composition containing epoxy compound and thermal anionic polymerization initiator, thermal anionic polymer resin composition containing epoxy compound and thermal cationic polymerization initiator Cationic polymerizable resin composition, thermal radical polymerizable resin composition containing (meth)acrylate compound and thermal radical polymerization initiator, etc. In addition, a (meth)acrylate compound means including both an acrylic monomer (oligomer) and a methacrylic monomer (oligomer).

該等熱硬化型黏合劑中,較佳者為熱硬化性樹脂包含環氧化合物且硬化劑為熱陽離子聚合起始劑。藉此,能夠抑制由雷射光所引起之硬化反應,並能夠藉由熱使其快速硬化。以下,作為具體例,舉出包含膜形成樹脂、環氧化合物及熱陽離子聚合起始劑之熱陽離子聚合型樹脂組成物為例進行說明。Among the thermosetting adhesives, it is preferable that the thermosetting resin contains epoxy compound and the curing agent is a thermal cationic polymerization initiator. Thereby, the hardening reaction by laser light can be suppressed, and it can harden rapidly by heat. Hereinafter, as a specific example, a thermal cationic polymerizable resin composition containing a film-forming resin, an epoxy compound, and a thermal cationic polymerizable initiator will be described as an example.

作為膜形成樹脂,例如相當於平均分子量為10000以上之高分子量樹脂,就膜形成性之觀點而言,較佳為10000~80000左右之平均分子量。作為膜形成樹脂,可例舉:苯氧基樹脂、聚酯樹脂、聚胺酯樹脂、聚酯胺酯樹脂、丙烯酸樹脂、聚醯亞胺樹脂、丁醛樹脂等各種樹脂,該等可單獨使用,亦可組合2種以上使用。其中,就膜形成狀態、連接可靠性等觀點而言,較佳為使用苯氧基樹脂。各向異性導電接著層中之膜形成樹脂之含量較佳為20~50 wt%,更佳為25~45 wt%,進而較佳為30~40 wt%。The film-forming resin is, for example, a high-molecular-weight resin corresponding to an average molecular weight of 10,000 or more, and preferably has an average molecular weight of about 10,000 to 80,000 from the viewpoint of film-forming properties. As the film forming resin, various resins such as phenoxy resins, polyester resins, polyurethane resins, polyester urethane resins, acrylic resins, polyimide resins, butyral resins, etc. may be used alone or Can be used in combination of 2 or more. Among these, it is preferable to use a phenoxy resin from the viewpoint of the film formation state, connection reliability, and the like. The content of the film-forming resin in the anisotropic conductive adhesive layer is preferably 20-50 wt%, more preferably 25-45 wt%, and still more preferably 30-40 wt%.

環氧化合物並無特別限定,只要為於分子內具有1個以上環氧基之環氧化合物即可,例如可為雙酚A型環氧樹脂、雙酚F型環氧樹脂等,亦可為聚胺酯改質之環氧樹脂。其中,可較佳地使用高純度雙酚A型環氧樹脂。作為高純度雙酚A型環氧樹脂之具體例,例如可例舉Mitsubishi Chemical Corporation製造之名為「YL980」之商品。各向異性導電接著層中之環氧化合物之含量較佳為10~55 wt%,更佳為15~50 wt%,進而較佳為20~45 wt%。The epoxy compound is not particularly limited, as long as it is an epoxy compound having more than one epoxy group in the molecule, for example, it can be bisphenol A type epoxy resin, bisphenol F type epoxy resin, etc., or it can be Polyurethane modified epoxy resin. Among them, high-purity bisphenol A type epoxy resin can be preferably used. As a specific example of the high-purity bisphenol A type epoxy resin, the product called "YL980" by Mitsubishi Chemical Corporation is mentioned, for example. The content of the epoxy compound in the anisotropic conductive adhesive layer is preferably 10-55 wt%, more preferably 15-50 wt%, and still more preferably 20-45 wt%.

作為熱陽離子聚合起始劑,可採用作為環氧化合物之熱陽離子聚合起始劑公知者,例如可使用藉由熱而產生能使陽離子聚合型化合物發生陽離子聚合之酸的公知之錪鹽、鋶鹽、鏻鹽、二茂鐵類等。其中,可較佳地使用對溫度表現出良好之潛在性之芳香族鋶鹽。作為芳香族鋶鹽系之聚合起始劑之具體例,例如可例舉三新化學工業股份有限公司製造之名為「SI-60L」之商品。各向異性導電接著層中之熱陽離子聚合起始劑之含量較佳為1~20 wt%,更佳為2~15 wt%,進而較佳為3~12 wt%。As the thermal cationic polymerization initiator, those known as thermal cationic polymerization initiators of epoxy compounds can be used, for example, known salts of iodonium and cerium that generate acids capable of cationic polymerizing cationic polymerizable compounds by heat can be used. Salts, phosphonium salts, ferrocenes, etc. Among them, aromatic cobaltium salts showing good potential to temperature can be preferably used. As a specific example of the polymerization initiator of the aromatic cobaltium salt system, for example, a product named "SI-60L" manufactured by Sanshin Chemical Industry Co., Ltd. may be mentioned. The content of the thermal cationic polymerization initiator in the anisotropic conductive adhesive layer is preferably 1-20 wt%, more preferably 2-15 wt%, further preferably 3-12 wt%.

再者,亦可視需要摻合無機填料、矽烷偶合劑、稀釋用單體、填充劑、軟化劑、著色劑、難燃化劑、觸變劑等作為熱硬化型黏合劑中摻合之其他添加物。Furthermore, inorganic fillers, silane coupling agents, diluting monomers, fillers, softeners, colorants, flame retardants, thixotropic agents, etc. can also be blended as other additions in thermosetting adhesives. thing.

作為無機填料,可使用二氧化矽(silica)、滑石、氧化鈦、碳酸鈣、氧化鎂等。無機填料可單獨使用,亦可併用2種以上。各向異性導電接著層中之無機填料之含量較佳為1~30 wt%,更佳為5~25 wt%,進而較佳為10~20 wt%。於併用2種以上無機填料之情形時,較佳為熱硬化型黏合劑中之無機填料之合計含量處於上述範圍內。As the inorganic filler, silica, talc, titanium oxide, calcium carbonate, magnesium oxide, and the like can be used. The inorganic fillers may be used alone or in combination of two or more. The content of the inorganic filler in the anisotropic conductive adhesive layer is preferably 1-30 wt%, more preferably 5-25 wt%, even more preferably 10-20 wt%. When two or more inorganic fillers are used in combination, it is preferable that the total content of the inorganic fillers in the thermosetting adhesive be within the above-mentioned range.

各向異性導電接著層42之厚度之下限例如可與導電粒子之粒徑相同,較佳者可設為導電粒徑之1.3倍以上或3 μm以上。又,連接膜之厚度之上限例如可設為20 μm以下或導電粒子之粒徑之2倍以下。又,連接膜亦可積層不含有導電粒子之接著劑層或黏著劑層,其層數或積層面可根據對象或目的適當地進行選擇。又,作為接著劑層或黏著劑層之絕緣性樹脂,可使用與連接膜相同者。膜厚可使用公知之測微計或數位厚度規進行測定。膜厚只要例如對10個部位以上進行測定並進行平均而求出即可。The lower limit of the thickness of the anisotropic conductive adhesive layer 42 can be the same as the particle diameter of the conductive particles, for example, preferably it can be set at 1.3 times or more than the diameter of the conductive particles or at least 3 μm. In addition, the upper limit of the thickness of the connection film can be set to, for example, 20 μm or less or twice the particle diameter of the conductive particles or less. In addition, the connection film may be laminated with an adhesive layer or an adhesive layer not containing conductive particles, and the number of layers or laminated layers may be appropriately selected according to the object or purpose. Moreover, as an insulating resin of an adhesive layer or an adhesive layer, the thing similar to that of a connection film can be used. The film thickness can be measured using a known micrometer or digital thickness gauge. The film thickness may be obtained by measuring, for example, at 10 or more locations and averaging them.

[變形例] 於第1構成例中,橡膠層較佳為於內部具有空隙,且較佳為網狀、突起狀等形狀。藉此,衝擊吸收性藉由空氣層而提昇,從而能夠提昇晶片零件之著落率。又,於晶片零件之連接時,晶片零件容易穿破橡膠層,因此能夠獲得優異之導通電阻。 [modified example] In the first configuration example, the rubber layer preferably has voids inside, and is preferably in a shape such as a mesh shape or a protrusion shape. Thereby, the shock absorbability is improved by the air layer, so that the dropping rate of the chip parts can be improved. In addition, when chip parts are connected, the chip parts are easy to break through the rubber layer, so excellent on-resistance can be obtained.

圖9(A)係表示藉由加工而於內部具有空隙之2片橡膠層之俯視圖,圖9(B)係示意性地表示連接膜之第2構成例之剖視圖。如圖9所示,作為第2構成例之連接膜80具有橡膠層81及含有導電粒子83之各向異性導電接著層82。橡膠層81係積層第1橡膠層81A及第2橡膠層81B而成,例如由網目形狀(網格型)所構成。第1橡膠層81A及第2橡膠層81B例如藉由使用複數個凸狀模具並使橡膠硬化,而於表面形成有複數個孔。又,橡膠層81亦可為例如多孔層而並非網格型。再者,各向異性導電接著層82與各向異性導電接著層42相同,因此省略說明。FIG. 9(A) is a plan view showing two rubber layers having voids inside by processing, and FIG. 9(B) is a cross-sectional view schematically showing a second configuration example of the connecting film. As shown in FIG. 9 , a connection film 80 as a second configuration example has a rubber layer 81 and an anisotropic conductive adhesive layer 82 containing conductive particles 83 . The rubber layer 81 is formed by laminating the first rubber layer 81A and the second rubber layer 81B, and is formed, for example, in a mesh shape (mesh shape). The first rubber layer 81A and the second rubber layer 81B have a plurality of holes formed on the surface, for example, by using a plurality of convex molds to harden the rubber. In addition, the rubber layer 81 can also be, for example, a porous layer instead of a mesh type. In addition, the anisotropic conductive adhesive layer 82 is the same as the anisotropic conductive adhesive layer 42 , so description thereof is omitted.

圖10係示意性地表示連接膜之第3構成例之剖視圖。如圖10所示,作為第3構成例之連接膜90具有橡膠層91及含有導電粒子93之各向異性導電接著層92。橡膠層91例如為突起形狀(突起型),例如藉由使用複數個凸狀模具並使橡膠硬化,而於表面形成有複數個孔。再者,各向異性導電接著層92與各向異性導電接著層42相同,因此省略說明。Fig. 10 is a cross-sectional view schematically showing a third configuration example of the connecting film. As shown in FIG. 10 , a connection film 90 as a third configuration example has a rubber layer 91 and an anisotropic conductive adhesive layer 92 containing conductive particles 93 . The rubber layer 91 has, for example, a protrusion shape (protrusion type), and for example, a plurality of holes are formed on the surface by hardening the rubber using a plurality of convex molds. In addition, the anisotropic conductive adhesive layer 92 is the same as the anisotropic conductive adhesive layer 42 , so description thereof is omitted.

藉由如變形例般橡膠層於內部具有空隙,衝擊吸收性提昇,從而能夠提昇晶片零件之著落率。又,橡膠層之穿破性提昇,從而能夠獲得優異之導通電阻。 實施例 Since the rubber layer has voids inside as in the modified example, the impact absorption property is improved, and the dropping rate of the chip parts can be improved. In addition, the penetration property of the rubber layer is improved, so that excellent conduction resistance can be obtained. Example

<3.實施例> 於實施例中,使設置於石英玻璃之晶片零件與設置於玻璃基板之連接膜對向,並自基材側照射雷射光而使晶片零件著落至連接膜上,對著落性進行評價。又,製作連接結構體,對導通性進行評價。再者,本技術並不限定於該等實施例。 <3. Example> In the examples, a wafer part provided on quartz glass was opposed to a bonding film provided on a glass substrate, and laser light was irradiated from the base material side to land the chip part on the bonding film to evaluate landing performance. Moreover, the connection structure was produced, and the conductivity was evaluated. Furthermore, the present technology is not limited to these embodiments.

[各向異性導電接著層之製作] 準備下述材料。 苯氧基樹脂(商品名:PKHH,巴化學工業股份有限公司製造) 高純度雙酚A型環氧樹脂(商品名:YL-980,Mitsubishi Chemical Corporation製造) 疏水性二氧化矽(商品名:RY200,NIPPON AEROSIL CO., LTD.製造) 陽離子聚合起始劑(商品名:SI-60L,三新化學工業股份有限公司製造) 導電粒子(平均粒徑為3 μm,樹脂芯金屬被覆微粒子,鍍Ni厚0.2 μm,積水化學工業股份有限公司製造) [Production of anisotropic conductive adhesive layer] Prepare the following materials. Phenoxy resin (trade name: PKHH, manufactured by Pakistan Chemical Industry Co., Ltd.) High-purity bisphenol A type epoxy resin (trade name: YL-980, manufactured by Mitsubishi Chemical Corporation) Hydrophobic silica (trade name: RY200, manufactured by NIPPON AEROSIL CO., LTD.) Cationic polymerization initiator (trade name: SI-60L, manufactured by Sanshin Chemical Industry Co., Ltd.) Conductive particles (average particle size 3 μm, resin core metal-coated fine particles, Ni-plated thickness 0.2 μm, manufactured by Sekisui Chemical Co., Ltd.)

如表2所示,摻合特定質量份之各材料,於厚度0.5 mm之玻璃基板上製作厚度6 μm之各向異性導電接著層。各向異性導電接著層係例如藉由日本專利第6187665號記載之方法,使導電粒子於黏合劑層之一面以粒子面密度成為58000 pcs/mm 2之方式整齊排列而成。 As shown in Table 2, specific mass parts of each material were mixed to form an anisotropic conductive adhesive layer with a thickness of 6 μm on a glass substrate with a thickness of 0.5 mm. The anisotropic conductive adhesive layer is formed, for example, by the method described in Japanese Patent No. 6187665, by aligning conductive particles on one side of the adhesive layer so that the surface density of the particles becomes 58000 pcs/mm 2 .

[表2] 材料 摻合量[質量份] 苯氧基樹脂 35 高純度雙酚A型環氧樹脂 40 疏水性二氧化矽 15 陽離子聚合起始劑 10 [Table 2] Material Blending amount [parts by mass] Phenoxy resin 35 High Purity Bisphenol A Type Epoxy Resin 40 Hydrophobic silica 15 cationic polymerization initiator 10

[晶片零件之著落性之評價] 使用雷射誘導正向轉移裝置(MT-30C200),使設置於石英玻璃之晶片零件著落至玻璃基板上之連接膜。晶片零件(外形為30×50 μm,厚度為5 μm,電極厚度為2 μm)係使用TEG(Test Element Group),於石英玻璃與晶片零件之間設置有釋放材(聚醯亞胺)。 [Evaluation of landing performance of chip parts] Using a laser-induced forward transfer device (MT-30C200), the wafer parts set on the quartz glass are dropped to the connecting film on the glass substrate. The chip part (30×50 μm in shape, 5 μm in thickness, and 2 μm in electrode thickness) uses TEG (Test Element Group), and a release material (polyimide) is set between the quartz glass and the chip part.

如上所述,雷射誘導正向轉移裝置具備:望遠鏡,其使自雷射裝置出射之脈衝雷射光成為平行光;整形光學系統,其將通過了望遠鏡之脈衝雷射光之空間強度分佈整形為均一分佈;光罩,其使經整形光學系統整形之脈衝雷射光以特定圖案通過;場透鏡,其位於整形光學系統與光罩之間;及投影透鏡,其將通過了光罩之圖案之雷射光縮小投影至供體基板;將作為供體基板之由釋放材保持有晶片零件之石英基板保持於供體載台,將作為受體基板之貼附有連接膜之玻璃基板保持於受體載台,將晶片零件與連接膜之間之距離設為100 μm。As mentioned above, the laser-induced forward transfer device includes: a telescope, which makes the pulsed laser light emitted from the laser device into parallel light; and a shaping optical system, which shapes the spatial intensity distribution of the pulsed laser light passing through the telescope to be uniform. distribution; a photomask, which passes the pulsed laser light shaped by the shaping optical system in a specific pattern; a field lens, which is located between the shaping optical system and the photomask; and a projection lens, which passes the laser light passing through the pattern of the photomask Reduce the projection to the donor substrate; hold the quartz substrate with the wafer parts held by the release material as the donor substrate on the donor stage, and hold the glass substrate attached with the connection film as the acceptor substrate on the acceptor stage , set the distance between the chip part and the connection film to 100 μm.

雷射裝置使用振盪波長設為248 nm之準分子雷射。雷射光之脈衝能量設為600 J,通量(fluence)設為150 J/cm 2,脈衝寬度(照射時間)設為30000微微秒,脈衝頻率設為0.01 kHz,照射脈衝數設為各ACF每1小片為1脈衝。照射至各向異性導電接著層與基材之界面之進行成像之雷射光之脈衝能量為0.001~2 J,通量(fluence)為0.001~2 J/cm 2,脈衝寬度(照射時間)為0.01~1×10 9微微秒,脈衝頻率為0.1~10000 Hz,照射脈衝數為1~30,000,000。 The laser device uses an excimer laser whose oscillation wavelength is set to 248 nm. The pulse energy of the laser light is set to 600 J, the flux (fluence) is set to 150 J/cm 2 , the pulse width (irradiation time) is set to 30000 picoseconds, the pulse frequency is set to 0.01 kHz, and the number of irradiation pulses is set to each ACF 1 small piece is 1 pulse. The pulse energy of the imaging laser light irradiated to the interface between the anisotropic conductive adhesive layer and the substrate is 0.001-2 J, the flux (fluence) is 0.001-2 J/cm 2 , and the pulse width (irradiation time) is 0.01 ~1×10 9 picoseconds, the pulse frequency is 0.1~10000 Hz, and the number of irradiation pulses is 1~30,000,000.

光罩使用以下圖案,該圖案以作為供體基板之石英玻璃與釋放材之交界面中之投影成為晶片零件之外形30×50 μm之方式,以特定間距形成有特定尺寸之窗之排列。The photomask uses a pattern in which windows of a specific size are arranged at a specific pitch in such a way that the projection on the interface between the quartz glass as the donor substrate and the release material becomes the outline of the wafer part 30×50 μm.

將合計100個晶片零件轉印至連接膜,藉由顯微鏡對正常著落至連接膜上之晶片零件之個數進行計數。正常著落之晶片零件之比率較理想為90%以上。A total of 100 chip components were transferred to the bonding film, and the number of chip components that normally landed on the bonding film was counted by a microscope. The ratio of normal landing chip parts is more than 90%.

[連接結構體之製作] 使晶片零件著落至配線基板之連接膜上,以溫度為170℃、壓力為10 MPa、時間為30 sec之條件進行熱壓接合,製作連接結構體。晶片零件(外形為50 μm×50 μm,厚度為150 μm)使用在晶片零件設置有一對電極(鍍Cr/Au凸塊(Cr/Au-plated bump),12 μm×12 μm)之TEG(Test Element Group)。配線基板使用玻璃基板(厚度為0.5 mm,Ti/Al/Ti圖案(Ti/Al/Ti pattern) 12 μm×12 μm)。 [Creation of connection structure] The chip parts were dropped on the connection film of the wiring board, and thermocompression bonding was carried out under the conditions of temperature of 170°C, pressure of 10 MPa, and time of 30 sec to produce a connection structure. Chip parts (outline 50 μm×50 μm, thickness 150 μm) use TEG (Test Element Group). A glass substrate (thickness 0.5 mm, Ti/Al/Ti pattern (Ti/Al/Ti pattern) 12 μm×12 μm) was used as the wiring substrate.

[導通性之評價] 使用配線基板側之導通配線,測定連接結構體之導通電阻。導通性之評價係根據電阻值作出下述A~D之判定。較理想為判定為C以上。 A:50 Ω以下 B:超過50 Ω且為100 Ω以下 C:超過100 Ω且為200 Ω以下 D:超過200 Ω [Evaluation of Continuity] The conduction resistance of the connection structure was measured using the conduction wiring on the wiring board side. The evaluation of continuity is based on the resistance value to make the following judgments from A to D. Desirably, it is judged to be C or higher. A: 50Ω or less B: More than 50 Ω and less than 100 Ω C: More than 100 Ω and less than 200 Ω D: more than 200Ω

[實施例1] 塗佈聚矽氧(商品名:STP-106T-UV,信越化學工業股份有限公司製造)後,進行UV(ultraviolet)硬化,製作厚度為1 μm之聚矽氧橡膠層。繼而,將厚度為1 μm之聚矽氧橡膠層貼合於厚度為6 μm之各向異性導電接著層之表面,製成連接膜。 [Example 1] After coating polysiloxane (trade name: STP-106T-UV, manufactured by Shin-Etsu Chemical Co., Ltd.), UV (ultraviolet) curing was performed to form a polysiloxane rubber layer with a thickness of 1 μm. Then, a polysiloxane rubber layer with a thickness of 1 μm was pasted on the surface of the anisotropic conductive adhesive layer with a thickness of 6 μm to form a connection film.

又,對於聚矽氧橡膠,依據JIS K 6253並使用硬度計A測定橡膠硬度(日本工業標準JIS-A硬度)。其結果,橡膠硬度為30。又,使用壓入試驗裝置(KLA公司製造之iMicro型奈米壓痕儀)對聚矽氧橡膠進行動態黏彈性試驗。使用直徑為100 μm之平沖頭,將目標壓入深度設為1 μm,對頻率1~200 Hz之範圍進行掃描,測定溫度30℃、頻率200 Hz之儲存模數。將樣品之泊松比設為0.5,算出各樣品之12個測定點數之平均值。其結果,儲存模數為27 MPa。In addition, the silicone rubber was measured in accordance with JIS K 6253 using a durometer A for rubber hardness (Japanese Industrial Standard JIS-A hardness). As a result, the rubber hardness was 30. Also, a dynamic viscoelasticity test was performed on the polysiloxane rubber using an indentation tester (iMicro-type nanoindenter manufactured by KLA Corporation). Use a flat punch with a diameter of 100 μm, set the target indentation depth to 1 μm, scan the frequency range from 1 to 200 Hz, and measure the storage modulus at a temperature of 30°C and a frequency of 200 Hz. The Poisson's ratio of the sample was set to 0.5, and the average value of 12 measurement points of each sample was calculated. As a result, the storage modulus was 27 MPa.

如表3所示,使晶片零件著落至連接膜之聚矽氧橡膠層上時之晶片著落率為98%。又,經由連接膜使晶片零件與配線基板熱壓接合而成之連接結構體之導通電阻之評價為「B」。As shown in Table 3, the chip landing rate when the chip parts were dropped on the silicone rubber layer of the bonding film was 98%. Moreover, the evaluation of the conduction resistance of the connection structure which thermocompression-bonded the chip component and the wiring board via the connection film was "B".

[實施例2] 除製作厚度為0.5 μm之聚矽氧橡膠層以外,與實施例1同樣地製作連接膜。 [Example 2] A connecting film was produced in the same manner as in Example 1 except that a silicone rubber layer having a thickness of 0.5 μm was produced.

如表3所示,使晶片零件著落至連接膜之聚矽氧橡膠層上時之晶片著落率為90%。又,經由連接膜使晶片零件與配線基板熱壓接合而成之連接結構體之導通電阻之評價為「A」。As shown in Table 3, the chip landing rate when the chip parts were dropped on the silicone rubber layer of the bonding film was 90%. Moreover, the evaluation of the conduction resistance of the connection structure which thermocompression-bonded the chip component and the wiring board via the connection film was "A".

[實施例3] 除製作厚度為2.0 μm之聚矽氧橡膠層以外,與實施例1同樣地製作連接膜。 [Example 3] A connecting film was produced in the same manner as in Example 1 except that a silicone rubber layer having a thickness of 2.0 μm was produced.

如表3所示,使晶片零件著落至連接膜之聚矽氧橡膠層上時之晶片著落率為100%。又,經由連接膜使晶片零件與配線基板熱壓接合而成之連接結構體之導通電阻之評價為「C」。As shown in Table 3, the drop rate of the chip when the chip part was dropped on the silicone rubber layer of the tie film was 100%. Also, the evaluation of the on-resistance of the bonded structure in which the chip component and the wiring board were bonded by thermocompression through the bond film was "C".

[實施例4] 將聚矽氧(商品名:STP-106T-UV,信越化學工業股份有限公司製造)塗佈厚度1 μm後,藉由凸型壓紋對複數個直徑為1 μm之孔進行加工,並進行UV(ultraviolet)硬化,製作聚矽氧橡膠層。繼而,以合計厚度成為2 μm之方式調整2片聚矽氧橡膠層並將其等貼合於厚度為6 μm之各向異性導電接著層之表面(網格型),製成連接膜。 [Example 4] After coating polysiloxane (trade name: STP-106T-UV, manufactured by Shin-Etsu Chemical Co., Ltd.) in a thickness of 1 μm, a plurality of holes with a diameter of 1 μm were processed by convex embossing, and UV (Ultraviolet) hardened to make a silicone rubber layer. Then, two silicone rubber layers were adjusted so that the total thickness became 2 μm, and they were bonded to the surface of the anisotropic conductive adhesive layer with a thickness of 6 μm (grid type) to form a connection film.

如表3所示,使晶片零件著落至連接膜之聚矽氧橡膠層上時之晶片著落率為100%。又,經由連接膜使晶片零件與配線基板熱壓接合而成之連接結構體之導通電阻之評價為「A」。As shown in Table 3, the drop rate of the chip when the chip part was dropped on the silicone rubber layer of the tie film was 100%. Moreover, the evaluation of the conduction resistance of the connection structure which thermocompression-bonded the chip component and the wiring board via the connection film was "A".

[實施例5] 將聚矽氧(商品名:STP-106T-UV,信越化學工業股份有限公司製造)塗佈為特定厚度後,藉由凸型壓紋對複數個直徑為1 μm之孔進行加工,並進行UV(ultraviolet)硬化,製作突起高度為1 μm以上且合計厚度為2 μm之聚矽氧橡膠層。繼而,將聚矽氧橡膠層貼合於厚度為6 μm之各向異性導電接著層之表面(突起型),製成連接膜。 [Example 5] Polysiloxane (trade name: STP-106T-UV, manufactured by Shin-Etsu Chemical Co., Ltd.) is coated to a specific thickness, and a plurality of holes with a diameter of 1 μm are processed by convex embossing, and UV is performed (ultraviolet) hardening to produce a silicone rubber layer with a protrusion height of 1 μm or more and a total thickness of 2 μm. Then, the polysiloxane rubber layer was pasted on the surface of the anisotropic conductive adhesive layer (protrusion type) with a thickness of 6 μm to form a connection film.

如表3所示,使晶片零件著落至連接膜之聚矽氧橡膠層上時之晶片著落率為100%。又,經由連接膜使晶片零件與配線基板熱壓接合而成之連接結構體之導通電阻之評價為「A」。As shown in Table 3, the drop rate of the chip when the chip part was dropped on the silicone rubber layer of the tie film was 100%. Moreover, the evaluation of the conduction resistance of the connection structure which thermocompression-bonded the chip component and the wiring board via the connection film was "A".

[比較例1] 不將聚矽氧橡膠層貼合於各向異性導電接著層之表面,而僅將厚度為6 μm之各向異性導電接著層作為連接膜。 [Comparative example 1] The polysiloxane rubber layer was not pasted on the surface of the anisotropic conductive adhesive layer, but only the anisotropic conductive adhesive layer with a thickness of 6 μm was used as a connecting film.

如表3所示,使晶片零件著落至各向異性導電接著層上時之晶片著落率為20%。又,經由連接膜使晶片零件與配線基板熱壓接合而成之連接結構體之導通電阻之評價為「A」。As shown in Table 3, the wafer landing rate when the wafer components were dropped on the anisotropic conductive adhesive layer was 20%. Moreover, the evaluation of the conduction resistance of the connection structure which thermocompression-bonded the chip component and the wiring board via the connection film was "A".

[比較例2] 相對於聚矽氧(商品名:STP-106T-UV,信越化學工業股份有限公司製造)80質量份,摻合導電粒子(平均粒徑為3 μm,樹脂芯金屬被覆微粒子,鍍Ni厚0.2 μm,積水化學工業股份有限公司製造)20質量份,塗佈於厚度為0.5 mm之玻璃基板上並進行UV硬化,製作厚度為6 μm之含有導電粒子之聚矽氧橡膠層,並將其作為連接膜。 [Comparative example 2] With respect to 80 parts by mass of polysiloxane (trade name: STP-106T-UV, manufactured by Shin-Etsu Chemical Co., Ltd.), conductive particles (average particle size 3 μm, resin core metal-coated fine particles, Ni plating thickness 0.2 μm) were mixed , manufactured by Sekisui Chemical Industry Co., Ltd.) 20 parts by mass, coated on a glass substrate with a thickness of 0.5 mm and subjected to UV curing to make a polysiloxane rubber layer containing conductive particles with a thickness of 6 μm, and use it as a connection membrane.

如表3所示,使晶片零件著落至含有導電粒子之聚矽氧橡膠層上時之晶片著落率為100%。又,經由連接膜使晶片零件與配線基板熱壓接合而成之連接結構體之導通電阻之評價為「D」。As shown in Table 3, the drop rate of the chip when the chip component was dropped on the silicone rubber layer containing conductive particles was 100%. Also, the evaluation of the on-resistance of the bonded structure in which the chip component and the wiring board were bonded by thermocompression through the bond film was "D".

[表3]    實施例1 實施例2 實施例3 實施例4 實施例5 比較例1 比較例2 膜形態 各向異性導電接著層+橡膠層 各向異性導電接著層+橡膠層 各向異性導電接著層+橡膠層 各向異性導電接著層+橡膠層(網格型) 各向異性導電接著層+橡膠層(突起型) 各向異性導電接著層 含有導電粒子之橡膠層 橡膠層厚度[μm] 1.0 0.5 2.0 2.0 2.0 0 0 晶片著落率[%] 98 90 100 100 100 20 100 導通電阻之評價 B A C A A A D [table 3] Example 1 Example 2 Example 3 Example 4 Example 5 Comparative example 1 Comparative example 2 membrane morphology Anisotropic conductive adhesive layer + rubber layer Anisotropic conductive adhesive layer + rubber layer Anisotropic conductive adhesive layer + rubber layer Anisotropic conductive adhesive layer + rubber layer (grid type) Anisotropic conductive adhesive layer + rubber layer (protrusion type) Anisotropic conductive adhesive layer Rubber layer containing conductive particles Rubber layer thickness [μm] 1.0 0.5 2.0 2.0 2.0 0 0 Wafer landing rate[%] 98 90 100 100 100 20 100 Evaluation of on-resistance B A C A A A D.

如表3所示,於比較例1中,於各向異性導電接著層上未設置聚矽氧橡膠層,因此晶片著落率較低。於比較例2中,連接膜為含有導電粒子之聚矽氧橡膠層,因此導通電阻之評價欠佳。As shown in Table 3, in Comparative Example 1, no polysiloxane rubber layer was provided on the anisotropic conductive adhesive layer, so the drop rate of the wafer was low. In Comparative Example 2, the connection film is a polysiloxane rubber layer containing conductive particles, so the evaluation of the on-resistance is not good.

另一方面,於實施例1~5中,於各向異性導電接著層上設置有聚矽氧橡膠層,因此能夠獲得較高之晶片著落率。又,於實施例4、5中,聚矽氧橡膠層為網格型、突起型等,於內部具有空隙,因此晶片零件容易穿破聚矽氧橡膠層,而能夠獲得良好之導通電阻之評價。On the other hand, in Examples 1-5, the polysiloxane rubber layer is provided on the anisotropic conductive adhesive layer, so a higher chip landing rate can be obtained. Also, in Examples 4 and 5, the polysiloxane rubber layer is grid-shaped, protruding, etc., and has voids inside, so chip parts can easily penetrate the polysiloxane rubber layer, and good evaluation of on-resistance can be obtained .

10:晶片零件基板 11:基材 12:釋放材 20:發光元件 21:本體 22:第1導電型電極 23:第2導電型電極 30:配線基板 31:基材 32:第1電極 33:第2電極 40:連接膜 41:橡膠層 42:各向異性導電接著層 50:連接膜 51:橡膠層 52:各向異性導電接著層 60:連接膜 61:橡膠層 62:各向異性導電接著層 70:連接膜 71:橡膠層 72:各向異性導電接著層 80:連接膜 81:橡膠層 82:各向異性導電接著層 83:導電粒子 90:連接膜 91:橡膠層 92:各向異性導電接著層 93:導電粒子 101:LED 102:轉印材 103:壓印材 104:面板基板 105:連接膜 111:LED 112:轉印材 113:釋放材 114:面板基板 115:連接膜 10: Chip parts substrate 11: Substrate 12: release material 20: Light emitting element 21: Ontology 22: The first conductivity type electrode 23: The second conductivity type electrode 30: Wiring substrate 31: Substrate 32: 1st electrode 33: 2nd electrode 40: Connecting Membrane 41: rubber layer 42: Anisotropic conductive adhesive layer 50: connecting membrane 51: rubber layer 52: Anisotropic conductive adhesive layer 60: Connecting membrane 61: rubber layer 62: Anisotropic conductive adhesive layer 70: Connecting Membrane 71: rubber layer 72: Anisotropic conductive adhesive layer 80: Connecting membrane 81: rubber layer 82: Anisotropic conductive adhesive layer 83: Conductive particles 90: Connecting Membrane 91: rubber layer 92: Anisotropic conductive adhesive layer 93: Conductive particles 101:LED 102: transfer printing material 103: Embossed material 104:Panel substrate 105: Connecting membrane 111:LED 112: transfer printing material 113: release material 114: Panel substrate 115: connecting membrane

[圖1]係示意性地表示設置於基材之發光元件與配線基板上之連接膜對向之狀態之剖視圖。 [圖2]係表示對向之發光元件與配線基板上之連接膜之放大圖。 [圖3]係示意性地表示自基板側照射雷射光,將發光元件轉印至配線基板之特定位置而使其排列後之狀態之剖視圖。 [圖4]係示意性地表示在配線基板安裝有發光元件之狀態之剖視圖。 [圖5]係示意性地表示設置於基材且於電極面具有橡膠層之發光元件與配線基板上之各向異性導電接著層對向之狀態之剖視圖。 [圖6]係示意性地表示設置於基材且於電極面具有連接膜之發光元件與配線基板對向之狀態之剖視圖。 [圖7]係示意性地表示設置於基材且於電極面具有各向異性導電接著層之發光元件與配線基板上之橡膠層對向之狀態之剖視圖。 [圖8]係示意性地表示連接膜之第1構成例之剖視圖。 [圖9](A)係表示藉由加工而於內部具有空隙之2片橡膠層之俯視圖,(B)係示意性地表示連接膜之第2構成例之剖視圖。 [圖10]係示意性地表示連接膜之第3構成例之剖視圖。 [圖11]係示意性地表示壓印方式之質量轉移之圖。 [圖12]係示意性地表示雷射方式之質量轉移之圖。 [ Fig. 1 ] is a cross-sectional view schematically showing a state where a light-emitting element provided on a base and a connection film on a wiring board face each other. [FIG. 2] It is an enlarged view showing the connection film on the facing light-emitting element and the wiring board. [ Fig. 3 ] is a cross-sectional view schematically showing a state where laser light is irradiated from the substrate side, and light-emitting elements are transferred to specific positions on the wiring board and arranged. [ Fig. 4 ] is a cross-sectional view schematically showing a state in which a light-emitting element is mounted on a wiring board. [ Fig. 5 ] is a cross-sectional view schematically showing a state in which a light-emitting element provided on a base material and having a rubber layer on an electrode surface and an anisotropic conductive adhesive layer on a wiring board face each other. [ Fig. 6] Fig. 6 is a cross-sectional view schematically showing a state in which a light-emitting element provided on a substrate and having a connection film on an electrode surface faces a wiring board. [ Fig. 7 ] is a cross-sectional view schematically showing a state in which a light-emitting element provided on a substrate and having an anisotropic conductive adhesive layer on an electrode surface faces a rubber layer on a wiring board. [ Fig. 8 ] is a cross-sectional view schematically showing a first configuration example of a connecting film. [ Fig. 9 ] (A) is a plan view showing two rubber layers having voids inside by processing, and (B) is a cross-sectional view schematically showing a second configuration example of the connecting film. [ Fig. 10 ] is a cross-sectional view schematically showing a third configuration example of the connecting film. [ Fig. 11 ] is a diagram schematically showing mass transfer in the imprint method. [ Fig. 12 ] is a diagram schematically showing mass transfer by a laser method.

10:晶片零件基板 10: Chip parts substrate

11:基材 11: Substrate

12:釋放材 12: release material

20:發光元件 20: Light emitting element

21:本體 21: Ontology

22:第1導電型電極 22: The first conductivity type electrode

23:第2導電型電極 23: The second conductivity type electrode

30:配線基板 30: Wiring substrate

31:基材 31: Substrate

32:第1電極 32: 1st electrode

33:第2電極 33: 2nd electrode

40:連接膜 40: Connecting Membrane

41:橡膠層 41: rubber layer

42:各向異性導電接著層 42: Anisotropic conductive adhesive layer

43:導電粒子 43: Conductive particles

Claims (19)

一種連接結構體之製造方法,其具有以下步驟:著落步驟,其使設置於對雷射光具有穿透性之基材之晶片零件與配線基板對向,並自上述基材側照射雷射光而使上述晶片零件著落至上述配線基板側;以及 連接步驟,其使上述晶片零件與上述配線基板經由連接膜而連接; 上述連接膜具有橡膠層及接著層,且 於上述著落步驟中,上述連接膜配置於上述配線基板之電極面,使上述橡膠層與上述晶片零件之電極面碰撞。 A method for manufacturing a bonded structure, comprising the following steps: a landing step, which makes a chip component provided on a base material transparent to laser light and a wiring board face each other, and irradiates laser light from the side of the base material. The above-mentioned chip component lands on the above-mentioned wiring board side; and a connecting step of connecting the above-mentioned chip component and the above-mentioned wiring board via a connection film; The connecting film has a rubber layer and an adhesive layer, and In the landing step, the connection film is arranged on the electrode surface of the wiring board so that the rubber layer collides with the electrode surface of the chip component. 一種連接結構體之製造方法,其具有以下步驟:著落步驟,其使設置於對雷射光具有穿透性之基材之晶片零件與配線基板對向,並自上述基材側照射雷射光而使上述晶片零件著落至上述配線基板側;以及  連接步驟,其使上述晶片零件與上述配線基板經由連接膜而連接; 上述連接膜具有接著層, 上述晶片零件於電極面具有橡膠層,且 於上述著落步驟中,上述連接膜配置於上述配線基板之電極面,使上述接著層與上述晶片零件之橡膠層碰撞。 A method for manufacturing a bonded structure, comprising the following steps: a landing step, which makes a chip component provided on a base material transparent to laser light and a wiring board face each other, and irradiates laser light from the side of the base material. The above-mentioned chip component is landed on the above-mentioned wiring substrate side; and a connecting step of connecting the above-mentioned chip component and the above-mentioned wiring substrate via a connection film; The above connecting film has an adhesive layer, The above chip part has a rubber layer on the electrode surface, and In the landing step, the connection film is arranged on the electrode surface of the wiring board so that the adhesive layer collides with the rubber layer of the chip component. 一種連接結構體之製造方法,其具有以下步驟:著落步驟,其使設置於對雷射光具有穿透性之基材之晶片零件與配線基板對向,並自上述基材側照射雷射光而使上述晶片零件著落至上述配線基板側;以及 連接步驟,其使上述晶片零件與上述配線基板經由連接膜而連接; 上述連接膜具有橡膠層及接著層,且 於上述著落步驟中,上述連接膜配置於上述晶片零件之電極面,使上述橡膠層與上述配線基板之電極面碰撞。 A method for manufacturing a bonded structure, comprising the following steps: a landing step, which makes a chip component provided on a base material transparent to laser light and a wiring board face each other, and irradiates laser light from the side of the base material. The above-mentioned chip component lands on the above-mentioned wiring board side; and a connecting step of connecting the above-mentioned chip component and the above-mentioned wiring board via a connection film; The connecting film has a rubber layer and an adhesive layer, and In the landing step, the connection film is arranged on the electrode surface of the chip component so that the rubber layer collides with the electrode surface of the wiring board. 一種連接結構體之製造方法,其具有以下步驟:著落步驟,其使設置於對雷射光具有穿透性之基材之晶片零件與配線基板對向,並自上述基材側照射雷射光而使上述晶片零件著落至上述配線基板側;以及 連接步驟,其使上述晶片零件與上述配線基板經由連接膜而連接; 上述連接膜具有接著層, 上述配線基板於電極面具有橡膠層,且 於上述著落步驟中,上述連接膜配置於上述晶片零件之電極面,使上述接著層與上述配線基板之橡膠層碰撞。 A method for manufacturing a bonded structure, comprising the following steps: a landing step, which makes a chip component provided on a base material transparent to laser light and a wiring board face each other, and irradiates laser light from the side of the base material. The above-mentioned chip component lands on the above-mentioned wiring board side; and a connecting step of connecting the above-mentioned chip component and the above-mentioned wiring board via a connection film; The above connecting film has an adhesive layer, The above wiring board has a rubber layer on the electrode surface, and In the landing step, the connection film is arranged on the electrode surface of the chip component so that the adhesive layer collides with the rubber layer of the wiring board. 如請求項1至4中任一項之連接結構體之製造方法,其中,上述橡膠層為選自丙烯酸橡膠、聚矽氧橡膠中之1種以上。The method for manufacturing a bonded structure according to any one of claims 1 to 4, wherein the rubber layer is one or more selected from acrylic rubber and silicone rubber. 如請求項1至5中任一項之連接結構體之製造方法,其中,上述橡膠層之厚度為0.5 μm以上3.0 μm以下。The method for manufacturing a bonded structure according to any one of claims 1 to 5, wherein the rubber layer has a thickness of not less than 0.5 μm and not more than 3.0 μm. 如請求項1至6中任一項之連接結構體之製造方法,其中,上述橡膠層於內部具有空隙。The method for manufacturing a bonded structure according to any one of claims 1 to 6, wherein the rubber layer has voids inside. 如請求項1至7中任一項之連接結構體之製造方法,其中,上述橡膠層之硬度計A硬度為20~40,且使用壓入試驗裝置之動態黏彈性試驗之溫度30℃、頻率200 Hz之儲存模數為60 MPa以下。The method for manufacturing a connected structure according to any one of Claims 1 to 7, wherein the durometer A hardness of the above-mentioned rubber layer is 20 to 40, and the temperature and frequency of the dynamic viscoelasticity test using an indentation test device are 30°C The storage modulus at 200 Hz is below 60 MPa. 如請求項1至8中任一項之連接結構體之製造方法,其中,上述接著層含有膜形成樹脂、熱硬化性樹脂、及硬化劑。The method of manufacturing a bonded structure according to any one of claims 1 to 8, wherein the adhesive layer contains a film-forming resin, a thermosetting resin, and a curing agent. 如請求項1至9中任一項之連接結構體之製造方法,其中,上述接著層含有導電粒子。The method of manufacturing a bonded structure according to any one of claims 1 to 9, wherein the adhesive layer contains conductive particles. 如請求項10之連接結構體之製造方法,其中,上述接著層係使上述導電粒子整齊排列於面方向而構成。The method of manufacturing a bonded structure according to claim 10, wherein the bonding layer is formed by aligning the conductive particles in a plane direction. 如請求項1至11中任一項之連接結構體之製造方法,其中,上述晶片零件為發光元件。The method of manufacturing a bonded structure according to any one of Claims 1 to 11, wherein the chip component is a light emitting element. 一種連接膜,其具有橡膠層及接著層,且 上述橡膠層之厚度為0.5 μm以上3.0 μm以下。 A connecting film having a rubber layer and an adhesive layer, and The thickness of the rubber layer is not less than 0.5 μm and not more than 3.0 μm. 如請求項13之連接膜,其中,上述橡膠層為選自丙烯酸橡膠、聚矽氧橡膠中之1種以上。The connecting film according to claim 13, wherein the rubber layer is one or more selected from acrylic rubber and polysiloxane rubber. 如請求項13或14之連接膜,其中,上述橡膠層於內部具有空隙。The connecting film according to claim 13 or 14, wherein the rubber layer has voids inside. 如請求項13至15中任一項之連接膜,其中,上述橡膠層之硬度計A硬度為20~40,且使用壓入試驗裝置之動態黏彈性試驗之溫度30℃、頻率200 Hz之儲存模數為60 MPa以下。The connecting film according to any one of claims 13 to 15, wherein the durometer A hardness of the rubber layer is 20 to 40, and the temperature of the dynamic viscoelasticity test using the intrusion test device is 30°C and the frequency is 200 Hz. The modulus is below 60 MPa. 如請求項13至16中任一項之連接膜,其中,上述接著層含有膜形成樹脂、熱硬化性樹脂、及硬化劑。The connecting film according to any one of claims 13 to 16, wherein the adhesive layer contains a film-forming resin, a thermosetting resin, and a curing agent. 如請求項13至17中任一項之連接膜,其中,上述接著層含有導電粒子。The connection film according to any one of claims 13 to 17, wherein the adhesive layer contains conductive particles. 如請求項18之連接膜,其中,上述接著層係使上述導電粒子整齊排列於面方向而構成。The connection film according to claim 18, wherein the above-mentioned adhesive layer is formed by aligning the above-mentioned conductive particles in the plane direction.
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