TW202249399A - Multi-output switched-mode power supply for multi-cell-in-series battery charging - Google Patents

Abstract

Methods and apparatus for converting power using a multi-output switched-mode power supply (SMPS) coupled to a multi-cell-in-series battery, such as charging a two-cell-in-series (2S) battery using a dual-output three-level buck converter coupled thereto, or using a multi-input SMPS circuit receiving power from a multi-cell-in-series battery. One example power supply circuit generally includes a switched-mode power supply circuit having an input node and an output node, a battery comprising multiple cells connected in series, a charge pump circuit having a first terminal and a second terminal, the second terminal of the charge pump circuit being coupled to the battery, a first switch coupled between the output node of the switched-mode power supply circuit and the first terminal of the charge pump circuit, and a second switch coupled between the output node of the switched-mode power supply circuit and the second terminal of the charge pump circuit.

Description

Multi-Output Switch-Mode Power Supply for Multi-Cell Series Battery Charging

This patent application claims priority to U.S. Application Serial No. 17/448,306, filed September 21, 2021, and entitled "Multi-Output Switched-Mode Power Supply for Multi-Cell-in-Series Battery Charging" , which claims the benefit of U.S. Provisional Application Serial No. 63/139,257, filed January 19, 2021, and entitled "Multi-Output Switched-Mode Power Supply for Multi-Cell-in-Series Battery Charging" and priority, both of which are expressly incorporated herein by reference in their entirety as if fully set forth below and for all applicable purposes.

Certain aspects of this disclosure relate generally to electronic circuits and, more particularly, to methods and apparatus for converting electrical power using a multi-output switched-mode power supply (SMPS) coupled to a multi-cell series battery.

Ideally, a voltage regulator provides a constant direct current (DC) output voltage regardless of changes in load current or input voltage. Voltage regulators can be classified as linear regulators or switching regulators. Although linear regulators tend to be relatively compact, many applications can benefit from the improved efficiency of switching regulators. For example, a linear regulator can be implemented by a low dropout (LDO) regulator. Switching regulators (also known as "switching converters" or "switchers") can be made, for example, from switch-mode power supplies (SMPS) such as buck converters, boost converters, step-down voltage-boost converter or charge pump).

For example, a buck converter is a type of SMPS that typically includes: (1) a high-side switch coupled between a relatively higher voltage rail and a switch node, (2) a switch node coupled between a relatively lower voltage rail , (3) and an inductor coupled between the switch node and the load (eg, represented by a shunt capacitive element). The high-side and low-side switches are typically implemented with transistors, but the low-side switch may alternatively be implemented with diodes.

A charge pump is a type of SMPS that typically includes at least one switching element to control the connection of a supply voltage across a load via a capacitor. For example, in a voltage doubler (also known as a "multiply-by-two (X2) charge pump"), the capacitor of the charge pump circuit can initially be connected across the supply, charging the capacitor to the supply voltage. The charge pump circuit can then be reconfigured to connect a capacitor in series with the supply and load, doubling the voltage across the load. This two-stage cycle is repeated at the switching frequency used for the charge pump. Charge pumps can be used to multiply or divide voltages by integer or fractional quantities, depending on the circuit topology.

Power management integrated circuits (power management ICs or PMICs) are used to manage the power configuration of the host system and may include and/or control one or more voltage regulators (eg, buck converters or charge pumps). PMICs can be used in battery-operated devices, such as mobile phones, tablets, laptops, wearables, etc., to control the flow and direction of electrical power in the device. The PMIC can perform various functions for the device, such as DC-to-DC conversion (eg, using a voltage regulator as described above), battery charging, power supply selection, voltage scaling, power sequencing, and the like.

The systems, methods, and apparatus of the subject matter each have several aspects, no single aspect of which is solely responsible for its desirable attributes. Without limiting the scope of the present case as expressed via the claims that follow, some features are briefly discussed below. After considering this discussion, and particularly after reading the section entitled "Detailed Description" one skilled in the art will understand how the features of the present disclosure provide the advantages described herein.

Certain aspects of this case generally relate to a multi-output switched-mode power supply (SMPS) circuit coupled to a multi-cell series battery, such as a dual-output 3-level buck converter coupled to a two-cell series (2S) battery. Such a circuit could instead be run in reverse as a multi-input SMPS circuit to receive power from a multi-cell series battery, such as a 2S battery coupled to a dual-input two-level boost converter.

Certain aspects of the content of this case relate to power circuits. A power supply circuit generally includes: a switched mode power supply circuit having an input node and an output node; a battery comprising a plurality of cells connected in series; a charge pump circuit having a first terminal and a second terminal, the second terminal of the charge pump circuit being coupled to the battery a first switch coupled between the output node of the switch mode power supply circuit and the first terminal of the charge pump circuit; and a second switch coupled between the output node of the switch mode power supply circuit and the second terminal of the charge pump circuit.

Certain aspects of the present disclosure provide a power management integrated circuit (PMIC) that includes at least a portion of the power circuit described above.

Certain aspects of the present disclosure provide a battery charging circuit that includes the power supply circuit described above.

Certain aspects of the content of this case relate to a power circuit. The power supply circuit generally includes: a switch mode power supply circuit having an input node and an output node; a charge pump circuit having a first terminal and a second terminal; a first switch; and a second switch coupled between the output node of the switch mode power supply circuit and the second terminal of the charge pump circuit.

Certain aspects of the case relate to a method of supplying electricity. The method generally includes the steps of: operating a switch mode power supply circuit; and selectively routing current through a first switch coupled between a first node of the switch mode power supply circuit and a first terminal of the charge pump circuit or by coupling in a switch mode A second switch between the first node of the power supply circuit and the second terminal of the charge pump circuit.

To the accomplishment of the foregoing and related ends, one or more aspects include the features hereinafter fully described and particularly pointed out in the claims. The following description and the annexed drawings set forth certain illustrative features of one or more aspects in detail. These features are indicative, however, of but a few of the various ways in which the principles of the various aspects may be employed.

Certain aspects of the subject matter provide techniques and apparatus for converting power using a multi-output switched-mode power supply (SMPS) coupled to a multi-cell series battery, such as using a dual-output three-cell coupled to a two-cell series (2S) battery. level buck converter to charge two cells in series (2S) batteries. Such a power supply circuit may instead operate in reverse as a multi-input SMPS circuit to receive power from a multi-cell series battery, such as a dual-input two-level boost converter charging another device from a 2S battery.

Various aspects of the content of the present case are more fully described below with reference to the accompanying drawings. This disclosure may, however, be embodied in many different forms and should not be construed as limited to any specific structure or function presented throughout this disclosure. More precisely, providing such aspects makes the content of this case thorough and complete, and fully conveys the scope of the content of this case to those skilled in this technology. Based on the teachings herein, those skilled in the art should be aware that the scope of this disclosure is intended to cover any aspect of the disclosure disclosed herein, whether implemented independently or in combination with any other aspect of this disclosure. Achieved. For example, an apparatus may be implemented or a method may be implemented using any number of aspects set forth herein. In addition, the scope of the subject matter is intended to cover any other structure, function, or structure and function other than or different from the aspects of the subject matter set forth herein. device or method. It should be understood that any aspect of the disclosure disclosed herein may be embodied by one or more elements of a claim.

The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any aspect described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other aspects.

As used herein, the term "connected with" in the various tenses of the verb "to connect" may mean that element A is directly connected to element B , or that other elements may be connected between elements A and B (i.e. , element A is indirectly connected to element B ). In the context of electronic components, the term "connected with" may also be used herein to mean a wire, trace, or other conductive material used to electrically connect components A and B (and any components electrically connected therebetween ). exemplary device

It should be appreciated that aspects of the present disclosure may be used in a variety of applications. Although the disclosure is not limited in this regard, the circuits disclosed herein may be used in any of a variety of suitable devices, such as in communication systems, video transcoders, audio equipment (such as music players and microphones), television computer, camera equipment, and test equipment such as oscilloscopes in power supplies, battery charging circuits, or power management circuits. By way of example only, communication systems intended to be included within the scope of this case include cellular radiotelephone communication systems, satellite communication systems, two-way radio communication systems, one-way pagers, two-way pagers, personal communication systems (PCS), Personal Digital Assistant (PDA), etc.

FIG. 1 illustrates an example device 100 in which aspects of the present disclosure may be implemented. Device 100 may be a battery operated device such as a cellular phone, PDA, handheld device, wireless device, laptop computer, tablet device, smartphone, wearable device, and the like.

Device 100 may include a processor 104 that controls the operation of device 100 . The processor 104 may also be referred to as a central processing unit (CPU). Memory 106 , which may include both read only memory (ROM) and random access memory (RAM), provides instructions and data to processor 104 . A portion of memory 106 may also include non-volatile random access memory (NVRAM). Processor 104 typically performs logical and arithmetic operations based on program instructions stored in memory 106 .

In some aspects, device 100 may also include housing 108, which may include transmitter 110 and receiver 112 to allow transmission and reception of data between device 100 and a remote location. For some aspects, transmitter 110 and receiver 112 may be combined into transceiver 114 . One or more antennas 116 may be attached to or otherwise coupled to housing 108 and electrically connected to transceiver 114 . The device 100 may also include (not shown) multiple transmitters, multiple receivers and/or multiple transceivers.

The device 100 may also include a signal detector 118 that may be used in an attempt to detect and quantify the level of the signal received by the transceiver 114 . The signal detector 118 can detect such signal parameters as total energy, energy per symbol and per carrier, power spectral density, and so on. Device 100 may also include a digital signal processor (DSP) 120 for processing signals.

Device 100 may also include a battery 122, which may be used to power various elements of device 100 (eg, when another power source, such as a wall adapter or wireless power charger, is not available). The battery 122 may include a single cell or a plurality of cells connected in series. Device 100 may also include a power management system 123 for managing power from battery 122 , wall adapter and/or wireless power charger to various components of device 100 . The power management system 123 may perform various functions for the device, such as DC-to-DC conversion, battery charging, power source selection, voltage scaling, power sequencing, and the like. In some aspects, the power management system 123 may include a power management integrated circuit (power management IC or PMIC) 124 and one or more power circuits (such as a battery charger 125 ) that may be controlled by the PMIC. For some aspects, at least a portion of one or more of the power circuits may be integrated in the PMIC 124 . PMIC 124 and/or one or more power supply circuits may comprise at least a portion of a switched-mode power supply (SMPS) circuit, which may be implemented by any of a variety of suitable SMPS circuit topologies, such as buck converters, buck-boost voltage converters, three-level buck converters, or charge pumps such as multiply-by-two (X2) or multiply-by-three (X3) charge pumps.

Various components of device 100 may be coupled together via bus system 126 , which may include power bus, control signal bus, and/or status signal bus in addition to data bus. Exemplary Multi-Cell Series Battery Charging Scheme

Battery charging systems (eg, battery charger 125 in FIG. 1 ) are trending toward higher charging currents, which has resulted in a need for higher efficiency converters that can operate over a wider battery voltage range. To reduce thermal issues and/or conserve power, it may be desirable to operate such battery charging systems at a higher efficiency.

In an exemplary parallel charging solution, the main charger is implemented based on a buck converter topology. A master charger can charge a battery (eg, battery 122 ) and provide power by itself, or can be connected in parallel with one or more slave chargers. For example, each of the slave chargers can be implemented as a switched capacitor converter (e.g., a divide-by-two (Div2) charge pump) or a switched-mode power supply (SMPS) topology using an inductor (e.g., a buck converter device). Charge pump converters can provide a more efficient alternative to buck converters.

Charging a two-cell series (2S) battery with the same charge current will store twice the power in the battery, providing twice the charge rate, compared to charging a single-cell (1S) battery. For example, a power system for charging a 2S battery may include a buck converter followed by a boost converter, or a buck converter followed by a charge pump capable of multiplying the voltage by 2 (X2). The X2 charge pump may also be able to divide by 2 (Div2) when discharging a 2S battery in the opposite direction (ie reverse). Therefore, a battery charging circuit with this multiply-by-two and divide-by-two charge pump capability can be referred to as an "X2/D2" circuit.

2A is a block diagram of an exemplary power supply circuit 200 with a single output SMPS 210 and a charge pump 214 (eg, an X2/D2 charge pump) for charging a multi-cell battery 230 (eg, a 2S battery). Although the charge pump 214 is generally described herein using the example of an X2/D2 charge pump, it is understood that the charge pump can be implemented with other configurations, such as an X3/D3 charge pump. Power for the charge pump 214 may come from a first power supply node 213 (labeled "V _BAT1 "), which may come from the SMPS 210 (e.g., in a power management circuit such as the PMIC 124)), or from a second power supply Node 215 (labeled “V _BAT2 ”) (which may come from battery 230 ). As shown in FIG. 2A , battery 230 may be charged from one of multiple potential sources to have V _BAT2 =6 to 9 V, such as a wall adapter or other power cable connected via port 202 (e.g. , Universal Serial Bus (USB) adapter 201), or a wireless power charger (not shown) that is inductively coupled to the wireless power loop 205 connected to the wireless power transceiver 204 (which has an exemplary 5 to 20 V power range). For example, USB power supply can use USB standard downstream port, charging downstream port or dedicated charging port (SDP/CDP/DCP) or USB Type-C to supply a voltage V _USB of 5 V, using Quick Charge (QC) 2.0/3.0/4.0 to supply a voltage V _USB of 9 to 12 V, or to supply a voltage V _USB of 15 to 20 V using a USB Power Delivery (PD) adapter. For example, a wireless (WLS) source in transmit mode (Tx) can utilize the Qi Baseline Power Profile (BPP) to supply a voltage V _WLS of 5 V and the Qi Extended Power Profile (EPP) to supply a voltage V _WLS of 15 V, Or use other modes to supply a voltage V _WLS of 20 V.

SMPS 210 may include any of a variety of suitable switching converters, such as a two-level buck converter or a three-level buck converter. In order to realize the three-bit quasi-buck converter topology, as shown in FIG. 2A, the SMPS 210 may include a first transistor Q1, a second transistor Q2, a third transistor Q3, a fourth transistor Q4, a flying capacitor element C _FLY , inductive element L1 and parallel capacitive element C _OUT . Transistor Q2 may be coupled to transistor Q1 via a first node (labeled "CFH" for the flying capacitor high node), and transistor Q3 may be coupled via a second node (labeled "VSW" for the voltage switch node ) is coupled to transistor Q2, and transistor Q4 may be coupled to transistor Q3 via a third node (labeled "CFL" for the flying capacitor low level node). For some aspects, transistors Q1 - Q4 may be implemented as n-type metal oxide semiconductor (NMOS) transistors, as shown in FIG. 2A . In this case, the drain of transistor Q2 can be coupled to the source of transistor Q1, the drain of transistor Q3 can be coupled to the source of transistor Q2, and the drain of transistor Q4 can be coupled to transistor Q2. Source of Q3. The source of transistor Q4 may be coupled to a reference potential node (eg, electrical ground) for power supply circuit 200 . The flying capacitive element C _FLY may have a first terminal coupled to the first node and a second terminal coupled to the third node. Inductive element L1 may have a first terminal coupled to a second node and a second terminal coupled to an output voltage node (labeled “V _PH1 ”).

Certain aspects may include an optional transistor (labeled "QBAT1") disposed between the V _PH1 node and the first power supply node (V _BAT1 ). As shown, transistor QBAT1 may be implemented by an NMOS transistor and may be used to control current and/or protect one or more components in power supply circuit 200 .

Control logic (not shown, but for some aspects, may be integrated in the PMIC) may control the operation of the power circuit 200 . For example, control logic may control the operation of transistors Q1 - Q4 via output signals to inputs of respective gate drivers 206 ₁ - 206 ₄ (collectively referred to as “gate drivers 206 ”). The output of gate driver 206 is coupled to the respective gates of transistors Q1-Q4. During operation of the power supply circuit 200, the control logic may cycle through four different phases, which may differ depending on whether the duty cycle is less than 50% or greater than 50%.

The operation of a three-level buck converter with a duty cycle of less than 50% is first described. In a first phase (referred to as the "charge phase"), transistors Q1 and Q3 are enabled and transistors Q2 and Q4 are disabled to charge the flying capacitive element C _FLY and energize the inductive element L1 . In the second phase (referred to as the "hold phase"), transistor Q1 is disabled and transistor Q4 is enabled such that the VSW node is connected to the reference potential node and the flying capacitive element C _FLY is disconnected (eg, One of the C _FLY terminals is floating), and the inductive element L1 is de-energized. In a third phase (referred to as the "discharge phase"), transistors Q2 and Q4 are enabled and transistor Q3 is disabled to discharge the flying capacitive element C _FLY and energize the inductive element L1 . In the fourth phase (also called "hold phase"), transistor Q3 is enabled and transistor Q2 is disabled, so that the flying capacitor C _FLY is turned off and the inductance L1 is de-energized.

With the same transistor configuration, the operation of a three-level buck converter with a duty cycle greater than 50% is similar in the first and third phases. However, in a second phase (referred to as the "hold phase") following the first phase, transistor Q3 is disabled and transistor Q2 is enabled such that the VSW node is coupled to the input voltage node of the SMPS 210 (labeled is "MID"), the flying capacitive element C _FLY is disconnected, and the inductive element L1 is energized. Similarly, in the fourth phase (also referred to as the "hold phase"), transistor Q1 is enabled and transistor Q4 is disabled such that the flying capacitive element C _FLY is disconnected and the inductive element L1 is energized .

During battery charging, the SMPS 210 can convert an input voltage of a 5 to 20 V power supply at the input node to, for example, a range of 3 to 4.5 V at the SMPS output node (labeled “V _PH1 ”). The charge pump 214 can then double this voltage to the 6 to 9 V range (for the X2/D2 charge pump) to charge the battery 230 . During battery discharge (e.g., when no external power adapter or wireless power input is available, such as when battery 122 is powering device 100), SMPS 210 may be disabled and charge pump 214 may operate in Div2 mode, to provide V _PH1 =3 to 4.5 V for the system load (labeled as “V _PH1 load”). For some aspects, the SMPS 210 can also operate in reverse as a (two-level) boost converter to supply power from the battery 230 to the USB port 202 and/or the wireless power loop 205 in reverse charge mode (e.g. , supply 5 V to V _USB in USB portable (OTG), or 10 V to V _WLS for reverse WLS charging).

The power circuit architecture in FIG. 2A provides flexibility for 1S battery charging (eg, without or with charge pump 214 disabled) or for 2S battery charging (eg, with or with X2/D2 charge pump enabled). Implementing the SMPS 210 as a three-level buck converter halves the amplitude of the switch node (labeled "VSW") and doubles the effective switching frequency compared to a two-level buck converter, allowing the use of Inductors with less inductance and thus provide lower direct current resistance (DCR) and higher efficiency. This architecture provides good efficiency for an output voltage V _PH1 of 3 to 4.5 V (at or near 50% duty cycle) with an input voltage of 5 to 9 V (at the MID node), However, lower efficiency is possible with an input voltage of 15 to 20 V. For example, with an input voltage of 15 to 20 V at the MID node and an output voltage of 4 to 4.5 V at the V _PH1 node, a 3-bit quasi-buck converter can operate at a duty cycle of 20-30%, where Lifting results in higher inductor current ripple (as shown in graph 300 of FIG. 3 compared to a 50% duty cycle) and lower efficiency. There may also be a 1 to 2% efficiency loss through the charge pump 214 when operating in X2 mode.

For some aspects, an optional shunt charger 216 (e.g., _Div2 charge pump) can be enabled in some cases (e.g., with an input voltage of 15 to 20 V) The USB input node (labeled "USB_IN") or the wireless power input node at V _WLS (labeled "WLS_IN") provides power to the second power node 215 at V _BAT2 . However, in the absence of such a parallel charger 216, the efficiency may be unacceptably low for some situations.

For these reasons, the efficiency of charging a multi-cell series battery using the power supply circuit 200 of FIG. 2A may not be ideal. Accordingly, certain aspects of the present disclosure provide techniques and devices for charging multi-cell series batteries with greater efficiency.

FIG. 2B is a block diagram of an exemplary power supply circuit 250 with a dual output SMPS 260 and a charge pump 214 for charging a battery 230 . Power supply circuit 250 adds two switches to power supply circuit 200 of FIG. 2A (which may be implemented via transistors QPH1 and QPH2 as illustrated). One path via a first switch (eg, via transistor QPH1 ) provides a first output of dual output SMPS 260 , which is similar to the output of SMPS 210 of FIG. 2A . Another path via a second switch (eg, via transistor QPH2 ) provides a second output of SMPS 260 , which can selectively switch output node 270 (labeled “V _OUT ”) by bypassing charge pump 214 Connect to the second power supply node 215 with V _BAT2 .

When V _MID < V _BAT2 (eg, with 5 V USB or WLS BPP Tx), the first switch (transistor QPH1 ) is closed and the second switch (transistor QPH2 ) is open. In this case, the SMPS 260 operates in forward mode to down-convert the input voltage V _MID to _{a lower voltage V BAT1 (} eg, 3 to 4.5 V ), and the charge pump 214 operates in X2 mode to double the voltage V _BAT1 to a higher voltage V _BAT2 (eg, 6 to 9 V) at the second power supply node 215 . Therefore, in this case, current flows in the first path 272 from the input node to the output node 270, through the first switch (transistor QPH1) and the charge pump 214 to charge the battery 230, as shown in FIG. 2B Show.

When V _MID > V _BAT2 (for example, using QC2/3/4, USB PD or WLS EPP/HPP Tx), the first switch (transistor QPH1) is on and the second switch (transistor QPH2) is closed , to supply power from the SMPS 260 to the battery 230 in another forward mode (eg, V _BAT2 =6 to 9 V), effectively bypassing the charge pump 214 . Thus, in this case as illustrated in FIG. 2C , current flows in the second path 274 from the input node to the output node 270 and via the second switch (transistor QPH2 ) to charge the battery 230 . In this case, instead of charging the battery 230 , the charge pump 214 may be operated in a divider mode (eg, D2 mode) to supply power to the system load (eg, V _PH1 =3 to 4.5 V).

Compared to the power supply circuit 200 of FIG. 2A , the power supply circuit 250 of FIG. 2B can achieve significantly higher efficiency at higher input voltages. This is the case because the SMPS 260 can operate at a high duty cycle near 1.0 (e.g., V _MID =9 V and V _OUT =8 to 9 V at the inductor) or at a 0.5 duty cycle (e.g., V _MID =15 to 20 V and V _OUT =8 to 9 V), both of which result in low inductor current ripple (as shown in graph 300 of FIG. 3 ) and thus low AC losses. Furthermore, in the case of FIG. 2C where the first switch is open and the second switch is closed, the charge pump 214 is effectively bypassed so that there is no 1 to 2% efficiency loss via the charge pump when charging the battery.

Additionally, the SMPS 260 can operate in inverting mode as a dual-input (two-level) boost converter. For example, as shown in FIG. 2D , current may be routed from battery 230 via third path 276 through a second switch (eg, transistor QPH2 ) such that voltage V _BAT2 at second power supply node 215 may be controlled by SMPS 260 . Boost to power the MID nodes for reverse charging devices connected to the USB port 202 or inductively coupled to the wireless power loop 205 . For example, for reverse WLS charging, the voltage V _BAT2 can be boosted to V _WLS =10 V. Alternatively, as shown in FIG. 2E , current may be routed from battery 230 via fourth path 278 through a first switch (eg, transistor QPH1 ) such that voltage V _BAT1 at first power supply node 213 may be controlled by SMPS 260 Boost to power the MID node for reverse charging the device. For example, voltage V _BAT1 may be boosted to V _USB =5 V for reverse charging of USB devices (eg, according to USB OTG). Depending on the slew rate (and associated inductor current ripple) of the examples provided herein, when boosting V _BAT2 via the second switch, the efficiency can be greater than when boosting V _BAT1 via the first switch efficiency.

As shown, the exemplary power supply circuit 250 is capable of charging a 2S battery, but it is to be understood that the scope of this disclosure includes batteries with more than two cells (e.g., three-cell series (3S), four-cell series ( 4S) battery, or n cells connected in series, where n is an integer greater than 1). Furthermore, while the power supply circuit 250 has a dual output SMPS 260 with a charge pump 214 between two different outputs (eg, between V _BAT1 and V _BAT2 ), it is to be understood that the scope of the present case Includes a multi-output SMPS (for example, a triple-output SMPS for a 3S battery) with multiple switches for selecting between different outputs (for example, V _BAT1 , V _BAT2 , and V _BAT3 for a 3S battery) and A charge pump between each pair of outputs (eg, X1.5/D1.5 charge pump between V _BAT2 and V _BAT3 for a 3S battery). Exemplary operation

FIG. 4 is a flowchart of example operations 400 for supplying power in accordance with certain aspects of the present disclosure. Operations 400 may be performed by a power supply circuit (eg, power supply circuit 250 of FIGS. 2B-2E ).

Operations 400 may begin via the following operations: At block 402 , a switched mode power supply circuit (eg, SMPS 260 ) is operated. At block 404, the power supply circuit may selectively route current through coupling between a first node (eg, output node 270) of the switch-mode power supply circuit and a first terminal (eg, coupled to a first switch (e.g., transistor QPH1) between the first power supply node 213) or routed by coupling between the first node of the switch-mode power supply circuit and the second terminal of the charge pump circuit (e.g., coupled to the second power supply node 215) between the second switch (eg, transistor QPH2).

According to certain aspects, operations 400 may also involve, at optional block 406 , charging a battery (eg, battery 230 ). In this case, operations at block 402 may include operating the switched mode power supply circuit in a forward mode. A battery may include multiple cells connected in series. A battery may be coupled to the second switch and the second terminal of the charge pump circuit.

According to certain aspects, when the input voltage (eg, V _MID ) at the second node (eg, MID node) of the switch-mode power supply circuit is less than the battery voltage of the battery (eg, V _BAT2 ), at block 404 Selective routing involves closing a first switch and opening a second switch. In such cases where the input voltage at the second node of the switch-mode power supply circuit is less than the battery voltage of the battery, operations 400 may also include: applying the charge pump circuit as a multiplied by two voltage from the first terminal to the second terminal of the charge pump circuit. The charge pump operates.

According to certain aspects, when the input voltage at the second node (eg, MID node) of the switch-mode power supply circuit is greater than the battery voltage of the battery (eg, V _BAT2 ), selectively routing at block 404 involves placing the second One switch opens and closes the second switch. In such cases where the input voltage at the second node of the switch-mode power supply circuit is greater than the battery voltage of the battery, operation 400 may also include: using the charge pump circuit as a divide-by-two from the second terminal to the first terminal of the charge pump circuit The charge pump operates.

According to certain aspects, operations 400 may also involve receiving power to charge the battery via at least one of: a port designated for a wired connection and coupled to a switch-mode power supply circuit (e.g., USB port 202 ), or a wireless power transceiver (eg, wireless power transceiver 204 ) coupled to the switch-mode power supply circuit.

According to certain aspects, operating at block 402 involves operating the switched mode power supply circuit in reverse mode, and selectively routing at block 404 involves closing the first switch and opening the second switch to direct the current Routing from the charge pump circuit to the switched mode power supply circuit via the first switch. For some aspects, operations 400 also include operating the charge pump circuit as a divide-by-two charge pump from the second terminal to the first terminal of the charge pump circuit. For some aspects, operations 400 also involve receiving power from a battery (eg, battery 230 ). In this case, the battery may include a plurality of cells connected in series. A battery may be coupled to the second switch and the second terminal of the charge pump circuit.

According to certain aspects, the operation at block 402 involves operating the switched mode power supply circuit in reverse mode, and selectively routing at block 404 includes opening the first switch and closing the second switch to divert the current From the battery is routed to the switched mode power supply circuit via the second switch. In this case, the battery may include a plurality of cells connected in series. A battery may be coupled to the second switch and the second terminal of the charge pump circuit. Exemplary aspect

In addition to the various aspects described above, the specific combination of various aspects is also within the scope of the content of this case. Some of the aspects are described in detail below:

Aspect 1: A power supply circuit, which includes: a switch-mode power supply circuit having an input node and an output node; a charge pump circuit having a first terminal and a second terminal; coupled between the output node of the switch-mode power supply circuit and the charge pump circuit a first switch between the first terminals; and a second switch coupled between the output node of the switched mode power supply circuit and the second terminal of the charge pump circuit.

Aspect 2: The power supply circuit according to Aspect 1, further comprising: a battery including a plurality of cells connected in series, wherein the second terminal of the charge pump circuit is coupled to the battery.

Aspect 3: The power supply circuit of Aspect 2, wherein the first switch is configured to be closed and the second switch is configured to be open when the input voltage at the input node is less than the battery voltage of the battery.

Aspect 4: The power supply circuit according to Aspect 3, wherein when the input voltage at the input node is less than the battery voltage of the battery, the charge pump circuit is configured as a multiplied charge pump from the first terminal to the second terminal of the charge pump circuit .

Aspect 5: The power supply circuit of Aspect 2, wherein when the input voltage at the input node is greater than the battery voltage of the battery, the first switch is configured to be open and the second switch is configured to be closed.

Aspect 6: The power supply circuit according to Aspect 5, wherein the charge pump circuit is configured as a divide-by-two charge pump from the second terminal to the first terminal of the charge pump circuit when the input voltage at the input node is greater than the battery voltage of the battery .

Aspect 7: The power supply circuit of any of the preceding aspects, wherein the power supply circuit is configured to operate in a reverse mode, and wherein in the reverse mode the first switch is configured to be closed and the second switch is configured to be enabled.

Aspect 8: The power supply circuit of any of Aspects 1-6, wherein the power supply circuit is configured to operate in a reverse mode, and wherein in the reverse mode, the first switch is configured to be on, and the second switch is configured to be on. Two switches are configured to be closed.

Aspect 9: The power supply circuit of any of the preceding aspects, wherein the first switch and the second switch comprise n-type metal oxide semiconductor (NMOS) transistors.

Aspect 10: The power supply circuit of any of the preceding aspects, wherein the switched mode power supply circuit comprises: a first transistor coupled to the input node; a second transistor coupled to the first transistor via the first node; a third transistor coupled to the second transistor via the second node; a fourth transistor coupled to the third transistor via the third node; a capacitive element having a first terminal coupled to the first node and having a first terminal coupled to the a second terminal of the third node; and an inductive element having a first terminal coupled to the second node and having a second terminal coupled to the output node of the switched mode power supply circuit.

Aspect 11: The power supply circuit according to Aspect 10, wherein the first transistor, the second transistor, the third transistor, and the fourth transistor include n-type metal oxide semiconductor (NMOS) transistors.

Aspect 12: The power supply circuit of any of the preceding aspects, also comprising: a shunt charger coupled between the input node of the switched mode power supply circuit and the second terminal of the charge pump circuit.

Aspect 13: A power management integrated circuit (PMIC) comprising at least a portion of the power circuit according to any preceding aspect.

Aspect 14: A method of supplying electrical power comprising the steps of: operating a switch mode power supply circuit; and selectively routing current through a first node coupled between a first node of the switch mode power supply circuit and a first terminal of a charge pump circuit. A switch or via a second switch coupled between the first node of the switched mode power supply circuit and the second terminal of the charge pump circuit.

Aspect 15: The method of Aspect 14, further comprising the step of: charging a battery, wherein operating includes operating a switched mode power supply circuit in a forward mode, wherein the battery comprises a plurality of cells connected in series, and wherein the battery is coupled to The second switch and the second terminal of the charge pump circuit.

Aspect 16: The method of Aspect 15, wherein when the input voltage at the second node of the switched mode power supply circuit is less than a battery voltage of the battery, selectively routing includes closing the first switch and opening the second switch.

Aspect 17: The method according to Aspect 16, further comprising the step of: when the input voltage at the second node of the switch-mode power supply circuit is less than the battery voltage of the battery, using the charge pump circuit as a switch from the first terminal of the charge pump circuit to The second terminal is operated by a multiply-by-two charge pump.

Aspect 18: The method of Aspect 15, wherein selectively routing includes opening the first switch and closing the second switch when the input voltage at the second node of the switched mode power supply circuit is greater than a battery voltage of the battery.

Aspect 19: The method according to aspect 18, further comprising the step of: when the input voltage at the second node of the switch-mode power supply circuit is greater than the battery voltage of the battery, using the charge pump circuit as the second terminal of the charge pump circuit to The first terminal of the divide-by-two charge pump operates.

Aspect 20: The method of any of Aspects 15-19, further comprising the step of receiving power to charge the battery via at least one of: designated for the wired connection and coupled to the switch A port of a switch mode power circuit; or a wireless power transceiver coupled to a switch mode power circuit.

Aspect 21: The method of any of aspects 14-20, wherein operating comprises: operating the switched mode power supply circuit in a reverse mode; and selectively routing comprises closing the first switch and opening the second switch , to route current from the charge pump circuit to the switched mode power supply circuit via the first switch.

Aspect 22: The method of any of Aspects 14-21, further comprising the step of operating the charge pump circuit as a divide-by-two charge pump from the second terminal to the first terminal of the charge pump circuit.

Aspect 23: The method of any of Aspects 14-22, the battery includes a plurality of cells connected in series; and the battery is coupled to the second switch and the second terminal of the charge pump circuit.

Aspect 24: The method of Aspect 14, wherein operating comprises: operating the switched mode power supply circuit in a reverse mode; selectively routing comprises: opening the first switch and closing the second switch to route current from the battery through the The second switch is routed to the switch mode power supply circuit; the battery includes a plurality of cells connected in series; and the battery is coupled to the second switch and the second terminal of the charge pump circuit.

Aspect 25: A battery charging circuit comprising at least a portion of the power supply circuit according to any of Aspects 1-12.

The various operations of the methods described above may be performed via any suitable means capable of performing the corresponding functions. Such components may include various hardware and/or software components and/or modules, including but not limited to circuits, application specific integrated circuits (ASICs) or processors. In general, where there are operations illustrated in the figures, those operations may have corresponding counterpart functional building elements with like numbering.

As used herein, the term "decision" includes a wide variety of actions. For example, "determining" may include computing, computing, processing, deriving, investigating, inspecting (eg, viewing in a table, database, or another data structure), ascertaining, and the like. In addition, "determining" may include receiving (eg, receiving information), accessing (eg, accessing data in memory), and the like. Additionally, "determining" may include resolving, selecting, selecting, establishing, and the like.

As used herein, a phrase referring to "at least one of" a list of items means any combination of those items, including single members. For example, "at least one of a , b , or c " is intended to cover a , b , c , ab , ac , bc , and abc , and any combination of multiples of the same element (eg, aa , aaa , aab , aac , abb , acc , bb , bbb , bbc , cc and ccc or any other ordering of a , b and c ).

Methods disclosed herein include one or more steps or actions for carrying out the described method. The method steps and/or actions may be interchanged with one another without departing from the scope of the claims. In other words, unless a specific order of steps or actions is specified, the order and/or use of specific steps and/or actions may be modified without departing from the scope of what is claimed.

It is to be understood that the claimed terms are not limited to the precise configuration and elements illustrated above. Various modifications, changes and variations may be made in the arrangement, operation and details of the methods and apparatus described above without departing from the scope of the claimed items.

100: equipment 104: processor 106: memory 108: shell 110: transmitter 112: receiver 114: transceiver 116: antenna 118: signal detector 120: digital signal processor (DSP) 122: battery 123: Power Management System 124: PMIC 125: Battery Charger 126: Bus System 200: Power Circuit 201: Universal Serial Bus (USB) Adapter 202: USB Port 204: Wireless Power Transceiver 205: Wireless Power Circuit 206 ₁ : Gate driver 206 ₂ : Gate driver 206 ₃ : Gate driver 206 ₄ : Gate driver 210: SMPS 213: First power supply node 214: Charge pump 215: Second power supply node 216: Parallel charger 230: Battery 250: Power circuit 260: SMPS 270: output node 272: first path 274: second path 276: third path 278: fourth path 300: graph 400: operation 402: block 404: block 406: block C _FLY : flying across Capacitance element C _OUT : Parallel capacitance element CFH: High-level node of flying capacitor CFL: Low-level node of flying capacitor L1: Inductive element Q _BAT1 : Transistor Q1: Transistor Q2: Transistor Q3: Transistor Q4: Transistor QPH1 : Transistor QPH2: Transistor V _BAT1 : Voltage V _BAT2 : Voltage V _OUT : Voltage V _PH1 : Output voltage node V _USB : Voltage V _WLS : Voltage VSW: Voltage switch node

So that the above features of the subject matter of the present case may be understood in detail, a more detailed description of what has been briefly summarized above may be provided by reference to various aspects, some of which are illustrated in the accompanying drawings. It is to be noted, however, that the drawings illustrate only certain typical aspects of the subject matter and are therefore not to be considered limiting of its scope, since the description may admit to other equally effective aspects.

1 is a block diagram of an exemplary device including a power management system, including a switched-mode power supply (SMPS) circuit and a battery charging circuit, in which aspects of the present disclosure may be practiced.

2A is a block diagram of an exemplary power supply circuit with a single output SMPS and a charge pump for charging a two-cell series (2S) battery.

2B and 2C are block diagrams of an exemplary power supply circuit having a dual output SMPS and a charge pump for charging a 2S battery illustrating different power supply paths, according to certain aspects of the present disclosure.

2D and 2E are block diagrams of the exemplary power supply circuits of FIGS. 2B and 2C operating in reverse as a dual-input SMPS to utilize different power supply paths from 2S battery receives power.

3 is an exemplary graph of normalized current ripple versus duty cycle for a two-level buck converter and a three-level buck converter.

4 is a flow diagram of example operations for supplying power, in accordance with certain aspects of the subject matter.

To facilitate understanding, identical reference numerals have been used where possible to designate identical elements that are common to the drawings. It is contemplated that elements disclosed in one aspect may be beneficially utilized on other aspects without specific recitation.

Domestic deposit information (please note in order of depositor, date, and number) none Overseas storage information (please note in order of storage country, institution, date, and number) none

201: Universal serial bus (USB) adapter

202:USB port

204: Wireless Power Transceiver

213: The first power node

214: Charge pump

216: Parallel charger

230: battery

250: Power circuit

260: SMPS

270: output node

272: The first path

C _FLY : Flying capacitor element

C _OUT : Parallel capacitive element

L1: inductance element

Q _BAT1 : Transistor

Q1: Transistor

Q2: Transistor

Q3: Transistor

Q4: Transistor

QPH1: Transistor

QPH2: Transistor

V _BAT1 : Voltage

V _BAT2 : Voltage

V _OUT : voltage

V _PH1 : output voltage node

V _USB : Voltage

V _WLS : voltage

VSW: voltage switch node

Claims (24)

A power circuit comprising: a switch mode power supply circuit having an input node and an output node; a charge pump circuit having a first terminal and a second terminal; a first switch coupled between the output node of the switched mode power supply circuit and the first terminal of the charge pump circuit; and A second switch is coupled between the output node of the switch mode power supply circuit and the second terminal of the charge pump circuit. The power supply circuit according to claim 1, further comprising: a battery comprising a plurality of cells connected in series, wherein the second terminal of the charge pump circuit is coupled to the battery. The power supply circuit according to claim 2, wherein the first switch is configured to be closed and the second switch is configured to be open when an input voltage at the input node is less than a battery voltage of the battery. The power supply circuit according to claim 3, wherein when the input voltage at the input node is less than the battery voltage of the battery, the charge pump circuit is configured to connect from the first terminal to the second terminal of the charge pump circuit One by two charge pump. The power supply circuit according to claim 2, wherein the first switch is configured to be turned on and the second switch is configured to be turned off when an input voltage at the input node is greater than a battery voltage of the battery. The power supply circuit according to claim 5, wherein when the input voltage at the input node is greater than the battery voltage of the battery, the charge pump circuit is configured to connect from the second terminal to the first terminal of the charge pump circuit A divide-by-two charge pump. The power supply circuit according to claim 1, wherein the power supply circuit is configured to operate in a reverse mode, and wherein in the reverse mode, the first switch is configured to be closed and the second switch is configured to be open . The power supply circuit according to claim 1, wherein the power supply circuit is configured to operate in a reverse mode, and wherein in the reverse mode, the first switch is configured to be open and the second switch is configured to be closed . The power supply circuit according to claim 1, wherein the first switch and the second switch comprise n-type metal oxide semiconductor (NMOS) transistors. The power supply circuit according to claim 1, wherein the switch mode power supply circuit comprises: a first transistor coupled to the input node; a second transistor coupled to the first transistor via a first node; a third transistor coupled to the second transistor via a second node; a fourth transistor coupled to the third transistor via a third node; a capacitive element having a first terminal coupled to the first node and having a second terminal coupled to the third node; and An inductive element having a first terminal coupled to the second node and having a second terminal coupled to the output node of the switched mode power supply circuit. The power supply circuit according to claim 10, wherein the first transistor, the second transistor, the third transistor and the fourth transistor comprise n-type metal oxide semiconductor (NMOS) transistors. The power supply circuit according to claim 1, further comprising: a parallel charger coupled between the input node of the switch mode power supply circuit and the second terminal of the charge pump circuit. A power management integrated circuit (PMIC) comprising at least a part of the power circuit according to claim 1. A method of supplying electricity, comprising the steps of: operating a switch mode power supply circuit; and selectively routing a current through a first switch coupled between a first node of the switched mode power supply circuit and a first terminal of a charge pump circuit or through the first A second switch between the node and a second terminal of the charge pump circuit. The method according to claim 14, further comprising the step of: charging a battery, wherein the step of operating comprises the step of operating the switch mode power supply circuit in a forward mode, wherein the battery comprises a plurality of cells connected in series , and wherein the battery is coupled to the second switch and the second terminal of the charge pump circuit. The method according to claim 15, wherein when an input voltage at a second node of the switch mode power supply circuit is less than a battery voltage of the battery, the step of selectively routing comprises the step of: closing the first switch And turn on the second switch. The method according to claim 16 also includes the step of: when the input voltage at the second node of the switch-mode power supply circuit is less than the battery voltage of the battery, using the charge pump circuit as the slave of the charge pump circuit A one-by-two charge pump from the first terminal to the second terminal operates. The method according to claim 15, wherein when an input voltage at a second node of the switch mode power supply circuit is greater than a battery voltage of the battery, the step of selectively routing comprises the step of: opening the first switch And close the second switch. The method according to claim 18, also includes the step of: when the input voltage at the second node of the switch mode power supply circuit is greater than the battery voltage of the battery, using the charge pump circuit as the slave of the charge pump circuit A divide-by-two charge pump operates from the second terminal to the first terminal. The method according to claim 15, further comprising the step of: receiving power to charge the battery via at least one of the following: a port designated for a wired connection and coupled to the switch mode power supply circuit; or A wireless power transceiver coupled to the switch mode power supply circuit. The method according to claim 14, wherein: The step of operating includes the steps of: operating the switch mode power supply circuit in a reverse mode; and The step of selectively routing includes the step of closing the first switch and opening the second switch to route the current from the charge pump circuit to the switched mode power supply circuit via the first switch. The method according to claim 21, also comprising the step of: operating the charge pump circuit as a divide-by-two charge pump from the second terminal to the first terminal of the charge pump circuit. The method according to claim 21, further comprising the step of: receiving power from a battery, wherein: the battery comprises a plurality of cells connected in series; and The battery is coupled to the second switch and the second terminal of the charge pump circuit. The method according to claim 14, wherein: The step of operating includes the steps of: operating the switch mode power supply circuit in a reverse mode; The step of selectively routing includes the steps of: opening the first switch and closing the second switch to route the current from a battery to the switched mode power supply circuit via the second switch; the battery comprises a plurality of cells connected in series; and The battery is coupled to the second switch and the second terminal of the charge pump circuit.

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